xref: /linux/sound/soc/sof/ipc4.c (revision 5c19da34df029fdc29fec1bedf210af7d2c4fccf)
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license.  When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2022 Intel Corporation
7 //
8 // Authors: Rander Wang <rander.wang@linux.intel.com>
9 //	    Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
10 //
11 #include <linux/firmware.h>
12 #include <sound/sof/header.h>
13 #include <sound/sof/ipc4/header.h>
14 #include "sof-priv.h"
15 #include "sof-audio.h"
16 #include "ipc4-fw-reg.h"
17 #include "ipc4-priv.h"
18 #include "ipc4-topology.h"
19 #include "ipc4-telemetry.h"
20 #include "ops.h"
21 
22 static const struct sof_ipc4_fw_status {
23 	int status;
24 	char *msg;
25 } ipc4_status[] = {
26 	{0, "The operation was successful"},
27 	{1, "Invalid parameter specified"},
28 	{2, "Unknown message type specified"},
29 	{3, "Not enough space in the IPC reply buffer to complete the request"},
30 	{4, "The system or resource is busy"},
31 	{5, "Replaced ADSP IPC PENDING (unused)"},
32 	{6, "Unknown error while processing the request"},
33 	{7, "Unsupported operation requested"},
34 	{8, "Reserved (ADSP_STAGE_UNINITIALIZED removed)"},
35 	{9, "Specified resource not found"},
36 	{10, "A resource's ID requested to be created is already assigned"},
37 	{11, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
38 	{12, "Required resource is in invalid state"},
39 	{13, "Requested power transition failed to complete"},
40 	{14, "Manifest of the library being loaded is invalid"},
41 	{15, "Requested service or data is unavailable on the target platform"},
42 	{42, "Library target address is out of storage memory range"},
43 	{43, "Reserved"},
44 	{44, "Image verification by CSE failed"},
45 	{100, "General module management error"},
46 	{101, "Module loading failed"},
47 	{102, "Integrity check of the loaded module content failed"},
48 	{103, "Attempt to unload code of the module in use"},
49 	{104, "Other failure of module instance initialization request"},
50 	{105, "Reserved (ADSP_IPC_OUT_OF_MIPS removed)"},
51 	{106, "Reserved (ADSP_IPC_CONFIG_GET_ERROR removed)"},
52 	{107, "Reserved (ADSP_IPC_CONFIG_SET_ERROR removed)"},
53 	{108, "Reserved (ADSP_IPC_LARGE_CONFIG_GET_ERROR removed)"},
54 	{109, "Reserved (ADSP_IPC_LARGE_CONFIG_SET_ERROR removed)"},
55 	{110, "Invalid (out of range) module ID provided"},
56 	{111, "Invalid module instance ID provided"},
57 	{112, "Invalid queue (pin) ID provided"},
58 	{113, "Invalid destination queue (pin) ID provided"},
59 	{114, "Reserved (ADSP_IPC_BIND_UNBIND_DST_SINK_UNSUPPORTED removed)"},
60 	{115, "Reserved (ADSP_IPC_UNLOAD_INST_EXISTS removed)"},
61 	{116, "Invalid target code ID provided"},
62 	{117, "Injection DMA buffer is too small for probing the input pin"},
63 	{118, "Extraction DMA buffer is too small for probing the output pin"},
64 	{120, "Invalid ID of configuration item provided in TLV list"},
65 	{121, "Invalid length of configuration item provided in TLV list"},
66 	{122, "Invalid structure of configuration item provided"},
67 	{140, "Initialization of DMA Gateway failed"},
68 	{141, "Invalid ID of gateway provided"},
69 	{142, "Setting state of DMA Gateway failed"},
70 	{143, "DMA_CONTROL message targeting gateway not allocated yet"},
71 	{150, "Attempt to configure SCLK while I2S port is running"},
72 	{151, "Attempt to configure MCLK while I2S port is running"},
73 	{152, "Attempt to stop SCLK that is not running"},
74 	{153, "Attempt to stop MCLK that is not running"},
75 	{160, "Reserved (ADSP_IPC_PIPELINE_NOT_INITIALIZED removed)"},
76 	{161, "Reserved (ADSP_IPC_PIPELINE_NOT_EXIST removed)"},
77 	{162, "Reserved (ADSP_IPC_PIPELINE_SAVE_FAILED removed)"},
78 	{163, "Reserved (ADSP_IPC_PIPELINE_RESTORE_FAILED removed)"},
79 	{165, "Reserved (ADSP_IPC_PIPELINE_ALREADY_EXISTS removed)"},
80 };
81 
82 typedef void (*ipc4_notification_handler)(struct snd_sof_dev *sdev,
83 					  struct sof_ipc4_msg *msg);
84 
85 static int sof_ipc4_check_reply_status(struct snd_sof_dev *sdev, u32 status)
86 {
87 	int i, ret;
88 
89 	status &= SOF_IPC4_REPLY_STATUS;
90 
91 	if (!status)
92 		return 0;
93 
94 	for (i = 0; i < ARRAY_SIZE(ipc4_status); i++) {
95 		if (ipc4_status[i].status == status) {
96 			dev_err(sdev->dev, "FW reported error: %u - %s\n",
97 				status, ipc4_status[i].msg);
98 			goto to_errno;
99 		}
100 	}
101 
102 	if (i == ARRAY_SIZE(ipc4_status))
103 		dev_err(sdev->dev, "FW reported error: %u - Unknown\n", status);
104 
105 to_errno:
106 	switch (status) {
107 	case 2:
108 	case 15:
109 		ret = -EOPNOTSUPP;
110 		break;
111 	case 8:
112 	case 11:
113 	case 105 ... 109:
114 	case 114 ... 115:
115 	case 160 ... 163:
116 	case 165:
117 		ret = -ENOENT;
118 		break;
119 	case 4:
120 	case 150:
121 	case 151:
122 		ret = -EBUSY;
123 		break;
124 	default:
125 		ret = -EINVAL;
126 		break;
127 	}
128 
129 	return ret;
130 }
131 
132 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
133 #define DBG_IPC4_MSG_TYPE_ENTRY(type)	[SOF_IPC4_##type] = #type
134 static const char * const ipc4_dbg_mod_msg_type[] = {
135 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_INIT_INSTANCE),
136 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_GET),
137 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_CONFIG_SET),
138 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_GET),
139 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_LARGE_CONFIG_SET),
140 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_BIND),
141 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_UNBIND),
142 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_DX),
143 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_SET_D0IX),
144 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_ENTER_MODULE_RESTORE),
145 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_EXIT_MODULE_RESTORE),
146 	DBG_IPC4_MSG_TYPE_ENTRY(MOD_DELETE_INSTANCE),
147 };
148 
149 static const char * const ipc4_dbg_glb_msg_type[] = {
150 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_BOOT_CONFIG),
151 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_ROM_CONTROL),
152 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_IPCGATEWAY_CMD),
153 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_PERF_MEASUREMENTS_CMD),
154 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_CHAIN_DMA),
155 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_MULTIPLE_MODULES),
156 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_UNLOAD_MULTIPLE_MODULES),
157 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_CREATE_PIPELINE),
158 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_DELETE_PIPELINE),
159 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_SET_PIPELINE_STATE),
160 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_STATE),
161 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_GET_PIPELINE_CONTEXT_SIZE),
162 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_SAVE_PIPELINE),
163 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_RESTORE_PIPELINE),
164 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY),
165 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_LOAD_LIBRARY_PREPARE),
166 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_INTERNAL_MESSAGE),
167 	DBG_IPC4_MSG_TYPE_ENTRY(GLB_NOTIFICATION),
168 };
169 
170 #define DBG_IPC4_NOTIFICATION_TYPE_ENTRY(type)	[SOF_IPC4_NOTIFY_##type] = #type
171 static const char * const ipc4_dbg_notification_type[] = {
172 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PHRASE_DETECTED),
173 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(RESOURCE_EVENT),
174 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(LOG_BUFFER_STATUS),
175 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(TIMESTAMP_CAPTURED),
176 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_READY),
177 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(FW_AUD_CLASS_RESULT),
178 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(EXCEPTION_CAUGHT),
179 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(MODULE_NOTIFICATION),
180 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(PROBE_DATA_AVAILABLE),
181 	DBG_IPC4_NOTIFICATION_TYPE_ENTRY(ASYNC_MSG_SRVC_MESSAGE),
182 };
183 
184 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
185 				bool data_size_valid)
186 {
187 	u32 val, type;
188 	const u8 *str2 = NULL;
189 	const u8 *str = NULL;
190 
191 	val = msg->primary & SOF_IPC4_MSG_TARGET_MASK;
192 	type = SOF_IPC4_MSG_TYPE_GET(msg->primary);
193 
194 	if (val == SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG)) {
195 		/* Module message */
196 		if (type < SOF_IPC4_MOD_TYPE_LAST)
197 			str = ipc4_dbg_mod_msg_type[type];
198 		if (!str)
199 			str = "Unknown Module message type";
200 	} else {
201 		/* Global FW message */
202 		if (type < SOF_IPC4_GLB_TYPE_LAST)
203 			str = ipc4_dbg_glb_msg_type[type];
204 		if (!str)
205 			str = "Unknown Global message type";
206 
207 		if (type == SOF_IPC4_GLB_NOTIFICATION) {
208 			/* Notification message */
209 			u32 notif = SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary);
210 
211 			/* Do not print log buffer notification if not desired */
212 			if (notif == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS &&
213 			    !sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS))
214 				return;
215 
216 			if (notif < SOF_IPC4_NOTIFY_TYPE_LAST)
217 				str2 = ipc4_dbg_notification_type[notif];
218 			if (!str2)
219 				str2 = "Unknown Global notification";
220 		}
221 	}
222 
223 	if (str2) {
224 		if (data_size_valid && msg->data_size)
225 			dev_dbg(dev, "%s: %#x|%#x: %s|%s [data size: %zu]\n",
226 				text, msg->primary, msg->extension, str, str2,
227 				msg->data_size);
228 		else
229 			dev_dbg(dev, "%s: %#x|%#x: %s|%s\n", text, msg->primary,
230 				msg->extension, str, str2);
231 	} else {
232 		if (data_size_valid && msg->data_size)
233 			dev_dbg(dev, "%s: %#x|%#x: %s [data size: %zu]\n",
234 				text, msg->primary, msg->extension, str,
235 				msg->data_size);
236 		else
237 			dev_dbg(dev, "%s: %#x|%#x: %s\n", text, msg->primary,
238 				msg->extension, str);
239 	}
240 }
241 
242 const char *sof_ipc4_pipeline_state_str(enum sof_ipc4_pipeline_state state)
243 {
244 	switch (state) {
245 	case SOF_IPC4_PIPE_INVALID_STATE:
246 		return " (INVALID_STATE)";
247 	case SOF_IPC4_PIPE_UNINITIALIZED:
248 		return " (UNINITIALIZED)";
249 	case SOF_IPC4_PIPE_RESET:
250 		return " (RESET)";
251 	case SOF_IPC4_PIPE_PAUSED:
252 		return " (PAUSED)";
253 	case SOF_IPC4_PIPE_RUNNING:
254 		return " (RUNNING)";
255 	case SOF_IPC4_PIPE_EOS:
256 		return " (EOS)";
257 	default:
258 		return " (<unknown>)";
259 	}
260 }
261 #else /* CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC */
262 static void sof_ipc4_log_header(struct device *dev, u8 *text, struct sof_ipc4_msg *msg,
263 				bool data_size_valid)
264 {
265 	/* Do not print log buffer notification if not desired */
266 	if (!sof_debug_check_flag(SOF_DBG_PRINT_DMA_POSITION_UPDATE_LOGS) &&
267 	    !SOF_IPC4_MSG_IS_MODULE_MSG(msg->primary) &&
268 	    SOF_IPC4_MSG_TYPE_GET(msg->primary) == SOF_IPC4_GLB_NOTIFICATION &&
269 	    SOF_IPC4_NOTIFICATION_TYPE_GET(msg->primary) == SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS)
270 		return;
271 
272 	if (data_size_valid && msg->data_size)
273 		dev_dbg(dev, "%s: %#x|%#x [data size: %zu]\n", text,
274 			msg->primary, msg->extension, msg->data_size);
275 	else
276 		dev_dbg(dev, "%s: %#x|%#x\n", text, msg->primary, msg->extension);
277 }
278 
279 const char *sof_ipc4_pipeline_state_str(enum sof_ipc4_pipeline_state state)
280 {
281 	return "";
282 }
283 #endif
284 
285 static void sof_ipc4_dump_payload(struct snd_sof_dev *sdev,
286 				  void *ipc_data, size_t size)
287 {
288 	print_hex_dump_debug("Message payload: ", DUMP_PREFIX_OFFSET,
289 			     16, 4, ipc_data, size, false);
290 }
291 
292 static int sof_ipc4_get_reply(struct snd_sof_dev *sdev)
293 {
294 	struct snd_sof_ipc_msg *msg = sdev->msg;
295 	struct sof_ipc4_msg *ipc4_reply;
296 	int ret;
297 
298 	/* get the generic reply */
299 	ipc4_reply = msg->reply_data;
300 
301 	sof_ipc4_log_header(sdev->dev, "ipc tx reply", ipc4_reply, false);
302 
303 	ret = sof_ipc4_check_reply_status(sdev, ipc4_reply->primary);
304 	if (ret)
305 		return ret;
306 
307 	/* No other information is expected for non large config get replies */
308 	if (!msg->reply_size || !SOF_IPC4_MSG_IS_MODULE_MSG(ipc4_reply->primary) ||
309 	    (SOF_IPC4_MSG_TYPE_GET(ipc4_reply->primary) != SOF_IPC4_MOD_LARGE_CONFIG_GET))
310 		return 0;
311 
312 	/* Read the requested payload */
313 	snd_sof_dsp_mailbox_read(sdev, sdev->dsp_box.offset, ipc4_reply->data_ptr,
314 				 msg->reply_size);
315 
316 	return 0;
317 }
318 
319 /* wait for IPC message reply */
320 static int ipc4_wait_tx_done(struct snd_sof_ipc *ipc, void *reply_data)
321 {
322 	struct snd_sof_ipc_msg *msg = &ipc->msg;
323 	struct sof_ipc4_msg *ipc4_msg = msg->msg_data;
324 	struct snd_sof_dev *sdev = ipc->sdev;
325 	int ret;
326 
327 	/* wait for DSP IPC completion */
328 	ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
329 				 msecs_to_jiffies(sdev->ipc_timeout));
330 	if (ret == 0) {
331 		dev_err(sdev->dev, "ipc timed out for %#x|%#x\n",
332 			ipc4_msg->primary, ipc4_msg->extension);
333 		snd_sof_handle_fw_exception(ipc->sdev, "IPC timeout");
334 		return -ETIMEDOUT;
335 	}
336 
337 	if (msg->reply_error) {
338 		dev_err(sdev->dev, "ipc error for msg %#x|%#x\n",
339 			ipc4_msg->primary, ipc4_msg->extension);
340 		ret =  msg->reply_error;
341 	} else {
342 		if (reply_data) {
343 			struct sof_ipc4_msg *ipc4_reply = msg->reply_data;
344 			struct sof_ipc4_msg *ipc4_reply_data = reply_data;
345 
346 			/* Copy the header */
347 			ipc4_reply_data->header_u64 = ipc4_reply->header_u64;
348 			if (msg->reply_size && ipc4_reply_data->data_ptr) {
349 				/* copy the payload returned from DSP */
350 				memcpy(ipc4_reply_data->data_ptr, ipc4_reply->data_ptr,
351 				       msg->reply_size);
352 				ipc4_reply_data->data_size = msg->reply_size;
353 			}
354 		}
355 
356 		ret = 0;
357 		sof_ipc4_log_header(sdev->dev, "ipc tx done ", ipc4_msg, true);
358 	}
359 
360 	/* re-enable dumps after successful IPC tx */
361 	if (sdev->ipc_dump_printed) {
362 		sdev->dbg_dump_printed = false;
363 		sdev->ipc_dump_printed = false;
364 	}
365 
366 	return ret;
367 }
368 
369 static int ipc4_tx_msg_unlocked(struct snd_sof_ipc *ipc,
370 				void *msg_data, size_t msg_bytes,
371 				void *reply_data, size_t reply_bytes)
372 {
373 	struct sof_ipc4_msg *ipc4_msg = msg_data;
374 	struct snd_sof_dev *sdev = ipc->sdev;
375 	int ret;
376 
377 	if (msg_bytes > ipc->max_payload_size || reply_bytes > ipc->max_payload_size)
378 		return -EINVAL;
379 
380 	sof_ipc4_log_header(sdev->dev, "ipc tx      ", msg_data, true);
381 
382 	ret = sof_ipc_send_msg(sdev, msg_data, msg_bytes, reply_bytes);
383 	if (ret) {
384 		dev_err_ratelimited(sdev->dev,
385 				    "%s: ipc message send for %#x|%#x failed: %d\n",
386 				    __func__, ipc4_msg->primary, ipc4_msg->extension, ret);
387 		return ret;
388 	}
389 
390 	/* now wait for completion */
391 	return ipc4_wait_tx_done(ipc, reply_data);
392 }
393 
394 static int sof_ipc4_tx_msg(struct snd_sof_dev *sdev, void *msg_data, size_t msg_bytes,
395 			   void *reply_data, size_t reply_bytes, bool no_pm)
396 {
397 	struct snd_sof_ipc *ipc = sdev->ipc;
398 	int ret;
399 
400 	if (!msg_data)
401 		return -EINVAL;
402 
403 	if (!no_pm) {
404 		const struct sof_dsp_power_state target_state = {
405 			.state = SOF_DSP_PM_D0,
406 		};
407 
408 		/* ensure the DSP is in D0i0 before sending a new IPC */
409 		ret = snd_sof_dsp_set_power_state(sdev, &target_state);
410 		if (ret < 0)
411 			return ret;
412 	}
413 
414 	/* Serialise IPC TX */
415 	guard(mutex)(&ipc->tx_mutex);
416 
417 	ret = ipc4_tx_msg_unlocked(ipc, msg_data, msg_bytes, reply_data, reply_bytes);
418 
419 	if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD)) {
420 		struct sof_ipc4_msg *msg = NULL;
421 
422 		/* payload is indicated by non zero msg/reply_bytes */
423 		if (msg_bytes)
424 			msg = msg_data;
425 		else if (reply_bytes)
426 			msg = reply_data;
427 
428 		if (msg)
429 			sof_ipc4_dump_payload(sdev, msg->data_ptr, msg->data_size);
430 	}
431 
432 	return ret;
433 }
434 
435 static bool sof_ipc4_tx_payload_for_get_data(struct sof_ipc4_msg *tx)
436 {
437 	/*
438 	 * Messages that require TX payload with LARGE_CONFIG_GET.
439 	 * The TX payload is placed into the IPC message data section by caller,
440 	 * which needs to be copied to temporary buffer since the received data
441 	 * will overwrite it.
442 	 */
443 	switch (tx->extension & SOF_IPC4_MOD_EXT_MSG_PARAM_ID_MASK) {
444 	case SOF_IPC4_MOD_EXT_MSG_PARAM_ID(SOF_IPC4_SWITCH_CONTROL_PARAM_ID):
445 	case SOF_IPC4_MOD_EXT_MSG_PARAM_ID(SOF_IPC4_ENUM_CONTROL_PARAM_ID):
446 	case SOF_IPC4_MOD_EXT_MSG_PARAM_ID(SOF_IPC4_BYTES_CONTROL_PARAM_ID):
447 		return true;
448 	default:
449 		return false;
450 	}
451 }
452 
453 static int sof_ipc4_set_get_data(struct snd_sof_dev *sdev, void *data,
454 				 size_t payload_bytes, bool set)
455 {
456 	const struct sof_dsp_power_state target_state = {
457 			.state = SOF_DSP_PM_D0,
458 	};
459 	size_t payload_limit = sdev->ipc->max_payload_size;
460 	struct sof_ipc4_msg *ipc4_msg = data;
461 	struct sof_ipc4_msg tx = {{ 0 }};
462 	struct sof_ipc4_msg rx = {{ 0 }};
463 	size_t remaining = payload_bytes;
464 	void *tx_payload_for_get = NULL;
465 	size_t tx_data_size = 0;
466 	size_t offset = 0;
467 	size_t chunk_size;
468 	int ret;
469 
470 	if (!data)
471 		return -EINVAL;
472 
473 	if ((ipc4_msg->primary & SOF_IPC4_MSG_TARGET_MASK) !=
474 	    SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG))
475 		return -EINVAL;
476 
477 	ipc4_msg->primary &= ~SOF_IPC4_MSG_TYPE_MASK;
478 	tx.primary = ipc4_msg->primary;
479 	tx.extension = ipc4_msg->extension;
480 
481 	if (set)
482 		tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_SET);
483 	else
484 		tx.primary |= SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_LARGE_CONFIG_GET);
485 
486 	tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
487 	tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(payload_bytes);
488 
489 	tx.extension |= SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK(1);
490 
491 	if (sof_ipc4_tx_payload_for_get_data(&tx)) {
492 		tx_data_size = min(ipc4_msg->data_size, payload_limit);
493 		tx_payload_for_get = kmemdup(ipc4_msg->data_ptr, tx_data_size,
494 					     GFP_KERNEL);
495 		if (!tx_payload_for_get)
496 			return -ENOMEM;
497 	}
498 
499 	/* ensure the DSP is in D0i0 before sending IPC */
500 	ret = snd_sof_dsp_set_power_state(sdev, &target_state);
501 	if (ret < 0) {
502 		kfree(tx_payload_for_get);
503 		return ret;
504 	}
505 
506 	/* Serialise IPC TX */
507 	guard(mutex)(&sdev->ipc->tx_mutex);
508 
509 	do {
510 		size_t tx_size, rx_size;
511 
512 		if (remaining > payload_limit) {
513 			chunk_size = payload_limit;
514 		} else {
515 			chunk_size = remaining;
516 			if (set)
517 				tx.extension |= SOF_IPC4_MOD_EXT_MSG_LAST_BLOCK(1);
518 		}
519 
520 		if (offset) {
521 			tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK;
522 			tx.extension &= ~SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
523 			tx.extension |= SOF_IPC4_MOD_EXT_MSG_SIZE(offset);
524 		}
525 
526 		if (set) {
527 			tx.data_size = chunk_size;
528 			tx.data_ptr = ipc4_msg->data_ptr + offset;
529 
530 			tx_size = chunk_size;
531 			rx_size = 0;
532 		} else {
533 			rx.primary = 0;
534 			rx.extension = 0;
535 			rx.data_size = chunk_size;
536 			rx.data_ptr = ipc4_msg->data_ptr + offset;
537 
538 			if (tx_payload_for_get) {
539 				tx_size = tx_data_size;
540 				tx.data_size = tx_size;
541 				tx.data_ptr = tx_payload_for_get;
542 			} else {
543 				tx_size = 0;
544 				tx.data_size = 0;
545 				tx.data_ptr = NULL;
546 			}
547 			rx_size = chunk_size;
548 		}
549 
550 		/* Send the message for the current chunk */
551 		ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size);
552 		if (ret < 0) {
553 			dev_err(sdev->dev,
554 				"%s: large config %s failed at offset %zu: %d\n",
555 				__func__, set ? "set" : "get", offset, ret);
556 			goto out;
557 		}
558 
559 		if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) {
560 			/* Verify the firmware reported total payload size */
561 			rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK;
562 
563 			if (rx_size > payload_bytes) {
564 				dev_err(sdev->dev,
565 					"%s: Receive buffer (%zu) is too small for %zu\n",
566 					__func__, payload_bytes, rx_size);
567 				ret = -ENOMEM;
568 				goto out;
569 			}
570 
571 			if (rx_size < chunk_size) {
572 				chunk_size = rx_size;
573 				remaining = rx_size;
574 			} else if (rx_size < payload_bytes) {
575 				remaining = rx_size;
576 			}
577 		}
578 
579 		offset += chunk_size;
580 		remaining -= chunk_size;
581 	} while (remaining);
582 
583 	/* Adjust the received data size if needed */
584 	if (!set && payload_bytes != offset)
585 		ipc4_msg->data_size = offset;
586 
587 out:
588 	if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
589 		sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr, ipc4_msg->data_size);
590 
591 	kfree(tx_payload_for_get);
592 
593 	return ret;
594 }
595 
596 static int sof_ipc4_init_msg_memory(struct snd_sof_dev *sdev)
597 {
598 	struct sof_ipc4_msg *ipc4_msg;
599 	struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
600 
601 	/* TODO: get max_payload_size from firmware */
602 	sdev->ipc->max_payload_size = SOF_IPC4_MSG_MAX_SIZE;
603 
604 	/* Allocate memory for the ipc4 container and the maximum payload */
605 	msg->reply_data = devm_kzalloc(sdev->dev, sdev->ipc->max_payload_size +
606 				       sizeof(struct sof_ipc4_msg), GFP_KERNEL);
607 	if (!msg->reply_data)
608 		return -ENOMEM;
609 
610 	ipc4_msg = msg->reply_data;
611 	ipc4_msg->data_ptr = msg->reply_data + sizeof(struct sof_ipc4_msg);
612 
613 	return 0;
614 }
615 
616 size_t sof_ipc4_find_debug_slot_offset_by_type(struct snd_sof_dev *sdev,
617 					       u32 slot_type)
618 {
619 	size_t slot_desc_type_offset;
620 	u32 type;
621 	int i;
622 
623 	/* The type is the second u32 in the slot descriptor */
624 	slot_desc_type_offset = sdev->debug_box.offset + sizeof(u32);
625 	for (i = 0; i < SOF_IPC4_MAX_DEBUG_SLOTS; i++) {
626 		sof_mailbox_read(sdev, slot_desc_type_offset, &type, sizeof(type));
627 
628 		if (type == slot_type)
629 			return sdev->debug_box.offset + (i + 1) * SOF_IPC4_DEBUG_SLOT_SIZE;
630 
631 		slot_desc_type_offset += SOF_IPC4_DEBUG_DESCRIPTOR_SIZE;
632 	}
633 
634 	dev_dbg(sdev->dev, "Slot type %#x is not available in debug window\n", slot_type);
635 	return 0;
636 }
637 EXPORT_SYMBOL(sof_ipc4_find_debug_slot_offset_by_type);
638 
639 static int ipc4_fw_ready(struct snd_sof_dev *sdev, struct sof_ipc4_msg *ipc4_msg)
640 {
641 	if (!sdev->first_boot) {
642 		struct sof_ipc4_fw_data *ipc4_data = sdev->private;
643 
644 		/*
645 		 * After the initial boot only check if the libraries have been
646 		 * restored when full context save is not enabled
647 		 */
648 		if (!ipc4_data->fw_context_save)
649 			ipc4_data->libraries_restored = !!(ipc4_msg->primary &
650 							   SOF_IPC4_FW_READY_LIB_RESTORED);
651 
652 		return 0;
653 	}
654 
655 	sof_ipc4_create_exception_debugfs_node(sdev);
656 
657 	return sof_ipc4_init_msg_memory(sdev);
658 }
659 
660 static void sof_ipc4_module_notification_handler(struct snd_sof_dev *sdev,
661 						 struct sof_ipc4_msg *ipc4_msg)
662 {
663 	struct sof_ipc4_notify_module_data *data = ipc4_msg->data_ptr;
664 
665 	/*
666 	 * If the notification includes additional, module specific data, then
667 	 * we need to re-allocate the buffer and re-read the whole payload,
668 	 * including the event_data
669 	 */
670 	if (data->event_data_size) {
671 		void *new;
672 		int ret;
673 
674 		ipc4_msg->data_size += data->event_data_size;
675 
676 		new = krealloc(ipc4_msg->data_ptr, ipc4_msg->data_size, GFP_KERNEL);
677 		if (!new) {
678 			ipc4_msg->data_size -= data->event_data_size;
679 			return;
680 		}
681 
682 		/* re-read the whole payload */
683 		ipc4_msg->data_ptr = new;
684 		ret = snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr,
685 					   ipc4_msg->data_size);
686 		if (ret < 0) {
687 			dev_err(sdev->dev,
688 				"Failed to read the full module notification: %d\n",
689 				ret);
690 			return;
691 		}
692 		data = ipc4_msg->data_ptr;
693 	}
694 
695 	/* Handle ALSA kcontrol notification */
696 	if ((data->event_id & SOF_IPC4_NOTIFY_MODULE_EVENTID_ALSA_MAGIC_MASK) ==
697 	    SOF_IPC4_NOTIFY_MODULE_EVENTID_ALSA_MAGIC_VAL) {
698 		const struct sof_ipc_tplg_ops *tplg_ops = sdev->ipc->ops->tplg;
699 
700 		if (tplg_ops->control->update)
701 			tplg_ops->control->update(sdev, ipc4_msg);
702 	}
703 }
704 
705 static void sof_ipc4_rx_msg(struct snd_sof_dev *sdev)
706 {
707 	struct sof_ipc4_msg *ipc4_msg = sdev->ipc->msg.rx_data;
708 	ipc4_notification_handler handler_func = NULL;
709 	size_t data_size = 0;
710 	int err;
711 
712 	if (!ipc4_msg || !SOF_IPC4_MSG_IS_NOTIFICATION(ipc4_msg->primary))
713 		return;
714 
715 	ipc4_msg->data_ptr = NULL;
716 	ipc4_msg->data_size = 0;
717 
718 	sof_ipc4_log_header(sdev->dev, "ipc rx      ", ipc4_msg, false);
719 
720 	switch (SOF_IPC4_NOTIFICATION_TYPE_GET(ipc4_msg->primary)) {
721 	case SOF_IPC4_NOTIFY_FW_READY:
722 		/* check for FW boot completion */
723 		if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
724 			err = ipc4_fw_ready(sdev, ipc4_msg);
725 			if (err < 0)
726 				sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED);
727 			else
728 				sof_set_fw_state(sdev, SOF_FW_BOOT_READY_OK);
729 
730 			/* wake up firmware loader */
731 			wake_up(&sdev->boot_wait);
732 		}
733 
734 		break;
735 	case SOF_IPC4_NOTIFY_RESOURCE_EVENT:
736 		data_size = sizeof(struct sof_ipc4_notify_resource_data);
737 		break;
738 	case SOF_IPC4_NOTIFY_LOG_BUFFER_STATUS:
739 		sof_ipc4_mtrace_update_pos(sdev, SOF_IPC4_LOG_CORE_GET(ipc4_msg->primary));
740 		break;
741 	case SOF_IPC4_NOTIFY_EXCEPTION_CAUGHT:
742 		snd_sof_dsp_panic(sdev, 0, true);
743 		break;
744 	case SOF_IPC4_NOTIFY_MODULE_NOTIFICATION:
745 		data_size = sizeof(struct sof_ipc4_notify_module_data);
746 		handler_func = sof_ipc4_module_notification_handler;
747 		break;
748 	default:
749 		dev_dbg(sdev->dev, "Unhandled DSP message: %#x|%#x\n",
750 			ipc4_msg->primary, ipc4_msg->extension);
751 		break;
752 	}
753 
754 	if (data_size) {
755 		ipc4_msg->data_ptr = kmalloc(data_size, GFP_KERNEL);
756 		if (!ipc4_msg->data_ptr)
757 			return;
758 
759 		ipc4_msg->data_size = data_size;
760 		err = snd_sof_ipc_msg_data(sdev, NULL, ipc4_msg->data_ptr, ipc4_msg->data_size);
761 		if (err < 0) {
762 			dev_err(sdev->dev, "failed to read IPC notification data: %d\n", err);
763 			kfree(ipc4_msg->data_ptr);
764 			ipc4_msg->data_ptr = NULL;
765 			ipc4_msg->data_size = 0;
766 			return;
767 		}
768 	}
769 
770 	/* Handle notifications with payload */
771 	if (handler_func)
772 		handler_func(sdev, ipc4_msg);
773 
774 	sof_ipc4_log_header(sdev->dev, "ipc rx done ", ipc4_msg, true);
775 
776 	if (data_size) {
777 		if (sof_debug_check_flag(SOF_DBG_DUMP_IPC_MESSAGE_PAYLOAD))
778 			sof_ipc4_dump_payload(sdev, ipc4_msg->data_ptr,
779 					      ipc4_msg->data_size);
780 
781 		kfree(ipc4_msg->data_ptr);
782 		ipc4_msg->data_ptr = NULL;
783 		ipc4_msg->data_size = 0;
784 	}
785 }
786 
787 static int sof_ipc4_set_core_state(struct snd_sof_dev *sdev, int core_idx, bool on)
788 {
789 	struct sof_ipc4_dx_state_info dx_state;
790 	struct sof_ipc4_msg msg;
791 
792 	dx_state.core_mask = BIT(core_idx);
793 	if (on)
794 		dx_state.dx_mask = BIT(core_idx);
795 	else
796 		dx_state.dx_mask = 0;
797 
798 	msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_DX);
799 	msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
800 	msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
801 	msg.extension = 0;
802 	msg.data_ptr = &dx_state;
803 	msg.data_size = sizeof(dx_state);
804 
805 	return sof_ipc4_tx_msg(sdev, &msg, msg.data_size, NULL, 0, false);
806 }
807 
808 /*
809  * The context save callback is used to send a message to the firmware notifying
810  * it that the primary core is going to be turned off, which is used as an
811  * indication to prepare for a full power down, thus preparing for IMR boot
812  * (when supported)
813  *
814  * Note: in IPC4 there is no message used to restore context, thus no context
815  * restore callback is implemented
816  */
817 static int sof_ipc4_ctx_save(struct snd_sof_dev *sdev)
818 {
819 	return sof_ipc4_set_core_state(sdev, SOF_DSP_PRIMARY_CORE, false);
820 }
821 
822 static int sof_ipc4_set_pm_gate(struct snd_sof_dev *sdev, u32 flags)
823 {
824 	struct sof_ipc4_msg msg = {{0}};
825 
826 	msg.primary = SOF_IPC4_MSG_TYPE_SET(SOF_IPC4_MOD_SET_D0IX);
827 	msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
828 	msg.primary |= SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
829 	msg.extension = flags;
830 
831 	return sof_ipc4_tx_msg(sdev, &msg, 0, NULL, 0, true);
832 }
833 
834 static const struct sof_ipc_pm_ops ipc4_pm_ops = {
835 	.ctx_save = sof_ipc4_ctx_save,
836 	.set_core_state = sof_ipc4_set_core_state,
837 	.set_pm_gate = sof_ipc4_set_pm_gate,
838 };
839 
840 static int sof_ipc4_init(struct snd_sof_dev *sdev)
841 {
842 	struct sof_ipc4_fw_data *ipc4_data = sdev->private;
843 	int inbox_offset;
844 
845 	mutex_init(&ipc4_data->pipeline_state_mutex);
846 
847 	xa_init_flags(&ipc4_data->fw_lib_xa, XA_FLAGS_ALLOC);
848 
849 	/* Set up the windows for IPC communication */
850 	inbox_offset = snd_sof_dsp_get_mailbox_offset(sdev);
851 	if (inbox_offset < 0) {
852 		dev_err(sdev->dev, "%s: No mailbox offset\n", __func__);
853 		return inbox_offset;
854 	}
855 
856 	sdev->dsp_box.offset = inbox_offset;
857 	sdev->dsp_box.size = SOF_IPC4_MSG_MAX_SIZE;
858 	sdev->host_box.offset = snd_sof_dsp_get_window_offset(sdev,
859 							SOF_IPC4_OUTBOX_WINDOW_IDX);
860 	sdev->host_box.size = SOF_IPC4_MSG_MAX_SIZE;
861 
862 	sdev->debug_box.offset = snd_sof_dsp_get_window_offset(sdev,
863 							SOF_IPC4_DEBUG_WINDOW_IDX);
864 
865 	sdev->fw_info_box.offset = snd_sof_dsp_get_window_offset(sdev,
866 							SOF_IPC4_INBOX_WINDOW_IDX);
867 	sdev->fw_info_box.size = sizeof(struct sof_ipc4_fw_registers);
868 
869 	dev_dbg(sdev->dev, "mailbox upstream %#x - size %#x\n",
870 		sdev->dsp_box.offset, SOF_IPC4_MSG_MAX_SIZE);
871 	dev_dbg(sdev->dev, "mailbox downstream %#x - size %#x\n",
872 		sdev->host_box.offset, SOF_IPC4_MSG_MAX_SIZE);
873 	dev_dbg(sdev->dev, "debug box %#x\n", sdev->debug_box.offset);
874 
875 	return 0;
876 }
877 
878 static void sof_ipc4_exit(struct snd_sof_dev *sdev)
879 {
880 	struct sof_ipc4_fw_data *ipc4_data = sdev->private;
881 	struct sof_ipc4_fw_library *fw_lib;
882 	unsigned long lib_id;
883 
884 	xa_for_each(&ipc4_data->fw_lib_xa, lib_id, fw_lib) {
885 		/*
886 		 * The basefw (ID == 0) is handled by generic code, it is not
887 		 * loaded by IPC4 code.
888 		 */
889 		if (lib_id != 0)
890 			release_firmware(fw_lib->sof_fw.fw);
891 
892 		fw_lib->sof_fw.fw = NULL;
893 	}
894 
895 	xa_destroy(&ipc4_data->fw_lib_xa);
896 }
897 
898 static int sof_ipc4_post_boot(struct snd_sof_dev *sdev)
899 {
900 	if (sdev->first_boot) {
901 		int  ret = sof_ipc4_complete_split_release(sdev);
902 
903 		if (ret)
904 			return ret;
905 
906 		return sof_ipc4_query_fw_configuration(sdev);
907 	}
908 
909 	return sof_ipc4_reload_fw_libraries(sdev);
910 }
911 
912 const struct sof_ipc_ops ipc4_ops = {
913 	.init = sof_ipc4_init,
914 	.exit = sof_ipc4_exit,
915 	.post_fw_boot = sof_ipc4_post_boot,
916 	.tx_msg = sof_ipc4_tx_msg,
917 	.rx_msg = sof_ipc4_rx_msg,
918 	.set_get_data = sof_ipc4_set_get_data,
919 	.get_reply = sof_ipc4_get_reply,
920 	.pm = &ipc4_pm_ops,
921 	.fw_loader = &ipc4_loader_ops,
922 	.tplg = &ipc4_tplg_ops,
923 	.pcm = &ipc4_pcm_ops,
924 	.fw_tracing = &ipc4_mtrace_ops,
925 };
926 
927 void sof_ipc4_mic_privacy_state_change(struct snd_sof_dev *sdev, bool state)
928 {
929 	struct sof_ipc4_msg msg;
930 	u32 data = state;
931 
932 	/*
933 	 * The mic privacy change notification's role is to notify the running
934 	 * firmware that there is a change in mic privacy state from whatever
935 	 * the state was before - since the firmware booted up or since the
936 	 * previous change during runtime.
937 	 *
938 	 * If the firmware has not been booted up, there is no need to send
939 	 * change notification (the firmware is not booted up).
940 	 * The firmware checks the current state during its boot.
941 	 */
942 	if (sdev->fw_state != SOF_FW_BOOT_COMPLETE)
943 		return;
944 
945 	msg.primary = SOF_IPC4_MSG_TARGET(SOF_IPC4_MODULE_MSG);
946 	msg.primary |= SOF_IPC4_MSG_DIR(SOF_IPC4_MSG_REQUEST);
947 	msg.primary |= SOF_IPC4_MOD_ID(SOF_IPC4_MOD_INIT_BASEFW_MOD_ID);
948 	msg.primary |= SOF_IPC4_MOD_INSTANCE(SOF_IPC4_MOD_INIT_BASEFW_INSTANCE_ID);
949 	msg.extension = SOF_IPC4_MOD_EXT_MSG_PARAM_ID(SOF_IPC4_FW_PARAM_MIC_PRIVACY_STATE_CHANGE);
950 
951 	msg.data_size = sizeof(data);
952 	msg.data_ptr = &data;
953 
954 	sof_ipc4_set_get_data(sdev, &msg, msg.data_size, true);
955 }
956 EXPORT_SYMBOL(sof_ipc4_mic_privacy_state_change);
957