1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited 4 */ 5 6 #ifndef __ASM_LOONGARCH_KVM_HOST_H__ 7 #define __ASM_LOONGARCH_KVM_HOST_H__ 8 9 #include <linux/cpumask.h> 10 #include <linux/hrtimer.h> 11 #include <linux/interrupt.h> 12 #include <linux/kvm.h> 13 #include <linux/kvm_types.h> 14 #include <linux/mutex.h> 15 #include <linux/perf_event.h> 16 #include <linux/spinlock.h> 17 #include <linux/threads.h> 18 #include <linux/types.h> 19 20 #include <asm/inst.h> 21 #include <asm/kvm_mmu.h> 22 #include <asm/kvm_ipi.h> 23 #include <asm/kvm_dmsintc.h> 24 #include <asm/kvm_eiointc.h> 25 #include <asm/kvm_pch_pic.h> 26 #include <asm/loongarch.h> 27 28 #define __KVM_HAVE_ARCH_INTC_INITIALIZED 29 #define __KVM_HAVE_MSI 30 #define __KVM_HAVE_READONLY_MEM 31 32 /* Loongarch KVM register ids */ 33 #define KVM_GET_IOC_CSR_IDX(id) ((id & KVM_CSR_IDX_MASK) >> LOONGARCH_REG_SHIFT) 34 #define KVM_GET_IOC_CPUCFG_IDX(id) ((id & KVM_CPUCFG_IDX_MASK) >> LOONGARCH_REG_SHIFT) 35 36 #define KVM_MAX_VCPUS 256 37 #define KVM_MAX_CPUCFG_REGS 21 38 39 #define KVM_HALT_POLL_NS_DEFAULT 500000 40 #define KVM_REQ_TLB_FLUSH_GPA KVM_ARCH_REQ(0) 41 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(1) 42 #define KVM_REQ_PMU KVM_ARCH_REQ(2) 43 #define KVM_REQ_FPU_LOAD KVM_ARCH_REQ(3) 44 #define KVM_REQ_LBT_LOAD KVM_ARCH_REQ(4) 45 46 #define KVM_GUESTDBG_SW_BP_MASK \ 47 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP) 48 #define KVM_GUESTDBG_VALID_MASK \ 49 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP | KVM_GUESTDBG_SINGLESTEP) 50 51 #define KVM_DIRTY_LOG_MANUAL_CAPS \ 52 (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | KVM_DIRTY_LOG_INITIALLY_SET) 53 54 struct kvm_vm_stat { 55 struct kvm_vm_stat_generic generic; 56 u64 pages; 57 u64 hugepages; 58 }; 59 60 struct kvm_vcpu_stat { 61 struct kvm_vcpu_stat_generic generic; 62 u64 int_exits; 63 u64 idle_exits; 64 u64 cpucfg_exits; 65 u64 signal_exits; 66 u64 hypercall_exits; 67 u64 ipi_read_exits; 68 u64 ipi_write_exits; 69 u64 eiointc_read_exits; 70 u64 eiointc_write_exits; 71 u64 pch_pic_read_exits; 72 u64 pch_pic_write_exits; 73 }; 74 75 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) 76 #define KVM_MEM_HUGEPAGE_INCAPABLE (1UL << 1) 77 struct kvm_arch_memory_slot { 78 unsigned long flags; 79 }; 80 81 #define HOST_MAX_PMNUM 16 82 struct kvm_context { 83 unsigned long vpid_cache; 84 unsigned long vmid_cache; 85 struct kvm_vcpu *last_vcpu; 86 /* Host PMU CSR */ 87 u64 perf_ctrl[HOST_MAX_PMNUM]; 88 u64 perf_cntr[HOST_MAX_PMNUM]; 89 }; 90 91 struct kvm_world_switch { 92 int (*exc_entry)(void); 93 int (*enter_guest)(struct kvm_run *run, struct kvm_vcpu *vcpu); 94 }; 95 96 #define MAX_PGTABLE_LEVELS 4 97 98 /* 99 * Physical CPUID is used for interrupt routing, there are different 100 * definitions about physical cpuid on different hardwares. 101 * 102 * For LOONGARCH_CSR_CPUID register, max CPUID size if 512 103 * For IPI hardware, max destination CPUID size 1024 104 * For eiointc interrupt controller, max destination CPUID size is 256 105 * For msgint interrupt controller, max supported CPUID size is 65536 106 * 107 * Currently max CPUID is defined as 256 for KVM hypervisor, in future 108 * it will be expanded to 4096, including 16 packages at most. And every 109 * package supports at most 256 vcpus 110 */ 111 #define KVM_MAX_PHYID 256 112 113 struct kvm_phyid_info { 114 struct kvm_vcpu *vcpu; 115 bool enabled; 116 }; 117 118 struct kvm_phyid_map { 119 int max_phyid; 120 struct kvm_phyid_info phys_map[KVM_MAX_PHYID]; 121 }; 122 123 struct kvm_arch { 124 /* Guest physical mm */ 125 kvm_pte_t *pgd; 126 unsigned long gpa_size; 127 unsigned long invalid_ptes[MAX_PGTABLE_LEVELS]; 128 unsigned int pte_shifts[MAX_PGTABLE_LEVELS]; 129 unsigned int root_level; 130 spinlock_t phyid_map_lock; 131 spinlock_t pv_setting_lock; 132 struct kvm_phyid_map *phyid_map; 133 /* Enabled PV features */ 134 unsigned long pv_features; 135 /* Supported KVM features */ 136 unsigned long kvm_features; 137 138 s64 time_offset; 139 cpumask_t tlb_flush_pending; 140 unsigned long vmid[NR_CPUS]; 141 struct kvm_context __percpu *vmcs; 142 struct loongarch_ipi *ipi; 143 struct loongarch_dmsintc *dmsintc; 144 struct loongarch_eiointc *eiointc; 145 struct loongarch_pch_pic *pch_pic; 146 }; 147 148 #define CSR_MAX_NUMS 0x800 149 150 struct loongarch_csrs { 151 unsigned long csrs[CSR_MAX_NUMS]; 152 }; 153 154 /* Resume Flags */ 155 #define RESUME_HOST 0 156 #define RESUME_GUEST 1 157 158 enum emulation_result { 159 EMULATE_DONE, /* no further processing */ 160 EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */ 161 EMULATE_DO_IOCSR, /* handle IOCSR request */ 162 EMULATE_FAIL, /* can't emulate this instruction */ 163 EMULATE_EXCEPT, /* A guest exception has been generated */ 164 }; 165 166 #define KVM_LARCH_FPU (0x1 << 0) 167 #define KVM_LARCH_LBT (0x1 << 1) 168 #define KVM_LARCH_PMU (0x1 << 2) 169 #define KVM_LARCH_SWCSR_LATEST (0x1 << 3) 170 #define KVM_LARCH_HWCSR_USABLE (0x1 << 4) 171 172 #define LOONGARCH_PV_FEAT_MASK (BIT(KVM_FEATURE_IPI) | \ 173 BIT(KVM_FEATURE_PREEMPT) | \ 174 BIT(KVM_FEATURE_STEAL_TIME) | \ 175 BIT(KVM_FEATURE_USER_HCALL) | \ 176 BIT(KVM_FEATURE_CRASH) | \ 177 BIT(KVM_FEATURE_VIRT_EXTIOI)) 178 179 struct kvm_vcpu_arch { 180 /* 181 * Switch pointer-to-function type to unsigned long 182 * for loading the value into register directly. 183 */ 184 unsigned long host_eentry; 185 unsigned long guest_eentry; 186 187 /* Pointers stored here for easy accessing from assembly code */ 188 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); 189 190 /* GPA (=HVA) of PGD for secondary mmu */ 191 unsigned long kvm_pgd; 192 193 /* Host registers preserved across guest mode execution */ 194 unsigned long host_sp; 195 unsigned long host_tp; 196 unsigned long host_pgd; 197 198 /* Host CSRs are used when handling exits from guest */ 199 unsigned long badi; 200 unsigned long badv; 201 unsigned long host_ecfg; 202 unsigned long host_estat; 203 unsigned long host_percpu; 204 205 /* GPRs */ 206 unsigned long gprs[32]; 207 unsigned long pc; 208 209 /* Which auxiliary state is loaded (KVM_LARCH_*) */ 210 unsigned int aux_inuse; 211 212 /* FPU state */ 213 struct loongarch_fpu fpu FPU_ALIGN; 214 struct loongarch_lbt lbt; 215 216 /* CSR state */ 217 struct loongarch_csrs *csr; 218 219 /* Guest max PMU CSR id */ 220 int max_pmu_csrid; 221 222 /* GPR used as IO source/target */ 223 u32 io_gpr; 224 225 /* KVM register to control count timer */ 226 u32 count_ctl; 227 struct hrtimer swtimer; 228 229 /* Bitmask of intr that are pending */ 230 unsigned long irq_pending; 231 /* Bitmask of pending intr to be cleared */ 232 unsigned long irq_clear; 233 234 /* Bitmask of exceptions that are pending */ 235 unsigned long exception_pending; 236 unsigned int esubcode; 237 238 /* Cache for pages needed inside spinlock regions */ 239 struct kvm_mmu_memory_cache mmu_page_cache; 240 241 /* vCPU's vpid & tgid */ 242 unsigned long vpid, tgid; 243 gpa_t flush_gpa; 244 245 /* Frequency of stable timer in Hz */ 246 u64 timer_mhz; 247 ktime_t expire; 248 249 /* vCPU has run at least once */ 250 bool has_run; 251 /* Last CPU the vCPU state was loaded on */ 252 int last_sched_cpu; 253 /* mp state */ 254 struct kvm_mp_state mp_state; 255 /* ipi state */ 256 struct ipi_state ipi_state; 257 struct dmsintc_state dmsintc_state; 258 /* cpucfg */ 259 u32 cpucfg[KVM_MAX_CPUCFG_REGS]; 260 261 /* paravirt steal time */ 262 struct { 263 u64 guest_addr; 264 u64 last_steal; 265 struct gfn_to_hva_cache cache; 266 u8 preempted; 267 } st; 268 }; 269 270 static inline unsigned long readl_sw_gcsr(struct loongarch_csrs *csr, int reg) 271 { 272 return csr->csrs[reg]; 273 } 274 275 static inline void writel_sw_gcsr(struct loongarch_csrs *csr, int reg, unsigned long val) 276 { 277 csr->csrs[reg] = val; 278 } 279 280 static inline bool kvm_guest_has_msgint(struct kvm_vcpu_arch *arch) 281 { 282 return arch->cpucfg[1] & CPUCFG1_MSGINT; 283 } 284 285 static inline bool kvm_guest_has_fpu(struct kvm_vcpu_arch *arch) 286 { 287 return arch->cpucfg[2] & CPUCFG2_FP; 288 } 289 290 static inline bool kvm_guest_has_lsx(struct kvm_vcpu_arch *arch) 291 { 292 return arch->cpucfg[2] & CPUCFG2_LSX; 293 } 294 295 static inline bool kvm_guest_has_lasx(struct kvm_vcpu_arch *arch) 296 { 297 return arch->cpucfg[2] & CPUCFG2_LASX; 298 } 299 300 static inline bool kvm_guest_has_lbt(struct kvm_vcpu_arch *arch) 301 { 302 return arch->cpucfg[2] & (CPUCFG2_X86BT | CPUCFG2_ARMBT | CPUCFG2_MIPSBT); 303 } 304 305 static inline bool kvm_guest_has_pmu(struct kvm_vcpu_arch *arch) 306 { 307 return arch->cpucfg[6] & CPUCFG6_PMP; 308 } 309 310 static inline int kvm_get_pmu_num(struct kvm_vcpu_arch *arch) 311 { 312 return (arch->cpucfg[6] & CPUCFG6_PMNUM) >> CPUCFG6_PMNUM_SHIFT; 313 } 314 315 /* Check whether KVM support this feature (VMM may disable it) */ 316 static inline bool kvm_vm_support(struct kvm_arch *arch, int feature) 317 { 318 return !!(arch->kvm_features & BIT_ULL(feature)); 319 } 320 321 bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu); 322 323 /* Debug: dump vcpu state */ 324 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu); 325 326 /* MMU handling */ 327 void kvm_flush_tlb_all(void); 328 void kvm_flush_tlb_all_stage1(void); 329 void kvm_flush_tlb_all_stage2(void); 330 void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa); 331 int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write, int ecode); 332 333 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable); 334 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 335 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 336 337 static inline void update_pc(struct kvm_vcpu_arch *arch) 338 { 339 arch->pc += 4; 340 } 341 342 /* 343 * kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault. 344 * @vcpu: Virtual CPU. 345 * 346 * Returns: Whether the TLBL exception was likely due to an instruction 347 * fetch fault rather than a data load fault. 348 */ 349 static inline bool kvm_is_ifetch_fault(struct kvm_vcpu_arch *arch) 350 { 351 return arch->pc == arch->badv; 352 } 353 354 /* Misc */ 355 static inline void kvm_arch_hardware_unsetup(void) {} 356 static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {} 357 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 358 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 359 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 360 static inline void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) {} 361 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLBS 362 int kvm_arch_flush_remote_tlbs(struct kvm *kvm); 363 void kvm_check_vpid(struct kvm_vcpu *vcpu); 364 enum hrtimer_restart kvm_swtimer_wakeup(struct hrtimer *timer); 365 void kvm_init_vmcs(struct kvm *kvm); 366 void kvm_exc_entry(void); 367 int kvm_enter_guest(struct kvm_run *run, struct kvm_vcpu *vcpu); 368 369 extern unsigned long vpid_mask; 370 extern struct kvm_world_switch *kvm_loongarch_ops; 371 372 #define SW_GCSR (1 << 0) 373 #define HW_GCSR (1 << 1) 374 #define INVALID_GCSR (1 << 2) 375 376 int get_gcsr_flag(int csr); 377 void set_hw_gcsr(int csr_id, unsigned long val); 378 379 #endif /* __ASM_LOONGARCH_KVM_HOST_H__ */ 380