1 /* 2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #include <linux/acpi.h> 25 26 #include "gvt.h" 27 #include "i915_drv.h" 28 29 /* 30 * Note: Only for GVT-g virtual VBT generation, other usage must 31 * not do like this. 32 */ 33 #define _INTEL_BIOS_PRIVATE 34 #include "display/intel_vbt_defs.h" 35 36 #define OPREGION_SIGNATURE "IntelGraphicsMem" 37 #define MBOX_VBT (1<<3) 38 39 /* device handle */ 40 #define DEVICE_TYPE_CRT 0x01 41 #define DEVICE_TYPE_EFP1 0x04 42 #define DEVICE_TYPE_EFP2 0x40 43 #define DEVICE_TYPE_EFP3 0x20 44 #define DEVICE_TYPE_EFP4 0x10 45 46 struct opregion_header { 47 u8 signature[16]; 48 u32 size; 49 u32 opregion_ver; 50 u8 bios_ver[32]; 51 u8 vbios_ver[16]; 52 u8 driver_ver[16]; 53 u32 mboxes; 54 u32 driver_model; 55 u32 pcon; 56 u8 dver[32]; 57 u8 rsvd[124]; 58 } __packed; 59 60 struct bdb_data_header { 61 u8 id; 62 u16 size; /* data size */ 63 } __packed; 64 65 /* For supporting windows guest with opregion, here hardcode the emulated 66 * bdb header version as '186', and the corresponding child_device_config 67 * length should be '33' but not '38'. 68 */ 69 struct efp_child_device_config { 70 u16 handle; 71 u16 device_type; 72 u16 device_class; 73 u8 i2c_speed; 74 u8 dp_onboard_redriver; /* 158 */ 75 u8 dp_ondock_redriver; /* 158 */ 76 u8 hdmi_level_shifter_value:4; /* 169 */ 77 u8 hdmi_max_data_rate:4; /* 204 */ 78 u16 dtd_buf_ptr; /* 161 */ 79 u8 edidless_efp:1; /* 161 */ 80 u8 compression_enable:1; /* 198 */ 81 u8 compression_method:1; /* 198 */ 82 u8 ganged_edp:1; /* 202 */ 83 u8 skip0:4; 84 u8 compression_structure_index:4; /* 198 */ 85 u8 skip1:4; 86 u8 slave_port; /* 202 */ 87 u8 skip2; 88 u8 dvo_port; 89 u8 i2c_pin; /* for add-in card */ 90 u8 target_addr; /* for add-in card */ 91 u8 ddc_pin; 92 u16 edid_ptr; 93 u8 dvo_config; 94 u8 efp_docked_port:1; /* 158 */ 95 u8 lane_reversal:1; /* 184 */ 96 u8 onboard_lspcon:1; /* 192 */ 97 u8 iboost_enable:1; /* 196 */ 98 u8 hpd_invert:1; /* BXT 196 */ 99 u8 slip3:3; 100 u8 hdmi_compat:1; 101 u8 dp_compat:1; 102 u8 tmds_compat:1; 103 u8 skip4:5; 104 u8 aux_channel; 105 u8 dongle_detect; 106 u8 pipe_cap:2; 107 u8 sdvo_stall:1; /* 158 */ 108 u8 hpd_status:2; 109 u8 integrated_encoder:1; 110 u8 skip5:2; 111 u8 dvo_wiring; 112 u8 mipi_bridge_type; /* 171 */ 113 u16 device_class_ext; 114 u8 dvo_function; 115 } __packed; 116 117 struct vbt { 118 /* header->bdb_offset point to bdb_header offset */ 119 struct vbt_header header; 120 struct bdb_header bdb_header; 121 122 struct bdb_data_header general_features_header; 123 struct bdb_general_features general_features; 124 125 struct bdb_data_header general_definitions_header; 126 struct bdb_general_definitions general_definitions; 127 128 struct efp_child_device_config child0; 129 struct efp_child_device_config child1; 130 struct efp_child_device_config child2; 131 struct efp_child_device_config child3; 132 133 struct bdb_data_header driver_features_header; 134 struct bdb_driver_features driver_features; 135 }; 136 137 static void virt_vbt_generation(struct vbt *v) 138 { 139 int num_child; 140 141 memset(v, 0, sizeof(struct vbt)); 142 143 v->header.signature[0] = '$'; 144 v->header.signature[1] = 'V'; 145 v->header.signature[2] = 'B'; 146 v->header.signature[3] = 'T'; 147 148 /* there's features depending on version! */ 149 v->header.version = 155; 150 v->header.header_size = sizeof(v->header); 151 v->header.vbt_size = sizeof(struct vbt); 152 v->header.bdb_offset = offsetof(struct vbt, bdb_header); 153 154 strcpy(&v->bdb_header.signature[0], "BIOS_DATA_BLOCK"); 155 v->bdb_header.version = 186; /* child_dev_size = 33 */ 156 v->bdb_header.header_size = sizeof(v->bdb_header); 157 158 v->bdb_header.bdb_size = sizeof(struct vbt) - sizeof(struct vbt_header); 159 160 /* general features */ 161 v->general_features_header.id = BDB_GENERAL_FEATURES; 162 v->general_features_header.size = sizeof(struct bdb_general_features); 163 v->general_features.int_crt_support = 0; 164 v->general_features.int_tv_support = 0; 165 166 /* child device */ 167 num_child = 4; /* each port has one child */ 168 v->general_definitions.child_dev_size = 169 sizeof(struct efp_child_device_config); 170 v->general_definitions_header.id = BDB_GENERAL_DEFINITIONS; 171 /* size will include child devices */ 172 v->general_definitions_header.size = 173 sizeof(struct bdb_general_definitions) + 174 num_child * v->general_definitions.child_dev_size; 175 176 /* portA */ 177 v->child0.handle = DEVICE_TYPE_EFP1; 178 v->child0.device_type = DEVICE_TYPE_DP; 179 v->child0.dvo_port = DVO_PORT_DPA; 180 v->child0.aux_channel = DP_AUX_A; 181 v->child0.dp_compat = true; 182 v->child0.integrated_encoder = true; 183 184 /* portB */ 185 v->child1.handle = DEVICE_TYPE_EFP2; 186 v->child1.device_type = DEVICE_TYPE_DP; 187 v->child1.dvo_port = DVO_PORT_DPB; 188 v->child1.aux_channel = DP_AUX_B; 189 v->child1.dp_compat = true; 190 v->child1.integrated_encoder = true; 191 192 /* portC */ 193 v->child2.handle = DEVICE_TYPE_EFP3; 194 v->child2.device_type = DEVICE_TYPE_DP; 195 v->child2.dvo_port = DVO_PORT_DPC; 196 v->child2.aux_channel = DP_AUX_C; 197 v->child2.dp_compat = true; 198 v->child2.integrated_encoder = true; 199 200 /* portD */ 201 v->child3.handle = DEVICE_TYPE_EFP4; 202 v->child3.device_type = DEVICE_TYPE_DP; 203 v->child3.dvo_port = DVO_PORT_DPD; 204 v->child3.aux_channel = DP_AUX_D; 205 v->child3.dp_compat = true; 206 v->child3.integrated_encoder = true; 207 208 /* driver features */ 209 v->driver_features_header.id = BDB_DRIVER_FEATURES; 210 v->driver_features_header.size = sizeof(struct bdb_driver_features); 211 v->driver_features.lvds_config = BDB_DRIVER_FEATURE_NO_LVDS; 212 } 213 214 /** 215 * intel_vgpu_init_opregion - initialize the stuff used to emulate opregion 216 * @vgpu: a vGPU 217 * 218 * Returns: 219 * Zero on success, negative error code if failed. 220 */ 221 int intel_vgpu_init_opregion(struct intel_vgpu *vgpu) 222 { 223 u8 *buf; 224 struct opregion_header *header; 225 struct vbt v; 226 227 gvt_dbg_core("init vgpu%d opregion\n", vgpu->id); 228 vgpu_opregion(vgpu)->va = (void *)__get_free_pages(GFP_KERNEL | 229 __GFP_ZERO, 230 get_order(INTEL_GVT_OPREGION_SIZE)); 231 if (!vgpu_opregion(vgpu)->va) { 232 gvt_err("fail to get memory for vgpu virt opregion\n"); 233 return -ENOMEM; 234 } 235 236 /* emulated opregion with VBT mailbox only */ 237 buf = (u8 *)vgpu_opregion(vgpu)->va; 238 header = (struct opregion_header *)buf; 239 240 static_assert(sizeof(header->signature) == sizeof(OPREGION_SIGNATURE) - 1); 241 memcpy(header->signature, OPREGION_SIGNATURE, sizeof(header->signature)); 242 243 header->size = 0x8; 244 header->opregion_ver = 0x02000000; 245 header->mboxes = MBOX_VBT; 246 247 /* for unknown reason, the value in LID field is incorrect 248 * which block the windows guest, so workaround it by force 249 * setting it to "OPEN" 250 */ 251 buf[INTEL_GVT_OPREGION_CLID] = 0x3; 252 253 /* emulated vbt from virt vbt generation */ 254 virt_vbt_generation(&v); 255 memcpy(buf + INTEL_GVT_OPREGION_VBT_OFFSET, &v, sizeof(struct vbt)); 256 257 return 0; 258 } 259 260 /** 261 * intel_vgpu_opregion_base_write_handler - Opregion base register write handler 262 * 263 * @vgpu: a vGPU 264 * @gpa: guest physical address of opregion 265 * 266 * Returns: 267 * Zero on success, negative error code if failed. 268 */ 269 int intel_vgpu_opregion_base_write_handler(struct intel_vgpu *vgpu, u32 gpa) 270 { 271 272 int i; 273 274 gvt_dbg_core("emulate opregion from kernel\n"); 275 276 for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++) 277 vgpu_opregion(vgpu)->gfn[i] = (gpa >> PAGE_SHIFT) + i; 278 return 0; 279 } 280 281 /** 282 * intel_vgpu_clean_opregion - clean the stuff used to emulate opregion 283 * @vgpu: a vGPU 284 * 285 */ 286 void intel_vgpu_clean_opregion(struct intel_vgpu *vgpu) 287 { 288 gvt_dbg_core("vgpu%d: clean vgpu opregion\n", vgpu->id); 289 290 if (!vgpu_opregion(vgpu)->va) 291 return; 292 293 /* Guest opregion is released by VFIO */ 294 free_pages((unsigned long)vgpu_opregion(vgpu)->va, 295 get_order(INTEL_GVT_OPREGION_SIZE)); 296 297 vgpu_opregion(vgpu)->va = NULL; 298 299 } 300 301 302 #define GVT_OPREGION_FUNC(scic) \ 303 ({ \ 304 u32 __ret; \ 305 __ret = (scic & OPREGION_SCIC_FUNC_MASK) >> \ 306 OPREGION_SCIC_FUNC_SHIFT; \ 307 __ret; \ 308 }) 309 310 #define GVT_OPREGION_SUBFUNC(scic) \ 311 ({ \ 312 u32 __ret; \ 313 __ret = (scic & OPREGION_SCIC_SUBFUNC_MASK) >> \ 314 OPREGION_SCIC_SUBFUNC_SHIFT; \ 315 __ret; \ 316 }) 317 318 static const char *opregion_func_name(u32 func) 319 { 320 const char *name = NULL; 321 322 switch (func) { 323 case 0 ... 3: 324 case 5: 325 case 7 ... 15: 326 name = "Reserved"; 327 break; 328 329 case 4: 330 name = "Get BIOS Data"; 331 break; 332 333 case 6: 334 name = "System BIOS Callbacks"; 335 break; 336 337 default: 338 name = "Unknown"; 339 break; 340 } 341 return name; 342 } 343 344 static const char *opregion_subfunc_name(u32 subfunc) 345 { 346 const char *name = NULL; 347 348 switch (subfunc) { 349 case 0: 350 name = "Supported Calls"; 351 break; 352 353 case 1: 354 name = "Requested Callbacks"; 355 break; 356 357 case 2 ... 3: 358 case 8 ... 9: 359 name = "Reserved"; 360 break; 361 362 case 5: 363 name = "Boot Display"; 364 break; 365 366 case 6: 367 name = "TV-Standard/Video-Connector"; 368 break; 369 370 case 7: 371 name = "Internal Graphics"; 372 break; 373 374 case 10: 375 name = "Spread Spectrum Clocks"; 376 break; 377 378 case 11: 379 name = "Get AKSV"; 380 break; 381 382 default: 383 name = "Unknown"; 384 break; 385 } 386 return name; 387 }; 388 389 static bool querying_capabilities(u32 scic) 390 { 391 u32 func, subfunc; 392 393 func = GVT_OPREGION_FUNC(scic); 394 subfunc = GVT_OPREGION_SUBFUNC(scic); 395 396 if ((func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA && 397 subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS) 398 || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA && 399 subfunc == INTEL_GVT_OPREGION_SCIC_SF_REQEUSTEDCALLBACKS) 400 || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSCALLBACKS && 401 subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)) { 402 return true; 403 } 404 return false; 405 } 406 407 /** 408 * intel_vgpu_emulate_opregion_request - emulating OpRegion request 409 * @vgpu: a vGPU 410 * @swsci: SWSCI request 411 * 412 * Returns: 413 * Zero on success, negative error code if failed 414 */ 415 int intel_vgpu_emulate_opregion_request(struct intel_vgpu *vgpu, u32 swsci) 416 { 417 u32 scic, parm; 418 u32 func, subfunc; 419 u64 scic_pa = 0, parm_pa = 0; 420 int ret; 421 422 scic_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) + 423 INTEL_GVT_OPREGION_SCIC; 424 parm_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) + 425 INTEL_GVT_OPREGION_PARM; 426 ret = intel_gvt_read_gpa(vgpu, scic_pa, &scic, sizeof(scic)); 427 if (ret) { 428 gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n", 429 ret, scic_pa, sizeof(scic)); 430 return ret; 431 } 432 433 ret = intel_gvt_read_gpa(vgpu, parm_pa, &parm, sizeof(parm)); 434 if (ret) { 435 gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n", 436 ret, scic_pa, sizeof(scic)); 437 return ret; 438 } 439 440 if (!(swsci & SWSCI_SCI_SELECT)) { 441 gvt_vgpu_err("requesting SMI service\n"); 442 return 0; 443 } 444 /* ignore non 0->1 transitions */ 445 if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI] 446 & SWSCI_SCI_TRIGGER) || 447 !(swsci & SWSCI_SCI_TRIGGER)) { 448 return 0; 449 } 450 451 func = GVT_OPREGION_FUNC(scic); 452 subfunc = GVT_OPREGION_SUBFUNC(scic); 453 if (!querying_capabilities(scic)) { 454 gvt_vgpu_err("requesting runtime service: func \"%s\"," 455 " subfunc \"%s\"\n", 456 opregion_func_name(func), 457 opregion_subfunc_name(subfunc)); 458 /* 459 * emulate exit status of function call, '0' means 460 * "failure, generic, unsupported or unknown cause" 461 */ 462 scic &= ~OPREGION_SCIC_EXIT_MASK; 463 goto out; 464 } 465 466 scic = 0; 467 parm = 0; 468 469 out: 470 ret = intel_gvt_write_gpa(vgpu, scic_pa, &scic, sizeof(scic)); 471 if (ret) { 472 gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n", 473 ret, scic_pa, sizeof(scic)); 474 return ret; 475 } 476 477 ret = intel_gvt_write_gpa(vgpu, parm_pa, &parm, sizeof(parm)); 478 if (ret) { 479 gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n", 480 ret, scic_pa, sizeof(scic)); 481 return ret; 482 } 483 484 return 0; 485 } 486