xref: /linux/drivers/iommu/intel/nested.c (revision 4da9dedf3fc59137fd86d664693776aa38cb97f5)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * nested.c - nested mode translation support
4  *
5  * Copyright (C) 2023 Intel Corporation
6  *
7  * Author: Lu Baolu <baolu.lu@linux.intel.com>
8  *         Jacob Pan <jacob.jun.pan@linux.intel.com>
9  *         Yi Liu <yi.l.liu@intel.com>
10  */
11 
12 #define pr_fmt(fmt)	"DMAR: " fmt
13 
14 #include <linux/iommu.h>
15 #include <linux/pci.h>
16 #include <linux/pci-ats.h>
17 
18 #include "iommu.h"
19 #include "pasid.h"
20 
21 static int intel_nested_attach_dev(struct iommu_domain *domain,
22 				   struct device *dev, struct iommu_domain *old)
23 {
24 	struct device_domain_info *info = dev_iommu_priv_get(dev);
25 	struct dmar_domain *dmar_domain = to_dmar_domain(domain);
26 	struct intel_iommu *iommu = info->iommu;
27 	unsigned long flags;
28 	int ret = 0;
29 
30 	device_block_translation(dev);
31 
32 	/*
33 	 * Stage-1 domain cannot work alone, it is nested on a s2_domain.
34 	 * The s2_domain will be used in nested translation, hence needs
35 	 * to ensure the s2_domain is compatible with this IOMMU.
36 	 */
37 	ret = paging_domain_compatible(&dmar_domain->s2_domain->domain, dev);
38 	if (ret) {
39 		dev_err_ratelimited(dev, "s2 domain is not compatible\n");
40 		return ret;
41 	}
42 
43 	ret = domain_attach_iommu(dmar_domain, iommu);
44 	if (ret) {
45 		dev_err_ratelimited(dev, "Failed to attach domain to iommu\n");
46 		return ret;
47 	}
48 
49 	ret = cache_tag_assign_domain(dmar_domain, dev, IOMMU_NO_PASID);
50 	if (ret)
51 		goto detach_iommu;
52 
53 	ret = iopf_for_domain_set(domain, dev);
54 	if (ret)
55 		goto unassign_tag;
56 
57 	ret = intel_pasid_setup_nested(iommu, dev,
58 				       IOMMU_NO_PASID, dmar_domain);
59 	if (ret)
60 		goto disable_iopf;
61 
62 	iopf_for_domain_remove(old, dev);
63 
64 	info->domain = dmar_domain;
65 	info->domain_attached = true;
66 	spin_lock_irqsave(&dmar_domain->lock, flags);
67 	list_add(&info->link, &dmar_domain->devices);
68 	spin_unlock_irqrestore(&dmar_domain->lock, flags);
69 
70 	return 0;
71 disable_iopf:
72 	iopf_for_domain_remove(domain, dev);
73 unassign_tag:
74 	cache_tag_unassign_domain(dmar_domain, dev, IOMMU_NO_PASID);
75 detach_iommu:
76 	domain_detach_iommu(dmar_domain, iommu);
77 
78 	return ret;
79 }
80 
81 static void intel_nested_domain_free(struct iommu_domain *domain)
82 {
83 	struct dmar_domain *dmar_domain = to_dmar_domain(domain);
84 	struct dmar_domain *s2_domain = dmar_domain->s2_domain;
85 
86 	spin_lock(&s2_domain->s1_lock);
87 	list_del(&dmar_domain->s2_link);
88 	spin_unlock(&s2_domain->s1_lock);
89 	kfree(dmar_domain->qi_batch);
90 	kfree(dmar_domain);
91 }
92 
93 static int intel_nested_cache_invalidate_user(struct iommu_domain *domain,
94 					      struct iommu_user_data_array *array)
95 {
96 	struct dmar_domain *dmar_domain = to_dmar_domain(domain);
97 	struct iommu_hwpt_vtd_s1_invalidate inv_entry;
98 	u32 processed = 0;
99 	int ret = 0;
100 
101 	if (array->type != IOMMU_HWPT_INVALIDATE_DATA_VTD_S1) {
102 		ret = -EINVAL;
103 		goto out;
104 	}
105 
106 	/*
107 	 * The core re-invokes this op for the remaining requests, so handle one
108 	 * request per call. A zero-length array only probes the type, validated
109 	 * above.
110 	 */
111 	if (!array->entry_num)
112 		return 0;
113 
114 	ret = iommu_copy_struct_from_user_array(
115 		&inv_entry, array, IOMMU_HWPT_INVALIDATE_DATA_VTD_S1, 0,
116 		__reserved);
117 	if (ret)
118 		goto out;
119 
120 	if ((inv_entry.flags & ~IOMMU_VTD_INV_FLAGS_LEAF) ||
121 	    inv_entry.__reserved) {
122 		ret = -EOPNOTSUPP;
123 		goto out;
124 	}
125 
126 	if (!IS_ALIGNED(inv_entry.addr, VTD_PAGE_SIZE) ||
127 	    (inv_entry.npages == U64_MAX && inv_entry.addr)) {
128 		ret = -EINVAL;
129 		goto out;
130 	}
131 
132 	cache_tag_flush_range(dmar_domain, inv_entry.addr,
133 			      inv_entry.addr +
134 				      nrpages_to_size(inv_entry.npages) - 1,
135 			      inv_entry.flags & IOMMU_VTD_INV_FLAGS_LEAF);
136 	processed = 1;
137 out:
138 	array->entry_num = processed;
139 	return ret;
140 }
141 
142 static int domain_setup_nested(struct intel_iommu *iommu,
143 			       struct dmar_domain *domain,
144 			       struct device *dev, ioasid_t pasid,
145 			       struct iommu_domain *old)
146 {
147 	if (old)
148 		intel_pasid_tear_down_entry(iommu, dev, pasid, false);
149 
150 	return intel_pasid_setup_nested(iommu, dev, pasid, domain);
151 }
152 
153 static int intel_nested_set_dev_pasid(struct iommu_domain *domain,
154 				      struct device *dev, ioasid_t pasid,
155 				      struct iommu_domain *old)
156 {
157 	struct device_domain_info *info = dev_iommu_priv_get(dev);
158 	struct dmar_domain *dmar_domain = to_dmar_domain(domain);
159 	struct intel_iommu *iommu = info->iommu;
160 	struct dev_pasid_info *dev_pasid;
161 	int ret;
162 
163 	if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev))
164 		return -EOPNOTSUPP;
165 
166 	if (context_copied(iommu, info->bus, info->devfn))
167 		return -EBUSY;
168 
169 	ret = paging_domain_compatible(&dmar_domain->s2_domain->domain, dev);
170 	if (ret)
171 		return ret;
172 
173 	dev_pasid = domain_add_dev_pasid(domain, dev, pasid);
174 	if (IS_ERR(dev_pasid))
175 		return PTR_ERR(dev_pasid);
176 
177 	ret = iopf_for_domain_replace(domain, old, dev);
178 	if (ret)
179 		goto out_remove_dev_pasid;
180 
181 	ret = domain_setup_nested(iommu, dmar_domain, dev, pasid, old);
182 	if (ret)
183 		goto out_unwind_iopf;
184 
185 	domain_remove_dev_pasid(old, dev, pasid);
186 
187 	return 0;
188 
189 out_unwind_iopf:
190 	iopf_for_domain_replace(old, domain, dev);
191 out_remove_dev_pasid:
192 	domain_remove_dev_pasid(domain, dev, pasid);
193 	return ret;
194 }
195 
196 static const struct iommu_domain_ops intel_nested_domain_ops = {
197 	.attach_dev		= intel_nested_attach_dev,
198 	.set_dev_pasid		= intel_nested_set_dev_pasid,
199 	.free			= intel_nested_domain_free,
200 	.cache_invalidate_user	= intel_nested_cache_invalidate_user,
201 };
202 
203 struct iommu_domain *
204 intel_iommu_domain_alloc_nested(struct device *dev, struct iommu_domain *parent,
205 				u32 flags,
206 				const struct iommu_user_data *user_data)
207 {
208 	struct device_domain_info *info = dev_iommu_priv_get(dev);
209 	struct dmar_domain *s2_domain = to_dmar_domain(parent);
210 	struct intel_iommu *iommu = info->iommu;
211 	struct iommu_hwpt_vtd_s1 vtd;
212 	struct dmar_domain *domain;
213 	int ret;
214 
215 	if (!nested_supported(iommu) || flags & ~IOMMU_HWPT_ALLOC_PASID)
216 		return ERR_PTR(-EOPNOTSUPP);
217 
218 	/* Must be nested domain */
219 	if (user_data->type != IOMMU_HWPT_DATA_VTD_S1)
220 		return ERR_PTR(-EOPNOTSUPP);
221 	if (!intel_domain_is_ss_paging(s2_domain) || !s2_domain->nested_parent)
222 		return ERR_PTR(-EINVAL);
223 
224 	ret = iommu_copy_struct_from_user(&vtd, user_data,
225 					  IOMMU_HWPT_DATA_VTD_S1, __reserved);
226 	if (ret)
227 		return ERR_PTR(ret);
228 
229 	domain = kzalloc_obj(*domain, GFP_KERNEL_ACCOUNT);
230 	if (!domain)
231 		return ERR_PTR(-ENOMEM);
232 
233 	domain->s2_domain = s2_domain;
234 	domain->s1_cfg = vtd;
235 	domain->domain.ops = &intel_nested_domain_ops;
236 	domain->domain.type = IOMMU_DOMAIN_NESTED;
237 	INIT_LIST_HEAD(&domain->devices);
238 	INIT_LIST_HEAD(&domain->dev_pasids);
239 	INIT_LIST_HEAD(&domain->cache_tags);
240 	spin_lock_init(&domain->lock);
241 	spin_lock_init(&domain->cache_lock);
242 	xa_init(&domain->iommu_array);
243 
244 	spin_lock(&s2_domain->s1_lock);
245 	list_add(&domain->s2_link, &s2_domain->s1_domains);
246 	spin_unlock(&s2_domain->s1_lock);
247 
248 	return &domain->domain;
249 }
250