1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (c) 2020-2024, Intel Corporation. 4 */ 5 6 /** 7 * @file 8 * @brief JSM shared definitions 9 * 10 * @ingroup Jsm 11 * @brief JSM shared definitions 12 * @{ 13 */ 14 #ifndef VPU_JSM_API_H 15 #define VPU_JSM_API_H 16 17 /* 18 * Major version changes that break backward compatibility 19 */ 20 #define VPU_JSM_API_VER_MAJOR 3 21 22 /* 23 * Minor version changes when API backward compatibility is preserved. 24 */ 25 #define VPU_JSM_API_VER_MINOR 29 26 27 /* 28 * API header changed (field names, documentation, formatting) but API itself has not been changed 29 */ 30 #define VPU_JSM_API_VER_PATCH 0 31 32 /* 33 * Index in the API version table 34 */ 35 #define VPU_JSM_API_VER_INDEX 4 36 37 /* 38 * Number of Priority Bands for Hardware Scheduling 39 * Bands: Idle(0), Normal(1), Focus(2), RealTime(3) 40 */ 41 #define VPU_HWS_NUM_PRIORITY_BANDS 4 42 43 /* Max number of impacted contexts that can be dealt with the engine reset command */ 44 #define VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS 3 45 46 /* 47 * Pack the API structures to enforce binary compatibility 48 * Align to 8 bytes for optimal performance 49 */ 50 #pragma pack(push, 8) 51 52 /* 53 * Engine indexes. 54 */ 55 #define VPU_ENGINE_COMPUTE 0 56 #define VPU_ENGINE_NB 1 57 58 /* 59 * VPU status values. 60 */ 61 #define VPU_JSM_STATUS_SUCCESS 0x0U 62 #define VPU_JSM_STATUS_PARSING_ERR 0x1U 63 #define VPU_JSM_STATUS_PROCESSING_ERR 0x2U 64 #define VPU_JSM_STATUS_PREEMPTED 0x3U 65 #define VPU_JSM_STATUS_ABORTED 0x4U 66 #define VPU_JSM_STATUS_USER_CTX_VIOL_ERR 0x5U 67 #define VPU_JSM_STATUS_GLOBAL_CTX_VIOL_ERR 0x6U 68 #define VPU_JSM_STATUS_MVNCI_WRONG_INPUT_FORMAT 0x7U 69 #define VPU_JSM_STATUS_MVNCI_UNSUPPORTED_NETWORK_ELEMENT 0x8U 70 #define VPU_JSM_STATUS_MVNCI_INVALID_HANDLE 0x9U 71 #define VPU_JSM_STATUS_MVNCI_OUT_OF_RESOURCES 0xAU 72 #define VPU_JSM_STATUS_MVNCI_NOT_IMPLEMENTED 0xBU 73 #define VPU_JSM_STATUS_MVNCI_INTERNAL_ERROR 0xCU 74 /* Job status returned when the job was preempted mid-inference */ 75 #define VPU_JSM_STATUS_PREEMPTED_MID_INFERENCE 0xDU 76 #define VPU_JSM_STATUS_MVNCI_CONTEXT_VIOLATION_HW 0xEU 77 78 /* 79 * Host <-> VPU IPC channels. 80 * ASYNC commands use a high priority channel, other messages use low-priority ones. 81 */ 82 #define VPU_IPC_CHAN_ASYNC_CMD 0 83 #define VPU_IPC_CHAN_GEN_CMD 10 84 #define VPU_IPC_CHAN_JOB_RET 11 85 86 /* 87 * Job flags bit masks. 88 */ 89 enum { 90 /* 91 * Null submission mask. 92 * When set, batch buffer's commands are not processed but returned as 93 * successful immediately, except fences and timestamps. 94 * When cleared, batch buffer's commands are processed normally. 95 * Used for testing and profiling purposes. 96 */ 97 VPU_JOB_FLAGS_NULL_SUBMISSION_MASK = (1 << 0U), 98 /* 99 * Inline command mask. 100 * When set, the object in job queue is an inline command (see struct vpu_inline_cmd below). 101 * When cleared, the object in job queue is a job (see struct vpu_job_queue_entry below). 102 */ 103 VPU_JOB_FLAGS_INLINE_CMD_MASK = (1 << 1U), 104 /* 105 * VPU private data mask. 106 * Reserved for the VPU to store private data about the job (or inline command) 107 * while being processed. 108 */ 109 VPU_JOB_FLAGS_PRIVATE_DATA_MASK = 0xFFFF0000U 110 }; 111 112 /* 113 * Job queue flags bit masks. 114 */ 115 enum { 116 /* 117 * No job done notification mask. 118 * When set, indicates that no job done notification should be sent for any 119 * job from this queue. When cleared, indicates that job done notification 120 * should be sent for every job completed from this queue. 121 */ 122 VPU_JOB_QUEUE_FLAGS_NO_JOB_DONE_MASK = (1 << 0U), 123 /* 124 * Native fence usage mask. 125 * When set, indicates that job queue uses native fences (as inline commands 126 * in job queue). Such queues may also use legacy fences (as commands in batch buffers). 127 * When cleared, indicates the job queue only uses legacy fences. 128 * NOTES: 129 * 1. For queues using native fences, VPU expects that all jobs in the queue 130 * are immediately followed by an inline command object. This object is expected 131 * to be a fence signal command in most cases, but can also be a NOP in case the host 132 * does not need per-job fence signalling. Other inline commands objects can be 133 * inserted between "job and inline command" pairs. 134 * 2. Native fence queues are only supported on VPU 40xx onwards. 135 */ 136 VPU_JOB_QUEUE_FLAGS_USE_NATIVE_FENCE_MASK = (1 << 1U), 137 138 /* 139 * Enable turbo mode for testing NPU performance; not recommended for regular usage. 140 */ 141 VPU_JOB_QUEUE_FLAGS_TURBO_MODE = (1 << 2U) 142 }; 143 144 /* 145 * Max length (including trailing NULL char) of trace entity name (e.g., the 146 * name of a logging destination or a loggable HW component). 147 */ 148 #define VPU_TRACE_ENTITY_NAME_MAX_LEN 32 149 150 /* 151 * Max length (including trailing NULL char) of a dyndbg command. 152 * 153 * NOTE: 96 is used so that the size of 'struct vpu_ipc_msg' in the JSM API is 154 * 128 bytes (multiple of 64 bytes, the cache line size). 155 */ 156 #define VPU_DYNDBG_CMD_MAX_LEN 96 157 158 /* 159 * For HWS command queue scheduling, we can prioritise command queues inside the 160 * same process with a relative in-process priority. Valid values for relative 161 * priority are given below - max and min. 162 */ 163 #define VPU_HWS_COMMAND_QUEUE_MAX_IN_PROCESS_PRIORITY 7 164 #define VPU_HWS_COMMAND_QUEUE_MIN_IN_PROCESS_PRIORITY -7 165 166 /* 167 * For HWS priority scheduling, we can have multiple realtime priority bands. 168 * They are numbered 0 to a MAX. 169 */ 170 #define VPU_HWS_MAX_REALTIME_PRIORITY_LEVEL 31U 171 172 /* 173 * vpu_jsm_engine_reset_context flag definitions 174 */ 175 #define VPU_ENGINE_RESET_CONTEXT_FLAG_COLLATERAL_DAMAGE_MASK BIT(0) 176 #define VPU_ENGINE_RESET_CONTEXT_HANG_PRIMARY_CAUSE 0 177 #define VPU_ENGINE_RESET_CONTEXT_COLLATERAL_DAMAGE 1 178 179 /* 180 * Invalid command queue handle identifier. Applies to cmdq_id and cmdq_group 181 * in this API. 182 */ 183 #define VPU_HWS_INVALID_CMDQ_HANDLE 0ULL 184 185 /* 186 * Inline commands types. 187 */ 188 /* 189 * NOP. 190 * VPU does nothing other than consuming the inline command object. 191 */ 192 #define VPU_INLINE_CMD_TYPE_NOP 0x0 193 /* 194 * Fence wait. 195 * VPU waits for the fence current value to reach monitored value. 196 * Fence wait operations are executed upon job dispatching. While waiting for 197 * the fence to be satisfied, VPU blocks fetching of the next objects in the queue. 198 * Jobs present in the queue prior to the fence wait object may be processed 199 * concurrently. 200 */ 201 #define VPU_INLINE_CMD_TYPE_FENCE_WAIT 0x1 202 /* 203 * Fence signal. 204 * VPU sets the fence current value to the provided value. If new current value 205 * is equal to or higher than monitored value, VPU sends fence signalled notification 206 * to the host. Fence signal operations are executed upon completion of all the jobs 207 * present in the queue prior to them, and in-order relative to each other in the queue. 208 * But jobs in-between them may be processed concurrently and may complete out-of-order. 209 */ 210 #define VPU_INLINE_CMD_TYPE_FENCE_SIGNAL 0x2 211 212 /* 213 * Job scheduling priority bands for both hardware scheduling and OS scheduling. 214 */ 215 enum vpu_job_scheduling_priority_band { 216 VPU_JOB_SCHEDULING_PRIORITY_BAND_IDLE = 0, 217 VPU_JOB_SCHEDULING_PRIORITY_BAND_NORMAL = 1, 218 VPU_JOB_SCHEDULING_PRIORITY_BAND_FOCUS = 2, 219 VPU_JOB_SCHEDULING_PRIORITY_BAND_REALTIME = 3, 220 VPU_JOB_SCHEDULING_PRIORITY_BAND_COUNT = 4, 221 }; 222 223 /* 224 * Job format. 225 * Jobs defines the actual workloads to be executed by a given engine. 226 */ 227 struct vpu_job_queue_entry { 228 /**< Address of VPU commands batch buffer */ 229 u64 batch_buf_addr; 230 /**< Job ID */ 231 u32 job_id; 232 /**< Flags bit field, see VPU_JOB_FLAGS_* above */ 233 u32 flags; 234 /** 235 * Doorbell ring timestamp taken by KMD from SoC's global system clock, in 236 * microseconds. NPU can convert this value to its own fixed clock's timebase, 237 * to match other profiling timestamps. 238 */ 239 u64 doorbell_timestamp; 240 /**< Extra id for job tracking, used only in the firmware perf traces */ 241 u64 host_tracking_id; 242 /**< Address of the primary preemption buffer to use for this job */ 243 u64 primary_preempt_buf_addr; 244 /**< Size of the primary preemption buffer to use for this job */ 245 u32 primary_preempt_buf_size; 246 /**< Size of secondary preemption buffer to use for this job */ 247 u32 secondary_preempt_buf_size; 248 /**< Address of secondary preemption buffer to use for this job */ 249 u64 secondary_preempt_buf_addr; 250 u64 reserved_0; 251 }; 252 253 /* 254 * Inline command format. 255 * Inline commands are the commands executed at scheduler level (typically, 256 * synchronization directives). Inline command and job objects must be of 257 * the same size and have flags field at same offset. 258 */ 259 struct vpu_inline_cmd { 260 u64 reserved_0; 261 /* Inline command type, see VPU_INLINE_CMD_TYPE_* defines. */ 262 u32 type; 263 /* Flags bit field, see VPU_JOB_FLAGS_* above. */ 264 u32 flags; 265 /* Inline command payload. Depends on inline command type. */ 266 union { 267 /* Fence (wait and signal) commands' payload. */ 268 struct { 269 /* Fence object handle. */ 270 u64 fence_handle; 271 /* User VA of the current fence value. */ 272 u64 current_value_va; 273 /* User VA of the monitored fence value (read-only). */ 274 u64 monitored_value_va; 275 /* Value to wait for or write in fence location. */ 276 u64 value; 277 /* User VA of the log buffer in which to add log entry on completion. */ 278 u64 log_buffer_va; 279 /* NPU private data. */ 280 u64 npu_private_data; 281 } fence; 282 /* Other commands do not have a payload. */ 283 /* Payload definition for future inline commands can be inserted here. */ 284 u64 reserved_1[6]; 285 } payload; 286 }; 287 288 /* 289 * Job queue slots can be populated either with job objects or inline command objects. 290 */ 291 union vpu_jobq_slot { 292 struct vpu_job_queue_entry job; 293 struct vpu_inline_cmd inline_cmd; 294 }; 295 296 /* 297 * Job queue control registers. 298 */ 299 struct vpu_job_queue_header { 300 u32 engine_idx; 301 u32 head; 302 u32 tail; 303 u32 flags; 304 /* Set to 1 to indicate priority_band field is valid */ 305 u32 priority_band_valid; 306 /* 307 * Priority for the work of this job queue, valid only if the HWS is NOT used 308 * and the `priority_band_valid` is set to 1. It is applied only during 309 * the VPU_JSM_MSG_REGISTER_DB message processing. 310 * The device firmware might use the `priority_band` to optimize the power 311 * management logic, but it will not affect the order of jobs. 312 * Available priority bands: @see enum vpu_job_scheduling_priority_band 313 */ 314 u32 priority_band; 315 /* Inside realtime band assigns a further priority, limited to 0..31 range */ 316 u32 realtime_priority_level; 317 u32 reserved_0[9]; 318 }; 319 320 /* 321 * Job queue format. 322 */ 323 struct vpu_job_queue { 324 struct vpu_job_queue_header header; 325 union vpu_jobq_slot slot[]; 326 }; 327 328 /** 329 * Logging entity types. 330 * 331 * This enum defines the different types of entities involved in logging. 332 */ 333 enum vpu_trace_entity_type { 334 /** Logging destination (entity where logs can be stored / printed). */ 335 VPU_TRACE_ENTITY_TYPE_DESTINATION = 1, 336 /** Loggable HW component (HW entity that can be logged). */ 337 VPU_TRACE_ENTITY_TYPE_HW_COMPONENT = 2, 338 }; 339 340 /* 341 * HWS specific log buffer header details. 342 * Total size is 32 bytes. 343 */ 344 struct vpu_hws_log_buffer_header { 345 /* Written by VPU after adding a log entry. Initialised by host to 0. */ 346 u32 first_free_entry_index; 347 /* Incremented by VPU every time the VPU writes the 0th entry; initialised by host to 0. */ 348 u32 wraparound_count; 349 /* 350 * This is the number of buffers that can be stored in the log buffer provided by the host. 351 * It is written by host before passing buffer to VPU. VPU should consider it read-only. 352 */ 353 u64 num_of_entries; 354 u64 reserved[2]; 355 }; 356 357 /* 358 * HWS specific log buffer entry details. 359 * Total size is 32 bytes. 360 */ 361 struct vpu_hws_log_buffer_entry { 362 /* VPU timestamp must be an invariant timer tick (not impacted by DVFS) */ 363 u64 vpu_timestamp; 364 /* 365 * Operation type: 366 * 0 - context state change 367 * 1 - queue new work 368 * 2 - queue unwait sync object 369 * 3 - queue no more work 370 * 4 - queue wait sync object 371 */ 372 u32 operation_type; 373 u32 reserved; 374 /* Operation data depends on operation type */ 375 u64 operation_data[2]; 376 }; 377 378 /* Native fence log buffer types. */ 379 enum vpu_hws_native_fence_log_type { 380 VPU_HWS_NATIVE_FENCE_LOG_TYPE_WAITS = 1, 381 VPU_HWS_NATIVE_FENCE_LOG_TYPE_SIGNALS = 2 382 }; 383 384 /* HWS native fence log buffer header. */ 385 struct vpu_hws_native_fence_log_header { 386 union { 387 struct { 388 /* Index of the first free entry in buffer. */ 389 u32 first_free_entry_idx; 390 /* Incremented each time NPU wraps around the buffer to write next entry. */ 391 u32 wraparound_count; 392 }; 393 /* Field allowing atomic update of both fields above. */ 394 u64 atomic_wraparound_and_entry_idx; 395 }; 396 /* Log buffer type, see enum vpu_hws_native_fence_log_type. */ 397 u64 type; 398 /* Allocated number of entries in the log buffer. */ 399 u64 entry_nb; 400 u64 reserved[2]; 401 }; 402 403 /* Native fence log operation types. */ 404 enum vpu_hws_native_fence_log_op { 405 VPU_HWS_NATIVE_FENCE_LOG_OP_SIGNAL_EXECUTED = 0, 406 VPU_HWS_NATIVE_FENCE_LOG_OP_WAIT_UNBLOCKED = 1 407 }; 408 409 /* HWS native fence log entry. */ 410 struct vpu_hws_native_fence_log_entry { 411 /* Newly signaled/unblocked fence value. */ 412 u64 fence_value; 413 /* Native fence object handle to which this operation belongs. */ 414 u64 fence_handle; 415 /* Operation type, see enum vpu_hws_native_fence_log_op. */ 416 u64 op_type; 417 u64 reserved_0; 418 /* 419 * VPU_HWS_NATIVE_FENCE_LOG_OP_WAIT_UNBLOCKED only: Timestamp at which fence 420 * wait was started (in NPU SysTime). 421 */ 422 u64 fence_wait_start_ts; 423 u64 reserved_1; 424 /* Timestamp at which fence operation was completed (in NPU SysTime). */ 425 u64 fence_end_ts; 426 }; 427 428 /* Native fence log buffer. */ 429 struct vpu_hws_native_fence_log_buffer { 430 struct vpu_hws_native_fence_log_header header; 431 struct vpu_hws_native_fence_log_entry entry[]; 432 }; 433 434 /* 435 * Host <-> VPU IPC messages types. 436 */ 437 enum vpu_ipc_msg_type { 438 VPU_JSM_MSG_UNKNOWN = 0xFFFFFFFF, 439 440 /* IPC Host -> Device, Async commands */ 441 VPU_JSM_MSG_ASYNC_CMD = 0x1100, 442 VPU_JSM_MSG_ENGINE_RESET = VPU_JSM_MSG_ASYNC_CMD, 443 /** 444 * Preempt engine. The NPU stops (preempts) all the jobs currently 445 * executing on the target engine making the engine become idle and ready to 446 * execute new jobs. 447 * NOTE: The NPU does not remove unstarted jobs (if any) from job queues of 448 * the target engine, but it stops processing them (until the queue doorbell 449 * is rung again); the host is responsible to reset the job queue, either 450 * after preemption or when resubmitting jobs to the queue. 451 */ 452 VPU_JSM_MSG_ENGINE_PREEMPT = 0x1101, 453 VPU_JSM_MSG_REGISTER_DB = 0x1102, 454 VPU_JSM_MSG_UNREGISTER_DB = 0x1103, 455 VPU_JSM_MSG_QUERY_ENGINE_HB = 0x1104, 456 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT = 0x1105, 457 VPU_JSM_MSG_GET_POWER_LEVEL = 0x1106, 458 VPU_JSM_MSG_SET_POWER_LEVEL = 0x1107, 459 /* @deprecated */ 460 VPU_JSM_MSG_METRIC_STREAMER_OPEN = 0x1108, 461 /* @deprecated */ 462 VPU_JSM_MSG_METRIC_STREAMER_CLOSE = 0x1109, 463 /** Configure logging (used to modify configuration passed in boot params). */ 464 VPU_JSM_MSG_TRACE_SET_CONFIG = 0x110a, 465 /** Return current logging configuration. */ 466 VPU_JSM_MSG_TRACE_GET_CONFIG = 0x110b, 467 /** 468 * Get masks of destinations and HW components supported by the firmware 469 * (may vary between HW generations and FW compile 470 * time configurations) 471 */ 472 VPU_JSM_MSG_TRACE_GET_CAPABILITY = 0x110c, 473 /** Get the name of a destination or HW component. */ 474 VPU_JSM_MSG_TRACE_GET_NAME = 0x110d, 475 /** 476 * Release resource associated with host ssid . All jobs that belong to the host_ssid 477 * aborted and removed from internal scheduling queues. All doorbells assigned 478 * to the host_ssid are unregistered and any internal FW resources belonging to 479 * the host_ssid are released. 480 */ 481 VPU_JSM_MSG_SSID_RELEASE = 0x110e, 482 /** 483 * Start collecting metric data. 484 * @see vpu_jsm_metric_streamer_start 485 */ 486 VPU_JSM_MSG_METRIC_STREAMER_START = 0x110f, 487 /** 488 * Stop collecting metric data. This command will return success if it is called 489 * for a metric stream that has already been stopped or was never started. 490 * @see vpu_jsm_metric_streamer_stop 491 */ 492 VPU_JSM_MSG_METRIC_STREAMER_STOP = 0x1110, 493 /** 494 * Update current and next buffer for metric data collection. This command can 495 * also be used to request information about the number of collected samples 496 * and the amount of data written to the buffer. 497 * @see vpu_jsm_metric_streamer_update 498 */ 499 VPU_JSM_MSG_METRIC_STREAMER_UPDATE = 0x1111, 500 /** 501 * Request description of selected metric groups and metric counters within 502 * each group. The VPU will write the description of groups and counters to 503 * the buffer specified in the command structure. 504 * @see vpu_jsm_metric_streamer_start 505 */ 506 VPU_JSM_MSG_METRIC_STREAMER_INFO = 0x1112, 507 /** Control command: Priority band setup */ 508 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP = 0x1113, 509 /** Control command: Create command queue */ 510 VPU_JSM_MSG_CREATE_CMD_QUEUE = 0x1114, 511 /** Control command: Destroy command queue */ 512 VPU_JSM_MSG_DESTROY_CMD_QUEUE = 0x1115, 513 /** Control command: Set context scheduling properties */ 514 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES = 0x1116, 515 /* 516 * Register a doorbell to notify VPU of new work. The doorbell may later be 517 * deallocated or reassigned to another context. 518 */ 519 VPU_JSM_MSG_HWS_REGISTER_DB = 0x1117, 520 /** Control command: Log buffer setting */ 521 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG = 0x1118, 522 /* Control command: Suspend command queue. */ 523 VPU_JSM_MSG_HWS_SUSPEND_CMDQ = 0x1119, 524 /* Control command: Resume command queue */ 525 VPU_JSM_MSG_HWS_RESUME_CMDQ = 0x111a, 526 /* Control command: Resume engine after reset */ 527 VPU_JSM_MSG_HWS_ENGINE_RESUME = 0x111b, 528 /* Control command: Enable survivability/DCT mode */ 529 VPU_JSM_MSG_DCT_ENABLE = 0x111c, 530 /* Control command: Disable survivability/DCT mode */ 531 VPU_JSM_MSG_DCT_DISABLE = 0x111d, 532 /** 533 * Dump VPU state. To be used for debug purposes only. 534 * NOTE: Please introduce new ASYNC commands before this one. * 535 */ 536 VPU_JSM_MSG_STATE_DUMP = 0x11FF, 537 538 /* IPC Host -> Device, General commands */ 539 VPU_JSM_MSG_GENERAL_CMD = 0x1200, 540 VPU_JSM_MSG_BLOB_DEINIT_DEPRECATED = VPU_JSM_MSG_GENERAL_CMD, 541 /** 542 * Control dyndbg behavior by executing a dyndbg command; equivalent to 543 * Linux command: `echo '<dyndbg_cmd>' > <debugfs>/dynamic_debug/control`. 544 */ 545 VPU_JSM_MSG_DYNDBG_CONTROL = 0x1201, 546 /** 547 * Perform the save procedure for the D0i3 entry 548 */ 549 VPU_JSM_MSG_PWR_D0I3_ENTER = 0x1202, 550 551 /* IPC Device -> Host, Job completion */ 552 VPU_JSM_MSG_JOB_DONE = 0x2100, 553 /* IPC Device -> Host, Fence signalled */ 554 VPU_JSM_MSG_NATIVE_FENCE_SIGNALLED = 0x2101, 555 556 /* IPC Device -> Host, Async command completion */ 557 VPU_JSM_MSG_ASYNC_CMD_DONE = 0x2200, 558 VPU_JSM_MSG_ENGINE_RESET_DONE = VPU_JSM_MSG_ASYNC_CMD_DONE, 559 VPU_JSM_MSG_ENGINE_PREEMPT_DONE = 0x2201, 560 VPU_JSM_MSG_REGISTER_DB_DONE = 0x2202, 561 VPU_JSM_MSG_UNREGISTER_DB_DONE = 0x2203, 562 VPU_JSM_MSG_QUERY_ENGINE_HB_DONE = 0x2204, 563 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT_DONE = 0x2205, 564 VPU_JSM_MSG_GET_POWER_LEVEL_DONE = 0x2206, 565 VPU_JSM_MSG_SET_POWER_LEVEL_DONE = 0x2207, 566 /* @deprecated */ 567 VPU_JSM_MSG_METRIC_STREAMER_OPEN_DONE = 0x2208, 568 /* @deprecated */ 569 VPU_JSM_MSG_METRIC_STREAMER_CLOSE_DONE = 0x2209, 570 /** Response to VPU_JSM_MSG_TRACE_SET_CONFIG. */ 571 VPU_JSM_MSG_TRACE_SET_CONFIG_RSP = 0x220a, 572 /** Response to VPU_JSM_MSG_TRACE_GET_CONFIG. */ 573 VPU_JSM_MSG_TRACE_GET_CONFIG_RSP = 0x220b, 574 /** Response to VPU_JSM_MSG_TRACE_GET_CAPABILITY. */ 575 VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP = 0x220c, 576 /** Response to VPU_JSM_MSG_TRACE_GET_NAME. */ 577 VPU_JSM_MSG_TRACE_GET_NAME_RSP = 0x220d, 578 /** Response to VPU_JSM_MSG_SSID_RELEASE. */ 579 VPU_JSM_MSG_SSID_RELEASE_DONE = 0x220e, 580 /** 581 * Response to VPU_JSM_MSG_METRIC_STREAMER_START. 582 * VPU will return an error result if metric collection cannot be started, 583 * e.g. when the specified metric mask is invalid. 584 * @see vpu_jsm_metric_streamer_done 585 */ 586 VPU_JSM_MSG_METRIC_STREAMER_START_DONE = 0x220f, 587 /** 588 * Response to VPU_JSM_MSG_METRIC_STREAMER_STOP. 589 * Returns information about collected metric data. 590 * @see vpu_jsm_metric_streamer_done 591 */ 592 VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE = 0x2210, 593 /** 594 * Response to VPU_JSM_MSG_METRIC_STREAMER_UPDATE. 595 * Returns information about collected metric data. 596 * @see vpu_jsm_metric_streamer_done 597 */ 598 VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE = 0x2211, 599 /** 600 * Response to VPU_JSM_MSG_METRIC_STREAMER_INFO. 601 * Returns a description of the metric groups and metric counters. 602 * @see vpu_jsm_metric_streamer_done 603 */ 604 VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE = 0x2212, 605 /** 606 * Asynchronous event sent from the VPU to the host either when the current 607 * metric buffer is full or when the VPU has collected a multiple of 608 * @notify_sample_count samples as indicated through the start command 609 * (VPU_JSM_MSG_METRIC_STREAMER_START). Returns information about collected 610 * metric data. 611 * @see vpu_jsm_metric_streamer_done 612 */ 613 VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION = 0x2213, 614 /** Response to control command: Priority band setup */ 615 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP_RSP = 0x2214, 616 /** Response to control command: Create command queue */ 617 VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP = 0x2215, 618 /** Response to control command: Destroy command queue */ 619 VPU_JSM_MSG_DESTROY_CMD_QUEUE_RSP = 0x2216, 620 /** Response to control command: Set context scheduling properties */ 621 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES_RSP = 0x2217, 622 /** Response to control command: Log buffer setting */ 623 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP = 0x2218, 624 /* IPC Device -> Host, HWS notify index entry of log buffer written */ 625 VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION = 0x2219, 626 /* IPC Device -> Host, HWS completion of a context suspend request */ 627 VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE = 0x221a, 628 /* Response to control command: Resume command queue */ 629 VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP = 0x221b, 630 /* Response to control command: Resume engine command response */ 631 VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE = 0x221c, 632 /* Response to control command: Enable survivability/DCT mode */ 633 VPU_JSM_MSG_DCT_ENABLE_DONE = 0x221d, 634 /* Response to control command: Disable survivability/DCT mode */ 635 VPU_JSM_MSG_DCT_DISABLE_DONE = 0x221e, 636 /** 637 * Response to state dump control command. 638 * NOTE: Please introduce new ASYNC responses before this one. * 639 */ 640 VPU_JSM_MSG_STATE_DUMP_RSP = 0x22FF, 641 642 /* IPC Device -> Host, General command completion */ 643 VPU_JSM_MSG_GENERAL_CMD_DONE = 0x2300, 644 VPU_JSM_MSG_BLOB_DEINIT_DONE = VPU_JSM_MSG_GENERAL_CMD_DONE, 645 /** Response to VPU_JSM_MSG_DYNDBG_CONTROL. */ 646 VPU_JSM_MSG_DYNDBG_CONTROL_RSP = 0x2301, 647 /** 648 * Acknowledgment of completion of the save procedure initiated by 649 * VPU_JSM_MSG_PWR_D0I3_ENTER 650 */ 651 VPU_JSM_MSG_PWR_D0I3_ENTER_DONE = 0x2302, 652 }; 653 654 enum vpu_ipc_msg_status { VPU_JSM_MSG_FREE, VPU_JSM_MSG_ALLOCATED }; 655 656 /* 657 * Host <-> LRT IPC message payload definitions 658 */ 659 struct vpu_ipc_msg_payload_engine_reset { 660 /* Engine to be reset. */ 661 u32 engine_idx; 662 /* Reserved */ 663 u32 reserved_0; 664 }; 665 666 struct vpu_ipc_msg_payload_engine_preempt { 667 /* Engine to be preempted. */ 668 u32 engine_idx; 669 /* ID of the preemption request. */ 670 u32 preempt_id; 671 }; 672 673 /* 674 * @brief Register doorbell command structure. 675 * This structure supports doorbell registration for only OS scheduling. 676 * @see VPU_JSM_MSG_REGISTER_DB 677 */ 678 struct vpu_ipc_msg_payload_register_db { 679 /* Index of the doorbell to register. */ 680 u32 db_idx; 681 /* Reserved */ 682 u32 reserved_0; 683 /* Virtual address in Global GTT pointing to the start of job queue. */ 684 u64 jobq_base; 685 /* Size of the job queue in bytes. */ 686 u32 jobq_size; 687 /* Host sub-stream ID for the context assigned to the doorbell. */ 688 u32 host_ssid; 689 }; 690 691 /** 692 * @brief Unregister doorbell command structure. 693 * Request structure to unregister a doorbell for both HW and OS scheduling. 694 * @see VPU_JSM_MSG_UNREGISTER_DB 695 */ 696 struct vpu_ipc_msg_payload_unregister_db { 697 /* Index of the doorbell to unregister. */ 698 u32 db_idx; 699 /* Reserved */ 700 u32 reserved_0; 701 }; 702 703 struct vpu_ipc_msg_payload_query_engine_hb { 704 /* Engine to return heartbeat value. */ 705 u32 engine_idx; 706 /* Reserved */ 707 u32 reserved_0; 708 }; 709 710 struct vpu_ipc_msg_payload_power_level { 711 /** 712 * Requested power level. The power level value is in the 713 * range [0, power_level_count-1] where power_level_count 714 * is the number of available power levels as returned by 715 * the get power level count command. A power level of 0 716 * corresponds to the maximum possible power level, while 717 * power_level_count-1 corresponds to the minimum possible 718 * power level. Values outside of this range are not 719 * considered to be valid. 720 */ 721 u32 power_level; 722 /* Reserved */ 723 u32 reserved_0; 724 }; 725 726 struct vpu_ipc_msg_payload_ssid_release { 727 /* Host sub-stream ID for the context to be released. */ 728 u32 host_ssid; 729 /* Reserved */ 730 u32 reserved_0; 731 }; 732 733 /** 734 * @brief Metric streamer start command structure. 735 * This structure is also used with VPU_JSM_MSG_METRIC_STREAMER_INFO to request metric 736 * groups and metric counters description from the firmware. 737 * @see VPU_JSM_MSG_METRIC_STREAMER_START 738 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 739 */ 740 struct vpu_jsm_metric_streamer_start { 741 /** 742 * Bitmask to select the desired metric groups. 743 * A metric group can belong only to one metric streamer instance at a time. 744 * Since each metric streamer instance has a unique set of metric groups, it 745 * can also identify a metric streamer instance if more than one instance was 746 * started. If the VPU device does not support multiple metric streamer instances, 747 * then VPU_JSM_MSG_METRIC_STREAMER_START will return an error even if the second 748 * instance has different groups to the first. 749 */ 750 u64 metric_group_mask; 751 /** Sampling rate in nanoseconds. */ 752 u64 sampling_rate; 753 /** 754 * If > 0 the VPU will send a VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION message 755 * after every @notify_sample_count samples is collected or dropped by the VPU. 756 * If set to UINT_MAX the VPU will only generate a notification when the metric 757 * buffer is full. If set to 0 the VPU will never generate a notification. 758 */ 759 u32 notify_sample_count; 760 u32 reserved_0; 761 /** 762 * Address and size of the buffer where the VPU will write metric data. The 763 * VPU writes all counters from enabled metric groups one after another. If 764 * there is no space left to write data at the next sample period the VPU 765 * will switch to the next buffer (@see next_buffer_addr) and will optionally 766 * send a notification to the host driver if @notify_sample_count is non-zero. 767 * If @next_buffer_addr is NULL the VPU will stop collecting metric data. 768 */ 769 u64 buffer_addr; 770 u64 buffer_size; 771 /** 772 * Address and size of the next buffer to write metric data to after the initial 773 * buffer is full. If the address is NULL the VPU will stop collecting metric 774 * data. 775 */ 776 u64 next_buffer_addr; 777 u64 next_buffer_size; 778 }; 779 780 /** 781 * @brief Metric streamer stop command structure. 782 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP 783 */ 784 struct vpu_jsm_metric_streamer_stop { 785 /** Bitmask to select the desired metric groups. */ 786 u64 metric_group_mask; 787 }; 788 789 /** 790 * Provide VPU FW with buffers to write metric data. 791 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE 792 */ 793 struct vpu_jsm_metric_streamer_update { 794 /** Metric group mask that identifies metric streamer instance. */ 795 u64 metric_group_mask; 796 /** 797 * Address and size of the buffer where the VPU will write metric data. 798 * This member dictates how the update operation should perform: 799 * 1. client needs information about the number of collected samples and the 800 * amount of data written to the current buffer 801 * 2. client wants to switch to a new buffer 802 * 803 * Case 1. is identified by the buffer address being 0 or the same as the 804 * currently used buffer address. In this case the buffer size is ignored and 805 * the size of the current buffer is unchanged. The VPU will return an update 806 * in the vpu_jsm_metric_streamer_done structure. The internal writing position 807 * into the buffer is not changed. 808 * 809 * Case 2. is identified by the address being non-zero and differs from the 810 * current buffer address. The VPU will immediately switch data collection to 811 * the new buffer. Then the VPU will return an update in the 812 * vpu_jsm_metric_streamer_done structure. 813 */ 814 u64 buffer_addr; 815 u64 buffer_size; 816 /** 817 * Address and size of the next buffer to write metric data after the initial 818 * buffer is full. If the address is NULL the VPU will stop collecting metric 819 * data but will continue to record dropped samples. 820 * 821 * Note that there is a hazard possible if both buffer_addr and the next_buffer_addr 822 * are non-zero in same update request. It is the host's responsibility to ensure 823 * that both addresses make sense even if the VPU just switched to writing samples 824 * from the current to the next buffer. 825 */ 826 u64 next_buffer_addr; 827 u64 next_buffer_size; 828 }; 829 830 struct vpu_ipc_msg_payload_job_done { 831 /* Engine to which the job was submitted. */ 832 u32 engine_idx; 833 /* Index of the doorbell to which the job was submitted */ 834 u32 db_idx; 835 /* ID of the completed job */ 836 u32 job_id; 837 /* Status of the completed job */ 838 u32 job_status; 839 /* Host SSID */ 840 u32 host_ssid; 841 /* Zero Padding */ 842 u32 reserved_0; 843 /* Command queue id */ 844 u64 cmdq_id; 845 }; 846 847 /* 848 * Notification message upon native fence signalling. 849 * @see VPU_JSM_MSG_NATIVE_FENCE_SIGNALLED 850 */ 851 struct vpu_ipc_msg_payload_native_fence_signalled { 852 /* Engine ID. */ 853 u32 engine_idx; 854 /* Host SSID. */ 855 u32 host_ssid; 856 /* CMDQ ID */ 857 u64 cmdq_id; 858 /* Fence object handle. */ 859 u64 fence_handle; 860 }; 861 862 struct vpu_jsm_engine_reset_context { 863 /* Host SSID */ 864 u32 host_ssid; 865 /* Zero Padding */ 866 u32 reserved_0; 867 /* Command queue id */ 868 u64 cmdq_id; 869 /* See VPU_ENGINE_RESET_CONTEXT_* defines */ 870 u64 flags; 871 }; 872 873 struct vpu_ipc_msg_payload_engine_reset_done { 874 /* Engine ordinal */ 875 u32 engine_idx; 876 /* Number of impacted contexts */ 877 u32 num_impacted_contexts; 878 /* Array of impacted command queue ids and their flags */ 879 struct vpu_jsm_engine_reset_context 880 impacted_contexts[VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS]; 881 }; 882 883 struct vpu_ipc_msg_payload_engine_preempt_done { 884 /* Engine preempted. */ 885 u32 engine_idx; 886 /* ID of the preemption request. */ 887 u32 preempt_id; 888 }; 889 890 /** 891 * Response structure for register doorbell command for both OS 892 * and HW scheduling. 893 * @see VPU_JSM_MSG_REGISTER_DB 894 * @see VPU_JSM_MSG_HWS_REGISTER_DB 895 */ 896 struct vpu_ipc_msg_payload_register_db_done { 897 /* Index of the registered doorbell. */ 898 u32 db_idx; 899 /* Reserved */ 900 u32 reserved_0; 901 }; 902 903 /** 904 * Response structure for unregister doorbell command for both OS 905 * and HW scheduling. 906 * @see VPU_JSM_MSG_UNREGISTER_DB 907 */ 908 struct vpu_ipc_msg_payload_unregister_db_done { 909 /* Index of the unregistered doorbell. */ 910 u32 db_idx; 911 /* Reserved */ 912 u32 reserved_0; 913 }; 914 915 struct vpu_ipc_msg_payload_query_engine_hb_done { 916 /* Engine returning heartbeat value. */ 917 u32 engine_idx; 918 /* Reserved */ 919 u32 reserved_0; 920 /* Heartbeat value. */ 921 u64 heartbeat; 922 }; 923 924 struct vpu_ipc_msg_payload_get_power_level_count_done { 925 /** 926 * Number of supported power levels. The maximum possible 927 * value of power_level_count is 16 but this may vary across 928 * implementations. 929 */ 930 u32 power_level_count; 931 /* Reserved */ 932 u32 reserved_0; 933 /** 934 * Power consumption limit for each supported power level in 935 * [0-100%] range relative to power level 0. 936 */ 937 u8 power_limit[16]; 938 }; 939 940 /* HWS priority band setup request / response */ 941 struct vpu_ipc_msg_payload_hws_priority_band_setup { 942 /* 943 * Grace period in 100ns units when preempting another priority band for 944 * this priority band 945 */ 946 u32 grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 947 /* 948 * Default quantum in 100ns units for scheduling across processes 949 * within a priority band 950 * Minimum value supported by NPU is 1ms (10000 in 100ns units). 951 */ 952 u32 process_quantum[VPU_HWS_NUM_PRIORITY_BANDS]; 953 /* 954 * Default grace period in 100ns units for processes that preempt each 955 * other within a priority band 956 */ 957 u32 process_grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 958 /* 959 * For normal priority band, specifies the target VPU percentage 960 * in situations when it's starved by the focus band. 961 */ 962 u32 normal_band_percentage; 963 /* 964 * TDR timeout value in milliseconds. Default value of 0 meaning no timeout. 965 */ 966 u32 tdr_timeout; 967 }; 968 969 /* 970 * @brief HWS create command queue request. 971 * Host will create a command queue via this command. 972 * Note: Cmdq group is a handle of an object which 973 * may contain one or more command queues. 974 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE 975 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP 976 */ 977 struct vpu_ipc_msg_payload_hws_create_cmdq { 978 /* Process id */ 979 u64 process_id; 980 /* Host SSID */ 981 u32 host_ssid; 982 /* Engine for which queue is being created */ 983 u32 engine_idx; 984 /* Cmdq group: only used for HWS logging of state changes */ 985 u64 cmdq_group; 986 /* Command queue id */ 987 u64 cmdq_id; 988 /* Command queue base */ 989 u64 cmdq_base; 990 /* Command queue size */ 991 u32 cmdq_size; 992 /* Zero padding */ 993 u32 reserved_0; 994 }; 995 996 /* 997 * @brief HWS create command queue response. 998 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE 999 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP 1000 */ 1001 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp { 1002 /* Process id */ 1003 u64 process_id; 1004 /* Host SSID */ 1005 u32 host_ssid; 1006 /* Engine for which queue is being created */ 1007 u32 engine_idx; 1008 /* Command queue group */ 1009 u64 cmdq_group; 1010 /* Command queue id */ 1011 u64 cmdq_id; 1012 }; 1013 1014 /* HWS destroy command queue request / response */ 1015 struct vpu_ipc_msg_payload_hws_destroy_cmdq { 1016 /* Host SSID */ 1017 u32 host_ssid; 1018 /* Zero Padding */ 1019 u32 reserved; 1020 /* Command queue id */ 1021 u64 cmdq_id; 1022 }; 1023 1024 /* HWS set context scheduling properties request / response */ 1025 struct vpu_ipc_msg_payload_hws_set_context_sched_properties { 1026 /* Host SSID */ 1027 u32 host_ssid; 1028 /* Zero Padding */ 1029 u32 reserved_0; 1030 /* Command queue id */ 1031 u64 cmdq_id; 1032 /* 1033 * Priority band to assign to work of this context. 1034 * Available priority bands: @see enum vpu_job_scheduling_priority_band 1035 */ 1036 u32 priority_band; 1037 /* Inside realtime band assigns a further priority */ 1038 u32 realtime_priority_level; 1039 /* Priority relative to other contexts in the same process */ 1040 s32 in_process_priority; 1041 /* Zero padding / Reserved */ 1042 u32 reserved_1; 1043 /* 1044 * Context quantum relative to other contexts of same priority in the same process 1045 * Minimum value supported by NPU is 1ms (10000 in 100ns units). 1046 */ 1047 u64 context_quantum; 1048 /* Grace period when preempting context of the same priority within the same process */ 1049 u64 grace_period_same_priority; 1050 /* Grace period when preempting context of a lower priority within the same process */ 1051 u64 grace_period_lower_priority; 1052 }; 1053 1054 /* 1055 * @brief Register doorbell command structure. 1056 * This structure supports doorbell registration for both HW and OS scheduling. 1057 * Note: Queue base and size are added here so that the same structure can be used for 1058 * OS scheduling and HW scheduling. For OS scheduling, cmdq_id will be ignored 1059 * and cmdq_base and cmdq_size will be used. For HW scheduling, cmdq_base and cmdq_size will be 1060 * ignored and cmdq_id is used. 1061 * @see VPU_JSM_MSG_HWS_REGISTER_DB 1062 */ 1063 struct vpu_jsm_hws_register_db { 1064 /* Index of the doorbell to register. */ 1065 u32 db_id; 1066 /* Host sub-stream ID for the context assigned to the doorbell. */ 1067 u32 host_ssid; 1068 /* ID of the command queue associated with the doorbell. */ 1069 u64 cmdq_id; 1070 /* Virtual address pointing to the start of command queue. */ 1071 u64 cmdq_base; 1072 /* Size of the command queue in bytes. */ 1073 u64 cmdq_size; 1074 }; 1075 1076 /* 1077 * @brief Structure to set another buffer to be used for scheduling-related logging. 1078 * The size of the logging buffer and the number of entries is defined as part of the 1079 * buffer itself as described next. 1080 * The log buffer received from the host is made up of; 1081 * - header: 32 bytes in size, as shown in 'struct vpu_hws_log_buffer_header'. 1082 * The header contains the number of log entries in the buffer. 1083 * - log entry: 0 to n-1, each log entry is 32 bytes in size, as shown in 1084 * 'struct vpu_hws_log_buffer_entry'. 1085 * The entry contains the VPU timestamp, operation type and data. 1086 * The host should provide the notify index value of log buffer to VPU. This is a 1087 * value defined within the log buffer and when written to will generate the 1088 * scheduling log notification. 1089 * The host should set engine_idx and vpu_log_buffer_va to 0 to disable logging 1090 * for a particular engine. 1091 * VPU will handle one log buffer for each of supported engines. 1092 * VPU should allow the logging to consume one host_ssid. 1093 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 1094 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP 1095 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1096 */ 1097 struct vpu_ipc_msg_payload_hws_set_scheduling_log { 1098 /* Engine ordinal */ 1099 u32 engine_idx; 1100 /* Host SSID */ 1101 u32 host_ssid; 1102 /* 1103 * VPU log buffer virtual address. 1104 * Set to 0 to disable logging for this engine. 1105 */ 1106 u64 vpu_log_buffer_va; 1107 /* 1108 * Notify index of log buffer. VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1109 * is generated when an event log is written to this index. 1110 */ 1111 u64 notify_index; 1112 /* 1113 * Field is now deprecated, will be removed when KMD is updated to support removal 1114 */ 1115 u32 enable_extra_events; 1116 /* Zero Padding */ 1117 u32 reserved_0; 1118 }; 1119 1120 /* 1121 * @brief The scheduling log notification is generated by VPU when it writes 1122 * an event into the log buffer at the notify_index. VPU notifies host with 1123 * VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION. This is an asynchronous 1124 * message from VPU to host. 1125 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1126 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 1127 */ 1128 struct vpu_ipc_msg_payload_hws_scheduling_log_notification { 1129 /* Engine ordinal */ 1130 u32 engine_idx; 1131 /* Zero Padding */ 1132 u32 reserved_0; 1133 }; 1134 1135 /* 1136 * @brief HWS suspend command queue request and done structure. 1137 * Host will request the suspend of contexts and VPU will; 1138 * - Suspend all work on this context 1139 * - Preempt any running work 1140 * - Asynchronously perform the above and return success immediately once 1141 * all items above are started successfully 1142 * - Notify the host of completion of these operations via 1143 * VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 1144 * - Reject any other context operations on a context with an in-flight 1145 * suspend request running 1146 * Same structure used when VPU notifies host of completion of a context suspend 1147 * request. The ids and suspend fence value reported in this command will match 1148 * the one in the request from the host to suspend the context. Once suspend is 1149 * complete, VPU will not access any data relating to this command queue until 1150 * it is resumed. 1151 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ 1152 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 1153 */ 1154 struct vpu_ipc_msg_payload_hws_suspend_cmdq { 1155 /* Host SSID */ 1156 u32 host_ssid; 1157 /* Zero Padding */ 1158 u32 reserved_0; 1159 /* Command queue id */ 1160 u64 cmdq_id; 1161 /* 1162 * Suspend fence value - reported by the VPU suspend context 1163 * completed once suspend is complete. 1164 */ 1165 u64 suspend_fence_value; 1166 }; 1167 1168 /* 1169 * @brief HWS Resume command queue request / response structure. 1170 * Host will request the resume of a context; 1171 * - VPU will resume all work on this context 1172 * - Scheduler will allow this context to be scheduled 1173 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ 1174 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP 1175 */ 1176 struct vpu_ipc_msg_payload_hws_resume_cmdq { 1177 /* Host SSID */ 1178 u32 host_ssid; 1179 /* Zero Padding */ 1180 u32 reserved_0; 1181 /* Command queue id */ 1182 u64 cmdq_id; 1183 }; 1184 1185 /* 1186 * @brief HWS Resume engine request / response structure. 1187 * After a HWS engine reset, all scheduling is stopped on VPU until a engine resume. 1188 * Host shall send this command to resume scheduling of any valid queue. 1189 * @see VPU_JSM_MSG_HWS_RESUME_ENGINE 1190 * @see VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE 1191 */ 1192 struct vpu_ipc_msg_payload_hws_resume_engine { 1193 /* Engine to be resumed */ 1194 u32 engine_idx; 1195 /* Reserved */ 1196 u32 reserved_0; 1197 }; 1198 1199 /** 1200 * Payload for VPU_JSM_MSG_TRACE_SET_CONFIG[_RSP] and 1201 * VPU_JSM_MSG_TRACE_GET_CONFIG_RSP messages. 1202 * 1203 * The payload is interpreted differently depending on the type of message: 1204 * 1205 * - For VPU_JSM_MSG_TRACE_SET_CONFIG, the payload specifies the desired 1206 * logging configuration to be set. 1207 * 1208 * - For VPU_JSM_MSG_TRACE_SET_CONFIG_RSP, the payload reports the logging 1209 * configuration that was set after a VPU_JSM_MSG_TRACE_SET_CONFIG request. 1210 * The host can compare this payload with the one it sent in the 1211 * VPU_JSM_MSG_TRACE_SET_CONFIG request to check whether or not the 1212 * configuration was set as desired. 1213 * 1214 * - VPU_JSM_MSG_TRACE_GET_CONFIG_RSP, the payload reports the current logging 1215 * configuration. 1216 */ 1217 struct vpu_ipc_msg_payload_trace_config { 1218 /** 1219 * Logging level (currently set or to be set); see 'mvLog_t' enum for 1220 * acceptable values. The specified logging level applies to all 1221 * destinations and HW components 1222 */ 1223 u32 trace_level; 1224 /** 1225 * Bitmask of logging destinations (currently enabled or to be enabled); 1226 * bitwise OR of values defined in logging_destination enum. 1227 */ 1228 u32 trace_destination_mask; 1229 /** 1230 * Bitmask of loggable HW components (currently enabled or to be enabled); 1231 * bitwise OR of values defined in loggable_hw_component enum. 1232 */ 1233 u64 trace_hw_component_mask; 1234 u64 reserved_0; /**< Reserved for future extensions. */ 1235 }; 1236 1237 /** 1238 * Payload for VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP messages. 1239 */ 1240 struct vpu_ipc_msg_payload_trace_capability_rsp { 1241 u32 trace_destination_mask; /**< Bitmask of supported logging destinations. */ 1242 u32 reserved_0; 1243 u64 trace_hw_component_mask; /**< Bitmask of supported loggable HW components. */ 1244 u64 reserved_1; /**< Reserved for future extensions. */ 1245 }; 1246 1247 /** 1248 * Payload for VPU_JSM_MSG_TRACE_GET_NAME requests. 1249 */ 1250 struct vpu_ipc_msg_payload_trace_get_name { 1251 /** 1252 * The type of the entity to query name for; see logging_entity_type for 1253 * possible values. 1254 */ 1255 u32 entity_type; 1256 u32 reserved_0; 1257 /** 1258 * The ID of the entity to query name for; possible values depends on the 1259 * entity type. 1260 */ 1261 u64 entity_id; 1262 }; 1263 1264 /** 1265 * Payload for VPU_JSM_MSG_TRACE_GET_NAME_RSP responses. 1266 */ 1267 struct vpu_ipc_msg_payload_trace_get_name_rsp { 1268 /** 1269 * The type of the entity whose name was queried; see logging_entity_type 1270 * for possible values. 1271 */ 1272 u32 entity_type; 1273 u32 reserved_0; 1274 /** 1275 * The ID of the entity whose name was queried; possible values depends on 1276 * the entity type. 1277 */ 1278 u64 entity_id; 1279 /** Reserved for future extensions. */ 1280 u64 reserved_1; 1281 /** The name of the entity. */ 1282 char entity_name[VPU_TRACE_ENTITY_NAME_MAX_LEN]; 1283 }; 1284 1285 /** 1286 * Data sent from the VPU to the host in all metric streamer response messages 1287 * and in asynchronous notification. 1288 * @see VPU_JSM_MSG_METRIC_STREAMER_START_DONE 1289 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE 1290 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE 1291 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE 1292 * @see VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION 1293 */ 1294 struct vpu_jsm_metric_streamer_done { 1295 /** Metric group mask that identifies metric streamer instance. */ 1296 u64 metric_group_mask; 1297 /** 1298 * Size in bytes of single sample - total size of all enabled counters. 1299 * Some VPU implementations may align sample_size to more than 8 bytes. 1300 */ 1301 u32 sample_size; 1302 u32 reserved_0; 1303 /** 1304 * Number of samples collected since the metric streamer was started. 1305 * This will be 0 if the metric streamer was not started. 1306 */ 1307 u32 samples_collected; 1308 /** 1309 * Number of samples dropped since the metric streamer was started. This 1310 * is incremented every time the metric streamer is not able to write 1311 * collected samples because the current buffer is full and there is no 1312 * next buffer to switch to. 1313 */ 1314 u32 samples_dropped; 1315 /** Address of the buffer that contains the latest metric data. */ 1316 u64 buffer_addr; 1317 /** 1318 * Number of bytes written into the metric data buffer. In response to the 1319 * VPU_JSM_MSG_METRIC_STREAMER_INFO request this field contains the size of 1320 * all group and counter descriptors. The size is updated even if the buffer 1321 * in the request was NULL or too small to hold descriptors of all counters 1322 */ 1323 u64 bytes_written; 1324 }; 1325 1326 /** 1327 * Metric group description placed in the metric buffer after successful completion 1328 * of the VPU_JSM_MSG_METRIC_STREAMER_INFO command. This is followed by one or more 1329 * @vpu_jsm_metric_counter_descriptor records. 1330 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1331 */ 1332 struct vpu_jsm_metric_group_descriptor { 1333 /** 1334 * Offset to the next metric group (8-byte aligned). If this offset is 0 this 1335 * is the last descriptor. The value of metric_info_size must be greater than 1336 * or equal to sizeof(struct vpu_jsm_metric_group_descriptor) + name_string_size 1337 * + description_string_size and must be 8-byte aligned. 1338 */ 1339 u32 next_metric_group_info_offset; 1340 /** 1341 * Offset to the first metric counter description record (8-byte aligned). 1342 * @see vpu_jsm_metric_counter_descriptor 1343 */ 1344 u32 next_metric_counter_info_offset; 1345 /** Index of the group. This corresponds to bit index in metric_group_mask. */ 1346 u32 group_id; 1347 /** Number of counters in the metric group. */ 1348 u32 num_counters; 1349 /** Data size for all counters, must be a multiple of 8 bytes.*/ 1350 u32 metric_group_data_size; 1351 /** 1352 * Metric group domain number. Cannot use multiple, simultaneous metric groups 1353 * from the same domain. 1354 */ 1355 u32 domain; 1356 /** 1357 * Counter name string size. The string must include a null termination character. 1358 * The FW may use a fixed size name or send a different name for each counter. 1359 * If the VPU uses fixed size strings, all characters from the end of the name 1360 * to the of the fixed size character array must be zeroed. 1361 */ 1362 u32 name_string_size; 1363 /** Counter description string size, @see name_string_size */ 1364 u32 description_string_size; 1365 u64 reserved_0; 1366 /** 1367 * Right after this structure, the VPU writes name and description of 1368 * the metric group. 1369 */ 1370 }; 1371 1372 /** 1373 * Metric counter description, placed in the buffer after vpu_jsm_metric_group_descriptor. 1374 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1375 */ 1376 struct vpu_jsm_metric_counter_descriptor { 1377 /** 1378 * Offset to the next counter in a group (8-byte aligned). If this offset is 1379 * 0 this is the last counter in the group. 1380 */ 1381 u32 next_metric_counter_info_offset; 1382 /** 1383 * Offset to the counter data from the start of samples in this metric group. 1384 * Note that metric_data_offset % metric_data_size must be 0. 1385 */ 1386 u32 metric_data_offset; 1387 /** Size of the metric counter data in bytes. */ 1388 u32 metric_data_size; 1389 /** Metric type, see Level Zero API for definitions. */ 1390 u32 tier; 1391 /** Metric type, see set_metric_type_t for definitions. */ 1392 u32 metric_type; 1393 /** Metric type, see set_value_type_t for definitions. */ 1394 u32 metric_value_type; 1395 /** 1396 * Counter name string size. The string must include a null termination character. 1397 * The FW may use a fixed size name or send a different name for each counter. 1398 * If the VPU uses fixed size strings, all characters from the end of the name 1399 * to the of the fixed size character array must be zeroed. 1400 */ 1401 u32 name_string_size; 1402 /** Counter description string size, @see name_string_size */ 1403 u32 description_string_size; 1404 /** Counter component name string size, @see name_string_size */ 1405 u32 component_string_size; 1406 /** Counter string size, @see name_string_size */ 1407 u32 units_string_size; 1408 u64 reserved_0; 1409 /** 1410 * Right after this structure, the VPU writes name, description 1411 * component and unit strings. 1412 */ 1413 }; 1414 1415 /** 1416 * Payload for VPU_JSM_MSG_DYNDBG_CONTROL requests. 1417 * 1418 * VPU_JSM_MSG_DYNDBG_CONTROL are used to control the VPU FW Dynamic Debug 1419 * feature, which allows developers to selectively enable / disable MVLOG_DEBUG 1420 * messages. This is equivalent to the Dynamic Debug functionality provided by 1421 * Linux 1422 * (https://www.kernel.org/doc/html/latest/admin-guide/dynamic-debug-howto.html) 1423 * The host can control Dynamic Debug behavior by sending dyndbg commands, which 1424 * have the same syntax as Linux 1425 * dyndbg commands. 1426 * 1427 * NOTE: in order for MVLOG_DEBUG messages to be actually printed, the host 1428 * still has to set the logging level to MVLOG_DEBUG, using the 1429 * VPU_JSM_MSG_TRACE_SET_CONFIG command. 1430 * 1431 * The host can see the current dynamic debug configuration by executing a 1432 * special 'show' command. The dyndbg configuration will be printed to the 1433 * configured logging destination using MVLOG_INFO logging level. 1434 */ 1435 struct vpu_ipc_msg_payload_dyndbg_control { 1436 /** 1437 * Dyndbg command (same format as Linux dyndbg); must be a NULL-terminated 1438 * string. 1439 */ 1440 char dyndbg_cmd[VPU_DYNDBG_CMD_MAX_LEN]; 1441 }; 1442 1443 /** 1444 * Payload for VPU_JSM_MSG_PWR_D0I3_ENTER 1445 * 1446 * This is a bi-directional payload. 1447 */ 1448 struct vpu_ipc_msg_payload_pwr_d0i3_enter { 1449 /** 1450 * 0: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is not sent to the host driver 1451 * The driver will poll for D0i2 Idle state transitions. 1452 * 1: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is sent after VPU state save is complete 1453 */ 1454 u32 send_response; 1455 u32 reserved_0; 1456 }; 1457 1458 /** 1459 * Payload for VPU_JSM_MSG_DCT_ENABLE message. 1460 * 1461 * Default values for DCT active/inactive times are 5.3ms and 30ms respectively, 1462 * corresponding to a 85% duty cycle. This payload allows the host to tune these 1463 * values according to application requirements. 1464 */ 1465 struct vpu_ipc_msg_payload_pwr_dct_control { 1466 /** Duty cycle active time in microseconds */ 1467 u32 dct_active_us; 1468 /** Duty cycle inactive time in microseconds */ 1469 u32 dct_inactive_us; 1470 }; 1471 1472 /* 1473 * Payloads union, used to define complete message format. 1474 */ 1475 union vpu_ipc_msg_payload { 1476 struct vpu_ipc_msg_payload_engine_reset engine_reset; 1477 struct vpu_ipc_msg_payload_engine_preempt engine_preempt; 1478 struct vpu_ipc_msg_payload_register_db register_db; 1479 struct vpu_ipc_msg_payload_unregister_db unregister_db; 1480 struct vpu_ipc_msg_payload_query_engine_hb query_engine_hb; 1481 struct vpu_ipc_msg_payload_power_level power_level; 1482 struct vpu_jsm_metric_streamer_start metric_streamer_start; 1483 struct vpu_jsm_metric_streamer_stop metric_streamer_stop; 1484 struct vpu_jsm_metric_streamer_update metric_streamer_update; 1485 struct vpu_ipc_msg_payload_ssid_release ssid_release; 1486 struct vpu_jsm_hws_register_db hws_register_db; 1487 struct vpu_ipc_msg_payload_job_done job_done; 1488 struct vpu_ipc_msg_payload_native_fence_signalled native_fence_signalled; 1489 struct vpu_ipc_msg_payload_engine_reset_done engine_reset_done; 1490 struct vpu_ipc_msg_payload_engine_preempt_done engine_preempt_done; 1491 struct vpu_ipc_msg_payload_register_db_done register_db_done; 1492 struct vpu_ipc_msg_payload_unregister_db_done unregister_db_done; 1493 struct vpu_ipc_msg_payload_query_engine_hb_done query_engine_hb_done; 1494 struct vpu_ipc_msg_payload_get_power_level_count_done get_power_level_count_done; 1495 struct vpu_jsm_metric_streamer_done metric_streamer_done; 1496 struct vpu_ipc_msg_payload_trace_config trace_config; 1497 struct vpu_ipc_msg_payload_trace_capability_rsp trace_capability; 1498 struct vpu_ipc_msg_payload_trace_get_name trace_get_name; 1499 struct vpu_ipc_msg_payload_trace_get_name_rsp trace_get_name_rsp; 1500 struct vpu_ipc_msg_payload_dyndbg_control dyndbg_control; 1501 struct vpu_ipc_msg_payload_hws_priority_band_setup hws_priority_band_setup; 1502 struct vpu_ipc_msg_payload_hws_create_cmdq hws_create_cmdq; 1503 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp hws_create_cmdq_rsp; 1504 struct vpu_ipc_msg_payload_hws_destroy_cmdq hws_destroy_cmdq; 1505 struct vpu_ipc_msg_payload_hws_set_context_sched_properties 1506 hws_set_context_sched_properties; 1507 struct vpu_ipc_msg_payload_hws_set_scheduling_log hws_set_scheduling_log; 1508 struct vpu_ipc_msg_payload_hws_scheduling_log_notification hws_scheduling_log_notification; 1509 struct vpu_ipc_msg_payload_hws_suspend_cmdq hws_suspend_cmdq; 1510 struct vpu_ipc_msg_payload_hws_resume_cmdq hws_resume_cmdq; 1511 struct vpu_ipc_msg_payload_hws_resume_engine hws_resume_engine; 1512 struct vpu_ipc_msg_payload_pwr_d0i3_enter pwr_d0i3_enter; 1513 struct vpu_ipc_msg_payload_pwr_dct_control pwr_dct_control; 1514 }; 1515 1516 /* 1517 * Host <-> LRT IPC message base structure. 1518 * 1519 * NOTE: All instances of this object must be aligned on a 64B boundary 1520 * to allow proper handling of VPU cache operations. 1521 */ 1522 struct vpu_jsm_msg { 1523 /* Reserved */ 1524 u64 reserved_0; 1525 /* Message type, see vpu_ipc_msg_type enum. */ 1526 u32 type; 1527 /* Buffer status, see vpu_ipc_msg_status enum. */ 1528 u32 status; 1529 /* 1530 * Request ID, provided by the host in a request message and passed 1531 * back by VPU in the response message. 1532 */ 1533 u32 request_id; 1534 /* Request return code set by the VPU, see VPU_JSM_STATUS_* defines. */ 1535 u32 result; 1536 u64 reserved_1; 1537 /* Message payload depending on message type, see vpu_ipc_msg_payload union. */ 1538 union vpu_ipc_msg_payload payload; 1539 }; 1540 1541 #pragma pack(pop) 1542 1543 #endif 1544 1545 ///@} 1546