xref: /linux/drivers/media/rc/img-ir/img-ir-hw.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * ImgTec IR Hardware Decoder found in PowerDown Controller.
4  *
5  * Copyright 2010-2014 Imagination Technologies Ltd.
6  */
7 
8 #ifndef _IMG_IR_HW_H_
9 #define _IMG_IR_HW_H_
10 
11 #include <linux/kernel.h>
12 #include <media/rc-core.h>
13 
14 /* constants */
15 
16 #define IMG_IR_CODETYPE_PULSELEN	0x0	/* Sony */
17 #define IMG_IR_CODETYPE_PULSEDIST	0x1	/* NEC, Toshiba, Micom, Sharp */
18 #define IMG_IR_CODETYPE_BIPHASE		0x2	/* RC-5/6 */
19 #define IMG_IR_CODETYPE_2BITPULSEPOS	0x3	/* RC-MM */
20 
21 
22 /* Timing information */
23 
24 /**
25  * struct img_ir_control - Decoder control settings
26  * @decoden:	Primary decoder enable
27  * @code_type:	Decode type (see IMG_IR_CODETYPE_*)
28  * @hdrtog:	Detect header toggle symbol after leader symbol
29  * @ldrdec:	Don't discard leader if maximum width reached
30  * @decodinpol:	Decoder input polarity (1=active high)
31  * @bitorien:	Bit orientation (1=MSB first)
32  * @d1validsel:	Decoder 2 takes over if it detects valid data
33  * @bitinv:	Bit inversion switch (1=don't invert)
34  * @decodend2:	Secondary decoder enable (no leader symbol)
35  * @bitoriend2:	Bit orientation (1=MSB first)
36  * @bitinvd2:	Secondary decoder bit inversion switch (1=don't invert)
37  */
38 struct img_ir_control {
39 	unsigned decoden:1;
40 	unsigned code_type:2;
41 	unsigned hdrtog:1;
42 	unsigned ldrdec:1;
43 	unsigned decodinpol:1;
44 	unsigned bitorien:1;
45 	unsigned d1validsel:1;
46 	unsigned bitinv:1;
47 	unsigned decodend2:1;
48 	unsigned bitoriend2:1;
49 	unsigned bitinvd2:1;
50 };
51 
52 /**
53  * struct img_ir_timing_range - range of timing values
54  * @min:	Minimum timing value
55  * @max:	Maximum timing value (if < @min, this will be set to @min during
56  *		preprocessing step, so it is normally not explicitly initialised
57  *		and is taken care of by the tolerance)
58  */
59 struct img_ir_timing_range {
60 	u16 min;
61 	u16 max;
62 };
63 
64 /**
65  * struct img_ir_symbol_timing - timing data for a symbol
66  * @pulse:	Timing range for the length of the pulse in this symbol
67  * @space:	Timing range for the length of the space in this symbol
68  */
69 struct img_ir_symbol_timing {
70 	struct img_ir_timing_range pulse;
71 	struct img_ir_timing_range space;
72 };
73 
74 /**
75  * struct img_ir_free_timing - timing data for free time symbol
76  * @minlen:	Minimum number of bits of data
77  * @maxlen:	Maximum number of bits of data
78  * @ft_min:	Minimum free time after message
79  */
80 struct img_ir_free_timing {
81 	/* measured in bits */
82 	u8 minlen;
83 	u8 maxlen;
84 	u16 ft_min;
85 };
86 
87 /**
88  * struct img_ir_timings - Timing values.
89  * @ldr:	Leader symbol timing data
90  * @s00:	Zero symbol timing data for primary decoder
91  * @s01:	One symbol timing data for primary decoder
92  * @s10:	Zero symbol timing data for secondary (no leader symbol) decoder
93  * @s11:	One symbol timing data for secondary (no leader symbol) decoder
94  * @ft:		Free time symbol timing data
95  */
96 struct img_ir_timings {
97 	struct img_ir_symbol_timing ldr, s00, s01, s10, s11;
98 	struct img_ir_free_timing ft;
99 };
100 
101 /**
102  * struct img_ir_filter - Filter IR events.
103  * @data:	Data to match.
104  * @mask:	Mask of bits to compare.
105  * @minlen:	Additional minimum number of bits.
106  * @maxlen:	Additional maximum number of bits.
107  */
108 struct img_ir_filter {
109 	u64 data;
110 	u64 mask;
111 	u8 minlen;
112 	u8 maxlen;
113 };
114 
115 /**
116  * struct img_ir_timing_regvals - Calculated timing register values.
117  * @ldr:	Leader symbol timing register value
118  * @s00:	Zero symbol timing register value for primary decoder
119  * @s01:	One symbol timing register value for primary decoder
120  * @s10:	Zero symbol timing register value for secondary decoder
121  * @s11:	One symbol timing register value for secondary decoder
122  * @ft:		Free time symbol timing register value
123  */
124 struct img_ir_timing_regvals {
125 	u32 ldr, s00, s01, s10, s11, ft;
126 };
127 
128 #define IMG_IR_SCANCODE		0	/* new scancode */
129 #define IMG_IR_REPEATCODE	1	/* repeat the previous code */
130 
131 /**
132  * struct img_ir_scancode_req - Scancode request data.
133  * @protocol:	Protocol code of received message (defaults to
134  *		RC_PROTO_UNKNOWN).
135  * @scancode:	Scan code of received message (must be written by
136  *		handler if IMG_IR_SCANCODE is returned).
137  * @toggle:	Toggle bit (defaults to 0).
138  */
139 struct img_ir_scancode_req {
140 	enum rc_proto protocol;
141 	u32 scancode;
142 	u8 toggle;
143 };
144 
145 /**
146  * struct img_ir_decoder - Decoder settings for an IR protocol.
147  * @type:	Protocol types bitmap.
148  * @tolerance:	Timing tolerance as a percentage (default 10%).
149  * @unit:	Unit of timings in nanoseconds (default 1 us).
150  * @timings:	Primary timings
151  * @rtimings:	Additional override timings while waiting for repeats.
152  * @repeat:	Maximum repeat interval (always in milliseconds).
153  * @control:	Control flags.
154  *
155  * @scancode:	Pointer to function to convert the IR data into a scancode (it
156  *		must be safe to execute in interrupt context).
157  *		Returns IMG_IR_SCANCODE to emit new scancode.
158  *		Returns IMG_IR_REPEATCODE to repeat previous code.
159  *		Returns -errno (e.g. -EINVAL) on error.
160  * @filter:	Pointer to function to convert scancode filter to raw hardware
161  *		filter. The minlen and maxlen fields will have been initialised
162  *		to the maximum range.
163  */
164 struct img_ir_decoder {
165 	/* core description */
166 	u64				type;
167 	unsigned int			tolerance;
168 	unsigned int			unit;
169 	struct img_ir_timings		timings;
170 	struct img_ir_timings		rtimings;
171 	unsigned int			repeat;
172 	struct img_ir_control		control;
173 
174 	/* scancode logic */
175 	int (*scancode)(int len, u64 raw, u64 enabled_protocols,
176 			struct img_ir_scancode_req *request);
177 	int (*filter)(const struct rc_scancode_filter *in,
178 		      struct img_ir_filter *out, u64 protocols);
179 };
180 
181 extern struct img_ir_decoder img_ir_nec;
182 extern struct img_ir_decoder img_ir_jvc;
183 extern struct img_ir_decoder img_ir_sony;
184 extern struct img_ir_decoder img_ir_sharp;
185 extern struct img_ir_decoder img_ir_sanyo;
186 extern struct img_ir_decoder img_ir_rc5;
187 extern struct img_ir_decoder img_ir_rc6;
188 
189 /**
190  * struct img_ir_reg_timings - Reg values for decoder timings at clock rate.
191  * @ctrl:	Processed control register value.
192  * @timings:	Processed primary timings.
193  * @rtimings:	Processed repeat timings.
194  */
195 struct img_ir_reg_timings {
196 	u32				ctrl;
197 	struct img_ir_timing_regvals	timings;
198 	struct img_ir_timing_regvals	rtimings;
199 };
200 
201 struct img_ir_priv;
202 
203 #ifdef CONFIG_IR_IMG_HW
204 
205 enum img_ir_mode {
206 	IMG_IR_M_NORMAL,
207 	IMG_IR_M_REPEATING,
208 #ifdef CONFIG_PM_SLEEP
209 	IMG_IR_M_WAKE,
210 #endif
211 };
212 
213 /**
214  * struct img_ir_priv_hw - Private driver data for hardware decoder.
215  * @ct_quirks:		Quirk bits for each code type.
216  * @rdev:		Remote control device
217  * @clk_nb:		Notifier block for clock notify events.
218  * @end_timer:		Timer until repeat timeout.
219  * @suspend_timer:	Timer to re-enable protocol.
220  * @decoder:		Current decoder settings.
221  * @enabled_protocols:	Currently enabled protocols.
222  * @clk_hz:		Current core clock rate in Hz.
223  * @reg_timings:	Timing reg values for decoder at clock rate.
224  * @flags:		IMG_IR_F_*.
225  * @filters:		HW filters (derived from scancode filters).
226  * @mode:		Current decode mode.
227  * @stopping:		Indicates that decoder is being taken down and timers
228  *			should not be restarted.
229  * @suspend_irqen:	Saved IRQ enable mask over suspend.
230  * @quirk_suspend_irq:	Saved IRQ enable mask over quirk suspend timer.
231  */
232 struct img_ir_priv_hw {
233 	unsigned int			ct_quirks[4];
234 	struct rc_dev			*rdev;
235 	struct notifier_block		clk_nb;
236 	struct timer_list		end_timer;
237 	struct timer_list		suspend_timer;
238 	const struct img_ir_decoder	*decoder;
239 	u64				enabled_protocols;
240 	unsigned long			clk_hz;
241 	struct img_ir_reg_timings	reg_timings;
242 	unsigned int			flags;
243 	struct img_ir_filter		filters[RC_FILTER_MAX];
244 
245 	enum img_ir_mode		mode;
246 	bool				stopping;
247 	u32				suspend_irqen;
248 	u32				quirk_suspend_irq;
249 };
250 
img_ir_hw_enabled(struct img_ir_priv_hw * hw)251 static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
252 {
253 	return hw->rdev;
254 };
255 
256 void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status);
257 void img_ir_setup_hw(struct img_ir_priv *priv);
258 int img_ir_probe_hw(struct img_ir_priv *priv);
259 void img_ir_remove_hw(struct img_ir_priv *priv);
260 
261 #ifdef CONFIG_PM_SLEEP
262 int img_ir_suspend(struct device *dev);
263 int img_ir_resume(struct device *dev);
264 #else
265 #define img_ir_suspend NULL
266 #define img_ir_resume NULL
267 #endif
268 
269 #else
270 
271 struct img_ir_priv_hw {
272 };
273 
img_ir_hw_enabled(struct img_ir_priv_hw * hw)274 static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
275 {
276 	return false;
277 };
img_ir_isr_hw(struct img_ir_priv * priv,u32 irq_status)278 static inline void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
279 {
280 }
img_ir_setup_hw(struct img_ir_priv * priv)281 static inline void img_ir_setup_hw(struct img_ir_priv *priv)
282 {
283 }
img_ir_probe_hw(struct img_ir_priv * priv)284 static inline int img_ir_probe_hw(struct img_ir_priv *priv)
285 {
286 	return -ENODEV;
287 }
img_ir_remove_hw(struct img_ir_priv * priv)288 static inline void img_ir_remove_hw(struct img_ir_priv *priv)
289 {
290 }
291 
292 #define img_ir_suspend NULL
293 #define img_ir_resume NULL
294 
295 #endif /* CONFIG_IR_IMG_HW */
296 
297 #endif /* _IMG_IR_HW_H_ */
298