1 // SPDX-License-Identifier: GPL-2.0-only
2 /******************************************************************************
3 *
4 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
5 *
6 * Contact Information:
7 * Intel Linux Wireless <ilw@linux.intel.com>
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
9 *****************************************************************************/
10
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/etherdevice.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/types.h>
17 #include <linux/lockdep.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/delay.h>
21 #include <linux/skbuff.h>
22 #include <net/mac80211.h>
23
24 #include "common.h"
25
26 int
_il_poll_bit(struct il_priv * il,u32 addr,u32 bits,u32 mask,int timeout)27 _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
28 {
29 const int interval = 10; /* microseconds */
30 int t = 0;
31
32 do {
33 if ((_il_rd(il, addr) & mask) == (bits & mask))
34 return t;
35 udelay(interval);
36 t += interval;
37 } while (t < timeout);
38
39 return -ETIMEDOUT;
40 }
41 EXPORT_SYMBOL(_il_poll_bit);
42
43 void
il_set_bit(struct il_priv * p,u32 r,u32 m)44 il_set_bit(struct il_priv *p, u32 r, u32 m)
45 {
46 unsigned long reg_flags;
47
48 spin_lock_irqsave(&p->reg_lock, reg_flags);
49 _il_set_bit(p, r, m);
50 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
51 }
52 EXPORT_SYMBOL(il_set_bit);
53
54 void
il_clear_bit(struct il_priv * p,u32 r,u32 m)55 il_clear_bit(struct il_priv *p, u32 r, u32 m)
56 {
57 unsigned long reg_flags;
58
59 spin_lock_irqsave(&p->reg_lock, reg_flags);
60 _il_clear_bit(p, r, m);
61 spin_unlock_irqrestore(&p->reg_lock, reg_flags);
62 }
63 EXPORT_SYMBOL(il_clear_bit);
64
65 bool
_il_grab_nic_access(struct il_priv * il)66 _il_grab_nic_access(struct il_priv *il)
67 {
68 int ret;
69 u32 val;
70
71 /* this bit wakes up the NIC */
72 _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
73
74 /*
75 * These bits say the device is running, and should keep running for
76 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
77 * but they do not indicate that embedded SRAM is restored yet;
78 * 3945 and 4965 have volatile SRAM, and must save/restore contents
79 * to/from host DRAM when sleeping/waking for power-saving.
80 * Each direction takes approximately 1/4 millisecond; with this
81 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
82 * series of register accesses are expected (e.g. reading Event Log),
83 * to keep device from sleeping.
84 *
85 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
86 * SRAM is okay/restored. We don't check that here because this call
87 * is just for hardware register access; but GP1 MAC_SLEEP check is a
88 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
89 *
90 */
91 ret =
92 _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
93 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
94 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
95 if (unlikely(ret < 0)) {
96 val = _il_rd(il, CSR_GP_CNTRL);
97 WARN_ONCE(1, "Timeout waiting for ucode processor access "
98 "(CSR_GP_CNTRL 0x%08x)\n", val);
99 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
100 return false;
101 }
102
103 return true;
104 }
105 EXPORT_SYMBOL_GPL(_il_grab_nic_access);
106
107 int
il_poll_bit(struct il_priv * il,u32 addr,u32 mask,int timeout)108 il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
109 {
110 const int interval = 10; /* microseconds */
111 int t = 0;
112
113 do {
114 if ((il_rd(il, addr) & mask) == mask)
115 return t;
116 udelay(interval);
117 t += interval;
118 } while (t < timeout);
119
120 return -ETIMEDOUT;
121 }
122 EXPORT_SYMBOL(il_poll_bit);
123
124 u32
il_rd_prph(struct il_priv * il,u32 reg)125 il_rd_prph(struct il_priv *il, u32 reg)
126 {
127 unsigned long reg_flags;
128 u32 val;
129
130 spin_lock_irqsave(&il->reg_lock, reg_flags);
131 _il_grab_nic_access(il);
132 val = _il_rd_prph(il, reg);
133 _il_release_nic_access(il);
134 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
135 return val;
136 }
137 EXPORT_SYMBOL(il_rd_prph);
138
139 void
il_wr_prph(struct il_priv * il,u32 addr,u32 val)140 il_wr_prph(struct il_priv *il, u32 addr, u32 val)
141 {
142 unsigned long reg_flags;
143
144 spin_lock_irqsave(&il->reg_lock, reg_flags);
145 if (likely(_il_grab_nic_access(il))) {
146 _il_wr_prph(il, addr, val);
147 _il_release_nic_access(il);
148 }
149 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
150 }
151 EXPORT_SYMBOL(il_wr_prph);
152
153 u32
il_read_targ_mem(struct il_priv * il,u32 addr)154 il_read_targ_mem(struct il_priv *il, u32 addr)
155 {
156 unsigned long reg_flags;
157 u32 value;
158
159 spin_lock_irqsave(&il->reg_lock, reg_flags);
160 _il_grab_nic_access(il);
161
162 _il_wr(il, HBUS_TARG_MEM_RADDR, addr);
163 value = _il_rd(il, HBUS_TARG_MEM_RDAT);
164
165 _il_release_nic_access(il);
166 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
167 return value;
168 }
169 EXPORT_SYMBOL(il_read_targ_mem);
170
171 void
il_write_targ_mem(struct il_priv * il,u32 addr,u32 val)172 il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
173 {
174 unsigned long reg_flags;
175
176 spin_lock_irqsave(&il->reg_lock, reg_flags);
177 if (likely(_il_grab_nic_access(il))) {
178 _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
179 _il_wr(il, HBUS_TARG_MEM_WDAT, val);
180 _il_release_nic_access(il);
181 }
182 spin_unlock_irqrestore(&il->reg_lock, reg_flags);
183 }
184 EXPORT_SYMBOL(il_write_targ_mem);
185
186 const char *
il_get_cmd_string(u8 cmd)187 il_get_cmd_string(u8 cmd)
188 {
189 switch (cmd) {
190 IL_CMD(N_ALIVE);
191 IL_CMD(N_ERROR);
192 IL_CMD(C_RXON);
193 IL_CMD(C_RXON_ASSOC);
194 IL_CMD(C_QOS_PARAM);
195 IL_CMD(C_RXON_TIMING);
196 IL_CMD(C_ADD_STA);
197 IL_CMD(C_REM_STA);
198 IL_CMD(C_WEPKEY);
199 IL_CMD(N_3945_RX);
200 IL_CMD(C_TX);
201 IL_CMD(C_RATE_SCALE);
202 IL_CMD(C_LEDS);
203 IL_CMD(C_TX_LINK_QUALITY_CMD);
204 IL_CMD(C_CHANNEL_SWITCH);
205 IL_CMD(N_CHANNEL_SWITCH);
206 IL_CMD(C_SPECTRUM_MEASUREMENT);
207 IL_CMD(N_SPECTRUM_MEASUREMENT);
208 IL_CMD(C_POWER_TBL);
209 IL_CMD(N_PM_SLEEP);
210 IL_CMD(N_PM_DEBUG_STATS);
211 IL_CMD(C_SCAN);
212 IL_CMD(C_SCAN_ABORT);
213 IL_CMD(N_SCAN_START);
214 IL_CMD(N_SCAN_RESULTS);
215 IL_CMD(N_SCAN_COMPLETE);
216 IL_CMD(N_BEACON);
217 IL_CMD(C_TX_BEACON);
218 IL_CMD(C_TX_PWR_TBL);
219 IL_CMD(C_BT_CONFIG);
220 IL_CMD(C_STATS);
221 IL_CMD(N_STATS);
222 IL_CMD(N_CARD_STATE);
223 IL_CMD(N_MISSED_BEACONS);
224 IL_CMD(C_CT_KILL_CONFIG);
225 IL_CMD(C_SENSITIVITY);
226 IL_CMD(C_PHY_CALIBRATION);
227 IL_CMD(N_RX_PHY);
228 IL_CMD(N_RX_MPDU);
229 IL_CMD(N_RX);
230 IL_CMD(N_COMPRESSED_BA);
231 default:
232 return "UNKNOWN";
233
234 }
235 }
236 EXPORT_SYMBOL(il_get_cmd_string);
237
238 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
239
240 static void
il_generic_cmd_callback(struct il_priv * il,struct il_device_cmd * cmd,struct il_rx_pkt * pkt)241 il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd,
242 struct il_rx_pkt *pkt)
243 {
244 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
245 IL_ERR("Bad return from %s (0x%08X)\n",
246 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
247 return;
248 }
249 #ifdef CONFIG_IWLEGACY_DEBUG
250 switch (cmd->hdr.cmd) {
251 case C_TX_LINK_QUALITY_CMD:
252 case C_SENSITIVITY:
253 D_HC_DUMP("back from %s (0x%08X)\n",
254 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
255 break;
256 default:
257 D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd),
258 pkt->hdr.flags);
259 }
260 #endif
261 }
262
263 static int
il_send_cmd_async(struct il_priv * il,struct il_host_cmd * cmd)264 il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
265 {
266 int ret;
267
268 BUG_ON(!(cmd->flags & CMD_ASYNC));
269
270 /* An asynchronous command can not expect an SKB to be set. */
271 BUG_ON(cmd->flags & CMD_WANT_SKB);
272
273 /* Assign a generic callback if one is not provided */
274 if (!cmd->callback)
275 cmd->callback = il_generic_cmd_callback;
276
277 if (test_bit(S_EXIT_PENDING, &il->status))
278 return -EBUSY;
279
280 ret = il_enqueue_hcmd(il, cmd);
281 if (ret < 0) {
282 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
283 il_get_cmd_string(cmd->id), ret);
284 return ret;
285 }
286 return 0;
287 }
288
289 int
il_send_cmd_sync(struct il_priv * il,struct il_host_cmd * cmd)290 il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
291 {
292 int cmd_idx;
293 int ret;
294
295 lockdep_assert_held(&il->mutex);
296
297 BUG_ON(cmd->flags & CMD_ASYNC);
298
299 /* A synchronous command can not have a callback set. */
300 BUG_ON(cmd->callback);
301
302 D_INFO("Attempting to send sync command %s\n",
303 il_get_cmd_string(cmd->id));
304
305 set_bit(S_HCMD_ACTIVE, &il->status);
306 D_INFO("Setting HCMD_ACTIVE for command %s\n",
307 il_get_cmd_string(cmd->id));
308
309 cmd_idx = il_enqueue_hcmd(il, cmd);
310 if (cmd_idx < 0) {
311 ret = cmd_idx;
312 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
313 il_get_cmd_string(cmd->id), ret);
314 goto out;
315 }
316
317 ret = wait_event_timeout(il->wait_command_queue,
318 !test_bit(S_HCMD_ACTIVE, &il->status),
319 HOST_COMPLETE_TIMEOUT);
320 if (!ret) {
321 if (test_bit(S_HCMD_ACTIVE, &il->status)) {
322 IL_ERR("Error sending %s: time out after %dms.\n",
323 il_get_cmd_string(cmd->id),
324 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
325
326 clear_bit(S_HCMD_ACTIVE, &il->status);
327 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
328 il_get_cmd_string(cmd->id));
329 ret = -ETIMEDOUT;
330 goto cancel;
331 }
332 }
333
334 if (test_bit(S_RFKILL, &il->status)) {
335 IL_ERR("Command %s aborted: RF KILL Switch\n",
336 il_get_cmd_string(cmd->id));
337 ret = -ECANCELED;
338 goto fail;
339 }
340 if (test_bit(S_FW_ERROR, &il->status)) {
341 IL_ERR("Command %s failed: FW Error\n",
342 il_get_cmd_string(cmd->id));
343 ret = -EIO;
344 goto fail;
345 }
346 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
347 IL_ERR("Error: Response NULL in '%s'\n",
348 il_get_cmd_string(cmd->id));
349 ret = -EIO;
350 goto cancel;
351 }
352
353 ret = 0;
354 goto out;
355
356 cancel:
357 if (cmd->flags & CMD_WANT_SKB) {
358 /*
359 * Cancel the CMD_WANT_SKB flag for the cmd in the
360 * TX cmd queue. Otherwise in case the cmd comes
361 * in later, it will possibly set an invalid
362 * address (cmd->meta.source).
363 */
364 il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB;
365 }
366 fail:
367 if (cmd->reply_page) {
368 il_free_pages(il, cmd->reply_page);
369 cmd->reply_page = 0;
370 }
371 out:
372 return ret;
373 }
374 EXPORT_SYMBOL(il_send_cmd_sync);
375
376 int
il_send_cmd(struct il_priv * il,struct il_host_cmd * cmd)377 il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
378 {
379 if (cmd->flags & CMD_ASYNC)
380 return il_send_cmd_async(il, cmd);
381
382 return il_send_cmd_sync(il, cmd);
383 }
384 EXPORT_SYMBOL(il_send_cmd);
385
386 int
il_send_cmd_pdu(struct il_priv * il,u8 id,u16 len,const void * data)387 il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
388 {
389 struct il_host_cmd cmd = {
390 .id = id,
391 .len = len,
392 .data = data,
393 };
394
395 return il_send_cmd_sync(il, &cmd);
396 }
397 EXPORT_SYMBOL(il_send_cmd_pdu);
398
399 int
il_send_cmd_pdu_async(struct il_priv * il,u8 id,u16 len,const void * data,void (* callback)(struct il_priv * il,struct il_device_cmd * cmd,struct il_rx_pkt * pkt))400 il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
401 void (*callback) (struct il_priv *il,
402 struct il_device_cmd *cmd,
403 struct il_rx_pkt *pkt))
404 {
405 struct il_host_cmd cmd = {
406 .id = id,
407 .len = len,
408 .data = data,
409 };
410
411 cmd.flags |= CMD_ASYNC;
412 cmd.callback = callback;
413
414 return il_send_cmd_async(il, &cmd);
415 }
416 EXPORT_SYMBOL(il_send_cmd_pdu_async);
417
418 /* default: IL_LED_BLINK(0) using blinking idx table */
419 static int led_mode;
420 module_param(led_mode, int, 0444);
421 MODULE_PARM_DESC(led_mode,
422 "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking");
423
424 /* Throughput OFF time(ms) ON time (ms)
425 * >300 25 25
426 * >200 to 300 40 40
427 * >100 to 200 55 55
428 * >70 to 100 65 65
429 * >50 to 70 75 75
430 * >20 to 50 85 85
431 * >10 to 20 95 95
432 * >5 to 10 110 110
433 * >1 to 5 130 130
434 * >0 to 1 167 167
435 * <=0 SOLID ON
436 */
437 static const struct ieee80211_tpt_blink il_blink[] = {
438 {.throughput = 0, .blink_time = 334},
439 {.throughput = 1 * 1024 - 1, .blink_time = 260},
440 {.throughput = 5 * 1024 - 1, .blink_time = 220},
441 {.throughput = 10 * 1024 - 1, .blink_time = 190},
442 {.throughput = 20 * 1024 - 1, .blink_time = 170},
443 {.throughput = 50 * 1024 - 1, .blink_time = 150},
444 {.throughput = 70 * 1024 - 1, .blink_time = 130},
445 {.throughput = 100 * 1024 - 1, .blink_time = 110},
446 {.throughput = 200 * 1024 - 1, .blink_time = 80},
447 {.throughput = 300 * 1024 - 1, .blink_time = 50},
448 };
449
450 /*
451 * Adjust led blink rate to compensate on a MAC Clock difference on every HW
452 * Led blink rate analysis showed an average deviation of 0% on 3945,
453 * 5% on 4965 HW.
454 * Need to compensate on the led on/off time per HW according to the deviation
455 * to achieve the desired led frequency
456 * The calculation is: (100-averageDeviation)/100 * blinkTime
457 * For code efficiency the calculation will be:
458 * compensation = (100 - averageDeviation) * 64 / 100
459 * NewBlinkTime = (compensation * BlinkTime) / 64
460 */
461 static inline u8
il_blink_compensation(struct il_priv * il,u8 time,u16 compensation)462 il_blink_compensation(struct il_priv *il, u8 time, u16 compensation)
463 {
464 if (!compensation) {
465 IL_ERR("undefined blink compensation: "
466 "use pre-defined blinking time\n");
467 return time;
468 }
469
470 return (u8) ((time * compensation) >> 6);
471 }
472
473 /* Set led pattern command */
474 static int
il_led_cmd(struct il_priv * il,unsigned long on,unsigned long off)475 il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off)
476 {
477 struct il_led_cmd led_cmd = {
478 .id = IL_LED_LINK,
479 .interval = IL_DEF_LED_INTRVL
480 };
481 int ret;
482
483 if (!test_bit(S_READY, &il->status))
484 return -EBUSY;
485
486 if (il->blink_on == on && il->blink_off == off)
487 return 0;
488
489 if (off == 0) {
490 /* led is SOLID_ON */
491 on = IL_LED_SOLID;
492 }
493
494 D_LED("Led blink time compensation=%u\n",
495 il->cfg->led_compensation);
496 led_cmd.on =
497 il_blink_compensation(il, on,
498 il->cfg->led_compensation);
499 led_cmd.off =
500 il_blink_compensation(il, off,
501 il->cfg->led_compensation);
502
503 ret = il->ops->send_led_cmd(il, &led_cmd);
504 if (!ret) {
505 il->blink_on = on;
506 il->blink_off = off;
507 }
508 return ret;
509 }
510
511 static void
il_led_brightness_set(struct led_classdev * led_cdev,enum led_brightness brightness)512 il_led_brightness_set(struct led_classdev *led_cdev,
513 enum led_brightness brightness)
514 {
515 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
516 unsigned long on = 0;
517
518 if (brightness > 0)
519 on = IL_LED_SOLID;
520
521 il_led_cmd(il, on, 0);
522 }
523
524 static int
il_led_blink_set(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)525 il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
526 unsigned long *delay_off)
527 {
528 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
529
530 return il_led_cmd(il, *delay_on, *delay_off);
531 }
532
533 void
il_leds_init(struct il_priv * il)534 il_leds_init(struct il_priv *il)
535 {
536 int mode = led_mode;
537 int ret;
538
539 if (mode == IL_LED_DEFAULT)
540 mode = il->cfg->led_mode;
541
542 il->led.name =
543 kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy));
544 if (!il->led.name)
545 return;
546
547 il->led.brightness_set = il_led_brightness_set;
548 il->led.blink_set = il_led_blink_set;
549 il->led.max_brightness = 1;
550
551 switch (mode) {
552 case IL_LED_DEFAULT:
553 WARN_ON(1);
554 break;
555 case IL_LED_BLINK:
556 il->led.default_trigger =
557 ieee80211_create_tpt_led_trigger(il->hw,
558 IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
559 il_blink,
560 ARRAY_SIZE(il_blink));
561 break;
562 case IL_LED_RF_STATE:
563 il->led.default_trigger = ieee80211_get_radio_led_name(il->hw);
564 break;
565 }
566
567 ret = led_classdev_register(&il->pci_dev->dev, &il->led);
568 if (ret) {
569 kfree(il->led.name);
570 return;
571 }
572
573 il->led_registered = true;
574 }
575 EXPORT_SYMBOL(il_leds_init);
576
577 void
il_leds_exit(struct il_priv * il)578 il_leds_exit(struct il_priv *il)
579 {
580 if (!il->led_registered)
581 return;
582
583 led_classdev_unregister(&il->led);
584 kfree(il->led.name);
585 }
586 EXPORT_SYMBOL(il_leds_exit);
587
588 /************************** EEPROM BANDS ****************************
589 *
590 * The il_eeprom_band definitions below provide the mapping from the
591 * EEPROM contents to the specific channel number supported for each
592 * band.
593 *
594 * For example, il_priv->eeprom.band_3_channels[4] from the band_3
595 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
596 * The specific geography and calibration information for that channel
597 * is contained in the eeprom map itself.
598 *
599 * During init, we copy the eeprom information and channel map
600 * information into il->channel_info_24/52 and il->channel_map_24/52
601 *
602 * channel_map_24/52 provides the idx in the channel_info array for a
603 * given channel. We have to have two separate maps as there is channel
604 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
605 * band_2
606 *
607 * A value of 0xff stored in the channel_map indicates that the channel
608 * is not supported by the hardware at all.
609 *
610 * A value of 0xfe in the channel_map indicates that the channel is not
611 * valid for Tx with the current hardware. This means that
612 * while the system can tune and receive on a given channel, it may not
613 * be able to associate or transmit any frames on that
614 * channel. There is no corresponding channel information for that
615 * entry.
616 *
617 *********************************************************************/
618
619 /* 2.4 GHz */
620 const u8 il_eeprom_band_1[14] = {
621 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
622 };
623
624 /* 5.2 GHz bands */
625 static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
626 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
627 };
628
629 static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
630 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
631 };
632
633 static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
634 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
635 };
636
637 static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
638 145, 149, 153, 157, 161, 165
639 };
640
641 static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
642 1, 2, 3, 4, 5, 6, 7
643 };
644
645 static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
646 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
647 };
648
649 /******************************************************************************
650 *
651 * EEPROM related functions
652 *
653 ******************************************************************************/
654
655 static int
il_eeprom_verify_signature(struct il_priv * il)656 il_eeprom_verify_signature(struct il_priv *il)
657 {
658 u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
659 int ret = 0;
660
661 D_EEPROM("EEPROM signature=0x%08x\n", gp);
662 switch (gp) {
663 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
664 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
665 break;
666 default:
667 IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp);
668 ret = -ENOENT;
669 break;
670 }
671 return ret;
672 }
673
674 const u8 *
il_eeprom_query_addr(const struct il_priv * il,size_t offset)675 il_eeprom_query_addr(const struct il_priv *il, size_t offset)
676 {
677 BUG_ON(offset >= il->cfg->eeprom_size);
678 return &il->eeprom[offset];
679 }
680 EXPORT_SYMBOL(il_eeprom_query_addr);
681
682 u16
il_eeprom_query16(const struct il_priv * il,size_t offset)683 il_eeprom_query16(const struct il_priv *il, size_t offset)
684 {
685 if (!il->eeprom)
686 return 0;
687 return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8);
688 }
689 EXPORT_SYMBOL(il_eeprom_query16);
690
691 /*
692 * il_eeprom_init - read EEPROM contents
693 *
694 * Load the EEPROM contents from adapter into il->eeprom
695 *
696 * NOTE: This routine uses the non-debug IO access functions.
697 */
698 int
il_eeprom_init(struct il_priv * il)699 il_eeprom_init(struct il_priv *il)
700 {
701 __le16 *e;
702 u32 gp = _il_rd(il, CSR_EEPROM_GP);
703 int sz;
704 int ret;
705 int addr;
706
707 /* allocate eeprom */
708 sz = il->cfg->eeprom_size;
709 D_EEPROM("NVM size = %d\n", sz);
710 il->eeprom = kzalloc(sz, GFP_KERNEL);
711 if (!il->eeprom)
712 return -ENOMEM;
713
714 e = (__le16 *) il->eeprom;
715
716 il->ops->apm_init(il);
717
718 ret = il_eeprom_verify_signature(il);
719 if (ret < 0) {
720 IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
721 ret = -ENOENT;
722 goto err;
723 }
724
725 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
726 ret = il->ops->eeprom_acquire_semaphore(il);
727 if (ret < 0) {
728 IL_ERR("Failed to acquire EEPROM semaphore.\n");
729 ret = -ENOENT;
730 goto err;
731 }
732
733 /* eeprom is an array of 16bit values */
734 for (addr = 0; addr < sz; addr += sizeof(u16)) {
735 u32 r;
736
737 _il_wr(il, CSR_EEPROM_REG,
738 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
739
740 ret =
741 _il_poll_bit(il, CSR_EEPROM_REG,
742 CSR_EEPROM_REG_READ_VALID_MSK,
743 CSR_EEPROM_REG_READ_VALID_MSK,
744 IL_EEPROM_ACCESS_TIMEOUT);
745 if (ret < 0) {
746 IL_ERR("Time out reading EEPROM[%d]\n", addr);
747 goto done;
748 }
749 r = _il_rd(il, CSR_EEPROM_REG);
750 e[addr / 2] = cpu_to_le16(r >> 16);
751 }
752
753 D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM",
754 il_eeprom_query16(il, EEPROM_VERSION));
755
756 ret = 0;
757 done:
758 il->ops->eeprom_release_semaphore(il);
759
760 err:
761 if (ret)
762 il_eeprom_free(il);
763 /* Reset chip to save power until we load uCode during "up". */
764 il_apm_stop(il);
765 return ret;
766 }
767 EXPORT_SYMBOL(il_eeprom_init);
768
769 void
il_eeprom_free(struct il_priv * il)770 il_eeprom_free(struct il_priv *il)
771 {
772 kfree(il->eeprom);
773 il->eeprom = NULL;
774 }
775 EXPORT_SYMBOL(il_eeprom_free);
776
777 static void
il_init_band_reference(const struct il_priv * il,int eep_band,int * eeprom_ch_count,const struct il_eeprom_channel ** eeprom_ch_info,const u8 ** eeprom_ch_idx)778 il_init_band_reference(const struct il_priv *il, int eep_band,
779 int *eeprom_ch_count,
780 const struct il_eeprom_channel **eeprom_ch_info,
781 const u8 **eeprom_ch_idx)
782 {
783 u32 offset = il->cfg->regulatory_bands[eep_band - 1];
784
785 switch (eep_band) {
786 case 1: /* 2.4GHz band */
787 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
788 *eeprom_ch_info =
789 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
790 offset);
791 *eeprom_ch_idx = il_eeprom_band_1;
792 break;
793 case 2: /* 4.9GHz band */
794 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
795 *eeprom_ch_info =
796 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
797 offset);
798 *eeprom_ch_idx = il_eeprom_band_2;
799 break;
800 case 3: /* 5.2GHz band */
801 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
802 *eeprom_ch_info =
803 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
804 offset);
805 *eeprom_ch_idx = il_eeprom_band_3;
806 break;
807 case 4: /* 5.5GHz band */
808 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
809 *eeprom_ch_info =
810 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
811 offset);
812 *eeprom_ch_idx = il_eeprom_band_4;
813 break;
814 case 5: /* 5.7GHz band */
815 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
816 *eeprom_ch_info =
817 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
818 offset);
819 *eeprom_ch_idx = il_eeprom_band_5;
820 break;
821 case 6: /* 2.4GHz ht40 channels */
822 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
823 *eeprom_ch_info =
824 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
825 offset);
826 *eeprom_ch_idx = il_eeprom_band_6;
827 break;
828 case 7: /* 5 GHz ht40 channels */
829 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
830 *eeprom_ch_info =
831 (struct il_eeprom_channel *)il_eeprom_query_addr(il,
832 offset);
833 *eeprom_ch_idx = il_eeprom_band_7;
834 break;
835 default:
836 BUG();
837 }
838 }
839
840 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
841 ? # x " " : "")
842 /*
843 * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
844 *
845 * Does not set up a command, or touch hardware.
846 */
847 static int
il_mod_ht40_chan_info(struct il_priv * il,enum nl80211_band band,u16 channel,const struct il_eeprom_channel * eeprom_ch,u8 clear_ht40_extension_channel)848 il_mod_ht40_chan_info(struct il_priv *il, enum nl80211_band band, u16 channel,
849 const struct il_eeprom_channel *eeprom_ch,
850 u8 clear_ht40_extension_channel)
851 {
852 struct il_channel_info *ch_info;
853
854 ch_info =
855 (struct il_channel_info *)il_get_channel_info(il, band, channel);
856
857 if (!il_is_channel_valid(ch_info))
858 return -1;
859
860 D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
861 " Ad-Hoc %ssupported\n", ch_info->channel,
862 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
863 CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE),
864 CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE),
865 CHECK_AND_PRINT(DFS), eeprom_ch->flags,
866 eeprom_ch->max_power_avg,
867 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
868 !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not ");
869
870 ch_info->ht40_eeprom = *eeprom_ch;
871 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
872 ch_info->ht40_flags = eeprom_ch->flags;
873 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
874 ch_info->ht40_extension_channel &=
875 ~clear_ht40_extension_channel;
876
877 return 0;
878 }
879
880 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
881 ? # x " " : "")
882
883 /*
884 * il_init_channel_map - Set up driver's info for all possible channels
885 */
886 int
il_init_channel_map(struct il_priv * il)887 il_init_channel_map(struct il_priv *il)
888 {
889 int eeprom_ch_count = 0;
890 const u8 *eeprom_ch_idx = NULL;
891 const struct il_eeprom_channel *eeprom_ch_info = NULL;
892 int band, ch;
893 struct il_channel_info *ch_info;
894
895 if (il->channel_count) {
896 D_EEPROM("Channel map already initialized.\n");
897 return 0;
898 }
899
900 D_EEPROM("Initializing regulatory info from EEPROM\n");
901
902 il->channel_count =
903 ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) +
904 ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) +
905 ARRAY_SIZE(il_eeprom_band_5);
906
907 D_EEPROM("Parsing data for %d channels.\n", il->channel_count);
908
909 il->channel_info =
910 kzalloc_objs(struct il_channel_info, il->channel_count);
911 if (!il->channel_info) {
912 IL_ERR("Could not allocate channel_info\n");
913 il->channel_count = 0;
914 return -ENOMEM;
915 }
916
917 ch_info = il->channel_info;
918
919 /* Loop through the 5 EEPROM bands adding them in order to the
920 * channel map we maintain (that contains additional information than
921 * what just in the EEPROM) */
922 for (band = 1; band <= 5; band++) {
923
924 il_init_band_reference(il, band, &eeprom_ch_count,
925 &eeprom_ch_info, &eeprom_ch_idx);
926
927 /* Loop through each band adding each of the channels */
928 for (ch = 0; ch < eeprom_ch_count; ch++) {
929 ch_info->channel = eeprom_ch_idx[ch];
930 ch_info->band =
931 (band ==
932 1) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
933
934 /* permanently store EEPROM's channel regulatory flags
935 * and max power in channel info database. */
936 ch_info->eeprom = eeprom_ch_info[ch];
937
938 /* Copy the run-time flags so they are there even on
939 * invalid channels */
940 ch_info->flags = eeprom_ch_info[ch].flags;
941 /* First write that ht40 is not enabled, and then enable
942 * one by one */
943 ch_info->ht40_extension_channel =
944 IEEE80211_CHAN_NO_HT40;
945
946 if (!(il_is_channel_valid(ch_info))) {
947 D_EEPROM("Ch. %d Flags %x [%sGHz] - "
948 "No traffic\n", ch_info->channel,
949 ch_info->flags,
950 il_is_channel_a_band(ch_info) ? "5.2" :
951 "2.4");
952 ch_info++;
953 continue;
954 }
955
956 /* Initialize regulatory-based run-time data */
957 ch_info->max_power_avg = ch_info->curr_txpow =
958 eeprom_ch_info[ch].max_power_avg;
959 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
960 ch_info->min_power = 0;
961
962 D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):"
963 " Ad-Hoc %ssupported\n", ch_info->channel,
964 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
965 CHECK_AND_PRINT_I(VALID),
966 CHECK_AND_PRINT_I(IBSS),
967 CHECK_AND_PRINT_I(ACTIVE),
968 CHECK_AND_PRINT_I(RADAR),
969 CHECK_AND_PRINT_I(WIDE),
970 CHECK_AND_PRINT_I(DFS),
971 eeprom_ch_info[ch].flags,
972 eeprom_ch_info[ch].max_power_avg,
973 ((eeprom_ch_info[ch].
974 flags & EEPROM_CHANNEL_IBSS) &&
975 !(eeprom_ch_info[ch].
976 flags & EEPROM_CHANNEL_RADAR)) ? "" :
977 "not ");
978
979 ch_info++;
980 }
981 }
982
983 /* Check if we do have HT40 channels */
984 if (il->cfg->regulatory_bands[5] == EEPROM_REGULATORY_BAND_NO_HT40 &&
985 il->cfg->regulatory_bands[6] == EEPROM_REGULATORY_BAND_NO_HT40)
986 return 0;
987
988 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
989 for (band = 6; band <= 7; band++) {
990 enum nl80211_band ieeeband;
991
992 il_init_band_reference(il, band, &eeprom_ch_count,
993 &eeprom_ch_info, &eeprom_ch_idx);
994
995 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
996 ieeeband =
997 (band == 6) ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ;
998
999 /* Loop through each band adding each of the channels */
1000 for (ch = 0; ch < eeprom_ch_count; ch++) {
1001 /* Set up driver's info for lower half */
1002 il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch],
1003 &eeprom_ch_info[ch],
1004 IEEE80211_CHAN_NO_HT40PLUS);
1005
1006 /* Set up driver's info for upper half */
1007 il_mod_ht40_chan_info(il, ieeeband,
1008 eeprom_ch_idx[ch] + 4,
1009 &eeprom_ch_info[ch],
1010 IEEE80211_CHAN_NO_HT40MINUS);
1011 }
1012 }
1013
1014 return 0;
1015 }
1016 EXPORT_SYMBOL(il_init_channel_map);
1017
1018 /*
1019 * il_free_channel_map - undo allocations in il_init_channel_map
1020 */
1021 void
il_free_channel_map(struct il_priv * il)1022 il_free_channel_map(struct il_priv *il)
1023 {
1024 kfree(il->channel_info);
1025 il->channel_count = 0;
1026 }
1027 EXPORT_SYMBOL(il_free_channel_map);
1028
1029 /*
1030 * il_get_channel_info - Find driver's ilate channel info
1031 *
1032 * Based on band and channel number.
1033 */
1034 const struct il_channel_info *
il_get_channel_info(const struct il_priv * il,enum nl80211_band band,u16 channel)1035 il_get_channel_info(const struct il_priv *il, enum nl80211_band band,
1036 u16 channel)
1037 {
1038 int i;
1039
1040 switch (band) {
1041 case NL80211_BAND_5GHZ:
1042 for (i = 14; i < il->channel_count; i++) {
1043 if (il->channel_info[i].channel == channel)
1044 return &il->channel_info[i];
1045 }
1046 break;
1047 case NL80211_BAND_2GHZ:
1048 if (channel >= 1 && channel <= 14)
1049 return &il->channel_info[channel - 1];
1050 break;
1051 default:
1052 BUG();
1053 }
1054
1055 return NULL;
1056 }
1057 EXPORT_SYMBOL(il_get_channel_info);
1058
1059 /*
1060 * Setting power level allows the card to go to sleep when not busy.
1061 *
1062 * We calculate a sleep command based on the required latency, which
1063 * we get from mac80211.
1064 */
1065
1066 #define SLP_VEC(X0, X1, X2, X3, X4) { \
1067 cpu_to_le32(X0), \
1068 cpu_to_le32(X1), \
1069 cpu_to_le32(X2), \
1070 cpu_to_le32(X3), \
1071 cpu_to_le32(X4) \
1072 }
1073
1074 static void
il_build_powertable_cmd(struct il_priv * il,struct il_powertable_cmd * cmd)1075 il_build_powertable_cmd(struct il_priv *il, struct il_powertable_cmd *cmd)
1076 {
1077 static const __le32 interval[3][IL_POWER_VEC_SIZE] = {
1078 SLP_VEC(2, 2, 4, 6, 0xFF),
1079 SLP_VEC(2, 4, 7, 10, 10),
1080 SLP_VEC(4, 7, 10, 10, 0xFF)
1081 };
1082 int i, dtim_period, no_dtim;
1083 u32 max_sleep;
1084 bool skip;
1085
1086 memset(cmd, 0, sizeof(*cmd));
1087
1088 if (il->power_data.pci_pm)
1089 cmd->flags |= IL_POWER_PCI_PM_MSK;
1090
1091 /* if no Power Save, we are done */
1092 if (il->power_data.ps_disabled)
1093 return;
1094
1095 cmd->flags = IL_POWER_DRIVER_ALLOW_SLEEP_MSK;
1096 cmd->keep_alive_seconds = 0;
1097 cmd->debug_flags = 0;
1098 cmd->rx_data_timeout = cpu_to_le32(25 * 1024);
1099 cmd->tx_data_timeout = cpu_to_le32(25 * 1024);
1100 cmd->keep_alive_beacons = 0;
1101
1102 dtim_period = il->vif ? il->vif->bss_conf.dtim_period : 0;
1103
1104 if (dtim_period <= 2) {
1105 memcpy(cmd->sleep_interval, interval[0], sizeof(interval[0]));
1106 no_dtim = 2;
1107 } else if (dtim_period <= 10) {
1108 memcpy(cmd->sleep_interval, interval[1], sizeof(interval[1]));
1109 no_dtim = 2;
1110 } else {
1111 memcpy(cmd->sleep_interval, interval[2], sizeof(interval[2]));
1112 no_dtim = 0;
1113 }
1114
1115 if (dtim_period == 0) {
1116 dtim_period = 1;
1117 skip = false;
1118 } else {
1119 skip = !!no_dtim;
1120 }
1121
1122 if (skip) {
1123 __le32 tmp = cmd->sleep_interval[IL_POWER_VEC_SIZE - 1];
1124
1125 max_sleep = le32_to_cpu(tmp);
1126 if (max_sleep == 0xFF)
1127 max_sleep = dtim_period * (skip + 1);
1128 else if (max_sleep > dtim_period)
1129 max_sleep = (max_sleep / dtim_period) * dtim_period;
1130 cmd->flags |= IL_POWER_SLEEP_OVER_DTIM_MSK;
1131 } else {
1132 max_sleep = dtim_period;
1133 cmd->flags &= ~IL_POWER_SLEEP_OVER_DTIM_MSK;
1134 }
1135
1136 for (i = 0; i < IL_POWER_VEC_SIZE; i++)
1137 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1138 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1139 }
1140
1141 static int
il_set_power(struct il_priv * il,struct il_powertable_cmd * cmd)1142 il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
1143 {
1144 D_POWER("Sending power/sleep command\n");
1145 D_POWER("Flags value = 0x%08X\n", cmd->flags);
1146 D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1147 D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1148 D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1149 le32_to_cpu(cmd->sleep_interval[0]),
1150 le32_to_cpu(cmd->sleep_interval[1]),
1151 le32_to_cpu(cmd->sleep_interval[2]),
1152 le32_to_cpu(cmd->sleep_interval[3]),
1153 le32_to_cpu(cmd->sleep_interval[4]));
1154
1155 return il_send_cmd_pdu(il, C_POWER_TBL,
1156 sizeof(struct il_powertable_cmd), cmd);
1157 }
1158
1159 static int
il_power_set_mode(struct il_priv * il,struct il_powertable_cmd * cmd,bool force)1160 il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force)
1161 {
1162 int ret;
1163 bool update_chains;
1164
1165 lockdep_assert_held(&il->mutex);
1166
1167 /* Don't update the RX chain when chain noise calibration is running */
1168 update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
1169 il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
1170
1171 if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
1172 return 0;
1173
1174 if (!il_is_ready_rf(il))
1175 return -EIO;
1176
1177 /* scan complete use sleep_power_next, need to be updated */
1178 memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
1179 if (test_bit(S_SCANNING, &il->status) && !force) {
1180 D_INFO("Defer power set mode while scanning\n");
1181 return 0;
1182 }
1183
1184 if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
1185 set_bit(S_POWER_PMI, &il->status);
1186
1187 ret = il_set_power(il, cmd);
1188 if (!ret) {
1189 if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
1190 clear_bit(S_POWER_PMI, &il->status);
1191
1192 if (il->ops->update_chain_flags && update_chains)
1193 il->ops->update_chain_flags(il);
1194 else if (il->ops->update_chain_flags)
1195 D_POWER("Cannot update the power, chain noise "
1196 "calibration running: %d\n",
1197 il->chain_noise_data.state);
1198
1199 memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
1200 } else
1201 IL_ERR("set power fail, ret = %d", ret);
1202
1203 return ret;
1204 }
1205
1206 int
il_power_update_mode(struct il_priv * il,bool force)1207 il_power_update_mode(struct il_priv *il, bool force)
1208 {
1209 struct il_powertable_cmd cmd;
1210
1211 il_build_powertable_cmd(il, &cmd);
1212
1213 return il_power_set_mode(il, &cmd, force);
1214 }
1215 EXPORT_SYMBOL(il_power_update_mode);
1216
1217 /* initialize to default */
1218 void
il_power_initialize(struct il_priv * il)1219 il_power_initialize(struct il_priv *il)
1220 {
1221 u16 lctl;
1222
1223 pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
1224 il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
1225
1226 il->power_data.debug_sleep_level_override = -1;
1227
1228 memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd));
1229 }
1230 EXPORT_SYMBOL(il_power_initialize);
1231
1232 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
1233 * sending probe req. This should be set long enough to hear probe responses
1234 * from more than one AP. */
1235 #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
1236 #define IL_ACTIVE_DWELL_TIME_52 (20)
1237
1238 #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
1239 #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
1240
1241 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
1242 * Must be set longer than active dwell time.
1243 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
1244 #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
1245 #define IL_PASSIVE_DWELL_TIME_52 (10)
1246 #define IL_PASSIVE_DWELL_BASE (100)
1247 #define IL_CHANNEL_TUNE_TIME 5
1248
1249 static int
il_send_scan_abort(struct il_priv * il)1250 il_send_scan_abort(struct il_priv *il)
1251 {
1252 int ret;
1253 struct il_rx_pkt *pkt;
1254 struct il_host_cmd cmd = {
1255 .id = C_SCAN_ABORT,
1256 .flags = CMD_WANT_SKB,
1257 };
1258
1259 /* Exit instantly with error when device is not ready
1260 * to receive scan abort command or it does not perform
1261 * hardware scan currently */
1262 if (!test_bit(S_READY, &il->status) ||
1263 !test_bit(S_GEO_CONFIGURED, &il->status) ||
1264 !test_bit(S_SCAN_HW, &il->status) ||
1265 test_bit(S_FW_ERROR, &il->status) ||
1266 test_bit(S_EXIT_PENDING, &il->status))
1267 return -EIO;
1268
1269 ret = il_send_cmd_sync(il, &cmd);
1270 if (ret)
1271 return ret;
1272
1273 pkt = (struct il_rx_pkt *)cmd.reply_page;
1274 if (pkt->u.status != CAN_ABORT_STATUS) {
1275 /* The scan abort will return 1 for success or
1276 * 2 for "failure". A failure condition can be
1277 * due to simply not being in an active scan which
1278 * can occur if we send the scan abort before we
1279 * the microcode has notified us that a scan is
1280 * completed. */
1281 D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
1282 ret = -EIO;
1283 }
1284
1285 il_free_pages(il, cmd.reply_page);
1286 return ret;
1287 }
1288
1289 static void
il_complete_scan(struct il_priv * il,bool aborted)1290 il_complete_scan(struct il_priv *il, bool aborted)
1291 {
1292 struct cfg80211_scan_info info = {
1293 .aborted = aborted,
1294 };
1295
1296 /* check if scan was requested from mac80211 */
1297 if (il->scan_request) {
1298 D_SCAN("Complete scan in mac80211\n");
1299 ieee80211_scan_completed(il->hw, &info);
1300 }
1301
1302 il->scan_vif = NULL;
1303 il->scan_request = NULL;
1304 }
1305
1306 void
il_force_scan_end(struct il_priv * il)1307 il_force_scan_end(struct il_priv *il)
1308 {
1309 lockdep_assert_held(&il->mutex);
1310
1311 if (!test_bit(S_SCANNING, &il->status)) {
1312 D_SCAN("Forcing scan end while not scanning\n");
1313 return;
1314 }
1315
1316 D_SCAN("Forcing scan end\n");
1317 clear_bit(S_SCANNING, &il->status);
1318 clear_bit(S_SCAN_HW, &il->status);
1319 clear_bit(S_SCAN_ABORTING, &il->status);
1320 il_complete_scan(il, true);
1321 }
1322
1323 static void
il_do_scan_abort(struct il_priv * il)1324 il_do_scan_abort(struct il_priv *il)
1325 {
1326 int ret;
1327
1328 lockdep_assert_held(&il->mutex);
1329
1330 if (!test_bit(S_SCANNING, &il->status)) {
1331 D_SCAN("Not performing scan to abort\n");
1332 return;
1333 }
1334
1335 if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
1336 D_SCAN("Scan abort in progress\n");
1337 return;
1338 }
1339
1340 ret = il_send_scan_abort(il);
1341 if (ret) {
1342 D_SCAN("Send scan abort failed %d\n", ret);
1343 il_force_scan_end(il);
1344 } else
1345 D_SCAN("Successfully send scan abort\n");
1346 }
1347
1348 /*
1349 * il_scan_cancel - Cancel any currently executing HW scan
1350 */
1351 int
il_scan_cancel(struct il_priv * il)1352 il_scan_cancel(struct il_priv *il)
1353 {
1354 D_SCAN("Queuing abort scan\n");
1355 queue_work(il->workqueue, &il->abort_scan);
1356 return 0;
1357 }
1358 EXPORT_SYMBOL(il_scan_cancel);
1359
1360 /*
1361 * il_scan_cancel_timeout - Cancel any currently executing HW scan
1362 * @ms: amount of time to wait (in milliseconds) for scan to abort
1363 *
1364 */
1365 int
il_scan_cancel_timeout(struct il_priv * il,unsigned long ms)1366 il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
1367 {
1368 unsigned long timeout = jiffies + msecs_to_jiffies(ms);
1369
1370 lockdep_assert_held(&il->mutex);
1371
1372 D_SCAN("Scan cancel timeout\n");
1373
1374 il_do_scan_abort(il);
1375
1376 while (time_before_eq(jiffies, timeout)) {
1377 if (!test_bit(S_SCAN_HW, &il->status))
1378 break;
1379 msleep(20);
1380 }
1381
1382 return test_bit(S_SCAN_HW, &il->status);
1383 }
1384 EXPORT_SYMBOL(il_scan_cancel_timeout);
1385
1386 /* Service response to C_SCAN (0x80) */
1387 static void
il_hdl_scan(struct il_priv * il,struct il_rx_buf * rxb)1388 il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb)
1389 {
1390 #ifdef CONFIG_IWLEGACY_DEBUG
1391 struct il_rx_pkt *pkt = rxb_addr(rxb);
1392 struct il_scanreq_notification *notif =
1393 (struct il_scanreq_notification *)pkt->u.raw;
1394
1395 D_SCAN("Scan request status = 0x%x\n", notif->status);
1396 #endif
1397 }
1398
1399 /* Service N_SCAN_START (0x82) */
1400 static void
il_hdl_scan_start(struct il_priv * il,struct il_rx_buf * rxb)1401 il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb)
1402 {
1403 struct il_rx_pkt *pkt = rxb_addr(rxb);
1404 struct il_scanstart_notification *notif =
1405 (struct il_scanstart_notification *)pkt->u.raw;
1406 il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
1407 D_SCAN("Scan start: " "%d [802.11%s] "
1408 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel,
1409 notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high),
1410 le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer);
1411 }
1412
1413 /* Service N_SCAN_RESULTS (0x83) */
1414 static void
il_hdl_scan_results(struct il_priv * il,struct il_rx_buf * rxb)1415 il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb)
1416 {
1417 #ifdef CONFIG_IWLEGACY_DEBUG
1418 struct il_rx_pkt *pkt = rxb_addr(rxb);
1419 struct il_scanresults_notification *notif =
1420 (struct il_scanresults_notification *)pkt->u.raw;
1421
1422 D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d "
1423 "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a",
1424 le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low),
1425 le32_to_cpu(notif->stats[0]),
1426 le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
1427 #endif
1428 }
1429
1430 /* Service N_SCAN_COMPLETE (0x84) */
1431 static void
il_hdl_scan_complete(struct il_priv * il,struct il_rx_buf * rxb)1432 il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb)
1433 {
1434
1435 struct il_rx_pkt *pkt = rxb_addr(rxb);
1436 struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
1437
1438 D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
1439 scan_notif->scanned_channels, scan_notif->tsf_low,
1440 scan_notif->tsf_high, scan_notif->status);
1441
1442 /* The HW is no longer scanning */
1443 clear_bit(S_SCAN_HW, &il->status);
1444
1445 D_SCAN("Scan on %sGHz took %dms\n",
1446 (il->scan_band == NL80211_BAND_2GHZ) ? "2.4" : "5.2",
1447 jiffies_to_msecs(jiffies - il->scan_start));
1448
1449 queue_work(il->workqueue, &il->scan_completed);
1450 }
1451
1452 void
il_setup_rx_scan_handlers(struct il_priv * il)1453 il_setup_rx_scan_handlers(struct il_priv *il)
1454 {
1455 /* scan handlers */
1456 il->handlers[C_SCAN] = il_hdl_scan;
1457 il->handlers[N_SCAN_START] = il_hdl_scan_start;
1458 il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results;
1459 il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete;
1460 }
1461 EXPORT_SYMBOL(il_setup_rx_scan_handlers);
1462
1463 u16
il_get_active_dwell_time(struct il_priv * il,enum nl80211_band band,u8 n_probes)1464 il_get_active_dwell_time(struct il_priv *il, enum nl80211_band band,
1465 u8 n_probes)
1466 {
1467 if (band == NL80211_BAND_5GHZ)
1468 return IL_ACTIVE_DWELL_TIME_52 +
1469 IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
1470 else
1471 return IL_ACTIVE_DWELL_TIME_24 +
1472 IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
1473 }
1474 EXPORT_SYMBOL(il_get_active_dwell_time);
1475
1476 u16
il_get_passive_dwell_time(struct il_priv * il,enum nl80211_band band,struct ieee80211_vif * vif)1477 il_get_passive_dwell_time(struct il_priv *il, enum nl80211_band band,
1478 struct ieee80211_vif *vif)
1479 {
1480 u16 value;
1481
1482 u16 passive =
1483 (band ==
1484 NL80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE +
1485 IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE +
1486 IL_PASSIVE_DWELL_TIME_52;
1487
1488 if (il_is_any_associated(il)) {
1489 /*
1490 * If we're associated, we clamp the maximum passive
1491 * dwell time to be 98% of the smallest beacon interval
1492 * (minus 2 * channel tune time)
1493 */
1494 value = il->vif ? il->vif->bss_conf.beacon_int : 0;
1495 if (value > IL_PASSIVE_DWELL_BASE || !value)
1496 value = IL_PASSIVE_DWELL_BASE;
1497 value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
1498 passive = min(value, passive);
1499 }
1500
1501 return passive;
1502 }
1503 EXPORT_SYMBOL(il_get_passive_dwell_time);
1504
1505 void
il_init_scan_params(struct il_priv * il)1506 il_init_scan_params(struct il_priv *il)
1507 {
1508 u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
1509 if (!il->scan_tx_ant[NL80211_BAND_5GHZ])
1510 il->scan_tx_ant[NL80211_BAND_5GHZ] = ant_idx;
1511 if (!il->scan_tx_ant[NL80211_BAND_2GHZ])
1512 il->scan_tx_ant[NL80211_BAND_2GHZ] = ant_idx;
1513 }
1514 EXPORT_SYMBOL(il_init_scan_params);
1515
1516 static int
il_scan_initiate(struct il_priv * il,struct ieee80211_vif * vif)1517 il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif)
1518 {
1519 int ret;
1520
1521 lockdep_assert_held(&il->mutex);
1522
1523 cancel_delayed_work(&il->scan_check);
1524
1525 if (!il_is_ready_rf(il)) {
1526 IL_WARN("Request scan called when driver not ready.\n");
1527 return -EIO;
1528 }
1529
1530 if (test_bit(S_SCAN_HW, &il->status)) {
1531 D_SCAN("Multiple concurrent scan requests in parallel.\n");
1532 return -EBUSY;
1533 }
1534
1535 if (test_bit(S_SCAN_ABORTING, &il->status)) {
1536 D_SCAN("Scan request while abort pending.\n");
1537 return -EBUSY;
1538 }
1539
1540 D_SCAN("Starting scan...\n");
1541
1542 set_bit(S_SCANNING, &il->status);
1543 il->scan_start = jiffies;
1544
1545 ret = il->ops->request_scan(il, vif);
1546 if (ret) {
1547 clear_bit(S_SCANNING, &il->status);
1548 return ret;
1549 }
1550
1551 queue_delayed_work(il->workqueue, &il->scan_check,
1552 IL_SCAN_CHECK_WATCHDOG);
1553
1554 return 0;
1555 }
1556
1557 int
il_mac_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_scan_request * hw_req)1558 il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1559 struct ieee80211_scan_request *hw_req)
1560 {
1561 struct cfg80211_scan_request *req = &hw_req->req;
1562 struct il_priv *il = hw->priv;
1563 int ret;
1564
1565 if (req->n_channels == 0) {
1566 IL_ERR("Can not scan on no channels.\n");
1567 return -EINVAL;
1568 }
1569
1570 mutex_lock(&il->mutex);
1571 D_MAC80211("enter\n");
1572
1573 if (test_bit(S_SCANNING, &il->status)) {
1574 D_SCAN("Scan already in progress.\n");
1575 ret = -EAGAIN;
1576 goto out_unlock;
1577 }
1578
1579 /* mac80211 will only ask for one band at a time */
1580 il->scan_request = req;
1581 il->scan_vif = vif;
1582 il->scan_band = req->channels[0]->band;
1583
1584 ret = il_scan_initiate(il, vif);
1585
1586 out_unlock:
1587 D_MAC80211("leave ret %d\n", ret);
1588 mutex_unlock(&il->mutex);
1589
1590 return ret;
1591 }
1592 EXPORT_SYMBOL(il_mac_hw_scan);
1593
1594 static void
il_bg_scan_check(struct work_struct * data)1595 il_bg_scan_check(struct work_struct *data)
1596 {
1597 struct il_priv *il =
1598 container_of(data, struct il_priv, scan_check.work);
1599
1600 D_SCAN("Scan check work\n");
1601
1602 /* Since we are here firmware does not finish scan and
1603 * most likely is in bad shape, so we don't bother to
1604 * send abort command, just force scan complete to mac80211 */
1605 mutex_lock(&il->mutex);
1606 il_force_scan_end(il);
1607 mutex_unlock(&il->mutex);
1608 }
1609
1610 /*
1611 * il_fill_probe_req - fill in all required fields and IE for probe request
1612 */
1613 u16
il_fill_probe_req(struct il_priv * il,struct ieee80211_mgmt * frame,const u8 * ta,const u8 * ies,int ie_len,int left)1614 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1615 const u8 *ta, const u8 *ies, int ie_len, int left)
1616 {
1617 int len = 0;
1618 u8 *pos = NULL;
1619
1620 /* Make sure there is enough space for the probe request,
1621 * two mandatory IEs and the data */
1622 left -= 24;
1623 if (left < 0)
1624 return 0;
1625
1626 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1627 eth_broadcast_addr(frame->da);
1628 memcpy(frame->sa, ta, ETH_ALEN);
1629 eth_broadcast_addr(frame->bssid);
1630 frame->seq_ctrl = 0;
1631
1632 len += 24;
1633
1634 /* ...next IE... */
1635 pos = &frame->u.probe_req.variable[0];
1636
1637 /* fill in our indirect SSID IE */
1638 left -= 2;
1639 if (left < 0)
1640 return 0;
1641 *pos++ = WLAN_EID_SSID;
1642 *pos++ = 0;
1643
1644 len += 2;
1645
1646 if (WARN_ON(left < ie_len))
1647 return len;
1648
1649 if (ies && ie_len) {
1650 memcpy(pos, ies, ie_len);
1651 len += ie_len;
1652 }
1653
1654 return (u16) len;
1655 }
1656 EXPORT_SYMBOL(il_fill_probe_req);
1657
1658 static void
il_bg_abort_scan(struct work_struct * work)1659 il_bg_abort_scan(struct work_struct *work)
1660 {
1661 struct il_priv *il = container_of(work, struct il_priv, abort_scan);
1662
1663 D_SCAN("Abort scan work\n");
1664
1665 /* We keep scan_check work queued in case when firmware will not
1666 * report back scan completed notification */
1667 mutex_lock(&il->mutex);
1668 il_scan_cancel_timeout(il, 200);
1669 mutex_unlock(&il->mutex);
1670 }
1671
1672 static void
il_bg_scan_completed(struct work_struct * work)1673 il_bg_scan_completed(struct work_struct *work)
1674 {
1675 struct il_priv *il = container_of(work, struct il_priv, scan_completed);
1676 bool aborted;
1677
1678 D_SCAN("Completed scan.\n");
1679
1680 cancel_delayed_work(&il->scan_check);
1681
1682 mutex_lock(&il->mutex);
1683
1684 aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
1685 if (aborted)
1686 D_SCAN("Aborted scan completed.\n");
1687
1688 if (!test_and_clear_bit(S_SCANNING, &il->status)) {
1689 D_SCAN("Scan already completed.\n");
1690 goto out_settings;
1691 }
1692
1693 il_complete_scan(il, aborted);
1694
1695 out_settings:
1696 /* Can we still talk to firmware ? */
1697 if (!il_is_ready_rf(il))
1698 goto out;
1699
1700 /*
1701 * We do not commit power settings while scan is pending,
1702 * do it now if the settings changed.
1703 */
1704 il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
1705 il_set_tx_power(il, il->tx_power_next, false);
1706
1707 il->ops->post_scan(il);
1708
1709 out:
1710 mutex_unlock(&il->mutex);
1711 }
1712
1713 void
il_setup_scan_deferred_work(struct il_priv * il)1714 il_setup_scan_deferred_work(struct il_priv *il)
1715 {
1716 INIT_WORK(&il->scan_completed, il_bg_scan_completed);
1717 INIT_WORK(&il->abort_scan, il_bg_abort_scan);
1718 INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
1719 }
1720 EXPORT_SYMBOL(il_setup_scan_deferred_work);
1721
1722 void
il_cancel_scan_deferred_work(struct il_priv * il)1723 il_cancel_scan_deferred_work(struct il_priv *il)
1724 {
1725 cancel_work_sync(&il->abort_scan);
1726 cancel_work_sync(&il->scan_completed);
1727
1728 if (cancel_delayed_work_sync(&il->scan_check)) {
1729 mutex_lock(&il->mutex);
1730 il_force_scan_end(il);
1731 mutex_unlock(&il->mutex);
1732 }
1733 }
1734 EXPORT_SYMBOL(il_cancel_scan_deferred_work);
1735
1736 /* il->sta_lock must be held */
1737 static void
il_sta_ucode_activate(struct il_priv * il,u8 sta_id)1738 il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
1739 {
1740
1741 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
1742 IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n",
1743 sta_id, il->stations[sta_id].sta.sta.addr);
1744
1745 if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
1746 D_ASSOC("STA id %u addr %pM already present"
1747 " in uCode (according to driver)\n", sta_id,
1748 il->stations[sta_id].sta.sta.addr);
1749 } else {
1750 il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
1751 D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id,
1752 il->stations[sta_id].sta.sta.addr);
1753 }
1754 }
1755
1756 static int
il_process_add_sta_resp(struct il_priv * il,struct il_addsta_cmd * addsta,struct il_rx_pkt * pkt,bool sync)1757 il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta,
1758 struct il_rx_pkt *pkt, bool sync)
1759 {
1760 u8 sta_id = addsta->sta.sta_id;
1761 unsigned long flags;
1762 int ret = -EIO;
1763
1764 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1765 IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags);
1766 return ret;
1767 }
1768
1769 D_INFO("Processing response for adding station %u\n", sta_id);
1770
1771 spin_lock_irqsave(&il->sta_lock, flags);
1772
1773 switch (pkt->u.add_sta.status) {
1774 case ADD_STA_SUCCESS_MSK:
1775 D_INFO("C_ADD_STA PASSED\n");
1776 il_sta_ucode_activate(il, sta_id);
1777 ret = 0;
1778 break;
1779 case ADD_STA_NO_ROOM_IN_TBL:
1780 IL_ERR("Adding station %d failed, no room in table.\n", sta_id);
1781 break;
1782 case ADD_STA_NO_BLOCK_ACK_RESOURCE:
1783 IL_ERR("Adding station %d failed, no block ack resource.\n",
1784 sta_id);
1785 break;
1786 case ADD_STA_MODIFY_NON_EXIST_STA:
1787 IL_ERR("Attempting to modify non-existing station %d\n",
1788 sta_id);
1789 break;
1790 default:
1791 D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status);
1792 break;
1793 }
1794
1795 D_INFO("%s station id %u addr %pM\n",
1796 il->stations[sta_id].sta.mode ==
1797 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id,
1798 il->stations[sta_id].sta.sta.addr);
1799
1800 /*
1801 * XXX: The MAC address in the command buffer is often changed from
1802 * the original sent to the device. That is, the MAC address
1803 * written to the command buffer often is not the same MAC address
1804 * read from the command buffer when the command returns. This
1805 * issue has not yet been resolved and this debugging is left to
1806 * observe the problem.
1807 */
1808 D_INFO("%s station according to cmd buffer %pM\n",
1809 il->stations[sta_id].sta.mode ==
1810 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr);
1811 spin_unlock_irqrestore(&il->sta_lock, flags);
1812
1813 return ret;
1814 }
1815
1816 static void
il_add_sta_callback(struct il_priv * il,struct il_device_cmd * cmd,struct il_rx_pkt * pkt)1817 il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd,
1818 struct il_rx_pkt *pkt)
1819 {
1820 struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload;
1821
1822 il_process_add_sta_resp(il, addsta, pkt, false);
1823
1824 }
1825
1826 int
il_send_add_sta(struct il_priv * il,struct il_addsta_cmd * sta,u8 flags)1827 il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags)
1828 {
1829 struct il_rx_pkt *pkt = NULL;
1830 int ret = 0;
1831 u8 data[sizeof(*sta)];
1832 struct il_host_cmd cmd = {
1833 .id = C_ADD_STA,
1834 .flags = flags,
1835 .data = data,
1836 };
1837 u8 sta_id __maybe_unused = sta->sta.sta_id;
1838
1839 D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr,
1840 flags & CMD_ASYNC ? "a" : "");
1841
1842 if (flags & CMD_ASYNC)
1843 cmd.callback = il_add_sta_callback;
1844 else {
1845 cmd.flags |= CMD_WANT_SKB;
1846 might_sleep();
1847 }
1848
1849 cmd.len = il->ops->build_addsta_hcmd(sta, data);
1850 ret = il_send_cmd(il, &cmd);
1851 if (ret)
1852 return ret;
1853 if (flags & CMD_ASYNC)
1854 return 0;
1855
1856 pkt = (struct il_rx_pkt *)cmd.reply_page;
1857 ret = il_process_add_sta_resp(il, sta, pkt, true);
1858
1859 il_free_pages(il, cmd.reply_page);
1860
1861 return ret;
1862 }
1863 EXPORT_SYMBOL(il_send_add_sta);
1864
1865 static void
il_set_ht_add_station(struct il_priv * il,u8 idx,struct ieee80211_sta * sta)1866 il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta)
1867 {
1868 struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->deflink.ht_cap;
1869 __le32 sta_flags;
1870
1871 if (!sta || !sta_ht_inf->ht_supported)
1872 goto done;
1873
1874 D_ASSOC("spatial multiplexing power save mode: %s\n",
1875 (sta->deflink.smps_mode == IEEE80211_SMPS_STATIC) ? "static" :
1876 (sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC) ? "dynamic" :
1877 "disabled");
1878
1879 sta_flags = il->stations[idx].sta.station_flags;
1880
1881 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
1882
1883 switch (sta->deflink.smps_mode) {
1884 case IEEE80211_SMPS_STATIC:
1885 sta_flags |= STA_FLG_MIMO_DIS_MSK;
1886 break;
1887 case IEEE80211_SMPS_DYNAMIC:
1888 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
1889 break;
1890 case IEEE80211_SMPS_OFF:
1891 break;
1892 default:
1893 IL_WARN("Invalid MIMO PS mode %d\n", sta->deflink.smps_mode);
1894 break;
1895 }
1896
1897 sta_flags |=
1898 cpu_to_le32((u32) sta_ht_inf->
1899 ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
1900
1901 sta_flags |=
1902 cpu_to_le32((u32) sta_ht_inf->
1903 ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
1904
1905 if (il_is_ht40_tx_allowed(il, &sta->deflink.ht_cap))
1906 sta_flags |= STA_FLG_HT40_EN_MSK;
1907 else
1908 sta_flags &= ~STA_FLG_HT40_EN_MSK;
1909
1910 il->stations[idx].sta.station_flags = sta_flags;
1911 done:
1912 return;
1913 }
1914
1915 /*
1916 * il_prep_station - Prepare station information for addition
1917 *
1918 * should be called with sta_lock held
1919 */
1920 u8
il_prep_station(struct il_priv * il,const u8 * addr,bool is_ap,struct ieee80211_sta * sta)1921 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
1922 struct ieee80211_sta *sta)
1923 {
1924 struct il_station_entry *station;
1925 int i;
1926 u8 sta_id = IL_INVALID_STATION;
1927 u16 rate;
1928
1929 if (is_ap)
1930 sta_id = IL_AP_ID;
1931 else if (is_broadcast_ether_addr(addr))
1932 sta_id = il->hw_params.bcast_id;
1933 else
1934 for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
1935 if (ether_addr_equal(il->stations[i].sta.sta.addr,
1936 addr)) {
1937 sta_id = i;
1938 break;
1939 }
1940
1941 if (!il->stations[i].used &&
1942 sta_id == IL_INVALID_STATION)
1943 sta_id = i;
1944 }
1945
1946 /*
1947 * These two conditions have the same outcome, but keep them
1948 * separate
1949 */
1950 if (unlikely(sta_id == IL_INVALID_STATION))
1951 return sta_id;
1952
1953 /*
1954 * uCode is not able to deal with multiple requests to add a
1955 * station. Keep track if one is in progress so that we do not send
1956 * another.
1957 */
1958 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1959 D_INFO("STA %d already in process of being added.\n", sta_id);
1960 return sta_id;
1961 }
1962
1963 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1964 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
1965 ether_addr_equal(il->stations[sta_id].sta.sta.addr, addr)) {
1966 D_ASSOC("STA %d (%pM) already added, not adding again.\n",
1967 sta_id, addr);
1968 return sta_id;
1969 }
1970
1971 station = &il->stations[sta_id];
1972 station->used = IL_STA_DRIVER_ACTIVE;
1973 D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr);
1974 il->num_stations++;
1975
1976 /* Set up the C_ADD_STA command to send to device */
1977 memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
1978 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
1979 station->sta.mode = 0;
1980 station->sta.sta.sta_id = sta_id;
1981 station->sta.station_flags = 0;
1982
1983 /*
1984 * OK to call unconditionally, since local stations (IBSS BSSID
1985 * STA and broadcast STA) pass in a NULL sta, and mac80211
1986 * doesn't allow HT IBSS.
1987 */
1988 il_set_ht_add_station(il, sta_id, sta);
1989
1990 /* 3945 only */
1991 rate = (il->band == NL80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP;
1992 /* Turn on both antennas for the station... */
1993 station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
1994
1995 return sta_id;
1996
1997 }
1998 EXPORT_SYMBOL_GPL(il_prep_station);
1999
2000 #define STA_WAIT_TIMEOUT (HZ/2)
2001
2002 /*
2003 * il_add_station_common -
2004 */
2005 int
il_add_station_common(struct il_priv * il,const u8 * addr,bool is_ap,struct ieee80211_sta * sta,u8 * sta_id_r)2006 il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
2007 struct ieee80211_sta *sta, u8 *sta_id_r)
2008 {
2009 unsigned long flags_spin;
2010 int ret = 0;
2011 u8 sta_id;
2012 struct il_addsta_cmd sta_cmd;
2013
2014 *sta_id_r = 0;
2015 spin_lock_irqsave(&il->sta_lock, flags_spin);
2016 sta_id = il_prep_station(il, addr, is_ap, sta);
2017 if (sta_id == IL_INVALID_STATION) {
2018 IL_ERR("Unable to prepare station %pM for addition\n", addr);
2019 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2020 return -EINVAL;
2021 }
2022
2023 /*
2024 * uCode is not able to deal with multiple requests to add a
2025 * station. Keep track if one is in progress so that we do not send
2026 * another.
2027 */
2028 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
2029 D_INFO("STA %d already in process of being added.\n", sta_id);
2030 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2031 return -EEXIST;
2032 }
2033
2034 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
2035 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2036 D_ASSOC("STA %d (%pM) already added, not adding again.\n",
2037 sta_id, addr);
2038 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2039 return -EEXIST;
2040 }
2041
2042 il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
2043 memcpy(&sta_cmd, &il->stations[sta_id].sta,
2044 sizeof(struct il_addsta_cmd));
2045 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2046
2047 /* Add station to device's station table */
2048 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2049 if (ret) {
2050 spin_lock_irqsave(&il->sta_lock, flags_spin);
2051 IL_ERR("Adding station %pM failed.\n",
2052 il->stations[sta_id].sta.sta.addr);
2053 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2054 il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2055 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2056 }
2057 *sta_id_r = sta_id;
2058 return ret;
2059 }
2060 EXPORT_SYMBOL(il_add_station_common);
2061
2062 /*
2063 * il_sta_ucode_deactivate - deactivate ucode status for a station
2064 *
2065 * il->sta_lock must be held
2066 */
2067 static void
il_sta_ucode_deactivate(struct il_priv * il,u8 sta_id)2068 il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
2069 {
2070 /* Ucode must be active and driver must be non active */
2071 if ((il->stations[sta_id].
2072 used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
2073 IL_STA_UCODE_ACTIVE)
2074 IL_ERR("removed non active STA %u\n", sta_id);
2075
2076 il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
2077
2078 memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
2079 D_ASSOC("Removed STA %u\n", sta_id);
2080 }
2081
2082 static int
il_send_remove_station(struct il_priv * il,const u8 * addr,int sta_id,bool temporary)2083 il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id,
2084 bool temporary)
2085 {
2086 struct il_rx_pkt *pkt;
2087 int ret;
2088
2089 unsigned long flags_spin;
2090 struct il_rem_sta_cmd rm_sta_cmd;
2091
2092 struct il_host_cmd cmd = {
2093 .id = C_REM_STA,
2094 .len = sizeof(struct il_rem_sta_cmd),
2095 .flags = CMD_SYNC,
2096 .data = &rm_sta_cmd,
2097 };
2098
2099 memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
2100 rm_sta_cmd.num_sta = 1;
2101 memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
2102
2103 cmd.flags |= CMD_WANT_SKB;
2104
2105 ret = il_send_cmd(il, &cmd);
2106
2107 if (ret)
2108 return ret;
2109
2110 pkt = (struct il_rx_pkt *)cmd.reply_page;
2111 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
2112 IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags);
2113 ret = -EIO;
2114 }
2115
2116 if (!ret) {
2117 switch (pkt->u.rem_sta.status) {
2118 case REM_STA_SUCCESS_MSK:
2119 if (!temporary) {
2120 spin_lock_irqsave(&il->sta_lock, flags_spin);
2121 il_sta_ucode_deactivate(il, sta_id);
2122 spin_unlock_irqrestore(&il->sta_lock,
2123 flags_spin);
2124 }
2125 D_ASSOC("C_REM_STA PASSED\n");
2126 break;
2127 default:
2128 ret = -EIO;
2129 IL_ERR("C_REM_STA failed\n");
2130 break;
2131 }
2132 }
2133 il_free_pages(il, cmd.reply_page);
2134
2135 return ret;
2136 }
2137
2138 /*
2139 * il_remove_station - Remove driver's knowledge of station.
2140 */
2141 int
il_remove_station(struct il_priv * il,const u8 sta_id,const u8 * addr)2142 il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr)
2143 {
2144 unsigned long flags;
2145
2146 if (!il_is_ready(il)) {
2147 D_INFO("Unable to remove station %pM, device not ready.\n",
2148 addr);
2149 /*
2150 * It is typical for stations to be removed when we are
2151 * going down. Return success since device will be down
2152 * soon anyway
2153 */
2154 return 0;
2155 }
2156
2157 D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr);
2158
2159 if (WARN_ON(sta_id == IL_INVALID_STATION))
2160 return -EINVAL;
2161
2162 spin_lock_irqsave(&il->sta_lock, flags);
2163
2164 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2165 D_INFO("Removing %pM but non DRIVER active\n", addr);
2166 goto out_err;
2167 }
2168
2169 if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2170 D_INFO("Removing %pM but non UCODE active\n", addr);
2171 goto out_err;
2172 }
2173
2174 if (il->stations[sta_id].used & IL_STA_LOCAL) {
2175 kfree(il->stations[sta_id].lq);
2176 il->stations[sta_id].lq = NULL;
2177 }
2178
2179 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2180
2181 il->num_stations--;
2182
2183 BUG_ON(il->num_stations < 0);
2184
2185 spin_unlock_irqrestore(&il->sta_lock, flags);
2186
2187 return il_send_remove_station(il, addr, sta_id, false);
2188 out_err:
2189 spin_unlock_irqrestore(&il->sta_lock, flags);
2190 return -EINVAL;
2191 }
2192 EXPORT_SYMBOL_GPL(il_remove_station);
2193
2194 /*
2195 * il_clear_ucode_stations - clear ucode station table bits
2196 *
2197 * This function clears all the bits in the driver indicating
2198 * which stations are active in the ucode. Call when something
2199 * other than explicit station management would cause this in
2200 * the ucode, e.g. unassociated RXON.
2201 */
2202 void
il_clear_ucode_stations(struct il_priv * il)2203 il_clear_ucode_stations(struct il_priv *il)
2204 {
2205 int i;
2206 unsigned long flags_spin;
2207 bool cleared = false;
2208
2209 D_INFO("Clearing ucode stations in driver\n");
2210
2211 spin_lock_irqsave(&il->sta_lock, flags_spin);
2212 for (i = 0; i < il->hw_params.max_stations; i++) {
2213 if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
2214 D_INFO("Clearing ucode active for station %d\n", i);
2215 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2216 cleared = true;
2217 }
2218 }
2219 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2220
2221 if (!cleared)
2222 D_INFO("No active stations found to be cleared\n");
2223 }
2224 EXPORT_SYMBOL(il_clear_ucode_stations);
2225
2226 /*
2227 * il_restore_stations() - Restore driver known stations to device
2228 *
2229 * All stations considered active by driver, but not present in ucode, is
2230 * restored.
2231 *
2232 * Function sleeps.
2233 */
2234 void
il_restore_stations(struct il_priv * il)2235 il_restore_stations(struct il_priv *il)
2236 {
2237 struct il_addsta_cmd sta_cmd;
2238 struct il_link_quality_cmd lq;
2239 unsigned long flags_spin;
2240 int i;
2241 bool found = false;
2242 int ret;
2243 bool send_lq;
2244
2245 if (!il_is_ready(il)) {
2246 D_INFO("Not ready yet, not restoring any stations.\n");
2247 return;
2248 }
2249
2250 D_ASSOC("Restoring all known stations ... start.\n");
2251 spin_lock_irqsave(&il->sta_lock, flags_spin);
2252 for (i = 0; i < il->hw_params.max_stations; i++) {
2253 if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
2254 !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
2255 D_ASSOC("Restoring sta %pM\n",
2256 il->stations[i].sta.sta.addr);
2257 il->stations[i].sta.mode = 0;
2258 il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
2259 found = true;
2260 }
2261 }
2262
2263 for (i = 0; i < il->hw_params.max_stations; i++) {
2264 if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
2265 memcpy(&sta_cmd, &il->stations[i].sta,
2266 sizeof(struct il_addsta_cmd));
2267 send_lq = false;
2268 if (il->stations[i].lq) {
2269 memcpy(&lq, il->stations[i].lq,
2270 sizeof(struct il_link_quality_cmd));
2271 send_lq = true;
2272 }
2273 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2274 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2275 if (ret) {
2276 spin_lock_irqsave(&il->sta_lock, flags_spin);
2277 IL_ERR("Adding station %pM failed.\n",
2278 il->stations[i].sta.sta.addr);
2279 il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE;
2280 il->stations[i].used &=
2281 ~IL_STA_UCODE_INPROGRESS;
2282 spin_unlock_irqrestore(&il->sta_lock,
2283 flags_spin);
2284 }
2285 /*
2286 * Rate scaling has already been initialized, send
2287 * current LQ command
2288 */
2289 if (send_lq)
2290 il_send_lq_cmd(il, &lq, CMD_SYNC, true);
2291 spin_lock_irqsave(&il->sta_lock, flags_spin);
2292 il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
2293 }
2294 }
2295
2296 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2297 if (!found)
2298 D_INFO("Restoring all known stations"
2299 " .... no stations to be restored.\n");
2300 else
2301 D_INFO("Restoring all known stations" " .... complete.\n");
2302 }
2303 EXPORT_SYMBOL(il_restore_stations);
2304
2305 int
il_get_free_ucode_key_idx(struct il_priv * il)2306 il_get_free_ucode_key_idx(struct il_priv *il)
2307 {
2308 int i;
2309
2310 for (i = 0; i < il->sta_key_max_num; i++)
2311 if (!test_and_set_bit(i, &il->ucode_key_table))
2312 return i;
2313
2314 return WEP_INVALID_OFFSET;
2315 }
2316 EXPORT_SYMBOL(il_get_free_ucode_key_idx);
2317
2318 void
il_dealloc_bcast_stations(struct il_priv * il)2319 il_dealloc_bcast_stations(struct il_priv *il)
2320 {
2321 unsigned long flags;
2322 int i;
2323
2324 spin_lock_irqsave(&il->sta_lock, flags);
2325 for (i = 0; i < il->hw_params.max_stations; i++) {
2326 if (!(il->stations[i].used & IL_STA_BCAST))
2327 continue;
2328
2329 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2330 il->num_stations--;
2331 BUG_ON(il->num_stations < 0);
2332 kfree(il->stations[i].lq);
2333 il->stations[i].lq = NULL;
2334 }
2335 spin_unlock_irqrestore(&il->sta_lock, flags);
2336 }
2337 EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
2338
2339 #ifdef CONFIG_IWLEGACY_DEBUG
2340 static void
il_dump_lq_cmd(struct il_priv * il,struct il_link_quality_cmd * lq)2341 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2342 {
2343 int i;
2344 D_RATE("lq station id 0x%x\n", lq->sta_id);
2345 D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk,
2346 lq->general_params.dual_stream_ant_msk);
2347
2348 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
2349 D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags);
2350 }
2351 #else
2352 static inline void
il_dump_lq_cmd(struct il_priv * il,struct il_link_quality_cmd * lq)2353 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2354 {
2355 }
2356 #endif
2357
2358 /*
2359 * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
2360 *
2361 * It sometimes happens when a HT rate has been in use and we
2362 * loose connectivity with AP then mac80211 will first tell us that the
2363 * current channel is not HT anymore before removing the station. In such a
2364 * scenario the RXON flags will be updated to indicate we are not
2365 * communicating HT anymore, but the LQ command may still contain HT rates.
2366 * Test for this to prevent driver from sending LQ command between the time
2367 * RXON flags are updated and when LQ command is updated.
2368 */
2369 static bool
il_is_lq_table_valid(struct il_priv * il,struct il_link_quality_cmd * lq)2370 il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq)
2371 {
2372 int i;
2373
2374 if (il->ht.enabled)
2375 return true;
2376
2377 D_INFO("Channel %u is not an HT channel\n", il->active.channel);
2378 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
2379 if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) {
2380 D_INFO("idx %d of LQ expects HT channel\n", i);
2381 return false;
2382 }
2383 }
2384 return true;
2385 }
2386
2387 /*
2388 * il_send_lq_cmd() - Send link quality command
2389 * @init: This command is sent as part of station initialization right
2390 * after station has been added.
2391 *
2392 * The link quality command is sent as the last step of station creation.
2393 * This is the special case in which init is set and we call a callback in
2394 * this case to clear the state indicating that station creation is in
2395 * progress.
2396 */
2397 int
il_send_lq_cmd(struct il_priv * il,struct il_link_quality_cmd * lq,u8 flags,bool init)2398 il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
2399 u8 flags, bool init)
2400 {
2401 int ret = 0;
2402 unsigned long flags_spin;
2403
2404 struct il_host_cmd cmd = {
2405 .id = C_TX_LINK_QUALITY_CMD,
2406 .len = sizeof(struct il_link_quality_cmd),
2407 .flags = flags,
2408 .data = lq,
2409 };
2410
2411 if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
2412 return -EINVAL;
2413
2414 spin_lock_irqsave(&il->sta_lock, flags_spin);
2415 if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2416 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2417 return -EINVAL;
2418 }
2419 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2420
2421 il_dump_lq_cmd(il, lq);
2422 BUG_ON(init && (cmd.flags & CMD_ASYNC));
2423
2424 if (il_is_lq_table_valid(il, lq))
2425 ret = il_send_cmd(il, &cmd);
2426 else
2427 ret = -EINVAL;
2428
2429 if (cmd.flags & CMD_ASYNC)
2430 return ret;
2431
2432 if (init) {
2433 D_INFO("init LQ command complete,"
2434 " clearing sta addition status for sta %d\n",
2435 lq->sta_id);
2436 spin_lock_irqsave(&il->sta_lock, flags_spin);
2437 il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2438 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2439 }
2440 return ret;
2441 }
2442 EXPORT_SYMBOL(il_send_lq_cmd);
2443
2444 int
il_mac_sta_remove(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)2445 il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2446 struct ieee80211_sta *sta)
2447 {
2448 struct il_priv *il = hw->priv;
2449 struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
2450 int ret;
2451
2452 mutex_lock(&il->mutex);
2453 D_MAC80211("enter station %pM\n", sta->addr);
2454
2455 ret = il_remove_station(il, sta_common->sta_id, sta->addr);
2456 if (ret)
2457 IL_ERR("Error removing station %pM\n", sta->addr);
2458
2459 D_MAC80211("leave ret %d\n", ret);
2460 mutex_unlock(&il->mutex);
2461
2462 return ret;
2463 }
2464 EXPORT_SYMBOL(il_mac_sta_remove);
2465
2466 /************************** RX-FUNCTIONS ****************************/
2467 /*
2468 * Rx theory of operation
2469 *
2470 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
2471 * each of which point to Receive Buffers to be filled by the NIC. These get
2472 * used not only for Rx frames, but for any command response or notification
2473 * from the NIC. The driver and NIC manage the Rx buffers by means
2474 * of idxes into the circular buffer.
2475 *
2476 * Rx Queue Indexes
2477 * The host/firmware share two idx registers for managing the Rx buffers.
2478 *
2479 * The READ idx maps to the first position that the firmware may be writing
2480 * to -- the driver can read up to (but not including) this position and get
2481 * good data.
2482 * The READ idx is managed by the firmware once the card is enabled.
2483 *
2484 * The WRITE idx maps to the last position the driver has read from -- the
2485 * position preceding WRITE is the last slot the firmware can place a packet.
2486 *
2487 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
2488 * WRITE = READ.
2489 *
2490 * During initialization, the host sets up the READ queue position to the first
2491 * IDX position, and WRITE to the last (READ - 1 wrapped)
2492 *
2493 * When the firmware places a packet in a buffer, it will advance the READ idx
2494 * and fire the RX interrupt. The driver can then query the READ idx and
2495 * process as many packets as possible, moving the WRITE idx forward as it
2496 * resets the Rx queue buffers with new memory.
2497 *
2498 * The management in the driver is as follows:
2499 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
2500 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
2501 * to replenish the iwl->rxq->rx_free.
2502 * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
2503 * iwl->rxq is replenished and the READ IDX is updated (updating the
2504 * 'processed' and 'read' driver idxes as well)
2505 * + A received packet is processed and handed to the kernel network stack,
2506 * detached from the iwl->rxq. The driver 'processed' idx is updated.
2507 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
2508 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
2509 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
2510 * were enough free buffers and RX_STALLED is set it is cleared.
2511 *
2512 *
2513 * Driver sequence:
2514 *
2515 * il_rx_queue_alloc() Allocates rx_free
2516 * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
2517 * il_rx_queue_restock
2518 * il_rx_queue_restock() Moves available buffers from rx_free into Rx
2519 * queue, updates firmware pointers, and updates
2520 * the WRITE idx. If insufficient rx_free buffers
2521 * are available, schedules il_rx_replenish
2522 *
2523 * -- enable interrupts --
2524 * ISR - il_rx() Detach il_rx_bufs from pool up to the
2525 * READ IDX, detaching the SKB from the pool.
2526 * Moves the packet buffer from queue to rx_used.
2527 * Calls il_rx_queue_restock to refill any empty
2528 * slots.
2529 * ...
2530 *
2531 */
2532
2533 /*
2534 * il_rx_queue_space - Return number of free slots available in queue.
2535 */
2536 int
il_rx_queue_space(const struct il_rx_queue * q)2537 il_rx_queue_space(const struct il_rx_queue *q)
2538 {
2539 int s = q->read - q->write;
2540 if (s <= 0)
2541 s += RX_QUEUE_SIZE;
2542 /* keep some buffer to not confuse full and empty queue */
2543 s -= 2;
2544 if (s < 0)
2545 s = 0;
2546 return s;
2547 }
2548 EXPORT_SYMBOL(il_rx_queue_space);
2549
2550 /*
2551 * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
2552 */
2553 void
il_rx_queue_update_write_ptr(struct il_priv * il,struct il_rx_queue * q)2554 il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q)
2555 {
2556 unsigned long flags;
2557 u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
2558 u32 reg;
2559
2560 spin_lock_irqsave(&q->lock, flags);
2561
2562 if (q->need_update == 0)
2563 goto exit_unlock;
2564
2565 /* If power-saving is in use, make sure device is awake */
2566 if (test_bit(S_POWER_PMI, &il->status)) {
2567 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2568
2569 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2570 D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n",
2571 reg);
2572 il_set_bit(il, CSR_GP_CNTRL,
2573 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2574 goto exit_unlock;
2575 }
2576
2577 q->write_actual = (q->write & ~0x7);
2578 il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2579
2580 /* Else device is assumed to be awake */
2581 } else {
2582 /* Device expects a multiple of 8 */
2583 q->write_actual = (q->write & ~0x7);
2584 il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2585 }
2586
2587 q->need_update = 0;
2588
2589 exit_unlock:
2590 spin_unlock_irqrestore(&q->lock, flags);
2591 }
2592 EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
2593
2594 int
il_rx_queue_alloc(struct il_priv * il)2595 il_rx_queue_alloc(struct il_priv *il)
2596 {
2597 struct il_rx_queue *rxq = &il->rxq;
2598 struct device *dev = &il->pci_dev->dev;
2599 int i;
2600
2601 spin_lock_init(&rxq->lock);
2602 INIT_LIST_HEAD(&rxq->rx_free);
2603 INIT_LIST_HEAD(&rxq->rx_used);
2604
2605 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
2606 rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
2607 GFP_KERNEL);
2608 if (!rxq->bd)
2609 goto err_bd;
2610
2611 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
2612 &rxq->rb_stts_dma, GFP_KERNEL);
2613 if (!rxq->rb_stts)
2614 goto err_rb;
2615
2616 /* Fill the rx_used queue with _all_ of the Rx buffers */
2617 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
2618 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
2619
2620 /* Set us so that we have processed and used all buffers, but have
2621 * not restocked the Rx queue with fresh buffers */
2622 rxq->read = rxq->write = 0;
2623 rxq->write_actual = 0;
2624 rxq->free_count = 0;
2625 rxq->need_update = 0;
2626 return 0;
2627
2628 err_rb:
2629 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
2630 rxq->bd_dma);
2631 err_bd:
2632 return -ENOMEM;
2633 }
2634 EXPORT_SYMBOL(il_rx_queue_alloc);
2635
2636 void
il_hdl_spectrum_measurement(struct il_priv * il,struct il_rx_buf * rxb)2637 il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb)
2638 {
2639 struct il_rx_pkt *pkt = rxb_addr(rxb);
2640 struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
2641
2642 if (!report->state) {
2643 D_11H("Spectrum Measure Notification: Start\n");
2644 return;
2645 }
2646
2647 memcpy(&il->measure_report, report, sizeof(*report));
2648 il->measurement_status |= MEASUREMENT_READY;
2649 }
2650 EXPORT_SYMBOL(il_hdl_spectrum_measurement);
2651
2652 /*
2653 * returns non-zero if packet should be dropped
2654 */
2655 int
il_set_decrypted_flag(struct il_priv * il,struct ieee80211_hdr * hdr,u32 decrypt_res,struct ieee80211_rx_status * stats)2656 il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
2657 u32 decrypt_res, struct ieee80211_rx_status *stats)
2658 {
2659 u16 fc = le16_to_cpu(hdr->frame_control);
2660
2661 /*
2662 * All contexts have the same setting here due to it being
2663 * a module parameter, so OK to check any context.
2664 */
2665 if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2666 return 0;
2667
2668 if (!(fc & IEEE80211_FCTL_PROTECTED))
2669 return 0;
2670
2671 D_RX("decrypt_res:0x%x\n", decrypt_res);
2672 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2673 case RX_RES_STATUS_SEC_TYPE_TKIP:
2674 /* The uCode has got a bad phase 1 Key, pushes the packet.
2675 * Decryption will be done in SW. */
2676 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2677 RX_RES_STATUS_BAD_KEY_TTAK)
2678 break;
2679 fallthrough;
2680
2681 case RX_RES_STATUS_SEC_TYPE_WEP:
2682 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2683 RX_RES_STATUS_BAD_ICV_MIC) {
2684 /* bad ICV, the packet is destroyed since the
2685 * decryption is inplace, drop it */
2686 D_RX("Packet destroyed\n");
2687 return -1;
2688 }
2689 fallthrough;
2690 case RX_RES_STATUS_SEC_TYPE_CCMP:
2691 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2692 RX_RES_STATUS_DECRYPT_OK) {
2693 D_RX("hw decrypt successfully!!!\n");
2694 stats->flag |= RX_FLAG_DECRYPTED;
2695 }
2696 break;
2697
2698 default:
2699 break;
2700 }
2701 return 0;
2702 }
2703 EXPORT_SYMBOL(il_set_decrypted_flag);
2704
2705 /*
2706 * il_txq_update_write_ptr - Send new write idx to hardware
2707 */
2708 void
il_txq_update_write_ptr(struct il_priv * il,struct il_tx_queue * txq)2709 il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
2710 {
2711 u32 reg = 0;
2712 int txq_id = txq->q.id;
2713
2714 if (txq->need_update == 0)
2715 return;
2716
2717 /* if we're trying to save power */
2718 if (test_bit(S_POWER_PMI, &il->status)) {
2719 /* wake up nic if it's powered down ...
2720 * uCode will wake up, and interrupt us again, so next
2721 * time we'll skip this part. */
2722 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2723
2724 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2725 D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n",
2726 txq_id, reg);
2727 il_set_bit(il, CSR_GP_CNTRL,
2728 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2729 return;
2730 }
2731
2732 il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2733
2734 /*
2735 * else not in power-save mode,
2736 * uCode will never sleep when we're
2737 * trying to tx (during RFKILL, we're not trying to tx).
2738 */
2739 } else
2740 _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2741 txq->need_update = 0;
2742 }
2743 EXPORT_SYMBOL(il_txq_update_write_ptr);
2744
2745 /*
2746 * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
2747 */
2748 void
il_tx_queue_unmap(struct il_priv * il,int txq_id)2749 il_tx_queue_unmap(struct il_priv *il, int txq_id)
2750 {
2751 struct il_tx_queue *txq = &il->txq[txq_id];
2752 struct il_queue *q = &txq->q;
2753
2754 if (q->n_bd == 0)
2755 return;
2756
2757 while (q->write_ptr != q->read_ptr) {
2758 il->ops->txq_free_tfd(il, txq);
2759 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2760 }
2761 }
2762 EXPORT_SYMBOL(il_tx_queue_unmap);
2763
2764 /*
2765 * il_tx_queue_free - Deallocate DMA queue.
2766 * @txq: Transmit queue to deallocate.
2767 *
2768 * Empty queue by removing and destroying all BD's.
2769 * Free all buffers.
2770 * 0-fill, but do not free "txq" descriptor structure.
2771 */
2772 void
il_tx_queue_free(struct il_priv * il,int txq_id)2773 il_tx_queue_free(struct il_priv *il, int txq_id)
2774 {
2775 struct il_tx_queue *txq = &il->txq[txq_id];
2776 struct device *dev = &il->pci_dev->dev;
2777 int i;
2778
2779 il_tx_queue_unmap(il, txq_id);
2780
2781 /* De-alloc array of command/tx buffers */
2782 if (txq->cmd) {
2783 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
2784 kfree(txq->cmd[i]);
2785 }
2786
2787 /* De-alloc circular buffer of TFDs */
2788 if (txq->q.n_bd)
2789 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2790 txq->tfds, txq->q.dma_addr);
2791
2792 /* De-alloc array of per-TFD driver data */
2793 kfree(txq->skbs);
2794 txq->skbs = NULL;
2795
2796 /* deallocate arrays */
2797 kfree(txq->cmd);
2798 kfree(txq->meta);
2799 txq->cmd = NULL;
2800 txq->meta = NULL;
2801
2802 /* 0-fill queue descriptor structure */
2803 memset(txq, 0, sizeof(*txq));
2804 }
2805 EXPORT_SYMBOL(il_tx_queue_free);
2806
2807 /*
2808 * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
2809 */
2810 void
il_cmd_queue_unmap(struct il_priv * il)2811 il_cmd_queue_unmap(struct il_priv *il)
2812 {
2813 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2814 struct il_queue *q = &txq->q;
2815 int i;
2816
2817 if (q->n_bd == 0)
2818 return;
2819
2820 while (q->read_ptr != q->write_ptr) {
2821 i = il_get_cmd_idx(q, q->read_ptr, 0);
2822
2823 if (txq->meta[i].flags & CMD_MAPPED) {
2824 dma_unmap_single(&il->pci_dev->dev,
2825 dma_unmap_addr(&txq->meta[i], mapping),
2826 dma_unmap_len(&txq->meta[i], len),
2827 DMA_BIDIRECTIONAL);
2828 txq->meta[i].flags = 0;
2829 }
2830
2831 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2832 }
2833
2834 i = q->n_win;
2835 if (txq->meta[i].flags & CMD_MAPPED) {
2836 dma_unmap_single(&il->pci_dev->dev,
2837 dma_unmap_addr(&txq->meta[i], mapping),
2838 dma_unmap_len(&txq->meta[i], len),
2839 DMA_BIDIRECTIONAL);
2840 txq->meta[i].flags = 0;
2841 }
2842 }
2843 EXPORT_SYMBOL(il_cmd_queue_unmap);
2844
2845 /*
2846 * il_cmd_queue_free - Deallocate DMA queue.
2847 *
2848 * Empty queue by removing and destroying all BD's.
2849 * Free all buffers.
2850 * 0-fill, but do not free "txq" descriptor structure.
2851 */
2852 void
il_cmd_queue_free(struct il_priv * il)2853 il_cmd_queue_free(struct il_priv *il)
2854 {
2855 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2856 struct device *dev = &il->pci_dev->dev;
2857 int i;
2858
2859 il_cmd_queue_unmap(il);
2860
2861 /* De-alloc array of command/tx buffers */
2862 if (txq->cmd) {
2863 for (i = 0; i <= TFD_CMD_SLOTS; i++)
2864 kfree(txq->cmd[i]);
2865 }
2866
2867 /* De-alloc circular buffer of TFDs */
2868 if (txq->q.n_bd)
2869 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2870 txq->tfds, txq->q.dma_addr);
2871
2872 /* deallocate arrays */
2873 kfree(txq->cmd);
2874 kfree(txq->meta);
2875 txq->cmd = NULL;
2876 txq->meta = NULL;
2877
2878 /* 0-fill queue descriptor structure */
2879 memset(txq, 0, sizeof(*txq));
2880 }
2881 EXPORT_SYMBOL(il_cmd_queue_free);
2882
2883 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
2884 * DMA services
2885 *
2886 * Theory of operation
2887 *
2888 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
2889 * of buffer descriptors, each of which points to one or more data buffers for
2890 * the device to read from or fill. Driver and device exchange status of each
2891 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
2892 * entries in each circular buffer, to protect against confusing empty and full
2893 * queue states.
2894 *
2895 * The device reads or writes the data in the queues via the device's several
2896 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
2897 *
2898 * For Tx queue, there are low mark and high mark limits. If, after queuing
2899 * the packet for Tx, free space become < low mark, Tx queue stopped. When
2900 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
2901 * Tx queue resumed.
2902 *
2903 * See more detailed info in 4965.h.
2904 ***************************************************/
2905
2906 int
il_queue_space(const struct il_queue * q)2907 il_queue_space(const struct il_queue *q)
2908 {
2909 int s = q->read_ptr - q->write_ptr;
2910
2911 if (q->read_ptr > q->write_ptr)
2912 s -= q->n_bd;
2913
2914 if (s <= 0)
2915 s += q->n_win;
2916 /* keep some reserve to not confuse empty and full situations */
2917 s -= 2;
2918 if (s < 0)
2919 s = 0;
2920 return s;
2921 }
2922 EXPORT_SYMBOL(il_queue_space);
2923
2924
2925 /*
2926 * il_queue_init - Initialize queue's high/low-water and read/write idxes
2927 */
2928 static int
il_queue_init(struct il_priv * il,struct il_queue * q,int slots,u32 id)2929 il_queue_init(struct il_priv *il, struct il_queue *q, int slots, u32 id)
2930 {
2931 /*
2932 * TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
2933 * il_queue_inc_wrap and il_queue_dec_wrap are broken.
2934 */
2935 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
2936 /* FIXME: remove q->n_bd */
2937 q->n_bd = TFD_QUEUE_SIZE_MAX;
2938
2939 q->n_win = slots;
2940 q->id = id;
2941
2942 /* slots_must be power-of-two size, otherwise
2943 * il_get_cmd_idx is broken. */
2944 BUG_ON(!is_power_of_2(slots));
2945
2946 q->low_mark = q->n_win / 4;
2947 if (q->low_mark < 4)
2948 q->low_mark = 4;
2949
2950 q->high_mark = q->n_win / 8;
2951 if (q->high_mark < 2)
2952 q->high_mark = 2;
2953
2954 q->write_ptr = q->read_ptr = 0;
2955
2956 return 0;
2957 }
2958
2959 /*
2960 * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
2961 */
2962 static int
il_tx_queue_alloc(struct il_priv * il,struct il_tx_queue * txq,u32 id)2963 il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id)
2964 {
2965 struct device *dev = &il->pci_dev->dev;
2966 size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
2967
2968 /* Driver ilate data, only for Tx (not command) queues,
2969 * not shared with device. */
2970 if (id != il->cmd_queue) {
2971 txq->skbs = kzalloc_objs(struct sk_buff *, TFD_QUEUE_SIZE_MAX);
2972 if (!txq->skbs) {
2973 IL_ERR("Fail to alloc skbs\n");
2974 goto error;
2975 }
2976 } else
2977 txq->skbs = NULL;
2978
2979 /* Circular buffer of transmit frame descriptors (TFDs),
2980 * shared with device */
2981 txq->tfds =
2982 dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL);
2983 if (!txq->tfds)
2984 goto error;
2985
2986 txq->q.id = id;
2987
2988 return 0;
2989
2990 error:
2991 kfree(txq->skbs);
2992 txq->skbs = NULL;
2993
2994 return -ENOMEM;
2995 }
2996
2997 /*
2998 * il_tx_queue_init - Allocate and initialize one tx/cmd queue
2999 */
3000 int
il_tx_queue_init(struct il_priv * il,u32 txq_id)3001 il_tx_queue_init(struct il_priv *il, u32 txq_id)
3002 {
3003 int i, len, ret;
3004 int slots, actual_slots;
3005 struct il_tx_queue *txq = &il->txq[txq_id];
3006
3007 /*
3008 * Alloc buffer array for commands (Tx or other types of commands).
3009 * For the command queue (#4/#9), allocate command space + one big
3010 * command for scan, since scan command is very huge; the system will
3011 * not have two scans at the same time, so only one is needed.
3012 * For normal Tx queues (all other queues), no super-size command
3013 * space is needed.
3014 */
3015 if (txq_id == il->cmd_queue) {
3016 slots = TFD_CMD_SLOTS;
3017 actual_slots = slots + 1;
3018 } else {
3019 slots = TFD_TX_CMD_SLOTS;
3020 actual_slots = slots;
3021 }
3022
3023 txq->meta =
3024 kzalloc_objs(struct il_cmd_meta, actual_slots);
3025 txq->cmd =
3026 kzalloc_objs(struct il_device_cmd *, actual_slots);
3027
3028 if (!txq->meta || !txq->cmd)
3029 goto out_free_arrays;
3030
3031 len = sizeof(struct il_device_cmd);
3032 for (i = 0; i < actual_slots; i++) {
3033 /* only happens for cmd queue */
3034 if (i == slots)
3035 len = IL_MAX_CMD_SIZE;
3036
3037 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
3038 if (!txq->cmd[i])
3039 goto err;
3040 }
3041
3042 /* Alloc driver data array and TFD circular buffer */
3043 ret = il_tx_queue_alloc(il, txq, txq_id);
3044 if (ret)
3045 goto err;
3046
3047 txq->need_update = 0;
3048
3049 /*
3050 * For the default queues 0-3, set up the swq_id
3051 * already -- all others need to get one later
3052 * (if they need one at all).
3053 */
3054 if (txq_id < 4)
3055 il_set_swq_id(txq, txq_id, txq_id);
3056
3057 /* Initialize queue's high/low-water marks, and head/tail idxes */
3058 il_queue_init(il, &txq->q, slots, txq_id);
3059
3060 /* Tell device where to find queue */
3061 il->ops->txq_init(il, txq);
3062
3063 return 0;
3064 err:
3065 for (i = 0; i < actual_slots; i++)
3066 kfree(txq->cmd[i]);
3067 out_free_arrays:
3068 kfree(txq->meta);
3069 txq->meta = NULL;
3070 kfree(txq->cmd);
3071 txq->cmd = NULL;
3072
3073 return -ENOMEM;
3074 }
3075 EXPORT_SYMBOL(il_tx_queue_init);
3076
3077 void
il_tx_queue_reset(struct il_priv * il,u32 txq_id)3078 il_tx_queue_reset(struct il_priv *il, u32 txq_id)
3079 {
3080 int slots, actual_slots;
3081 struct il_tx_queue *txq = &il->txq[txq_id];
3082
3083 if (txq_id == il->cmd_queue) {
3084 slots = TFD_CMD_SLOTS;
3085 actual_slots = TFD_CMD_SLOTS + 1;
3086 } else {
3087 slots = TFD_TX_CMD_SLOTS;
3088 actual_slots = TFD_TX_CMD_SLOTS;
3089 }
3090
3091 memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
3092 txq->need_update = 0;
3093
3094 /* Initialize queue's high/low-water marks, and head/tail idxes */
3095 il_queue_init(il, &txq->q, slots, txq_id);
3096
3097 /* Tell device where to find queue */
3098 il->ops->txq_init(il, txq);
3099 }
3100 EXPORT_SYMBOL(il_tx_queue_reset);
3101
3102 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
3103
3104 /*
3105 * il_enqueue_hcmd - enqueue a uCode command
3106 * @il: device ilate data point
3107 * @cmd: a point to the ucode command structure
3108 *
3109 * The function returns < 0 values to indicate the operation is
3110 * failed. On success, it turns the idx (> 0) of command in the
3111 * command queue.
3112 */
3113 int
il_enqueue_hcmd(struct il_priv * il,struct il_host_cmd * cmd)3114 il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
3115 {
3116 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3117 struct il_queue *q = &txq->q;
3118 struct il_device_cmd *out_cmd;
3119 struct il_cmd_meta *out_meta;
3120 dma_addr_t phys_addr;
3121 unsigned long flags;
3122 u8 *out_payload;
3123 u32 idx;
3124 u16 fix_size;
3125
3126 cmd->len = il->ops->get_hcmd_size(cmd->id, cmd->len);
3127 fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr));
3128
3129 /* If any of the command structures end up being larger than
3130 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
3131 * we will need to increase the size of the TFD entries
3132 * Also, check to see if command buffer should not exceed the size
3133 * of device_cmd and max_cmd_size. */
3134 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
3135 !(cmd->flags & CMD_SIZE_HUGE));
3136 BUG_ON(fix_size > IL_MAX_CMD_SIZE);
3137
3138 if (il_is_rfkill(il) || il_is_ctkill(il)) {
3139 IL_WARN("Not sending command - %s KILL\n",
3140 il_is_rfkill(il) ? "RF" : "CT");
3141 return -EIO;
3142 }
3143
3144 spin_lock_irqsave(&il->hcmd_lock, flags);
3145
3146 if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
3147 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3148
3149 IL_ERR("Restarting adapter due to command queue full\n");
3150 queue_work(il->workqueue, &il->restart);
3151 return -ENOSPC;
3152 }
3153
3154 idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
3155 out_cmd = txq->cmd[idx];
3156 out_meta = &txq->meta[idx];
3157
3158 /* The payload is in the same place in regular and huge
3159 * command buffers, but we need to let the compiler know when
3160 * we're using a larger payload buffer to avoid "field-
3161 * spanning write" warnings at run-time for huge commands.
3162 */
3163 if (cmd->flags & CMD_SIZE_HUGE)
3164 out_payload = ((struct il_device_cmd_huge *)out_cmd)->cmd.payload;
3165 else
3166 out_payload = out_cmd->cmd.payload;
3167
3168 if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
3169 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3170 return -ENOSPC;
3171 }
3172
3173 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
3174 out_meta->flags = cmd->flags | CMD_MAPPED;
3175 if (cmd->flags & CMD_WANT_SKB)
3176 out_meta->source = cmd;
3177 if (cmd->flags & CMD_ASYNC)
3178 out_meta->callback = cmd->callback;
3179
3180 out_cmd->hdr.cmd = cmd->id;
3181 memcpy(out_payload, cmd->data, cmd->len);
3182
3183 /* At this point, the out_cmd now has all of the incoming cmd
3184 * information */
3185
3186 out_cmd->hdr.flags = 0;
3187 out_cmd->hdr.sequence =
3188 cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr));
3189 if (cmd->flags & CMD_SIZE_HUGE)
3190 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
3191
3192 #ifdef CONFIG_IWLEGACY_DEBUG
3193 switch (out_cmd->hdr.cmd) {
3194 case C_TX_LINK_QUALITY_CMD:
3195 case C_SENSITIVITY:
3196 D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, "
3197 "%d bytes at %d[%d]:%d\n",
3198 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3199 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
3200 q->write_ptr, idx, il->cmd_queue);
3201 break;
3202 default:
3203 D_HC("Sending command %s (#%x), seq: 0x%04X, "
3204 "%d bytes at %d[%d]:%d\n",
3205 il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3206 le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr,
3207 idx, il->cmd_queue);
3208 }
3209 #endif
3210
3211 phys_addr = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, fix_size,
3212 DMA_BIDIRECTIONAL);
3213 if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr))) {
3214 idx = -ENOMEM;
3215 goto out;
3216 }
3217 dma_unmap_addr_set(out_meta, mapping, phys_addr);
3218 dma_unmap_len_set(out_meta, len, fix_size);
3219
3220 txq->need_update = 1;
3221
3222 if (il->ops->txq_update_byte_cnt_tbl)
3223 /* Set up entry in queue's byte count circular buffer */
3224 il->ops->txq_update_byte_cnt_tbl(il, txq, 0);
3225
3226 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, 1,
3227 U32_PAD(cmd->len));
3228
3229 /* Increment and update queue's write idx */
3230 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
3231 il_txq_update_write_ptr(il, txq);
3232
3233 out:
3234 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3235 return idx;
3236 }
3237
3238 /*
3239 * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
3240 *
3241 * When FW advances 'R' idx, all entries between old and new 'R' idx
3242 * need to be reclaimed. As result, some free space forms. If there is
3243 * enough free space (> low mark), wake the stack that feeds us.
3244 */
3245 static void
il_hcmd_queue_reclaim(struct il_priv * il,int txq_id,int idx,int cmd_idx)3246 il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx)
3247 {
3248 struct il_tx_queue *txq = &il->txq[txq_id];
3249 struct il_queue *q = &txq->q;
3250 int nfreed = 0;
3251
3252 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
3253 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
3254 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
3255 q->write_ptr, q->read_ptr);
3256 return;
3257 }
3258
3259 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
3260 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3261
3262 if (nfreed++ > 0) {
3263 IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
3264 q->write_ptr, q->read_ptr);
3265 queue_work(il->workqueue, &il->restart);
3266 }
3267
3268 }
3269 }
3270
3271 /*
3272 * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3273 * @rxb: Rx buffer to reclaim
3274 *
3275 * If an Rx buffer has an async callback associated with it the callback
3276 * will be executed. The attached skb (if present) will only be freed
3277 * if the callback returns 1
3278 */
3279 void
il_tx_cmd_complete(struct il_priv * il,struct il_rx_buf * rxb)3280 il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
3281 {
3282 struct il_rx_pkt *pkt = rxb_addr(rxb);
3283 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3284 int txq_id = SEQ_TO_QUEUE(sequence);
3285 int idx = SEQ_TO_IDX(sequence);
3286 int cmd_idx;
3287 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3288 struct il_device_cmd *cmd;
3289 struct il_cmd_meta *meta;
3290 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3291 unsigned long flags;
3292
3293 /* If a Tx command is being handled and it isn't in the actual
3294 * command queue then there a command routing bug has been introduced
3295 * in the queue management code. */
3296 if (WARN
3297 (txq_id != il->cmd_queue,
3298 "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
3299 txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr,
3300 il->txq[il->cmd_queue].q.write_ptr)) {
3301 il_print_hex_error(il, pkt, 32);
3302 return;
3303 }
3304
3305 cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
3306 cmd = txq->cmd[cmd_idx];
3307 meta = &txq->meta[cmd_idx];
3308
3309 txq->time_stamp = jiffies;
3310
3311 dma_unmap_single(&il->pci_dev->dev, dma_unmap_addr(meta, mapping),
3312 dma_unmap_len(meta, len), DMA_BIDIRECTIONAL);
3313
3314 /* Input error checking is done when commands are added to queue. */
3315 if (meta->flags & CMD_WANT_SKB) {
3316 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
3317 rxb->page = NULL;
3318 } else if (meta->callback)
3319 meta->callback(il, cmd, pkt);
3320
3321 spin_lock_irqsave(&il->hcmd_lock, flags);
3322
3323 il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
3324
3325 if (!(meta->flags & CMD_ASYNC)) {
3326 clear_bit(S_HCMD_ACTIVE, &il->status);
3327 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
3328 il_get_cmd_string(cmd->hdr.cmd));
3329 wake_up(&il->wait_command_queue);
3330 }
3331
3332 /* Mark as unmapped */
3333 meta->flags = 0;
3334
3335 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3336 }
3337 EXPORT_SYMBOL(il_tx_cmd_complete);
3338
3339 MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
3340 MODULE_VERSION(IWLWIFI_VERSION);
3341 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
3342 MODULE_LICENSE("GPL");
3343
3344 /*
3345 * set bt_coex_active to true, uCode will do kill/defer
3346 * every time the priority line is asserted (BT is sending signals on the
3347 * priority line in the PCIx).
3348 * set bt_coex_active to false, uCode will ignore the BT activity and
3349 * perform the normal operation
3350 *
3351 * User might experience transmit issue on some platform due to WiFi/BT
3352 * co-exist problem. The possible behaviors are:
3353 * Able to scan and finding all the available AP
3354 * Not able to associate with any AP
3355 * On those platforms, WiFi communication can be restored by set
3356 * "bt_coex_active" module parameter to "false"
3357 *
3358 * default: bt_coex_active = true (BT_COEX_ENABLE)
3359 */
3360 static bool bt_coex_active = true;
3361 module_param(bt_coex_active, bool, 0444);
3362 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
3363
3364 u32 il_debug_level;
3365 EXPORT_SYMBOL(il_debug_level);
3366
3367 const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3368 EXPORT_SYMBOL(il_bcast_addr);
3369
3370 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
3371 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
3372 static void
il_init_ht_hw_capab(const struct il_priv * il,struct ieee80211_sta_ht_cap * ht_info,enum nl80211_band band)3373 il_init_ht_hw_capab(const struct il_priv *il,
3374 struct ieee80211_sta_ht_cap *ht_info,
3375 enum nl80211_band band)
3376 {
3377 u16 max_bit_rate = 0;
3378 u8 rx_chains_num = il->hw_params.rx_chains_num;
3379 u8 tx_chains_num = il->hw_params.tx_chains_num;
3380
3381 ht_info->cap = 0;
3382 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
3383
3384 ht_info->ht_supported = true;
3385
3386 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
3387 max_bit_rate = MAX_BIT_RATE_20_MHZ;
3388 if (il->hw_params.ht40_channel & BIT(band)) {
3389 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
3390 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
3391 ht_info->mcs.rx_mask[4] = 0x01;
3392 max_bit_rate = MAX_BIT_RATE_40_MHZ;
3393 }
3394
3395 if (il->cfg->mod_params->amsdu_size_8K)
3396 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
3397
3398 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3399 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3400
3401 ht_info->mcs.rx_mask[0] = 0xFF;
3402 if (rx_chains_num >= 2)
3403 ht_info->mcs.rx_mask[1] = 0xFF;
3404 if (rx_chains_num >= 3)
3405 ht_info->mcs.rx_mask[2] = 0xFF;
3406
3407 /* Highest supported Rx data rate */
3408 max_bit_rate *= rx_chains_num;
3409 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
3410 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
3411
3412 /* Tx MCS capabilities */
3413 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3414 if (tx_chains_num != rx_chains_num) {
3415 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
3416 ht_info->mcs.tx_params |=
3417 ((tx_chains_num -
3418 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
3419 }
3420 }
3421
3422 /*
3423 * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
3424 */
3425 int
il_init_geos(struct il_priv * il)3426 il_init_geos(struct il_priv *il)
3427 {
3428 struct il_channel_info *ch;
3429 struct ieee80211_supported_band *sband;
3430 struct ieee80211_channel *channels;
3431 struct ieee80211_channel *geo_ch;
3432 struct ieee80211_rate *rates;
3433 int i = 0;
3434 s8 max_tx_power = 0;
3435
3436 if (il->bands[NL80211_BAND_2GHZ].n_bitrates ||
3437 il->bands[NL80211_BAND_5GHZ].n_bitrates) {
3438 D_INFO("Geography modes already initialized.\n");
3439 set_bit(S_GEO_CONFIGURED, &il->status);
3440 return 0;
3441 }
3442
3443 channels =
3444 kzalloc_objs(struct ieee80211_channel, il->channel_count);
3445 if (!channels)
3446 return -ENOMEM;
3447
3448 rates = kzalloc_objs(*rates, RATE_COUNT_LEGACY);
3449 if (!rates) {
3450 kfree(channels);
3451 return -ENOMEM;
3452 }
3453
3454 /* 5.2GHz channels start after the 2.4GHz channels */
3455 sband = &il->bands[NL80211_BAND_5GHZ];
3456 sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
3457 /* just OFDM */
3458 sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
3459 sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
3460
3461 if (il->cfg->sku & IL_SKU_N)
3462 il_init_ht_hw_capab(il, &sband->ht_cap, NL80211_BAND_5GHZ);
3463
3464 sband = &il->bands[NL80211_BAND_2GHZ];
3465 sband->channels = channels;
3466 /* OFDM & CCK */
3467 sband->bitrates = rates;
3468 sband->n_bitrates = RATE_COUNT_LEGACY;
3469
3470 if (il->cfg->sku & IL_SKU_N)
3471 il_init_ht_hw_capab(il, &sband->ht_cap, NL80211_BAND_2GHZ);
3472
3473 il->ieee_channels = channels;
3474 il->ieee_rates = rates;
3475
3476 for (i = 0; i < il->channel_count; i++) {
3477 ch = &il->channel_info[i];
3478
3479 if (!il_is_channel_valid(ch))
3480 continue;
3481
3482 sband = &il->bands[ch->band];
3483
3484 geo_ch = &sband->channels[sband->n_channels++];
3485
3486 geo_ch->center_freq =
3487 ieee80211_channel_to_frequency(ch->channel, ch->band);
3488 geo_ch->max_power = ch->max_power_avg;
3489 geo_ch->max_antenna_gain = 0xff;
3490 geo_ch->hw_value = ch->channel;
3491
3492 if (il_is_channel_valid(ch)) {
3493 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
3494 geo_ch->flags |= IEEE80211_CHAN_NO_IR;
3495
3496 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
3497 geo_ch->flags |= IEEE80211_CHAN_NO_IR;
3498
3499 if (ch->flags & EEPROM_CHANNEL_RADAR)
3500 geo_ch->flags |= IEEE80211_CHAN_RADAR;
3501
3502 geo_ch->flags |= ch->ht40_extension_channel;
3503
3504 if (ch->max_power_avg > max_tx_power)
3505 max_tx_power = ch->max_power_avg;
3506 } else {
3507 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
3508 }
3509
3510 D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel,
3511 geo_ch->center_freq,
3512 il_is_channel_a_band(ch) ? "5.2" : "2.4",
3513 geo_ch->
3514 flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid",
3515 geo_ch->flags);
3516 }
3517
3518 il->tx_power_device_lmt = max_tx_power;
3519 il->tx_power_user_lmt = max_tx_power;
3520 il->tx_power_next = max_tx_power;
3521
3522 if (il->bands[NL80211_BAND_5GHZ].n_channels == 0 &&
3523 (il->cfg->sku & IL_SKU_A)) {
3524 IL_INFO("Incorrectly detected BG card as ABG. "
3525 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
3526 il->pci_dev->device, il->pci_dev->subsystem_device);
3527 il->cfg->sku &= ~IL_SKU_A;
3528 }
3529
3530 IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
3531 il->bands[NL80211_BAND_2GHZ].n_channels,
3532 il->bands[NL80211_BAND_5GHZ].n_channels);
3533
3534 set_bit(S_GEO_CONFIGURED, &il->status);
3535
3536 return 0;
3537 }
3538 EXPORT_SYMBOL(il_init_geos);
3539
3540 /*
3541 * il_free_geos - undo allocations in il_init_geos
3542 */
3543 void
il_free_geos(struct il_priv * il)3544 il_free_geos(struct il_priv *il)
3545 {
3546 kfree(il->ieee_channels);
3547 kfree(il->ieee_rates);
3548 clear_bit(S_GEO_CONFIGURED, &il->status);
3549 }
3550 EXPORT_SYMBOL(il_free_geos);
3551
3552 static bool
il_is_channel_extension(struct il_priv * il,enum nl80211_band band,u16 channel,u8 extension_chan_offset)3553 il_is_channel_extension(struct il_priv *il, enum nl80211_band band,
3554 u16 channel, u8 extension_chan_offset)
3555 {
3556 const struct il_channel_info *ch_info;
3557
3558 ch_info = il_get_channel_info(il, band, channel);
3559 if (!il_is_channel_valid(ch_info))
3560 return false;
3561
3562 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
3563 return !(ch_info->
3564 ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS);
3565 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
3566 return !(ch_info->
3567 ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS);
3568
3569 return false;
3570 }
3571
3572 bool
il_is_ht40_tx_allowed(struct il_priv * il,struct ieee80211_sta_ht_cap * ht_cap)3573 il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap)
3574 {
3575 if (!il->ht.enabled || !il->ht.is_40mhz)
3576 return false;
3577
3578 /*
3579 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
3580 * the bit will not set if it is pure 40MHz case
3581 */
3582 if (ht_cap && !ht_cap->ht_supported)
3583 return false;
3584
3585 #ifdef CONFIG_IWLEGACY_DEBUGFS
3586 if (il->disable_ht40)
3587 return false;
3588 #endif
3589
3590 return il_is_channel_extension(il, il->band,
3591 le16_to_cpu(il->staging.channel),
3592 il->ht.extension_chan_offset);
3593 }
3594 EXPORT_SYMBOL(il_is_ht40_tx_allowed);
3595
3596 static u16 noinline
il_adjust_beacon_interval(u16 beacon_val,u16 max_beacon_val)3597 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
3598 {
3599 u16 new_val;
3600 u16 beacon_factor;
3601
3602 /*
3603 * If mac80211 hasn't given us a beacon interval, program
3604 * the default into the device.
3605 */
3606 if (!beacon_val)
3607 return DEFAULT_BEACON_INTERVAL;
3608
3609 /*
3610 * If the beacon interval we obtained from the peer
3611 * is too large, we'll have to wake up more often
3612 * (and in IBSS case, we'll beacon too much)
3613 *
3614 * For example, if max_beacon_val is 4096, and the
3615 * requested beacon interval is 7000, we'll have to
3616 * use 3500 to be able to wake up on the beacons.
3617 *
3618 * This could badly influence beacon detection stats.
3619 */
3620
3621 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
3622 new_val = beacon_val / beacon_factor;
3623
3624 if (!new_val)
3625 new_val = max_beacon_val;
3626
3627 return new_val;
3628 }
3629
3630 int
il_send_rxon_timing(struct il_priv * il)3631 il_send_rxon_timing(struct il_priv *il)
3632 {
3633 u64 tsf;
3634 s32 interval_tm, rem;
3635 struct ieee80211_conf *conf = NULL;
3636 u16 beacon_int;
3637 struct ieee80211_vif *vif = il->vif;
3638
3639 conf = &il->hw->conf;
3640
3641 lockdep_assert_held(&il->mutex);
3642
3643 memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd));
3644
3645 il->timing.timestamp = cpu_to_le64(il->timestamp);
3646 il->timing.listen_interval = cpu_to_le16(conf->listen_interval);
3647
3648 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
3649
3650 /*
3651 * TODO: For IBSS we need to get atim_win from mac80211,
3652 * for now just always use 0
3653 */
3654 il->timing.atim_win = 0;
3655
3656 beacon_int =
3657 il_adjust_beacon_interval(beacon_int,
3658 il->hw_params.max_beacon_itrvl *
3659 TIME_UNIT);
3660 il->timing.beacon_interval = cpu_to_le16(beacon_int);
3661
3662 tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
3663 interval_tm = beacon_int * TIME_UNIT;
3664 rem = do_div(tsf, interval_tm);
3665 il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
3666
3667 il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1;
3668
3669 D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
3670 le16_to_cpu(il->timing.beacon_interval),
3671 le32_to_cpu(il->timing.beacon_init_val),
3672 le16_to_cpu(il->timing.atim_win));
3673
3674 return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing),
3675 &il->timing);
3676 }
3677 EXPORT_SYMBOL(il_send_rxon_timing);
3678
3679 void
il_set_rxon_hwcrypto(struct il_priv * il,int hw_decrypt)3680 il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt)
3681 {
3682 struct il_rxon_cmd *rxon = &il->staging;
3683
3684 if (hw_decrypt)
3685 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
3686 else
3687 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
3688
3689 }
3690 EXPORT_SYMBOL(il_set_rxon_hwcrypto);
3691
3692 /* validate RXON structure is valid */
3693 int
il_check_rxon_cmd(struct il_priv * il)3694 il_check_rxon_cmd(struct il_priv *il)
3695 {
3696 struct il_rxon_cmd *rxon = &il->staging;
3697 bool error = false;
3698
3699 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
3700 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
3701 IL_WARN("check 2.4G: wrong narrow\n");
3702 error = true;
3703 }
3704 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
3705 IL_WARN("check 2.4G: wrong radar\n");
3706 error = true;
3707 }
3708 } else {
3709 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
3710 IL_WARN("check 5.2G: not short slot!\n");
3711 error = true;
3712 }
3713 if (rxon->flags & RXON_FLG_CCK_MSK) {
3714 IL_WARN("check 5.2G: CCK!\n");
3715 error = true;
3716 }
3717 }
3718 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
3719 IL_WARN("mac/bssid mcast!\n");
3720 error = true;
3721 }
3722
3723 /* make sure basic rates 6Mbps and 1Mbps are supported */
3724 if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
3725 (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
3726 IL_WARN("neither 1 nor 6 are basic\n");
3727 error = true;
3728 }
3729
3730 if (le16_to_cpu(rxon->assoc_id) > 2007) {
3731 IL_WARN("aid > 2007\n");
3732 error = true;
3733 }
3734
3735 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) ==
3736 (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
3737 IL_WARN("CCK and short slot\n");
3738 error = true;
3739 }
3740
3741 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) ==
3742 (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
3743 IL_WARN("CCK and auto detect");
3744 error = true;
3745 }
3746
3747 if ((rxon->
3748 flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) ==
3749 RXON_FLG_TGG_PROTECT_MSK) {
3750 IL_WARN("TGg but no auto-detect\n");
3751 error = true;
3752 }
3753
3754 if (error)
3755 IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel));
3756
3757 if (error) {
3758 IL_ERR("Invalid RXON\n");
3759 return -EINVAL;
3760 }
3761 return 0;
3762 }
3763 EXPORT_SYMBOL(il_check_rxon_cmd);
3764
3765 /*
3766 * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
3767 * @il: staging_rxon is compared to active_rxon
3768 *
3769 * If the RXON structure is changing enough to require a new tune,
3770 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
3771 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
3772 */
3773 int
il_full_rxon_required(struct il_priv * il)3774 il_full_rxon_required(struct il_priv *il)
3775 {
3776 const struct il_rxon_cmd *staging = &il->staging;
3777 const struct il_rxon_cmd *active = &il->active;
3778
3779 #define CHK(cond) \
3780 if ((cond)) { \
3781 D_INFO("need full RXON - " #cond "\n"); \
3782 return 1; \
3783 }
3784
3785 #define CHK_NEQ(c1, c2) \
3786 if ((c1) != (c2)) { \
3787 D_INFO("need full RXON - " \
3788 #c1 " != " #c2 " - %d != %d\n", \
3789 (c1), (c2)); \
3790 return 1; \
3791 }
3792
3793 /* These items are only settable from the full RXON command */
3794 CHK(!il_is_associated(il));
3795 CHK(!ether_addr_equal_64bits(staging->bssid_addr, active->bssid_addr));
3796 CHK(!ether_addr_equal_64bits(staging->node_addr, active->node_addr));
3797 CHK(!ether_addr_equal_64bits(staging->wlap_bssid_addr,
3798 active->wlap_bssid_addr));
3799 CHK_NEQ(staging->dev_type, active->dev_type);
3800 CHK_NEQ(staging->channel, active->channel);
3801 CHK_NEQ(staging->air_propagation, active->air_propagation);
3802 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
3803 active->ofdm_ht_single_stream_basic_rates);
3804 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
3805 active->ofdm_ht_dual_stream_basic_rates);
3806 CHK_NEQ(staging->assoc_id, active->assoc_id);
3807
3808 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
3809 * be updated with the RXON_ASSOC command -- however only some
3810 * flag transitions are allowed using RXON_ASSOC */
3811
3812 /* Check if we are not switching bands */
3813 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
3814 active->flags & RXON_FLG_BAND_24G_MSK);
3815
3816 /* Check if we are switching association toggle */
3817 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
3818 active->filter_flags & RXON_FILTER_ASSOC_MSK);
3819
3820 #undef CHK
3821 #undef CHK_NEQ
3822
3823 return 0;
3824 }
3825 EXPORT_SYMBOL(il_full_rxon_required);
3826
3827 u8
il_get_lowest_plcp(struct il_priv * il)3828 il_get_lowest_plcp(struct il_priv *il)
3829 {
3830 /*
3831 * Assign the lowest rate -- should really get this from
3832 * the beacon skb from mac80211.
3833 */
3834 if (il->staging.flags & RXON_FLG_BAND_24G_MSK)
3835 return RATE_1M_PLCP;
3836 else
3837 return RATE_6M_PLCP;
3838 }
3839 EXPORT_SYMBOL(il_get_lowest_plcp);
3840
3841 static void
_il_set_rxon_ht(struct il_priv * il,struct il_ht_config * ht_conf)3842 _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3843 {
3844 struct il_rxon_cmd *rxon = &il->staging;
3845
3846 if (!il->ht.enabled) {
3847 rxon->flags &=
3848 ~(RXON_FLG_CHANNEL_MODE_MSK |
3849 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK
3850 | RXON_FLG_HT_PROT_MSK);
3851 return;
3852 }
3853
3854 rxon->flags |=
3855 cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
3856
3857 /* Set up channel bandwidth:
3858 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
3859 /* clear the HT channel mode before set the mode */
3860 rxon->flags &=
3861 ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3862 if (il_is_ht40_tx_allowed(il, NULL)) {
3863 /* pure ht40 */
3864 if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
3865 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
3866 /* Note: control channel is opposite of extension channel */
3867 switch (il->ht.extension_chan_offset) {
3868 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3869 rxon->flags &=
3870 ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3871 break;
3872 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3873 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3874 break;
3875 }
3876 } else {
3877 /* Note: control channel is opposite of extension channel */
3878 switch (il->ht.extension_chan_offset) {
3879 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3880 rxon->flags &=
3881 ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3882 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3883 break;
3884 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3885 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3886 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3887 break;
3888 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
3889 default:
3890 /* channel location only valid if in Mixed mode */
3891 IL_ERR("invalid extension channel offset\n");
3892 break;
3893 }
3894 }
3895 } else {
3896 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
3897 }
3898
3899 if (il->ops->set_rxon_chain)
3900 il->ops->set_rxon_chain(il);
3901
3902 D_ASSOC("rxon flags 0x%X operation mode :0x%X "
3903 "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags),
3904 il->ht.protection, il->ht.extension_chan_offset);
3905 }
3906
3907 void
il_set_rxon_ht(struct il_priv * il,struct il_ht_config * ht_conf)3908 il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3909 {
3910 _il_set_rxon_ht(il, ht_conf);
3911 }
3912 EXPORT_SYMBOL(il_set_rxon_ht);
3913
3914 /*
3915 * il_set_rxon_channel - Set the band and channel values in staging RXON
3916 * @ch: requested channel as a pointer to struct ieee80211_channel
3917
3918 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3919 * in the staging RXON flag structure based on the ch->band
3920 */
3921 int
il_set_rxon_channel(struct il_priv * il,struct ieee80211_channel * ch)3922 il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch)
3923 {
3924 enum nl80211_band band = ch->band;
3925 u16 channel = ch->hw_value;
3926
3927 if (le16_to_cpu(il->staging.channel) == channel && il->band == band)
3928 return 0;
3929
3930 il->staging.channel = cpu_to_le16(channel);
3931 if (band == NL80211_BAND_5GHZ)
3932 il->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
3933 else
3934 il->staging.flags |= RXON_FLG_BAND_24G_MSK;
3935
3936 il->band = band;
3937
3938 D_INFO("Staging channel set to %d [%d]\n", channel, band);
3939
3940 return 0;
3941 }
3942 EXPORT_SYMBOL(il_set_rxon_channel);
3943
3944 void
il_set_flags_for_band(struct il_priv * il,enum nl80211_band band,struct ieee80211_vif * vif)3945 il_set_flags_for_band(struct il_priv *il, enum nl80211_band band,
3946 struct ieee80211_vif *vif)
3947 {
3948 if (band == NL80211_BAND_5GHZ) {
3949 il->staging.flags &=
3950 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
3951 RXON_FLG_CCK_MSK);
3952 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3953 } else {
3954 /* Copied from il_post_associate() */
3955 if (vif && vif->bss_conf.use_short_slot)
3956 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3957 else
3958 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3959
3960 il->staging.flags |= RXON_FLG_BAND_24G_MSK;
3961 il->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
3962 il->staging.flags &= ~RXON_FLG_CCK_MSK;
3963 }
3964 }
3965 EXPORT_SYMBOL(il_set_flags_for_band);
3966
3967 /*
3968 * initialize rxon structure with default values from eeprom
3969 */
3970 void
il_connection_init_rx_config(struct il_priv * il)3971 il_connection_init_rx_config(struct il_priv *il)
3972 {
3973 const struct il_channel_info *ch_info;
3974
3975 memset(&il->staging, 0, sizeof(il->staging));
3976
3977 switch (il->iw_mode) {
3978 case NL80211_IFTYPE_UNSPECIFIED:
3979 il->staging.dev_type = RXON_DEV_TYPE_ESS;
3980 break;
3981 case NL80211_IFTYPE_STATION:
3982 il->staging.dev_type = RXON_DEV_TYPE_ESS;
3983 il->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
3984 break;
3985 case NL80211_IFTYPE_ADHOC:
3986 il->staging.dev_type = RXON_DEV_TYPE_IBSS;
3987 il->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
3988 il->staging.filter_flags =
3989 RXON_FILTER_BCON_AWARE_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
3990 break;
3991 default:
3992 IL_ERR("Unsupported interface type %d\n", il->vif->type);
3993 return;
3994 }
3995
3996 #if 0
3997 /* TODO: Figure out when short_preamble would be set and cache from
3998 * that */
3999 if (!hw_to_local(il->hw)->short_preamble)
4000 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
4001 else
4002 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
4003 #endif
4004
4005 ch_info =
4006 il_get_channel_info(il, il->band, le16_to_cpu(il->active.channel));
4007
4008 if (!ch_info)
4009 ch_info = &il->channel_info[0];
4010
4011 il->staging.channel = cpu_to_le16(ch_info->channel);
4012 il->band = ch_info->band;
4013
4014 il_set_flags_for_band(il, il->band, il->vif);
4015
4016 il->staging.ofdm_basic_rates =
4017 (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
4018 il->staging.cck_basic_rates =
4019 (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
4020
4021 /* clear both MIX and PURE40 mode flag */
4022 il->staging.flags &=
4023 ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40);
4024 if (il->vif)
4025 memcpy(il->staging.node_addr, il->vif->addr, ETH_ALEN);
4026
4027 il->staging.ofdm_ht_single_stream_basic_rates = 0xff;
4028 il->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
4029 }
4030 EXPORT_SYMBOL(il_connection_init_rx_config);
4031
4032 void
il_set_rate(struct il_priv * il)4033 il_set_rate(struct il_priv *il)
4034 {
4035 const struct ieee80211_supported_band *hw = NULL;
4036 struct ieee80211_rate *rate;
4037 int i;
4038
4039 hw = il_get_hw_mode(il, il->band);
4040 if (!hw) {
4041 IL_ERR("Failed to set rate: unable to get hw mode\n");
4042 return;
4043 }
4044
4045 il->active_rate = 0;
4046
4047 for (i = 0; i < hw->n_bitrates; i++) {
4048 rate = &(hw->bitrates[i]);
4049 if (rate->hw_value < RATE_COUNT_LEGACY)
4050 il->active_rate |= (1 << rate->hw_value);
4051 }
4052
4053 D_RATE("Set active_rate = %0x\n", il->active_rate);
4054
4055 il->staging.cck_basic_rates =
4056 (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
4057
4058 il->staging.ofdm_basic_rates =
4059 (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
4060 }
4061 EXPORT_SYMBOL(il_set_rate);
4062
4063 void
il_chswitch_done(struct il_priv * il,bool is_success)4064 il_chswitch_done(struct il_priv *il, bool is_success)
4065 {
4066 if (test_bit(S_EXIT_PENDING, &il->status))
4067 return;
4068
4069 if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4070 ieee80211_chswitch_done(il->vif, is_success, 0);
4071 }
4072 EXPORT_SYMBOL(il_chswitch_done);
4073
4074 void
il_hdl_csa(struct il_priv * il,struct il_rx_buf * rxb)4075 il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
4076 {
4077 struct il_rx_pkt *pkt = rxb_addr(rxb);
4078 struct il_csa_notification *csa = &(pkt->u.csa_notif);
4079 struct il_rxon_cmd *rxon = (void *)&il->active;
4080
4081 if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4082 return;
4083
4084 if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
4085 rxon->channel = csa->channel;
4086 il->staging.channel = csa->channel;
4087 D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel));
4088 il_chswitch_done(il, true);
4089 } else {
4090 IL_ERR("CSA notif (fail) : channel %d\n",
4091 le16_to_cpu(csa->channel));
4092 il_chswitch_done(il, false);
4093 }
4094 }
4095 EXPORT_SYMBOL(il_hdl_csa);
4096
4097 #ifdef CONFIG_IWLEGACY_DEBUG
4098 void
il_print_rx_config_cmd(struct il_priv * il)4099 il_print_rx_config_cmd(struct il_priv *il)
4100 {
4101 struct il_rxon_cmd *rxon = &il->staging;
4102
4103 D_RADIO("RX CONFIG:\n");
4104 il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4105 D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4106 D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4107 D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags));
4108 D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4109 D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates);
4110 D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4111 D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
4112 D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
4113 D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4114 }
4115 EXPORT_SYMBOL(il_print_rx_config_cmd);
4116 #endif
4117 /*
4118 * il_irq_handle_error - called for HW or SW error interrupt from card
4119 */
4120 void
il_irq_handle_error(struct il_priv * il)4121 il_irq_handle_error(struct il_priv *il)
4122 {
4123 /* Set the FW error flag -- cleared on il_down */
4124 set_bit(S_FW_ERROR, &il->status);
4125
4126 /* Cancel currently queued command. */
4127 clear_bit(S_HCMD_ACTIVE, &il->status);
4128
4129 IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version);
4130
4131 il->ops->dump_nic_error_log(il);
4132 if (il->ops->dump_fh)
4133 il->ops->dump_fh(il, NULL, false);
4134 #ifdef CONFIG_IWLEGACY_DEBUG
4135 if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
4136 il_print_rx_config_cmd(il);
4137 #endif
4138
4139 wake_up(&il->wait_command_queue);
4140
4141 /* Keep the restart process from trying to send host
4142 * commands by clearing the INIT status bit */
4143 clear_bit(S_READY, &il->status);
4144
4145 if (!test_bit(S_EXIT_PENDING, &il->status)) {
4146 IL_DBG(IL_DL_FW_ERRORS,
4147 "Restarting adapter due to uCode error.\n");
4148
4149 if (il->cfg->mod_params->restart_fw)
4150 queue_work(il->workqueue, &il->restart);
4151 }
4152 }
4153 EXPORT_SYMBOL(il_irq_handle_error);
4154
4155 static int
_il_apm_stop_master(struct il_priv * il)4156 _il_apm_stop_master(struct il_priv *il)
4157 {
4158 int ret = 0;
4159
4160 /* stop device's busmaster DMA activity */
4161 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
4162
4163 ret =
4164 _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
4165 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
4166 if (ret < 0)
4167 IL_WARN("Master Disable Timed Out, 100 usec\n");
4168
4169 D_INFO("stop master\n");
4170
4171 return ret;
4172 }
4173
4174 void
_il_apm_stop(struct il_priv * il)4175 _il_apm_stop(struct il_priv *il)
4176 {
4177 lockdep_assert_held(&il->reg_lock);
4178
4179 D_INFO("Stop card, put in low power state\n");
4180
4181 /* Stop device's DMA activity */
4182 _il_apm_stop_master(il);
4183
4184 /* Reset the entire device */
4185 _il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
4186
4187 udelay(10);
4188
4189 /*
4190 * Clear "initialization complete" bit to move adapter from
4191 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
4192 */
4193 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4194 }
4195 EXPORT_SYMBOL(_il_apm_stop);
4196
4197 void
il_apm_stop(struct il_priv * il)4198 il_apm_stop(struct il_priv *il)
4199 {
4200 unsigned long flags;
4201
4202 spin_lock_irqsave(&il->reg_lock, flags);
4203 _il_apm_stop(il);
4204 spin_unlock_irqrestore(&il->reg_lock, flags);
4205 }
4206 EXPORT_SYMBOL(il_apm_stop);
4207
4208 /*
4209 * Start up NIC's basic functionality after it has been reset
4210 * (e.g. after platform boot, or shutdown via il_apm_stop())
4211 * NOTE: This does not load uCode nor start the embedded processor
4212 */
4213 int
il_apm_init(struct il_priv * il)4214 il_apm_init(struct il_priv *il)
4215 {
4216 int ret = 0;
4217 u16 lctl;
4218
4219 D_INFO("Init card's basic functions\n");
4220
4221 /*
4222 * Use "set_bit" below rather than "write", to preserve any hardware
4223 * bits already set by default after reset.
4224 */
4225
4226 /* Disable L0S exit timer (platform NMI Work/Around) */
4227 il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4228 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
4229
4230 /*
4231 * Disable L0s without affecting L1;
4232 * don't wait for ICH L0s (ICH bug W/A)
4233 */
4234 il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4235 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
4236
4237 /* Set FH wait threshold to maximum (HW error during stress W/A) */
4238 il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
4239
4240 /*
4241 * Enable HAP INTA (interrupt from management bus) to
4242 * wake device's PCI Express link L1a -> L0s
4243 * NOTE: This is no-op for 3945 (non-existent bit)
4244 */
4245 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
4246 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
4247
4248 /*
4249 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
4250 * Check if BIOS (or OS) enabled L1-ASPM on this device.
4251 * If so (likely), disable L0S, so device moves directly L0->L1;
4252 * costs negligible amount of power savings.
4253 * If not (unlikely), enable L0S, so there is at least some
4254 * power savings, even without L1.
4255 */
4256 if (il->cfg->set_l0s) {
4257 ret = pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
4258 if (!ret && (lctl & PCI_EXP_LNKCTL_ASPM_L1)) {
4259 /* L1-ASPM enabled; disable(!) L0S */
4260 il_set_bit(il, CSR_GIO_REG,
4261 CSR_GIO_REG_VAL_L0S_ENABLED);
4262 D_POWER("L1 Enabled; Disabling L0S\n");
4263 } else {
4264 /* L1-ASPM disabled; enable(!) L0S */
4265 il_clear_bit(il, CSR_GIO_REG,
4266 CSR_GIO_REG_VAL_L0S_ENABLED);
4267 D_POWER("L1 Disabled; Enabling L0S\n");
4268 }
4269 }
4270
4271 /* Configure analog phase-lock-loop before activating to D0A */
4272 if (il->cfg->pll_cfg_val)
4273 il_set_bit(il, CSR_ANA_PLL_CFG,
4274 il->cfg->pll_cfg_val);
4275
4276 /*
4277 * Set "initialization complete" bit to move adapter from
4278 * D0U* --> D0A* (powered-up active) state.
4279 */
4280 il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4281
4282 /*
4283 * Wait for clock stabilization; once stabilized, access to
4284 * device-internal resources is supported, e.g. il_wr_prph()
4285 * and accesses to uCode SRAM.
4286 */
4287 ret =
4288 _il_poll_bit(il, CSR_GP_CNTRL,
4289 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
4290 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
4291 if (ret < 0) {
4292 D_INFO("Failed to init the card\n");
4293 goto out;
4294 }
4295
4296 /*
4297 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
4298 * BSM (Boostrap State Machine) is only in 3945 and 4965.
4299 *
4300 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
4301 * do not disable clocks. This preserves any hardware bits already
4302 * set by default in "CLK_CTRL_REG" after reset.
4303 */
4304 if (il->cfg->use_bsm)
4305 il_wr_prph(il, APMG_CLK_EN_REG,
4306 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
4307 else
4308 il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
4309 udelay(20);
4310
4311 /* Disable L1-Active */
4312 il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
4313 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
4314
4315 out:
4316 return ret;
4317 }
4318 EXPORT_SYMBOL(il_apm_init);
4319
4320 int
il_set_tx_power(struct il_priv * il,s8 tx_power,bool force)4321 il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
4322 {
4323 int ret;
4324 s8 prev_tx_power;
4325 bool defer;
4326
4327 lockdep_assert_held(&il->mutex);
4328
4329 if (il->tx_power_user_lmt == tx_power && !force)
4330 return 0;
4331
4332 if (!il->ops->send_tx_power)
4333 return -EOPNOTSUPP;
4334
4335 /* 0 dBm mean 1 milliwatt */
4336 if (tx_power < 0) {
4337 IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power);
4338 return -EINVAL;
4339 }
4340
4341 if (tx_power > il->tx_power_device_lmt) {
4342 IL_WARN("Requested user TXPOWER %d above upper limit %d.\n",
4343 tx_power, il->tx_power_device_lmt);
4344 return -EINVAL;
4345 }
4346
4347 if (!il_is_ready_rf(il))
4348 return -EIO;
4349
4350 /* scan complete and commit_rxon use tx_power_next value,
4351 * it always need to be updated for newest request */
4352 il->tx_power_next = tx_power;
4353
4354 /* do not set tx power when scanning or channel changing */
4355 defer = test_bit(S_SCANNING, &il->status) ||
4356 memcmp(&il->active, &il->staging, sizeof(il->staging));
4357 if (defer && !force) {
4358 D_INFO("Deferring tx power set\n");
4359 return 0;
4360 }
4361
4362 prev_tx_power = il->tx_power_user_lmt;
4363 il->tx_power_user_lmt = tx_power;
4364
4365 ret = il->ops->send_tx_power(il);
4366
4367 /* if fail to set tx_power, restore the orig. tx power */
4368 if (ret) {
4369 il->tx_power_user_lmt = prev_tx_power;
4370 il->tx_power_next = prev_tx_power;
4371 }
4372 return ret;
4373 }
4374 EXPORT_SYMBOL(il_set_tx_power);
4375
4376 void
il_send_bt_config(struct il_priv * il)4377 il_send_bt_config(struct il_priv *il)
4378 {
4379 struct il_bt_cmd bt_cmd = {
4380 .lead_time = BT_LEAD_TIME_DEF,
4381 .max_kill = BT_MAX_KILL_DEF,
4382 .kill_ack_mask = 0,
4383 .kill_cts_mask = 0,
4384 };
4385
4386 if (!bt_coex_active)
4387 bt_cmd.flags = BT_COEX_DISABLE;
4388 else
4389 bt_cmd.flags = BT_COEX_ENABLE;
4390
4391 D_INFO("BT coex %s\n",
4392 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
4393
4394 if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd))
4395 IL_ERR("failed to send BT Coex Config\n");
4396 }
4397 EXPORT_SYMBOL(il_send_bt_config);
4398
4399 int
il_send_stats_request(struct il_priv * il,u8 flags,bool clear)4400 il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
4401 {
4402 struct il_stats_cmd stats_cmd = {
4403 .configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0,
4404 };
4405
4406 if (flags & CMD_ASYNC)
4407 return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd),
4408 &stats_cmd, NULL);
4409 else
4410 return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd),
4411 &stats_cmd);
4412 }
4413 EXPORT_SYMBOL(il_send_stats_request);
4414
4415 void
il_hdl_pm_sleep(struct il_priv * il,struct il_rx_buf * rxb)4416 il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb)
4417 {
4418 #ifdef CONFIG_IWLEGACY_DEBUG
4419 struct il_rx_pkt *pkt = rxb_addr(rxb);
4420 struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
4421 D_RX("sleep mode: %d, src: %d\n",
4422 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
4423 #endif
4424 }
4425 EXPORT_SYMBOL(il_hdl_pm_sleep);
4426
4427 void
il_hdl_pm_debug_stats(struct il_priv * il,struct il_rx_buf * rxb)4428 il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb)
4429 {
4430 struct il_rx_pkt *pkt = rxb_addr(rxb);
4431 u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4432 D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len,
4433 il_get_cmd_string(pkt->hdr.cmd));
4434 il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
4435 }
4436 EXPORT_SYMBOL(il_hdl_pm_debug_stats);
4437
4438 void
il_hdl_error(struct il_priv * il,struct il_rx_buf * rxb)4439 il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb)
4440 {
4441 struct il_rx_pkt *pkt = rxb_addr(rxb);
4442
4443 IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
4444 "seq 0x%04X ser 0x%08X\n",
4445 le32_to_cpu(pkt->u.err_resp.error_type),
4446 il_get_cmd_string(pkt->u.err_resp.cmd_id),
4447 pkt->u.err_resp.cmd_id,
4448 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
4449 le32_to_cpu(pkt->u.err_resp.error_info));
4450 }
4451 EXPORT_SYMBOL(il_hdl_error);
4452
4453 void
il_clear_isr_stats(struct il_priv * il)4454 il_clear_isr_stats(struct il_priv *il)
4455 {
4456 memset(&il->isr_stats, 0, sizeof(il->isr_stats));
4457 }
4458
4459 int
il_mac_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,unsigned int link_id,u16 queue,const struct ieee80211_tx_queue_params * params)4460 il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4461 unsigned int link_id, u16 queue,
4462 const struct ieee80211_tx_queue_params *params)
4463 {
4464 struct il_priv *il = hw->priv;
4465 unsigned long flags;
4466 int q;
4467
4468 D_MAC80211("enter\n");
4469
4470 if (!il_is_ready_rf(il)) {
4471 D_MAC80211("leave - RF not ready\n");
4472 return -EIO;
4473 }
4474
4475 if (queue >= AC_NUM) {
4476 D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
4477 return 0;
4478 }
4479
4480 q = AC_NUM - 1 - queue;
4481
4482 spin_lock_irqsave(&il->lock, flags);
4483
4484 il->qos_data.def_qos_parm.ac[q].cw_min =
4485 cpu_to_le16(params->cw_min);
4486 il->qos_data.def_qos_parm.ac[q].cw_max =
4487 cpu_to_le16(params->cw_max);
4488 il->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4489 il->qos_data.def_qos_parm.ac[q].edca_txop =
4490 cpu_to_le16((params->txop * 32));
4491
4492 il->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4493
4494 spin_unlock_irqrestore(&il->lock, flags);
4495
4496 D_MAC80211("leave\n");
4497 return 0;
4498 }
4499 EXPORT_SYMBOL(il_mac_conf_tx);
4500
4501 int
il_mac_tx_last_beacon(struct ieee80211_hw * hw)4502 il_mac_tx_last_beacon(struct ieee80211_hw *hw)
4503 {
4504 struct il_priv *il = hw->priv;
4505 int ret;
4506
4507 D_MAC80211("enter\n");
4508
4509 ret = (il->ibss_manager == IL_IBSS_MANAGER);
4510
4511 D_MAC80211("leave ret %d\n", ret);
4512 return ret;
4513 }
4514 EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
4515
4516 static int
il_set_mode(struct il_priv * il)4517 il_set_mode(struct il_priv *il)
4518 {
4519 il_connection_init_rx_config(il);
4520
4521 if (il->ops->set_rxon_chain)
4522 il->ops->set_rxon_chain(il);
4523
4524 return il_commit_rxon(il);
4525 }
4526
4527 int
il_mac_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)4528 il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4529 {
4530 struct il_priv *il = hw->priv;
4531 int err;
4532 bool reset;
4533
4534 mutex_lock(&il->mutex);
4535 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
4536
4537 if (!il_is_ready_rf(il)) {
4538 IL_WARN("Try to add interface when device not ready\n");
4539 err = -EINVAL;
4540 goto out;
4541 }
4542
4543 /*
4544 * We do not support multiple virtual interfaces, but on hardware reset
4545 * we have to add the same interface again.
4546 */
4547 reset = (il->vif == vif);
4548 if (il->vif && !reset) {
4549 err = -EOPNOTSUPP;
4550 goto out;
4551 }
4552
4553 il->vif = vif;
4554 il->iw_mode = vif->type;
4555
4556 err = il_set_mode(il);
4557 if (err) {
4558 IL_WARN("Fail to set mode %d\n", vif->type);
4559 if (!reset) {
4560 il->vif = NULL;
4561 il->iw_mode = NL80211_IFTYPE_STATION;
4562 }
4563 }
4564
4565 out:
4566 D_MAC80211("leave err %d\n", err);
4567 mutex_unlock(&il->mutex);
4568
4569 return err;
4570 }
4571 EXPORT_SYMBOL(il_mac_add_interface);
4572
4573 static void
il_teardown_interface(struct il_priv * il,struct ieee80211_vif * vif)4574 il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif)
4575 {
4576 lockdep_assert_held(&il->mutex);
4577
4578 if (il->scan_vif == vif) {
4579 il_scan_cancel_timeout(il, 200);
4580 il_force_scan_end(il);
4581 }
4582
4583 il_set_mode(il);
4584 }
4585
4586 void
il_mac_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)4587 il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4588 {
4589 struct il_priv *il = hw->priv;
4590
4591 mutex_lock(&il->mutex);
4592 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
4593
4594 WARN_ON(il->vif != vif);
4595 il->vif = NULL;
4596 il->iw_mode = NL80211_IFTYPE_UNSPECIFIED;
4597 il_teardown_interface(il, vif);
4598 eth_zero_addr(il->bssid);
4599
4600 D_MAC80211("leave\n");
4601 mutex_unlock(&il->mutex);
4602 }
4603 EXPORT_SYMBOL(il_mac_remove_interface);
4604
4605 int
il_alloc_txq_mem(struct il_priv * il)4606 il_alloc_txq_mem(struct il_priv *il)
4607 {
4608 if (!il->txq)
4609 il->txq =
4610 kzalloc_objs(struct il_tx_queue, il->cfg->num_of_queues);
4611 if (!il->txq) {
4612 IL_ERR("Not enough memory for txq\n");
4613 return -ENOMEM;
4614 }
4615 return 0;
4616 }
4617 EXPORT_SYMBOL(il_alloc_txq_mem);
4618
4619 void
il_free_txq_mem(struct il_priv * il)4620 il_free_txq_mem(struct il_priv *il)
4621 {
4622 kfree(il->txq);
4623 il->txq = NULL;
4624 }
4625 EXPORT_SYMBOL(il_free_txq_mem);
4626
4627 int
il_force_reset(struct il_priv * il,bool external)4628 il_force_reset(struct il_priv *il, bool external)
4629 {
4630 struct il_force_reset *force_reset;
4631
4632 if (test_bit(S_EXIT_PENDING, &il->status))
4633 return -EINVAL;
4634
4635 force_reset = &il->force_reset;
4636 force_reset->reset_request_count++;
4637 if (!external) {
4638 if (force_reset->last_force_reset_jiffies &&
4639 time_after(force_reset->last_force_reset_jiffies +
4640 force_reset->reset_duration, jiffies)) {
4641 D_INFO("force reset rejected\n");
4642 force_reset->reset_reject_count++;
4643 return -EAGAIN;
4644 }
4645 }
4646 force_reset->reset_success_count++;
4647 force_reset->last_force_reset_jiffies = jiffies;
4648
4649 /*
4650 * if the request is from external(ex: debugfs),
4651 * then always perform the request in regardless the module
4652 * parameter setting
4653 * if the request is from internal (uCode error or driver
4654 * detect failure), then fw_restart module parameter
4655 * need to be check before performing firmware reload
4656 */
4657
4658 if (!external && !il->cfg->mod_params->restart_fw) {
4659 D_INFO("Cancel firmware reload based on "
4660 "module parameter setting\n");
4661 return 0;
4662 }
4663
4664 IL_ERR("On demand firmware reload\n");
4665
4666 /* Set the FW error flag -- cleared on il_down */
4667 set_bit(S_FW_ERROR, &il->status);
4668 wake_up(&il->wait_command_queue);
4669 /*
4670 * Keep the restart process from trying to send host
4671 * commands by clearing the INIT status bit
4672 */
4673 clear_bit(S_READY, &il->status);
4674 queue_work(il->workqueue, &il->restart);
4675
4676 return 0;
4677 }
4678 EXPORT_SYMBOL(il_force_reset);
4679
4680 int
il_mac_change_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif,enum nl80211_iftype newtype,bool newp2p)4681 il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4682 enum nl80211_iftype newtype, bool newp2p)
4683 {
4684 struct il_priv *il = hw->priv;
4685 int err;
4686
4687 mutex_lock(&il->mutex);
4688 D_MAC80211("enter: type %d, addr %pM newtype %d newp2p %d\n",
4689 vif->type, vif->addr, newtype, newp2p);
4690
4691 if (newp2p) {
4692 err = -EOPNOTSUPP;
4693 goto out;
4694 }
4695
4696 if (!il->vif || !il_is_ready_rf(il)) {
4697 /*
4698 * Huh? But wait ... this can maybe happen when
4699 * we're in the middle of a firmware restart!
4700 */
4701 err = -EBUSY;
4702 goto out;
4703 }
4704
4705 /* success */
4706 vif->type = newtype;
4707 vif->p2p = false;
4708 il->iw_mode = newtype;
4709 il_teardown_interface(il, vif);
4710 err = 0;
4711
4712 out:
4713 D_MAC80211("leave err %d\n", err);
4714 mutex_unlock(&il->mutex);
4715
4716 return err;
4717 }
4718 EXPORT_SYMBOL(il_mac_change_interface);
4719
il_mac_flush(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u32 queues,bool drop)4720 void il_mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4721 u32 queues, bool drop)
4722 {
4723 struct il_priv *il = hw->priv;
4724 unsigned long timeout = jiffies + msecs_to_jiffies(500);
4725 int i;
4726
4727 mutex_lock(&il->mutex);
4728 D_MAC80211("enter\n");
4729
4730 if (il->txq == NULL)
4731 goto out;
4732
4733 for (i = 0; i < il->hw_params.max_txq_num; i++) {
4734 struct il_queue *q;
4735
4736 if (i == il->cmd_queue)
4737 continue;
4738
4739 q = &il->txq[i].q;
4740 if (q->read_ptr == q->write_ptr)
4741 continue;
4742
4743 if (time_after(jiffies, timeout)) {
4744 IL_ERR("Failed to flush queue %d\n", q->id);
4745 break;
4746 }
4747
4748 msleep(20);
4749 }
4750 out:
4751 D_MAC80211("leave\n");
4752 mutex_unlock(&il->mutex);
4753 }
4754 EXPORT_SYMBOL(il_mac_flush);
4755
4756 /*
4757 * On every watchdog tick we check (latest) time stamp. If it does not
4758 * change during timeout period and queue is not empty we reset firmware.
4759 */
4760 static int
il_check_stuck_queue(struct il_priv * il,int cnt)4761 il_check_stuck_queue(struct il_priv *il, int cnt)
4762 {
4763 struct il_tx_queue *txq = &il->txq[cnt];
4764 struct il_queue *q = &txq->q;
4765 unsigned long timeout;
4766 unsigned long now = jiffies;
4767 int ret;
4768
4769 if (q->read_ptr == q->write_ptr) {
4770 txq->time_stamp = now;
4771 return 0;
4772 }
4773
4774 timeout =
4775 txq->time_stamp +
4776 msecs_to_jiffies(il->cfg->wd_timeout);
4777
4778 if (time_after(now, timeout)) {
4779 IL_ERR("Queue %d stuck for %u ms.\n", q->id,
4780 jiffies_to_msecs(now - txq->time_stamp));
4781 ret = il_force_reset(il, false);
4782 return (ret == -EAGAIN) ? 0 : 1;
4783 }
4784
4785 return 0;
4786 }
4787
4788 /*
4789 * Making watchdog tick be a quarter of timeout assure we will
4790 * discover the queue hung between timeout and 1.25*timeout
4791 */
4792 #define IL_WD_TICK(timeout) ((timeout) / 4)
4793
4794 /*
4795 * Watchdog timer callback, we check each tx queue for stuck, if hung
4796 * we reset the firmware. If everything is fine just rearm the timer.
4797 */
4798 void
il_bg_watchdog(struct timer_list * t)4799 il_bg_watchdog(struct timer_list *t)
4800 {
4801 struct il_priv *il = timer_container_of(il, t, watchdog);
4802 int cnt;
4803 unsigned long timeout;
4804
4805 if (test_bit(S_EXIT_PENDING, &il->status))
4806 return;
4807
4808 timeout = il->cfg->wd_timeout;
4809 if (timeout == 0)
4810 return;
4811
4812 /* monitor and check for stuck cmd queue */
4813 if (il_check_stuck_queue(il, il->cmd_queue))
4814 return;
4815
4816 /* monitor and check for other stuck queues */
4817 for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
4818 /* skip as we already checked the command queue */
4819 if (cnt == il->cmd_queue)
4820 continue;
4821 if (il_check_stuck_queue(il, cnt))
4822 return;
4823 }
4824
4825 mod_timer(&il->watchdog,
4826 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
4827 }
4828 EXPORT_SYMBOL(il_bg_watchdog);
4829
4830 void
il_setup_watchdog(struct il_priv * il)4831 il_setup_watchdog(struct il_priv *il)
4832 {
4833 unsigned int timeout = il->cfg->wd_timeout;
4834
4835 if (timeout)
4836 mod_timer(&il->watchdog,
4837 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
4838 else
4839 timer_delete(&il->watchdog);
4840 }
4841 EXPORT_SYMBOL(il_setup_watchdog);
4842
4843 /*
4844 * extended beacon time format
4845 * time in usec will be changed into a 32-bit value in extended:internal format
4846 * the extended part is the beacon counts
4847 * the internal part is the time in usec within one beacon interval
4848 */
4849 u32
il_usecs_to_beacons(struct il_priv * il,u32 usec,u32 beacon_interval)4850 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval)
4851 {
4852 u32 quot;
4853 u32 rem;
4854 u32 interval = beacon_interval * TIME_UNIT;
4855
4856 if (!interval || !usec)
4857 return 0;
4858
4859 quot =
4860 (usec /
4861 interval) & (il_beacon_time_mask_high(il,
4862 il->hw_params.
4863 beacon_time_tsf_bits) >> il->
4864 hw_params.beacon_time_tsf_bits);
4865 rem =
4866 (usec % interval) & il_beacon_time_mask_low(il,
4867 il->hw_params.
4868 beacon_time_tsf_bits);
4869
4870 return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
4871 }
4872 EXPORT_SYMBOL(il_usecs_to_beacons);
4873
4874 /* base is usually what we get from ucode with each received frame,
4875 * the same as HW timer counter counting down
4876 */
4877 __le32
il_add_beacon_time(struct il_priv * il,u32 base,u32 addon,u32 beacon_interval)4878 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
4879 u32 beacon_interval)
4880 {
4881 u32 base_low = base & il_beacon_time_mask_low(il,
4882 il->hw_params.
4883 beacon_time_tsf_bits);
4884 u32 addon_low = addon & il_beacon_time_mask_low(il,
4885 il->hw_params.
4886 beacon_time_tsf_bits);
4887 u32 interval = beacon_interval * TIME_UNIT;
4888 u32 res = (base & il_beacon_time_mask_high(il,
4889 il->hw_params.
4890 beacon_time_tsf_bits)) +
4891 (addon & il_beacon_time_mask_high(il,
4892 il->hw_params.
4893 beacon_time_tsf_bits));
4894
4895 if (base_low > addon_low)
4896 res += base_low - addon_low;
4897 else if (base_low < addon_low) {
4898 res += interval + base_low - addon_low;
4899 res += (1 << il->hw_params.beacon_time_tsf_bits);
4900 } else
4901 res += (1 << il->hw_params.beacon_time_tsf_bits);
4902
4903 return cpu_to_le32(res);
4904 }
4905 EXPORT_SYMBOL(il_add_beacon_time);
4906
4907 #ifdef CONFIG_PM_SLEEP
4908
4909 static int
il_pci_suspend(struct device * device)4910 il_pci_suspend(struct device *device)
4911 {
4912 struct il_priv *il = dev_get_drvdata(device);
4913
4914 /*
4915 * This function is called when system goes into suspend state
4916 * mac80211 will call il_mac_stop() from the mac80211 suspend function
4917 * first but since il_mac_stop() has no knowledge of who the caller is,
4918 * it will not call apm_ops.stop() to stop the DMA operation.
4919 * Calling apm_ops.stop here to make sure we stop the DMA.
4920 */
4921 il_apm_stop(il);
4922
4923 return 0;
4924 }
4925
4926 static int
il_pci_resume(struct device * device)4927 il_pci_resume(struct device *device)
4928 {
4929 struct pci_dev *pdev = to_pci_dev(device);
4930 struct il_priv *il = pci_get_drvdata(pdev);
4931 bool hw_rfkill = false;
4932
4933 /*
4934 * We disable the RETRY_TIMEOUT register (0x41) to keep
4935 * PCI Tx retries from interfering with C3 CPU state.
4936 */
4937 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4938
4939 _il_wr(il, CSR_INT, 0xffffffff);
4940 _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff);
4941 il_enable_interrupts(il);
4942
4943 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4944 hw_rfkill = true;
4945
4946 if (hw_rfkill)
4947 set_bit(S_RFKILL, &il->status);
4948 else
4949 clear_bit(S_RFKILL, &il->status);
4950
4951 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
4952
4953 return 0;
4954 }
4955
4956 SIMPLE_DEV_PM_OPS(il_pm_ops, il_pci_suspend, il_pci_resume);
4957 EXPORT_SYMBOL(il_pm_ops);
4958
4959 #endif /* CONFIG_PM_SLEEP */
4960
4961 static void
il_update_qos(struct il_priv * il)4962 il_update_qos(struct il_priv *il)
4963 {
4964 if (test_bit(S_EXIT_PENDING, &il->status))
4965 return;
4966
4967 il->qos_data.def_qos_parm.qos_flags = 0;
4968
4969 if (il->qos_data.qos_active)
4970 il->qos_data.def_qos_parm.qos_flags |=
4971 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
4972
4973 if (il->ht.enabled)
4974 il->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
4975
4976 D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
4977 il->qos_data.qos_active, il->qos_data.def_qos_parm.qos_flags);
4978
4979 il_send_cmd_pdu_async(il, C_QOS_PARAM, sizeof(struct il_qosparam_cmd),
4980 &il->qos_data.def_qos_parm, NULL);
4981 }
4982
4983 /*
4984 * il_mac_config - mac80211 config callback
4985 */
4986 int
il_mac_config(struct ieee80211_hw * hw,int radio_idx,u32 changed)4987 il_mac_config(struct ieee80211_hw *hw, int radio_idx, u32 changed)
4988 {
4989 struct il_priv *il = hw->priv;
4990 const struct il_channel_info *ch_info;
4991 struct ieee80211_conf *conf = &hw->conf;
4992 struct ieee80211_channel *channel = conf->chandef.chan;
4993 struct il_ht_config *ht_conf = &il->current_ht_config;
4994 unsigned long flags = 0;
4995 int ret = 0;
4996 u16 ch;
4997 int scan_active = 0;
4998 bool ht_changed = false;
4999
5000 mutex_lock(&il->mutex);
5001 D_MAC80211("enter: channel %d changed 0x%X\n", channel->hw_value,
5002 changed);
5003
5004 if (unlikely(test_bit(S_SCANNING, &il->status))) {
5005 scan_active = 1;
5006 D_MAC80211("scan active\n");
5007 }
5008
5009 if (changed &
5010 (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) {
5011 /* mac80211 uses static for non-HT which is what we want */
5012 il->current_ht_config.smps = conf->smps_mode;
5013
5014 /*
5015 * Recalculate chain counts.
5016 *
5017 * If monitor mode is enabled then mac80211 will
5018 * set up the SM PS mode to OFF if an HT channel is
5019 * configured.
5020 */
5021 if (il->ops->set_rxon_chain)
5022 il->ops->set_rxon_chain(il);
5023 }
5024
5025 /* during scanning mac80211 will delay channel setting until
5026 * scan finish with changed = 0
5027 */
5028 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
5029
5030 if (scan_active)
5031 goto set_ch_out;
5032
5033 ch = channel->hw_value;
5034 ch_info = il_get_channel_info(il, channel->band, ch);
5035 if (!il_is_channel_valid(ch_info)) {
5036 D_MAC80211("leave - invalid channel\n");
5037 ret = -EINVAL;
5038 goto set_ch_out;
5039 }
5040
5041 if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
5042 !il_is_channel_ibss(ch_info)) {
5043 D_MAC80211("leave - not IBSS channel\n");
5044 ret = -EINVAL;
5045 goto set_ch_out;
5046 }
5047
5048 spin_lock_irqsave(&il->lock, flags);
5049
5050 /* Configure HT40 channels */
5051 if (il->ht.enabled != conf_is_ht(conf)) {
5052 il->ht.enabled = conf_is_ht(conf);
5053 ht_changed = true;
5054 }
5055 if (il->ht.enabled) {
5056 if (conf_is_ht40_minus(conf)) {
5057 il->ht.extension_chan_offset =
5058 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
5059 il->ht.is_40mhz = true;
5060 } else if (conf_is_ht40_plus(conf)) {
5061 il->ht.extension_chan_offset =
5062 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
5063 il->ht.is_40mhz = true;
5064 } else {
5065 il->ht.extension_chan_offset =
5066 IEEE80211_HT_PARAM_CHA_SEC_NONE;
5067 il->ht.is_40mhz = false;
5068 }
5069 } else
5070 il->ht.is_40mhz = false;
5071
5072 /*
5073 * Default to no protection. Protection mode will
5074 * later be set from BSS config in il_ht_conf
5075 */
5076 il->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
5077
5078 /* if we are switching from ht to 2.4 clear flags
5079 * from any ht related info since 2.4 does not
5080 * support ht */
5081 if ((le16_to_cpu(il->staging.channel) != ch))
5082 il->staging.flags = 0;
5083
5084 il_set_rxon_channel(il, channel);
5085 il_set_rxon_ht(il, ht_conf);
5086
5087 il_set_flags_for_band(il, channel->band, il->vif);
5088
5089 spin_unlock_irqrestore(&il->lock, flags);
5090
5091 if (il->ops->update_bcast_stations)
5092 ret = il->ops->update_bcast_stations(il);
5093
5094 set_ch_out:
5095 /* The list of supported rates and rate mask can be different
5096 * for each band; since the band may have changed, reset
5097 * the rate mask to what mac80211 lists */
5098 il_set_rate(il);
5099 }
5100
5101 if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) {
5102 il->power_data.ps_disabled = !(conf->flags & IEEE80211_CONF_PS);
5103 if (!il->power_data.ps_disabled)
5104 IL_WARN_ONCE("Enabling power save might cause firmware crashes\n");
5105 ret = il_power_update_mode(il, false);
5106 if (ret)
5107 D_MAC80211("Error setting sleep level\n");
5108 }
5109
5110 if (changed & IEEE80211_CONF_CHANGE_POWER) {
5111 D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt,
5112 conf->power_level);
5113
5114 il_set_tx_power(il, conf->power_level, false);
5115 }
5116
5117 if (!il_is_ready(il)) {
5118 D_MAC80211("leave - not ready\n");
5119 goto out;
5120 }
5121
5122 if (scan_active)
5123 goto out;
5124
5125 if (memcmp(&il->active, &il->staging, sizeof(il->staging)))
5126 il_commit_rxon(il);
5127 else
5128 D_INFO("Not re-sending same RXON configuration.\n");
5129 if (ht_changed)
5130 il_update_qos(il);
5131
5132 out:
5133 D_MAC80211("leave ret %d\n", ret);
5134 mutex_unlock(&il->mutex);
5135
5136 return ret;
5137 }
5138 EXPORT_SYMBOL(il_mac_config);
5139
5140 void
il_mac_reset_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif)5141 il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
5142 {
5143 struct il_priv *il = hw->priv;
5144 unsigned long flags;
5145
5146 mutex_lock(&il->mutex);
5147 D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
5148
5149 spin_lock_irqsave(&il->lock, flags);
5150
5151 memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
5152
5153 /* new association get rid of ibss beacon skb */
5154 dev_consume_skb_irq(il->beacon_skb);
5155 il->beacon_skb = NULL;
5156 il->timestamp = 0;
5157
5158 spin_unlock_irqrestore(&il->lock, flags);
5159
5160 il_scan_cancel_timeout(il, 100);
5161 if (!il_is_ready_rf(il)) {
5162 D_MAC80211("leave - not ready\n");
5163 mutex_unlock(&il->mutex);
5164 return;
5165 }
5166
5167 /* we are restarting association process */
5168 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5169 il_commit_rxon(il);
5170
5171 il_set_rate(il);
5172
5173 D_MAC80211("leave\n");
5174 mutex_unlock(&il->mutex);
5175 }
5176 EXPORT_SYMBOL(il_mac_reset_tsf);
5177
5178 static void
il_ht_conf(struct il_priv * il,struct ieee80211_vif * vif)5179 il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif)
5180 {
5181 struct il_ht_config *ht_conf = &il->current_ht_config;
5182 struct ieee80211_sta *sta;
5183 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5184
5185 D_ASSOC("enter:\n");
5186
5187 if (!il->ht.enabled)
5188 return;
5189
5190 il->ht.protection =
5191 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5192 il->ht.non_gf_sta_present =
5193 !!(bss_conf->
5194 ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5195
5196 ht_conf->single_chain_sufficient = false;
5197
5198 switch (vif->type) {
5199 case NL80211_IFTYPE_STATION:
5200 rcu_read_lock();
5201 sta = ieee80211_find_sta(vif, bss_conf->bssid);
5202 if (sta) {
5203 struct ieee80211_sta_ht_cap *ht_cap = &sta->deflink.ht_cap;
5204 int maxstreams;
5205
5206 maxstreams =
5207 (ht_cap->mcs.
5208 tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
5209 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
5210 maxstreams += 1;
5211
5212 if (ht_cap->mcs.rx_mask[1] == 0 &&
5213 ht_cap->mcs.rx_mask[2] == 0)
5214 ht_conf->single_chain_sufficient = true;
5215 if (maxstreams <= 1)
5216 ht_conf->single_chain_sufficient = true;
5217 } else {
5218 /*
5219 * If at all, this can only happen through a race
5220 * when the AP disconnects us while we're still
5221 * setting up the connection, in that case mac80211
5222 * will soon tell us about that.
5223 */
5224 ht_conf->single_chain_sufficient = true;
5225 }
5226 rcu_read_unlock();
5227 break;
5228 case NL80211_IFTYPE_ADHOC:
5229 ht_conf->single_chain_sufficient = true;
5230 break;
5231 default:
5232 break;
5233 }
5234
5235 D_ASSOC("leave\n");
5236 }
5237
5238 static inline void
il_set_no_assoc(struct il_priv * il,struct ieee80211_vif * vif)5239 il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif)
5240 {
5241 /*
5242 * inform the ucode that there is no longer an
5243 * association and that no more packets should be
5244 * sent
5245 */
5246 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5247 il->staging.assoc_id = 0;
5248 il_commit_rxon(il);
5249 }
5250
5251 static void
il_beacon_update(struct ieee80211_hw * hw,struct ieee80211_vif * vif)5252 il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
5253 {
5254 struct il_priv *il = hw->priv;
5255 unsigned long flags;
5256 __le64 timestamp;
5257 struct sk_buff *skb = ieee80211_beacon_get(hw, vif, 0);
5258
5259 if (!skb)
5260 return;
5261
5262 D_MAC80211("enter\n");
5263
5264 lockdep_assert_held(&il->mutex);
5265
5266 if (!il->beacon_enabled) {
5267 IL_ERR("update beacon with no beaconing enabled\n");
5268 dev_kfree_skb(skb);
5269 return;
5270 }
5271
5272 spin_lock_irqsave(&il->lock, flags);
5273 dev_consume_skb_irq(il->beacon_skb);
5274 il->beacon_skb = skb;
5275
5276 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
5277 il->timestamp = le64_to_cpu(timestamp);
5278
5279 D_MAC80211("leave\n");
5280 spin_unlock_irqrestore(&il->lock, flags);
5281
5282 if (!il_is_ready_rf(il)) {
5283 D_MAC80211("leave - RF not ready\n");
5284 return;
5285 }
5286
5287 il->ops->post_associate(il);
5288 }
5289
5290 void
il_mac_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * bss_conf,u64 changes)5291 il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5292 struct ieee80211_bss_conf *bss_conf, u64 changes)
5293 {
5294 struct il_priv *il = hw->priv;
5295 int ret;
5296
5297 mutex_lock(&il->mutex);
5298 D_MAC80211("enter: changes 0x%llx\n", changes);
5299
5300 if (!il_is_alive(il)) {
5301 D_MAC80211("leave - not alive\n");
5302 mutex_unlock(&il->mutex);
5303 return;
5304 }
5305
5306 if (changes & BSS_CHANGED_QOS) {
5307 unsigned long flags;
5308
5309 spin_lock_irqsave(&il->lock, flags);
5310 il->qos_data.qos_active = bss_conf->qos;
5311 il_update_qos(il);
5312 spin_unlock_irqrestore(&il->lock, flags);
5313 }
5314
5315 if (changes & BSS_CHANGED_BEACON_ENABLED) {
5316 /* FIXME: can we remove beacon_enabled ? */
5317 if (vif->bss_conf.enable_beacon)
5318 il->beacon_enabled = true;
5319 else
5320 il->beacon_enabled = false;
5321 }
5322
5323 if (changes & BSS_CHANGED_BSSID) {
5324 D_MAC80211("BSSID %pM\n", bss_conf->bssid);
5325
5326 /*
5327 * On passive channel we wait with blocked queues to see if
5328 * there is traffic on that channel. If no frame will be
5329 * received (what is very unlikely since scan detects AP on
5330 * that channel, but theoretically possible), mac80211 associate
5331 * procedure will time out and mac80211 will call us with NULL
5332 * bssid. We have to unblock queues on such condition.
5333 */
5334 if (is_zero_ether_addr(bss_conf->bssid))
5335 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE);
5336
5337 /*
5338 * If there is currently a HW scan going on in the background,
5339 * then we need to cancel it, otherwise sometimes we are not
5340 * able to authenticate (FIXME: why ?)
5341 */
5342 if (il_scan_cancel_timeout(il, 100)) {
5343 D_MAC80211("leave - scan abort failed\n");
5344 mutex_unlock(&il->mutex);
5345 return;
5346 }
5347
5348 /* mac80211 only sets assoc when in STATION mode */
5349 memcpy(il->staging.bssid_addr, bss_conf->bssid, ETH_ALEN);
5350
5351 /* FIXME: currently needed in a few places */
5352 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5353 }
5354
5355 /*
5356 * This needs to be after setting the BSSID in case
5357 * mac80211 decides to do both changes at once because
5358 * it will invoke post_associate.
5359 */
5360 if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
5361 il_beacon_update(hw, vif);
5362
5363 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
5364 D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble);
5365 if (bss_conf->use_short_preamble)
5366 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5367 else
5368 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5369 }
5370
5371 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
5372 D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
5373 if (bss_conf->use_cts_prot && il->band != NL80211_BAND_5GHZ)
5374 il->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5375 else
5376 il->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
5377 if (bss_conf->use_cts_prot)
5378 il->staging.flags |= RXON_FLG_SELF_CTS_EN;
5379 else
5380 il->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5381 }
5382
5383 if (changes & BSS_CHANGED_BASIC_RATES) {
5384 /* XXX use this information
5385 *
5386 * To do that, remove code from il_set_rate() and put something
5387 * like this here:
5388 *
5389 if (A-band)
5390 il->staging.ofdm_basic_rates =
5391 bss_conf->basic_rates;
5392 else
5393 il->staging.ofdm_basic_rates =
5394 bss_conf->basic_rates >> 4;
5395 il->staging.cck_basic_rates =
5396 bss_conf->basic_rates & 0xF;
5397 */
5398 }
5399
5400 if (changes & BSS_CHANGED_HT) {
5401 il_ht_conf(il, vif);
5402
5403 if (il->ops->set_rxon_chain)
5404 il->ops->set_rxon_chain(il);
5405 }
5406
5407 if (changes & BSS_CHANGED_ASSOC) {
5408 D_MAC80211("ASSOC %d\n", vif->cfg.assoc);
5409 if (vif->cfg.assoc) {
5410 il->timestamp = bss_conf->sync_tsf;
5411
5412 if (!il_is_rfkill(il))
5413 il->ops->post_associate(il);
5414 } else
5415 il_set_no_assoc(il, vif);
5416 }
5417
5418 if (changes && il_is_associated(il) && vif->cfg.aid) {
5419 D_MAC80211("Changes (%#llx) while associated\n", changes);
5420 ret = il_send_rxon_assoc(il);
5421 if (!ret) {
5422 /* Sync active_rxon with latest change. */
5423 memcpy((void *)&il->active, &il->staging,
5424 sizeof(struct il_rxon_cmd));
5425 }
5426 }
5427
5428 if (changes & BSS_CHANGED_BEACON_ENABLED) {
5429 if (vif->bss_conf.enable_beacon) {
5430 memcpy(il->staging.bssid_addr, bss_conf->bssid,
5431 ETH_ALEN);
5432 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5433 il->ops->config_ap(il);
5434 } else
5435 il_set_no_assoc(il, vif);
5436 }
5437
5438 if (changes & BSS_CHANGED_IBSS) {
5439 ret = il->ops->manage_ibss_station(il, vif,
5440 vif->cfg.ibss_joined);
5441 if (ret)
5442 IL_ERR("failed to %s IBSS station %pM\n",
5443 vif->cfg.ibss_joined ? "add" : "remove",
5444 bss_conf->bssid);
5445 }
5446
5447 D_MAC80211("leave\n");
5448 mutex_unlock(&il->mutex);
5449 }
5450 EXPORT_SYMBOL(il_mac_bss_info_changed);
5451
5452 irqreturn_t
il_isr(int irq,void * data)5453 il_isr(int irq, void *data)
5454 {
5455 struct il_priv *il = data;
5456 u32 inta, inta_mask;
5457 u32 inta_fh;
5458 unsigned long flags;
5459 if (!il)
5460 return IRQ_NONE;
5461
5462 spin_lock_irqsave(&il->lock, flags);
5463
5464 /* Disable (but don't clear!) interrupts here to avoid
5465 * back-to-back ISRs and sporadic interrupts from our NIC.
5466 * If we have something to service, the tasklet will re-enable ints.
5467 * If we *don't* have something, we'll re-enable before leaving here. */
5468 inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
5469 _il_wr(il, CSR_INT_MASK, 0x00000000);
5470
5471 /* Discover which interrupts are active/pending */
5472 inta = _il_rd(il, CSR_INT);
5473 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
5474
5475 /* Ignore interrupt if there's nothing in NIC to service.
5476 * This may be due to IRQ shared with another device,
5477 * or due to sporadic interrupts thrown from our NIC. */
5478 if (!inta && !inta_fh) {
5479 D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5480 goto none;
5481 }
5482
5483 if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
5484 /* Hardware disappeared. It might have already raised
5485 * an interrupt */
5486 IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
5487 goto unplugged;
5488 }
5489
5490 D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask,
5491 inta_fh);
5492
5493 inta &= ~CSR_INT_BIT_SCD;
5494
5495 /* il_irq_tasklet() will service interrupts and re-enable them */
5496 if (likely(inta || inta_fh))
5497 tasklet_schedule(&il->irq_tasklet);
5498
5499 unplugged:
5500 spin_unlock_irqrestore(&il->lock, flags);
5501 return IRQ_HANDLED;
5502
5503 none:
5504 /* re-enable interrupts here since we don't have anything to service. */
5505 /* only Re-enable if disabled by irq */
5506 if (test_bit(S_INT_ENABLED, &il->status))
5507 il_enable_interrupts(il);
5508 spin_unlock_irqrestore(&il->lock, flags);
5509 return IRQ_NONE;
5510 }
5511 EXPORT_SYMBOL(il_isr);
5512
5513 /*
5514 * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
5515 * function.
5516 */
5517 void
il_tx_cmd_protection(struct il_priv * il,struct ieee80211_tx_info * info,__le16 fc,__le32 * tx_flags)5518 il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
5519 __le16 fc, __le32 *tx_flags)
5520 {
5521 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
5522 *tx_flags |= TX_CMD_FLG_RTS_MSK;
5523 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
5524 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5525
5526 if (!ieee80211_is_mgmt(fc))
5527 return;
5528
5529 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
5530 case cpu_to_le16(IEEE80211_STYPE_AUTH):
5531 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
5532 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
5533 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
5534 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5535 *tx_flags |= TX_CMD_FLG_CTS_MSK;
5536 break;
5537 }
5538 } else if (info->control.rates[0].
5539 flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
5540 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5541 *tx_flags |= TX_CMD_FLG_CTS_MSK;
5542 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5543 }
5544 }
5545 EXPORT_SYMBOL(il_tx_cmd_protection);
5546