xref: /linux/sound/soc/samsung/idma.c (revision a54f20fe889737f8277abc957ff72b6cdd469f2a)
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // idma.c - I2S0 internal DMA driver
4 //
5 // Copyright (c) 2011 Samsung Electronics Co., Ltd.
6 //		http://www.samsung.com
7 
8 #include <linux/interrupt.h>
9 #include <linux/platform_device.h>
10 #include <linux/dma-mapping.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <sound/pcm.h>
14 #include <sound/pcm_params.h>
15 #include <sound/soc.h>
16 
17 #include "i2s.h"
18 #include "idma.h"
19 #include "i2s-regs.h"
20 
21 #define ST_RUNNING		(1<<0)
22 #define ST_OPENED		(1<<1)
23 
24 static const struct snd_pcm_hardware idma_hardware = {
25 	.info = SNDRV_PCM_INFO_INTERLEAVED |
26 		    SNDRV_PCM_INFO_BLOCK_TRANSFER |
27 		    SNDRV_PCM_INFO_MMAP |
28 		    SNDRV_PCM_INFO_MMAP_VALID |
29 		    SNDRV_PCM_INFO_PAUSE |
30 		    SNDRV_PCM_INFO_RESUME,
31 	.buffer_bytes_max = MAX_IDMA_BUFFER,
32 	.period_bytes_min = 128,
33 	.period_bytes_max = MAX_IDMA_PERIOD,
34 	.periods_min = 1,
35 	.periods_max = 2,
36 };
37 
38 struct idma_ctrl {
39 	spinlock_t	lock;
40 	int		state;
41 	dma_addr_t	start;
42 	dma_addr_t	pos;
43 	dma_addr_t	end;
44 	dma_addr_t	period;
45 	dma_addr_t	periodsz;
46 	void		*token;
47 	void		(*cb)(void *dt, int bytes_xfer);
48 };
49 
50 static struct idma_info {
51 	spinlock_t	lock;
52 	void		 __iomem  *regs;
53 	dma_addr_t	lp_tx_addr;
54 } idma;
55 
56 static int idma_irq;
57 
58 static void idma_getpos(dma_addr_t *src)
59 {
60 	*src = idma.lp_tx_addr +
61 		(readl(idma.regs + I2STRNCNT) & 0xffffff) * 4;
62 }
63 
64 static int idma_enqueue(struct snd_pcm_substream *substream)
65 {
66 	struct snd_pcm_runtime *runtime = substream->runtime;
67 	struct idma_ctrl *prtd = substream->runtime->private_data;
68 	u32 val;
69 
70 	scoped_guard(spinlock, &prtd->lock)
71 		prtd->token = (void *) substream;
72 
73 	/* Internal DMA Level0 Interrupt Address */
74 	val = idma.lp_tx_addr + prtd->periodsz;
75 	writel(val, idma.regs + I2SLVL0ADDR);
76 
77 	/* Start address0 of I2S internal DMA operation. */
78 	val = idma.lp_tx_addr;
79 	writel(val, idma.regs + I2SSTR0);
80 
81 	/*
82 	 * Transfer block size for I2S internal DMA.
83 	 * Should decide transfer size before start dma operation
84 	 */
85 	val = readl(idma.regs + I2SSIZE);
86 	val &= ~(I2SSIZE_TRNMSK << I2SSIZE_SHIFT);
87 	val |= (((runtime->dma_bytes >> 2) &
88 			I2SSIZE_TRNMSK) << I2SSIZE_SHIFT);
89 	writel(val, idma.regs + I2SSIZE);
90 
91 	val = readl(idma.regs + I2SAHB);
92 	val |= AHB_INTENLVL0;
93 	writel(val, idma.regs + I2SAHB);
94 
95 	return 0;
96 }
97 
98 static void idma_setcallbk(struct snd_pcm_substream *substream,
99 				void (*cb)(void *, int))
100 {
101 	struct idma_ctrl *prtd = substream->runtime->private_data;
102 
103 	guard(spinlock)(&prtd->lock);
104 	prtd->cb = cb;
105 }
106 
107 static void idma_control(int op)
108 {
109 	u32 val = readl(idma.regs + I2SAHB);
110 
111 	guard(spinlock)(&idma.lock);
112 
113 	switch (op) {
114 	case LPAM_DMA_START:
115 		val |= (AHB_INTENLVL0 | AHB_DMAEN);
116 		break;
117 	case LPAM_DMA_STOP:
118 		val &= ~(AHB_INTENLVL0 | AHB_DMAEN);
119 		break;
120 	default:
121 		return;
122 	}
123 
124 	writel(val, idma.regs + I2SAHB);
125 }
126 
127 static void idma_done(void *id, int bytes_xfer)
128 {
129 	struct snd_pcm_substream *substream = id;
130 	struct idma_ctrl *prtd = substream->runtime->private_data;
131 
132 	if (prtd && (prtd->state & ST_RUNNING))
133 		snd_pcm_period_elapsed(substream);
134 }
135 
136 static int idma_hw_params(struct snd_soc_component *component,
137 			  struct snd_pcm_substream *substream,
138 			  struct snd_pcm_hw_params *params)
139 {
140 	struct snd_pcm_runtime *runtime = substream->runtime;
141 	struct idma_ctrl *prtd = substream->runtime->private_data;
142 	u32 mod = readl(idma.regs + I2SMOD);
143 	u32 ahb = readl(idma.regs + I2SAHB);
144 
145 	ahb |= (AHB_DMARLD | AHB_INTMASK);
146 	mod |= MOD_TXS_IDMA;
147 	writel(ahb, idma.regs + I2SAHB);
148 	writel(mod, idma.regs + I2SMOD);
149 
150 	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
151 	runtime->dma_bytes = params_buffer_bytes(params);
152 
153 	prtd->start = prtd->pos = runtime->dma_addr;
154 	prtd->period = params_periods(params);
155 	prtd->periodsz = params_period_bytes(params);
156 	prtd->end = runtime->dma_addr + runtime->dma_bytes;
157 
158 	idma_setcallbk(substream, idma_done);
159 
160 	return 0;
161 }
162 
163 static int idma_hw_free(struct snd_soc_component *component,
164 			struct snd_pcm_substream *substream)
165 {
166 	snd_pcm_set_runtime_buffer(substream, NULL);
167 
168 	return 0;
169 }
170 
171 static int idma_prepare(struct snd_soc_component *component,
172 			struct snd_pcm_substream *substream)
173 {
174 	struct idma_ctrl *prtd = substream->runtime->private_data;
175 
176 	prtd->pos = prtd->start;
177 
178 	/* flush the DMA channel */
179 	idma_control(LPAM_DMA_STOP);
180 	idma_enqueue(substream);
181 
182 	return 0;
183 }
184 
185 static int idma_trigger(struct snd_soc_component *component,
186 			struct snd_pcm_substream *substream, int cmd)
187 {
188 	struct idma_ctrl *prtd = substream->runtime->private_data;
189 	int ret = 0;
190 
191 	guard(spinlock)(&prtd->lock);
192 
193 	switch (cmd) {
194 	case SNDRV_PCM_TRIGGER_RESUME:
195 	case SNDRV_PCM_TRIGGER_START:
196 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
197 		prtd->state |= ST_RUNNING;
198 		idma_control(LPAM_DMA_START);
199 		break;
200 
201 	case SNDRV_PCM_TRIGGER_SUSPEND:
202 	case SNDRV_PCM_TRIGGER_STOP:
203 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
204 		prtd->state &= ~ST_RUNNING;
205 		idma_control(LPAM_DMA_STOP);
206 		break;
207 
208 	default:
209 		ret = -EINVAL;
210 		break;
211 	}
212 
213 	return ret;
214 }
215 
216 static snd_pcm_uframes_t
217 idma_pointer(struct snd_soc_component *component,
218 	     struct snd_pcm_substream *substream)
219 {
220 	struct snd_pcm_runtime *runtime = substream->runtime;
221 	struct idma_ctrl *prtd = runtime->private_data;
222 	dma_addr_t src;
223 	unsigned long res;
224 
225 	scoped_guard(spinlock, &prtd->lock) {
226 		idma_getpos(&src);
227 		res = src - prtd->start;
228 	}
229 
230 	return bytes_to_frames(substream->runtime, res);
231 }
232 
233 static int idma_mmap(struct snd_soc_component *component,
234 		     struct snd_pcm_substream *substream,
235 	struct vm_area_struct *vma)
236 {
237 	struct snd_pcm_runtime *runtime = substream->runtime;
238 	unsigned long size, offset;
239 
240 	/* From snd_pcm_lib_mmap_iomem */
241 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
242 	size = vma->vm_end - vma->vm_start;
243 	offset = vma->vm_pgoff << PAGE_SHIFT;
244 	return io_remap_pfn_range(vma, vma->vm_start,
245 			(runtime->dma_addr + offset) >> PAGE_SHIFT,
246 			size, vma->vm_page_prot);
247 }
248 
249 static irqreturn_t iis_irq(int irqno, void *dev_id)
250 {
251 	struct idma_ctrl *prtd = (struct idma_ctrl *)dev_id;
252 	u32 iisahb, val, addr;
253 
254 	iisahb  = readl(idma.regs + I2SAHB);
255 
256 	val = (iisahb & AHB_LVL0INT) ? AHB_CLRLVL0INT : 0;
257 
258 	if (val) {
259 		iisahb |= val;
260 		writel(iisahb, idma.regs + I2SAHB);
261 
262 		addr = readl(idma.regs + I2SLVL0ADDR) - idma.lp_tx_addr;
263 		addr += prtd->periodsz;
264 		addr %= (u32)(prtd->end - prtd->start);
265 		addr += idma.lp_tx_addr;
266 
267 		writel(addr, idma.regs + I2SLVL0ADDR);
268 
269 		if (prtd->cb)
270 			prtd->cb(prtd->token, prtd->period);
271 	}
272 
273 	return IRQ_HANDLED;
274 }
275 
276 static int idma_open(struct snd_soc_component *component,
277 		     struct snd_pcm_substream *substream)
278 {
279 	struct snd_pcm_runtime *runtime = substream->runtime;
280 	struct idma_ctrl *prtd;
281 	int ret;
282 
283 	snd_soc_set_runtime_hwparams(substream, &idma_hardware);
284 
285 	prtd = kzalloc_obj(struct idma_ctrl);
286 	if (prtd == NULL)
287 		return -ENOMEM;
288 
289 	ret = request_irq(idma_irq, iis_irq, 0, "i2s", prtd);
290 	if (ret < 0) {
291 		pr_err("fail to claim i2s irq , ret = %d\n", ret);
292 		kfree(prtd);
293 		return ret;
294 	}
295 
296 	spin_lock_init(&prtd->lock);
297 
298 	runtime->private_data = prtd;
299 
300 	return 0;
301 }
302 
303 static int idma_close(struct snd_soc_component *component,
304 		      struct snd_pcm_substream *substream)
305 {
306 	struct snd_pcm_runtime *runtime = substream->runtime;
307 	struct idma_ctrl *prtd = runtime->private_data;
308 
309 	free_irq(idma_irq, prtd);
310 
311 	if (!prtd)
312 		pr_err("idma_close called with prtd == NULL\n");
313 
314 	kfree(prtd);
315 
316 	return 0;
317 }
318 
319 static void idma_free(struct snd_soc_component *component,
320 		      struct snd_pcm *pcm)
321 {
322 	struct snd_pcm_substream *substream;
323 	struct snd_dma_buffer *buf;
324 
325 	substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
326 	if (!substream)
327 		return;
328 
329 	buf = &substream->dma_buffer;
330 	if (!buf->area)
331 		return;
332 
333 	iounmap((void __iomem *)buf->area);
334 
335 	buf->area = NULL;
336 	buf->addr = 0;
337 }
338 
339 static int preallocate_idma_buffer(struct snd_pcm *pcm, int stream)
340 {
341 	struct snd_pcm_substream *substream = pcm->streams[stream].substream;
342 	struct snd_dma_buffer *buf = &substream->dma_buffer;
343 
344 	buf->dev.dev = pcm->card->dev;
345 	buf->private_data = NULL;
346 
347 	/* Assign PCM buffer pointers */
348 	buf->dev.type = SNDRV_DMA_TYPE_CONTINUOUS;
349 	buf->addr = idma.lp_tx_addr;
350 	buf->bytes = idma_hardware.buffer_bytes_max;
351 	buf->area = (unsigned char * __force)ioremap(buf->addr, buf->bytes);
352 	if (!buf->area)
353 		return -ENOMEM;
354 
355 	return 0;
356 }
357 
358 static int idma_new(struct snd_soc_component *component,
359 		    struct snd_soc_pcm_runtime *rtd)
360 {
361 	struct snd_card *card = rtd->card->snd_card;
362 	struct snd_pcm *pcm = rtd->pcm;
363 	int ret;
364 
365 	ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
366 	if (ret)
367 		return ret;
368 
369 	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
370 		ret = preallocate_idma_buffer(pcm,
371 				SNDRV_PCM_STREAM_PLAYBACK);
372 	}
373 
374 	return ret;
375 }
376 
377 void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr)
378 {
379 	spin_lock_init(&idma.lock);
380 	idma.regs = regs;
381 	idma.lp_tx_addr = addr;
382 }
383 EXPORT_SYMBOL_GPL(idma_reg_addr_init);
384 
385 static const struct snd_soc_component_driver asoc_idma_platform = {
386 	.open		= idma_open,
387 	.close		= idma_close,
388 	.trigger	= idma_trigger,
389 	.pointer	= idma_pointer,
390 	.mmap		= idma_mmap,
391 	.hw_params	= idma_hw_params,
392 	.hw_free	= idma_hw_free,
393 	.prepare	= idma_prepare,
394 	.pcm_new	= idma_new,
395 	.pcm_free	= idma_free,
396 };
397 
398 static int asoc_idma_platform_probe(struct platform_device *pdev)
399 {
400 	idma_irq = platform_get_irq(pdev, 0);
401 	if (idma_irq < 0)
402 		return idma_irq;
403 
404 	return devm_snd_soc_register_component(&pdev->dev, &asoc_idma_platform,
405 					       NULL, 0);
406 }
407 
408 static struct platform_driver asoc_idma_driver = {
409 	.driver = {
410 		.name = "samsung-idma",
411 	},
412 
413 	.probe = asoc_idma_platform_probe,
414 };
415 
416 module_platform_driver(asoc_idma_driver);
417 
418 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
419 MODULE_DESCRIPTION("Samsung ASoC IDMA Driver");
420 MODULE_LICENSE("GPL");
421