1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019, Intel Corporation. */
3
4 #include <linux/filter.h>
5 #include <linux/net/intel/libie/rx.h>
6
7 #include "ice_txrx_lib.h"
8 #include "ice_eswitch.h"
9 #include "ice_lib.h"
10
11 /**
12 * ice_release_rx_desc - Store the new tail and head values
13 * @rx_ring: ring to bump
14 * @val: new head index
15 */
ice_release_rx_desc(struct ice_rx_ring * rx_ring,u16 val)16 void ice_release_rx_desc(struct ice_rx_ring *rx_ring, u16 val)
17 {
18 u16 prev_ntu = rx_ring->next_to_use & ~0x7;
19
20 rx_ring->next_to_use = val;
21
22 /* update next to alloc since we have filled the ring */
23 rx_ring->next_to_alloc = val;
24
25 /* QRX_TAIL will be updated with any tail value, but hardware ignores
26 * the lower 3 bits. This makes it so we only bump tail on meaningful
27 * boundaries. Also, this allows us to bump tail on intervals of 8 up to
28 * the budget depending on the current traffic load.
29 */
30 val &= ~0x7;
31 if (prev_ntu != val) {
32 /* Force memory writes to complete before letting h/w
33 * know there are new descriptors to fetch. (Only
34 * applicable for weak-ordered memory model archs,
35 * such as IA-64).
36 */
37 wmb();
38 writel(val, rx_ring->tail);
39 }
40 }
41
42 /**
43 * ice_get_rx_hash - get RX hash value from descriptor
44 * @rx_desc: specific descriptor
45 *
46 * Returns hash, if present, 0 otherwise.
47 */
ice_get_rx_hash(const union ice_32b_rx_flex_desc * rx_desc)48 static u32 ice_get_rx_hash(const union ice_32b_rx_flex_desc *rx_desc)
49 {
50 const struct ice_32b_rx_flex_desc_nic *nic_mdid;
51
52 if (unlikely(rx_desc->wb.rxdid != ICE_RXDID_FLEX_NIC))
53 return 0;
54
55 nic_mdid = (struct ice_32b_rx_flex_desc_nic *)rx_desc;
56 return le32_to_cpu(nic_mdid->rss_hash);
57 }
58
59 /**
60 * ice_rx_hash_to_skb - set the hash value in the skb
61 * @rx_ring: descriptor ring
62 * @rx_desc: specific descriptor
63 * @skb: pointer to current skb
64 * @rx_ptype: the ptype value from the descriptor
65 */
66 static void
ice_rx_hash_to_skb(const struct ice_rx_ring * rx_ring,const union ice_32b_rx_flex_desc * rx_desc,struct sk_buff * skb,u16 rx_ptype)67 ice_rx_hash_to_skb(const struct ice_rx_ring *rx_ring,
68 const union ice_32b_rx_flex_desc *rx_desc,
69 struct sk_buff *skb, u16 rx_ptype)
70 {
71 struct libeth_rx_pt decoded;
72 u32 hash;
73
74 decoded = libie_rx_pt_parse(rx_ptype);
75 if (!libeth_rx_pt_has_hash(rx_ring->netdev, decoded))
76 return;
77
78 hash = ice_get_rx_hash(rx_desc);
79 if (likely(hash))
80 libeth_rx_pt_set_hash(skb, hash, decoded);
81 }
82
83 /**
84 * ice_rx_gcs - Set generic checksum in skb
85 * @skb: skb currently being received and modified
86 * @rx_desc: receive descriptor
87 */
ice_rx_gcs(struct sk_buff * skb,const union ice_32b_rx_flex_desc * rx_desc)88 static void ice_rx_gcs(struct sk_buff *skb,
89 const union ice_32b_rx_flex_desc *rx_desc)
90 {
91 const struct ice_32b_rx_flex_desc_nic *desc;
92 u16 csum;
93
94 desc = (struct ice_32b_rx_flex_desc_nic *)rx_desc;
95 skb->ip_summed = CHECKSUM_COMPLETE;
96 csum = (__force u16)desc->raw_csum;
97 skb->csum = csum_unfold((__force __sum16)swab16(csum));
98 }
99
100 /**
101 * ice_rx_csum - Indicate in skb if checksum is good
102 * @ring: the ring we care about
103 * @skb: skb currently being received and modified
104 * @rx_desc: the receive descriptor
105 * @ptype: the packet type decoded by hardware
106 *
107 * skb->protocol must be set before this function is called
108 */
109 static void
ice_rx_csum(struct ice_rx_ring * ring,struct sk_buff * skb,union ice_32b_rx_flex_desc * rx_desc,u16 ptype)110 ice_rx_csum(struct ice_rx_ring *ring, struct sk_buff *skb,
111 union ice_32b_rx_flex_desc *rx_desc, u16 ptype)
112 {
113 struct libeth_rx_pt decoded;
114 u16 rx_status0, rx_status1;
115 bool ipv4, ipv6;
116
117 /* Start with CHECKSUM_NONE and by default csum_level = 0 */
118 skb->ip_summed = CHECKSUM_NONE;
119
120 decoded = libie_rx_pt_parse(ptype);
121 if (!libeth_rx_pt_has_checksum(ring->netdev, decoded))
122 return;
123
124 rx_status0 = le16_to_cpu(rx_desc->wb.status_error0);
125 rx_status1 = le16_to_cpu(rx_desc->wb.status_error1);
126
127 if ((ring->flags & ICE_RX_FLAGS_RING_GCS) &&
128 rx_desc->wb.rxdid == ICE_RXDID_FLEX_NIC &&
129 (decoded.inner_prot == LIBETH_RX_PT_INNER_TCP ||
130 decoded.inner_prot == LIBETH_RX_PT_INNER_UDP ||
131 decoded.inner_prot == LIBETH_RX_PT_INNER_ICMP)) {
132 ice_rx_gcs(skb, rx_desc);
133 return;
134 }
135
136 /* check if HW has decoded the packet and checksum */
137 if (!(rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S)))
138 return;
139
140 ipv4 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV4;
141 ipv6 = libeth_rx_pt_get_ip_ver(decoded) == LIBETH_RX_PT_OUTER_IPV6;
142
143 if (ipv4 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S)))) {
144 ring->vsi->back->hw_rx_eipe_error++;
145 return;
146 }
147
148 if (ipv4 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S))))
149 goto checksum_fail;
150
151 if (ipv6 && (rx_status0 & (BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S))))
152 goto checksum_fail;
153
154 /* check for L4 errors and handle packets that were not able to be
155 * checksummed due to arrival speed
156 */
157 if (rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S))
158 goto checksum_fail;
159
160 /* check for outer UDP checksum error in tunneled packets */
161 if ((rx_status1 & BIT(ICE_RX_FLEX_DESC_STATUS1_NAT_S)) &&
162 (rx_status0 & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S)))
163 goto checksum_fail;
164
165 /* If there is an outer header present that might contain a checksum
166 * we need to bump the checksum level by 1 to reflect the fact that
167 * we are indicating we validated the inner checksum.
168 */
169 if (decoded.tunnel_type >= LIBETH_RX_PT_TUNNEL_IP_GRENAT)
170 skb->csum_level = 1;
171
172 skb->ip_summed = CHECKSUM_UNNECESSARY;
173 return;
174
175 checksum_fail:
176 ring->vsi->back->hw_csum_rx_error++;
177 }
178
179 /**
180 * ice_ptp_rx_hwts_to_skb - Put RX timestamp into skb
181 * @rx_ring: Ring to get the VSI info
182 * @rx_desc: Receive descriptor
183 * @skb: Particular skb to send timestamp with
184 *
185 * The timestamp is in ns, so we must convert the result first.
186 */
187 static void
ice_ptp_rx_hwts_to_skb(struct ice_rx_ring * rx_ring,const union ice_32b_rx_flex_desc * rx_desc,struct sk_buff * skb)188 ice_ptp_rx_hwts_to_skb(struct ice_rx_ring *rx_ring,
189 const union ice_32b_rx_flex_desc *rx_desc,
190 struct sk_buff *skb)
191 {
192 u64 ts_ns = ice_ptp_get_rx_hwts(rx_desc, &rx_ring->pkt_ctx);
193
194 skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ts_ns);
195 }
196
197 /**
198 * ice_get_ptype - Read HW packet type from the descriptor
199 * @rx_desc: RX descriptor
200 */
ice_get_ptype(const union ice_32b_rx_flex_desc * rx_desc)201 static u16 ice_get_ptype(const union ice_32b_rx_flex_desc *rx_desc)
202 {
203 return le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
204 ICE_RX_FLEX_DESC_PTYPE_M;
205 }
206
207 /**
208 * ice_process_skb_fields - Populate skb header fields from Rx descriptor
209 * @rx_ring: Rx descriptor ring packet is being transacted on
210 * @rx_desc: pointer to the EOP Rx descriptor
211 * @skb: pointer to current skb being populated
212 *
213 * This function checks the ring, descriptor, and packet information in
214 * order to populate the hash, checksum, VLAN, protocol, and
215 * other fields within the skb.
216 */
217 void
ice_process_skb_fields(struct ice_rx_ring * rx_ring,union ice_32b_rx_flex_desc * rx_desc,struct sk_buff * skb)218 ice_process_skb_fields(struct ice_rx_ring *rx_ring,
219 union ice_32b_rx_flex_desc *rx_desc,
220 struct sk_buff *skb)
221 {
222 u16 ptype = ice_get_ptype(rx_desc);
223
224 ice_rx_hash_to_skb(rx_ring, rx_desc, skb, ptype);
225
226 /* modifies the skb - consumes the enet header */
227 if (unlikely(rx_ring->flags & ICE_RX_FLAGS_MULTIDEV)) {
228 struct net_device *netdev = ice_eswitch_get_target(rx_ring,
229 rx_desc);
230
231 if (ice_is_port_repr_netdev(netdev))
232 ice_repr_inc_rx_stats(netdev, skb->len);
233 skb->protocol = eth_type_trans(skb, netdev);
234 } else {
235 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
236 }
237
238 ice_rx_csum(rx_ring, skb, rx_desc, ptype);
239
240 if (rx_ring->ptp_rx)
241 ice_ptp_rx_hwts_to_skb(rx_ring, rx_desc, skb);
242 }
243
244 /**
245 * ice_receive_skb - Send a completed packet up the stack
246 * @rx_ring: Rx ring in play
247 * @skb: packet to send up
248 * @vlan_tci: VLAN TCI for packet
249 *
250 * This function sends the completed packet (via. skb) up the stack using
251 * gro receive functions (with/without VLAN tag)
252 */
253 void
ice_receive_skb(struct ice_rx_ring * rx_ring,struct sk_buff * skb,u16 vlan_tci)254 ice_receive_skb(struct ice_rx_ring *rx_ring, struct sk_buff *skb, u16 vlan_tci)
255 {
256 if ((vlan_tci & VLAN_VID_MASK) && rx_ring->vlan_proto)
257 __vlan_hwaccel_put_tag(skb, rx_ring->vlan_proto,
258 vlan_tci);
259
260 napi_gro_receive(&rx_ring->q_vector->napi, skb);
261 }
262
263 /**
264 * ice_clean_xdp_tx_buf - Free and unmap XDP Tx buffer
265 * @dev: device for DMA mapping
266 * @tx_buf: Tx buffer to clean
267 * @bq: XDP bulk flush struct
268 */
269 static void
ice_clean_xdp_tx_buf(struct device * dev,struct ice_tx_buf * tx_buf,struct xdp_frame_bulk * bq)270 ice_clean_xdp_tx_buf(struct device *dev, struct ice_tx_buf *tx_buf,
271 struct xdp_frame_bulk *bq)
272 {
273 dma_unmap_single(dev, dma_unmap_addr(tx_buf, dma),
274 dma_unmap_len(tx_buf, len), DMA_TO_DEVICE);
275 dma_unmap_len_set(tx_buf, len, 0);
276
277 switch (tx_buf->type) {
278 case ICE_TX_BUF_XDP_TX:
279 page_frag_free(tx_buf->raw_buf);
280 break;
281 case ICE_TX_BUF_XDP_XMIT:
282 xdp_return_frame_bulk(tx_buf->xdpf, bq);
283 break;
284 }
285
286 tx_buf->type = ICE_TX_BUF_EMPTY;
287 }
288
289 /**
290 * ice_clean_xdp_irq - Reclaim resources after transmit completes on XDP ring
291 * @xdp_ring: XDP ring to clean
292 */
ice_clean_xdp_irq(struct ice_tx_ring * xdp_ring)293 static u32 ice_clean_xdp_irq(struct ice_tx_ring *xdp_ring)
294 {
295 int total_bytes = 0, total_pkts = 0;
296 struct device *dev = xdp_ring->dev;
297 u32 ntc = xdp_ring->next_to_clean;
298 struct ice_tx_desc *tx_desc;
299 u32 cnt = xdp_ring->count;
300 struct xdp_frame_bulk bq;
301 u32 frags, xdp_tx = 0;
302 u32 ready_frames = 0;
303 u32 idx;
304 u32 ret;
305
306 idx = xdp_ring->tx_buf[ntc].rs_idx;
307 tx_desc = ICE_TX_DESC(xdp_ring, idx);
308 if (tx_desc->cmd_type_offset_bsz &
309 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)) {
310 if (idx >= ntc)
311 ready_frames = idx - ntc + 1;
312 else
313 ready_frames = idx + cnt - ntc + 1;
314 }
315
316 if (unlikely(!ready_frames))
317 return 0;
318 ret = ready_frames;
319
320 xdp_frame_bulk_init(&bq);
321 rcu_read_lock(); /* xdp_return_frame_bulk() */
322
323 while (ready_frames) {
324 struct ice_tx_buf *tx_buf = &xdp_ring->tx_buf[ntc];
325 struct ice_tx_buf *head = tx_buf;
326
327 /* bytecount holds size of head + frags */
328 total_bytes += tx_buf->bytecount;
329 frags = tx_buf->nr_frags;
330 total_pkts++;
331 /* count head + frags */
332 ready_frames -= frags + 1;
333 xdp_tx++;
334
335 ntc++;
336 if (ntc == cnt)
337 ntc = 0;
338
339 for (int i = 0; i < frags; i++) {
340 tx_buf = &xdp_ring->tx_buf[ntc];
341
342 ice_clean_xdp_tx_buf(dev, tx_buf, &bq);
343 ntc++;
344 if (ntc == cnt)
345 ntc = 0;
346 }
347
348 ice_clean_xdp_tx_buf(dev, head, &bq);
349 }
350
351 xdp_flush_frame_bulk(&bq);
352 rcu_read_unlock();
353
354 tx_desc->cmd_type_offset_bsz = 0;
355 xdp_ring->next_to_clean = ntc;
356 xdp_ring->xdp_tx_active -= xdp_tx;
357 ice_update_tx_ring_stats(xdp_ring, total_pkts, total_bytes);
358
359 return ret;
360 }
361
362 /**
363 * __ice_xmit_xdp_ring - submit frame to XDP ring for transmission
364 * @xdp: XDP buffer to be placed onto Tx descriptors
365 * @xdp_ring: XDP ring for transmission
366 * @frame: whether this comes from .ndo_xdp_xmit()
367 */
__ice_xmit_xdp_ring(struct xdp_buff * xdp,struct ice_tx_ring * xdp_ring,bool frame)368 int __ice_xmit_xdp_ring(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring,
369 bool frame)
370 {
371 struct skb_shared_info *sinfo = NULL;
372 u32 size = xdp->data_end - xdp->data;
373 struct device *dev = xdp_ring->dev;
374 u32 ntu = xdp_ring->next_to_use;
375 struct ice_tx_desc *tx_desc;
376 struct ice_tx_buf *tx_head;
377 struct ice_tx_buf *tx_buf;
378 u32 cnt = xdp_ring->count;
379 void *data = xdp->data;
380 u32 nr_frags = 0;
381 u32 free_space;
382 u32 frag = 0;
383
384 free_space = ICE_DESC_UNUSED(xdp_ring);
385 if (free_space < ICE_RING_QUARTER(xdp_ring))
386 free_space += ice_clean_xdp_irq(xdp_ring);
387
388 if (unlikely(!free_space))
389 goto busy;
390
391 if (unlikely(xdp_buff_has_frags(xdp))) {
392 sinfo = xdp_get_shared_info_from_buff(xdp);
393 nr_frags = sinfo->nr_frags;
394 if (free_space < nr_frags + 1)
395 goto busy;
396 }
397
398 tx_desc = ICE_TX_DESC(xdp_ring, ntu);
399 tx_head = &xdp_ring->tx_buf[ntu];
400 tx_buf = tx_head;
401
402 for (;;) {
403 dma_addr_t dma;
404
405 dma = dma_map_single(dev, data, size, DMA_TO_DEVICE);
406 if (dma_mapping_error(dev, dma))
407 goto dma_unmap;
408
409 /* record length, and DMA address */
410 dma_unmap_len_set(tx_buf, len, size);
411 dma_unmap_addr_set(tx_buf, dma, dma);
412
413 if (frame) {
414 tx_buf->type = ICE_TX_BUF_FRAG;
415 } else {
416 tx_buf->type = ICE_TX_BUF_XDP_TX;
417 tx_buf->raw_buf = data;
418 }
419
420 tx_desc->buf_addr = cpu_to_le64(dma);
421 tx_desc->cmd_type_offset_bsz = ice_build_ctob(0, 0, size, 0);
422
423 ntu++;
424 if (ntu == cnt)
425 ntu = 0;
426
427 if (frag == nr_frags)
428 break;
429
430 tx_desc = ICE_TX_DESC(xdp_ring, ntu);
431 tx_buf = &xdp_ring->tx_buf[ntu];
432
433 data = skb_frag_address(&sinfo->frags[frag]);
434 size = skb_frag_size(&sinfo->frags[frag]);
435 frag++;
436 }
437
438 /* store info about bytecount and frag count in first desc */
439 tx_head->bytecount = xdp_get_buff_len(xdp);
440 tx_head->nr_frags = nr_frags;
441
442 if (frame) {
443 tx_head->type = ICE_TX_BUF_XDP_XMIT;
444 tx_head->xdpf = xdp->data_hard_start;
445 }
446
447 /* update last descriptor from a frame with EOP */
448 tx_desc->cmd_type_offset_bsz |=
449 cpu_to_le64(ICE_TX_DESC_CMD_EOP << ICE_TXD_QW1_CMD_S);
450
451 xdp_ring->xdp_tx_active++;
452 xdp_ring->next_to_use = ntu;
453
454 return ICE_XDP_TX;
455
456 dma_unmap:
457 for (;;) {
458 tx_buf = &xdp_ring->tx_buf[ntu];
459 dma_unmap_page(dev, dma_unmap_addr(tx_buf, dma),
460 dma_unmap_len(tx_buf, len), DMA_TO_DEVICE);
461 dma_unmap_len_set(tx_buf, len, 0);
462 if (tx_buf == tx_head)
463 break;
464
465 if (!ntu)
466 ntu += cnt;
467 ntu--;
468 }
469 return ICE_XDP_CONSUMED;
470
471 busy:
472 xdp_ring->ring_stats->tx_stats.tx_busy++;
473
474 return ICE_XDP_CONSUMED;
475 }
476
477 /**
478 * ice_finalize_xdp_rx - Bump XDP Tx tail and/or flush redirect map
479 * @xdp_ring: XDP ring
480 * @xdp_res: Result of the receive batch
481 * @first_idx: index to write from caller
482 *
483 * This function bumps XDP Tx tail and/or flush redirect map, and
484 * should be called when a batch of packets has been processed in the
485 * napi loop.
486 */
ice_finalize_xdp_rx(struct ice_tx_ring * xdp_ring,unsigned int xdp_res,u32 first_idx)487 void ice_finalize_xdp_rx(struct ice_tx_ring *xdp_ring, unsigned int xdp_res,
488 u32 first_idx)
489 {
490 struct ice_tx_buf *tx_buf = &xdp_ring->tx_buf[first_idx];
491
492 if (xdp_res & ICE_XDP_REDIR)
493 xdp_do_flush();
494
495 if (xdp_res & ICE_XDP_TX) {
496 if (static_branch_unlikely(&ice_xdp_locking_key))
497 spin_lock(&xdp_ring->tx_lock);
498 /* store index of descriptor with RS bit set in the first
499 * ice_tx_buf of given NAPI batch
500 */
501 tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
502 ice_xdp_ring_update_tail(xdp_ring);
503 if (static_branch_unlikely(&ice_xdp_locking_key))
504 spin_unlock(&xdp_ring->tx_lock);
505 }
506 }
507
508 /**
509 * ice_xdp_rx_hw_ts - HW timestamp XDP hint handler
510 * @ctx: XDP buff pointer
511 * @ts_ns: destination address
512 *
513 * Copy HW timestamp (if available) to the destination address.
514 */
ice_xdp_rx_hw_ts(const struct xdp_md * ctx,u64 * ts_ns)515 static int ice_xdp_rx_hw_ts(const struct xdp_md *ctx, u64 *ts_ns)
516 {
517 const struct ice_xdp_buff *xdp_ext = (void *)ctx;
518
519 *ts_ns = ice_ptp_get_rx_hwts(xdp_ext->eop_desc,
520 xdp_ext->pkt_ctx);
521 if (!*ts_ns)
522 return -ENODATA;
523
524 return 0;
525 }
526
527 /**
528 * ice_xdp_rx_hash_type - Get XDP-specific hash type from the RX descriptor
529 * @eop_desc: End of Packet descriptor
530 */
531 static enum xdp_rss_hash_type
ice_xdp_rx_hash_type(const union ice_32b_rx_flex_desc * eop_desc)532 ice_xdp_rx_hash_type(const union ice_32b_rx_flex_desc *eop_desc)
533 {
534 return libie_rx_pt_parse(ice_get_ptype(eop_desc)).hash_type;
535 }
536
537 /**
538 * ice_xdp_rx_hash - RX hash XDP hint handler
539 * @ctx: XDP buff pointer
540 * @hash: hash destination address
541 * @rss_type: XDP hash type destination address
542 *
543 * Copy RX hash (if available) and its type to the destination address.
544 */
ice_xdp_rx_hash(const struct xdp_md * ctx,u32 * hash,enum xdp_rss_hash_type * rss_type)545 static int ice_xdp_rx_hash(const struct xdp_md *ctx, u32 *hash,
546 enum xdp_rss_hash_type *rss_type)
547 {
548 const struct ice_xdp_buff *xdp_ext = (void *)ctx;
549
550 *hash = ice_get_rx_hash(xdp_ext->eop_desc);
551 *rss_type = ice_xdp_rx_hash_type(xdp_ext->eop_desc);
552 if (!likely(*hash))
553 return -ENODATA;
554
555 return 0;
556 }
557
558 /**
559 * ice_xdp_rx_vlan_tag - VLAN tag XDP hint handler
560 * @ctx: XDP buff pointer
561 * @vlan_proto: destination address for VLAN protocol
562 * @vlan_tci: destination address for VLAN TCI
563 *
564 * Copy VLAN tag (if was stripped) and corresponding protocol
565 * to the destination address.
566 */
ice_xdp_rx_vlan_tag(const struct xdp_md * ctx,__be16 * vlan_proto,u16 * vlan_tci)567 static int ice_xdp_rx_vlan_tag(const struct xdp_md *ctx, __be16 *vlan_proto,
568 u16 *vlan_tci)
569 {
570 const struct ice_xdp_buff *xdp_ext = (void *)ctx;
571
572 *vlan_proto = xdp_ext->pkt_ctx->vlan_proto;
573 if (!*vlan_proto)
574 return -ENODATA;
575
576 *vlan_tci = ice_get_vlan_tci(xdp_ext->eop_desc);
577 if (!*vlan_tci)
578 return -ENODATA;
579
580 return 0;
581 }
582
583 const struct xdp_metadata_ops ice_xdp_md_ops = {
584 .xmo_rx_timestamp = ice_xdp_rx_hw_ts,
585 .xmo_rx_hash = ice_xdp_rx_hash,
586 .xmo_rx_vlan_tag = ice_xdp_rx_vlan_tag,
587 };
588