1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2013 Red Hat
4 * Author: Rob Clark <robdclark@gmail.com>
5 */
6
7 #ifndef __MSM_RINGBUFFER_H__
8 #define __MSM_RINGBUFFER_H__
9
10 #include "drm/gpu_scheduler.h"
11 #include "msm_drv.h"
12
13 #define rbmemptr(ring, member) \
14 ((ring)->memptrs_iova + offsetof(struct msm_rbmemptrs, member))
15
16 #define rbmemptr_stats(ring, index, member) \
17 (rbmemptr((ring), stats) + \
18 ((index) * sizeof(struct msm_gpu_submit_stats)) + \
19 offsetof(struct msm_gpu_submit_stats, member))
20
21 struct msm_gpu_submit_stats {
22 u64 cpcycles_start;
23 u64 cpcycles_end;
24 u64 alwayson_start;
25 u64 alwayson_end;
26 };
27
28 #define MSM_GPU_SUBMIT_STATS_COUNT 64
29
30 struct msm_rbmemptrs {
31 volatile uint32_t rptr;
32 volatile uint32_t fence;
33 /* Introduced on A7xx */
34 volatile uint32_t bv_rptr;
35 volatile uint32_t bv_fence;
36
37 volatile struct msm_gpu_submit_stats stats[MSM_GPU_SUBMIT_STATS_COUNT];
38 volatile u64 ttbr0;
39 volatile u32 context_idr;
40
41 volatile u32 perfcntr_fence;
42 };
43
44 struct msm_cp_state {
45 uint64_t ib1_base, ib2_base;
46 uint32_t ib1_rem, ib2_rem;
47 };
48
49 struct msm_ringbuffer {
50 struct msm_gpu *gpu;
51 int id;
52 struct drm_gem_object *bo;
53 uint32_t *start, *end, *cur, *next;
54
55 /*
56 * The job scheduler for this ring.
57 */
58 struct rcu_head rcu;
59 struct drm_gpu_scheduler sched;
60 bool sched_initialized;
61
62 /*
63 * List of in-flight submits on this ring. Protected by submit_lock.
64 *
65 * Currently just submits that are already written into the ring, not
66 * submits that are still in drm_gpu_scheduler's queues. At a later
67 * step we could probably move to letting drm_gpu_scheduler manage
68 * hangcheck detection and keep track of submit jobs that are in-
69 * flight.
70 */
71 struct list_head submits;
72 spinlock_t submit_lock;
73
74 uint64_t iova;
75 uint32_t hangcheck_fence;
76 struct msm_rbmemptrs *memptrs;
77 uint64_t memptrs_iova;
78 struct msm_fence_context *fctx;
79
80 /**
81 * hangcheck_progress_retries:
82 *
83 * The number of extra hangcheck duration cycles that we have given
84 * due to it appearing that the GPU is making forward progress.
85 *
86 * For GPU generations which support progress detection (see.
87 * msm_gpu_funcs::progress()), if the GPU appears to be making progress
88 * (ie. the CP has advanced in the command stream, we'll allow up to
89 * DRM_MSM_HANGCHECK_PROGRESS_RETRIES expirations of the hangcheck timer
90 * before killing the job. But to detect progress we need two sample
91 * points, so the duration of the hangcheck timer is halved. In other
92 * words we'll let the submit run for up to:
93 *
94 * (DRM_MSM_HANGCHECK_DEFAULT_PERIOD / 2) * (DRM_MSM_HANGCHECK_PROGRESS_RETRIES + 1)
95 */
96 int hangcheck_progress_retries;
97
98 /**
99 * last_cp_state: The state of the CP at the last call to gpu->progress()
100 */
101 struct msm_cp_state last_cp_state;
102
103 /*
104 * preempt_lock protects preemption and serializes wptr updates against
105 * preemption. Can be aquired from irq context.
106 */
107 spinlock_t preempt_lock;
108
109 /*
110 * Whether we skipped writing wptr and it needs to be updated in the
111 * future when the ring becomes current.
112 */
113 bool restore_wptr;
114
115 /**
116 * cur_ctx_seqno:
117 *
118 * The ctx->seqno value of the last context to submit to this ring
119 * Tracked by seqno rather than pointer value to avoid dangling
120 * pointers, and cases where a ctx can be freed and a new one created
121 * with the same address.
122 */
123 int cur_ctx_seqno;
124 };
125
126 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
127 void *memptrs, uint64_t memptrs_iova);
128 void msm_ringbuffer_destroy(struct msm_ringbuffer *ring);
129
130 /* ringbuffer helpers (the parts that are same for a3xx/a2xx/z180..) */
131
132 static inline void
OUT_RING(struct msm_ringbuffer * ring,uint32_t data)133 OUT_RING(struct msm_ringbuffer *ring, uint32_t data)
134 {
135 /*
136 * ring->next points to the current command being written - it won't be
137 * committed as ring->cur until the flush
138 */
139 if (ring->next == ring->end)
140 ring->next = ring->start;
141 *(ring->next++) = data;
142 }
143
144 #endif /* __MSM_RINGBUFFER_H__ */
145