xref: /linux/drivers/net/ethernet/intel/iavf/iavf_adv_rss.h (revision 8f7aa3d3c7323f4ca2768a9e74ebbe359c4f8f88)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2021, Intel Corporation. */
3 
4 #ifndef _IAVF_ADV_RSS_H_
5 #define _IAVF_ADV_RSS_H_
6 
7 struct iavf_adapter;
8 
9 /* State of advanced RSS configuration */
10 enum iavf_adv_rss_state_t {
11 	IAVF_ADV_RSS_ADD_REQUEST,	/* User requests to add RSS */
12 	IAVF_ADV_RSS_ADD_PENDING,	/* RSS pending add by the PF */
13 	IAVF_ADV_RSS_DEL_REQUEST,	/* Driver requests to delete RSS */
14 	IAVF_ADV_RSS_DEL_PENDING,	/* RSS pending delete by the PF */
15 	IAVF_ADV_RSS_ACTIVE,		/* RSS configuration is active */
16 };
17 
18 enum iavf_adv_rss_flow_seg_hdr {
19 	IAVF_ADV_RSS_FLOW_SEG_HDR_NONE	= 0x00000000,
20 	IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4	= 0x00000001,
21 	IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6	= 0x00000002,
22 	IAVF_ADV_RSS_FLOW_SEG_HDR_TCP	= 0x00000004,
23 	IAVF_ADV_RSS_FLOW_SEG_HDR_UDP	= 0x00000008,
24 	IAVF_ADV_RSS_FLOW_SEG_HDR_SCTP	= 0x00000010,
25 	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC		= 0x00000400,
26 	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC_TEID	= 0x00000800,
27 	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_IP	= 0x00001000,
28 	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_EH	= 0x00002000,
29 	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_DWN	= 0x00004000,
30 	IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_UP	= 0x00008000,
31 };
32 
33 #define IAVF_ADV_RSS_FLOW_SEG_HDR_L3		\
34 	(IAVF_ADV_RSS_FLOW_SEG_HDR_IPV4	|	\
35 	 IAVF_ADV_RSS_FLOW_SEG_HDR_IPV6)
36 
37 #define IAVF_ADV_RSS_FLOW_SEG_HDR_L4		\
38 	(IAVF_ADV_RSS_FLOW_SEG_HDR_TCP |	\
39 	 IAVF_ADV_RSS_FLOW_SEG_HDR_UDP |	\
40 	 IAVF_ADV_RSS_FLOW_SEG_HDR_SCTP)
41 
42 #define IAVF_ADV_RSS_FLOW_SEG_HDR_GTP		\
43 	(IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC |	\
44 	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPC_TEID |	\
45 	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_IP |	\
46 	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_EH |	\
47 	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_DWN |	\
48 	 IAVF_ADV_RSS_FLOW_SEG_HDR_GTPU_UP)
49 
50 enum iavf_adv_rss_flow_field {
51 	/* L3 */
52 	IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV4_SA,
53 	IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV4_DA,
54 	IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV6_SA,
55 	IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV6_DA,
56 	/* L4 */
57 	IAVF_ADV_RSS_FLOW_FIELD_IDX_TCP_SRC_PORT,
58 	IAVF_ADV_RSS_FLOW_FIELD_IDX_TCP_DST_PORT,
59 	IAVF_ADV_RSS_FLOW_FIELD_IDX_UDP_SRC_PORT,
60 	IAVF_ADV_RSS_FLOW_FIELD_IDX_UDP_DST_PORT,
61 	IAVF_ADV_RSS_FLOW_FIELD_IDX_SCTP_SRC_PORT,
62 	IAVF_ADV_RSS_FLOW_FIELD_IDX_SCTP_DST_PORT,
63 	/* GTPC_TEID */
64 	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPC_TEID,
65 	/* GTPU_IP */
66 	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_IP_TEID,
67 	/* GTPU_EH */
68 	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_EH_TEID,
69 	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_EH_QFI,
70 	/* GTPU_UP */
71 	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_UP_TEID,
72 	/* GTPU_DWN */
73 	IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_DWN_TEID,
74 
75 	/* The total number of enums must not exceed 64 */
76 	IAVF_ADV_RSS_FLOW_FIELD_IDX_MAX
77 };
78 
79 #define IAVF_ADV_RSS_HASH_INVALID	0
80 #define IAVF_ADV_RSS_HASH_FLD_IPV4_SA	\
81 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV4_SA)
82 #define IAVF_ADV_RSS_HASH_FLD_IPV6_SA	\
83 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV6_SA)
84 #define IAVF_ADV_RSS_HASH_FLD_IPV4_DA	\
85 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV4_DA)
86 #define IAVF_ADV_RSS_HASH_FLD_IPV6_DA	\
87 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_IPV6_DA)
88 #define IAVF_ADV_RSS_HASH_FLD_TCP_SRC_PORT	\
89 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_TCP_SRC_PORT)
90 #define IAVF_ADV_RSS_HASH_FLD_TCP_DST_PORT	\
91 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_TCP_DST_PORT)
92 #define IAVF_ADV_RSS_HASH_FLD_UDP_SRC_PORT	\
93 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_UDP_SRC_PORT)
94 #define IAVF_ADV_RSS_HASH_FLD_UDP_DST_PORT	\
95 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_UDP_DST_PORT)
96 #define IAVF_ADV_RSS_HASH_FLD_SCTP_SRC_PORT	\
97 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_SCTP_SRC_PORT)
98 #define IAVF_ADV_RSS_HASH_FLD_SCTP_DST_PORT	\
99 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_SCTP_DST_PORT)
100 #define IAVF_ADV_RSS_HASH_FLD_GTPC_TEID	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPC_TEID)
101 #define IAVF_ADV_RSS_HASH_FLD_GTPU_IP_TEID BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_IP_TEID)
102 #define IAVF_ADV_RSS_HASH_FLD_GTPU_EH_TEID BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_EH_TEID)
103 #define IAVF_ADV_RSS_HASH_FLD_GTPU_UP_TEID BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_UP_TEID)
104 #define IAVF_ADV_RSS_HASH_FLD_GTPU_DWN_TEID \
105 	BIT_ULL(IAVF_ADV_RSS_FLOW_FIELD_IDX_GTPU_DWN_TEID)
106 
107 /* bookkeeping of advanced RSS configuration */
108 struct iavf_adv_rss {
109 	enum iavf_adv_rss_state_t state;
110 	struct list_head list;
111 
112 	u32 packet_hdrs;
113 	u64 hash_flds;
114 	bool symm;
115 
116 	struct virtchnl_rss_cfg cfg_msg;
117 };
118 
119 int
120 iavf_fill_adv_rss_cfg_msg(struct virtchnl_rss_cfg *rss_cfg,
121 			  u32 packet_hdrs, u64 hash_flds, bool symm);
122 struct iavf_adv_rss *
123 iavf_find_adv_rss_cfg_by_hdrs(struct iavf_adapter *adapter, u32 packet_hdrs);
124 void
125 iavf_print_adv_rss_cfg(struct iavf_adapter *adapter, struct iavf_adv_rss *rss,
126 		       const char *action, const char *result);
127 #endif /* _IAVF_ADV_RSS_H_ */
128