xref: /linux/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c (revision 621cde16e49b3ecf7d59a8106a20aaebfb4a59a9)
1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 // Copyright (c) 2020 Mellanox Technologies
3 
4 #include "en/ptp.h"
5 #include "en/health.h"
6 #include "en/txrx.h"
7 #include "en/params.h"
8 #include "en/fs_tt_redirect.h"
9 #include <linux/list.h>
10 #include <linux/spinlock.h>
11 
12 struct mlx5e_ptp_fs {
13 	struct mlx5_flow_handle *l2_rule;
14 	struct mlx5_flow_handle *udp_v4_rule;
15 	struct mlx5_flow_handle *udp_v6_rule;
16 	bool valid;
17 };
18 
19 struct mlx5e_ptp_params {
20 	struct mlx5e_params params;
21 	struct mlx5e_sq_param txq_sq_param;
22 	struct mlx5e_rq_param rq_param;
23 };
24 
25 struct mlx5e_ptp_port_ts_cqe_tracker {
26 	u8 metadata_id;
27 	bool inuse : 1;
28 	struct list_head entry;
29 };
30 
31 struct mlx5e_ptp_port_ts_cqe_list {
32 	struct mlx5e_ptp_port_ts_cqe_tracker *nodes;
33 	struct list_head tracker_list_head;
34 	/* Sync list operations in xmit and napi_poll contexts */
35 	spinlock_t tracker_list_lock;
36 };
37 
38 static inline void
mlx5e_ptp_port_ts_cqe_list_add(struct mlx5e_ptp_port_ts_cqe_list * list,u8 metadata)39 mlx5e_ptp_port_ts_cqe_list_add(struct mlx5e_ptp_port_ts_cqe_list *list, u8 metadata)
40 {
41 	struct mlx5e_ptp_port_ts_cqe_tracker *tracker = &list->nodes[metadata];
42 
43 	WARN_ON_ONCE(tracker->inuse);
44 	tracker->inuse = true;
45 	spin_lock_bh(&list->tracker_list_lock);
46 	list_add_tail(&tracker->entry, &list->tracker_list_head);
47 	spin_unlock_bh(&list->tracker_list_lock);
48 }
49 
50 static void
mlx5e_ptp_port_ts_cqe_list_remove(struct mlx5e_ptp_port_ts_cqe_list * list,u8 metadata)51 mlx5e_ptp_port_ts_cqe_list_remove(struct mlx5e_ptp_port_ts_cqe_list *list, u8 metadata)
52 {
53 	struct mlx5e_ptp_port_ts_cqe_tracker *tracker = &list->nodes[metadata];
54 
55 	WARN_ON_ONCE(!tracker->inuse);
56 	tracker->inuse = false;
57 	spin_lock_bh(&list->tracker_list_lock);
58 	list_del(&tracker->entry);
59 	spin_unlock_bh(&list->tracker_list_lock);
60 }
61 
mlx5e_ptpsq_track_metadata(struct mlx5e_ptpsq * ptpsq,u8 metadata)62 void mlx5e_ptpsq_track_metadata(struct mlx5e_ptpsq *ptpsq, u8 metadata)
63 {
64 	mlx5e_ptp_port_ts_cqe_list_add(ptpsq->ts_cqe_pending_list, metadata);
65 }
66 
67 struct mlx5e_skb_cb_hwtstamp {
68 	ktime_t cqe_hwtstamp;
69 	ktime_t port_hwtstamp;
70 };
71 
mlx5e_skb_cb_hwtstamp_init(struct sk_buff * skb)72 void mlx5e_skb_cb_hwtstamp_init(struct sk_buff *skb)
73 {
74 	memset(skb->cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));
75 }
76 
mlx5e_skb_cb_get_hwts(struct sk_buff * skb)77 static struct mlx5e_skb_cb_hwtstamp *mlx5e_skb_cb_get_hwts(struct sk_buff *skb)
78 {
79 	BUILD_BUG_ON(sizeof(struct mlx5e_skb_cb_hwtstamp) > sizeof(skb->cb));
80 	return (struct mlx5e_skb_cb_hwtstamp *)skb->cb;
81 }
82 
mlx5e_skb_cb_hwtstamp_tx(struct sk_buff * skb,struct mlx5e_ptp_cq_stats * cq_stats)83 static void mlx5e_skb_cb_hwtstamp_tx(struct sk_buff *skb,
84 				     struct mlx5e_ptp_cq_stats *cq_stats)
85 {
86 	struct skb_shared_hwtstamps hwts = {};
87 	ktime_t diff;
88 
89 	diff = abs(mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp -
90 		   mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp);
91 
92 	/* Maximal allowed diff is 1 / 128 second */
93 	if (diff > (NSEC_PER_SEC >> 7)) {
94 		cq_stats->abort++;
95 		cq_stats->abort_abs_diff_ns += diff;
96 		return;
97 	}
98 
99 	hwts.hwtstamp = mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp;
100 	skb_tstamp_tx(skb, &hwts);
101 }
102 
mlx5e_skb_cb_hwtstamp_handler(struct sk_buff * skb,int hwtstamp_type,ktime_t hwtstamp,struct mlx5e_ptp_cq_stats * cq_stats)103 void mlx5e_skb_cb_hwtstamp_handler(struct sk_buff *skb, int hwtstamp_type,
104 				   ktime_t hwtstamp,
105 				   struct mlx5e_ptp_cq_stats *cq_stats)
106 {
107 	switch (hwtstamp_type) {
108 	case (MLX5E_SKB_CB_CQE_HWTSTAMP):
109 		mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp = hwtstamp;
110 		break;
111 	case (MLX5E_SKB_CB_PORT_HWTSTAMP):
112 		mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp = hwtstamp;
113 		break;
114 	}
115 
116 	/* If both CQEs arrive, check and report the port tstamp, and clear skb cb as
117 	 * skb soon to be released.
118 	 */
119 	if (!mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp ||
120 	    !mlx5e_skb_cb_get_hwts(skb)->port_hwtstamp)
121 		return;
122 
123 	mlx5e_skb_cb_hwtstamp_tx(skb, cq_stats);
124 	memset(skb->cb, 0, sizeof(struct mlx5e_skb_cb_hwtstamp));
125 }
126 
127 static struct sk_buff *
mlx5e_ptp_metadata_map_lookup(struct mlx5e_ptp_metadata_map * map,u16 metadata)128 mlx5e_ptp_metadata_map_lookup(struct mlx5e_ptp_metadata_map *map, u16 metadata)
129 {
130 	return map->data[metadata];
131 }
132 
133 static struct sk_buff *
mlx5e_ptp_metadata_map_remove(struct mlx5e_ptp_metadata_map * map,u16 metadata)134 mlx5e_ptp_metadata_map_remove(struct mlx5e_ptp_metadata_map *map, u16 metadata)
135 {
136 	struct sk_buff *skb;
137 
138 	skb = map->data[metadata];
139 	map->data[metadata] = NULL;
140 
141 	return skb;
142 }
143 
mlx5e_ptp_metadata_map_unhealthy(struct mlx5e_ptp_metadata_map * map)144 static bool mlx5e_ptp_metadata_map_unhealthy(struct mlx5e_ptp_metadata_map *map)
145 {
146 	/* Considered beginning unhealthy state if size * 15 / 2^4 cannot be reclaimed. */
147 	return map->undelivered_counter > (map->capacity >> 4) * 15;
148 }
149 
mlx5e_ptpsq_mark_ts_cqes_undelivered(struct mlx5e_ptpsq * ptpsq,ktime_t port_tstamp)150 static void mlx5e_ptpsq_mark_ts_cqes_undelivered(struct mlx5e_ptpsq *ptpsq,
151 						 ktime_t port_tstamp)
152 {
153 	struct mlx5e_ptp_port_ts_cqe_list *cqe_list = ptpsq->ts_cqe_pending_list;
154 	ktime_t timeout = ns_to_ktime(MLX5E_PTP_TS_CQE_UNDELIVERED_TIMEOUT);
155 	struct mlx5e_ptp_metadata_map *metadata_map = &ptpsq->metadata_map;
156 	struct mlx5e_ptp_port_ts_cqe_tracker *pos, *n;
157 
158 	spin_lock_bh(&cqe_list->tracker_list_lock);
159 	list_for_each_entry_safe(pos, n, &cqe_list->tracker_list_head, entry) {
160 		struct sk_buff *skb =
161 			mlx5e_ptp_metadata_map_lookup(metadata_map, pos->metadata_id);
162 		ktime_t dma_tstamp = mlx5e_skb_cb_get_hwts(skb)->cqe_hwtstamp;
163 
164 		if (!dma_tstamp ||
165 		    ktime_after(ktime_add(dma_tstamp, timeout), port_tstamp))
166 			break;
167 
168 		metadata_map->undelivered_counter++;
169 		WARN_ON_ONCE(!pos->inuse);
170 		pos->inuse = false;
171 		list_del(&pos->entry);
172 		ptpsq->cq_stats->lost_cqe++;
173 	}
174 	spin_unlock_bh(&cqe_list->tracker_list_lock);
175 }
176 
177 #define PTP_WQE_CTR2IDX(val) ((val) & ptpsq->ts_cqe_ctr_mask)
178 
mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq * ptpsq,struct mlx5_cqe64 * cqe,u8 * md_buff,u8 * md_buff_sz,int budget)179 static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq,
180 				    struct mlx5_cqe64 *cqe,
181 				    u8 *md_buff,
182 				    u8 *md_buff_sz,
183 				    int budget)
184 {
185 	struct mlx5e_ptp_port_ts_cqe_list *pending_cqe_list = ptpsq->ts_cqe_pending_list;
186 	u8 metadata_id = PTP_WQE_CTR2IDX(be16_to_cpu(cqe->wqe_counter));
187 	bool is_err_cqe = !!MLX5E_RX_ERR_CQE(cqe);
188 	struct mlx5e_txqsq *sq = &ptpsq->txqsq;
189 	struct sk_buff *skb;
190 	ktime_t hwtstamp;
191 
192 	if (likely(pending_cqe_list->nodes[metadata_id].inuse)) {
193 		mlx5e_ptp_port_ts_cqe_list_remove(pending_cqe_list, metadata_id);
194 	} else {
195 		/* Reclaim space in the unlikely event CQE was delivered after
196 		 * marking it late.
197 		 */
198 		ptpsq->metadata_map.undelivered_counter--;
199 		ptpsq->cq_stats->late_cqe++;
200 	}
201 
202 	skb = mlx5e_ptp_metadata_map_remove(&ptpsq->metadata_map, metadata_id);
203 
204 	if (unlikely(is_err_cqe)) {
205 		ptpsq->cq_stats->err_cqe++;
206 		goto out;
207 	}
208 
209 	hwtstamp = mlx5e_cqe_ts_to_ns(sq->ptp_cyc2time, sq->clock, get_cqe_ts(cqe));
210 	mlx5e_skb_cb_hwtstamp_handler(skb, MLX5E_SKB_CB_PORT_HWTSTAMP,
211 				      hwtstamp, ptpsq->cq_stats);
212 	ptpsq->cq_stats->cqe++;
213 
214 	mlx5e_ptpsq_mark_ts_cqes_undelivered(ptpsq, hwtstamp);
215 out:
216 	napi_consume_skb(skb, budget);
217 	md_buff[(*md_buff_sz)++] = metadata_id;
218 	if (unlikely(mlx5e_ptp_metadata_map_unhealthy(&ptpsq->metadata_map)) &&
219 	    !test_and_set_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state))
220 		queue_work(ptpsq->txqsq.priv->wq, &ptpsq->report_unhealthy_work);
221 }
222 
mlx5e_ptp_poll_ts_cq(struct mlx5e_cq * cq,int napi_budget)223 static bool mlx5e_ptp_poll_ts_cq(struct mlx5e_cq *cq, int napi_budget)
224 {
225 	struct mlx5e_ptpsq *ptpsq = container_of(cq, struct mlx5e_ptpsq, ts_cq);
226 	int budget = min(napi_budget, MLX5E_TX_CQ_POLL_BUDGET);
227 	u8 metadata_buff[MLX5E_TX_CQ_POLL_BUDGET];
228 	u8 metadata_buff_sz = 0;
229 	struct mlx5_cqwq *cqwq;
230 	struct mlx5_cqe64 *cqe;
231 	int work_done = 0;
232 
233 	cqwq = &cq->wq;
234 
235 	if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &ptpsq->txqsq.state)))
236 		return false;
237 
238 	cqe = mlx5_cqwq_get_cqe(cqwq);
239 	if (!cqe)
240 		return false;
241 
242 	do {
243 		mlx5_cqwq_pop(cqwq);
244 
245 		mlx5e_ptp_handle_ts_cqe(ptpsq, cqe,
246 					metadata_buff, &metadata_buff_sz, napi_budget);
247 	} while ((++work_done < budget) && (cqe = mlx5_cqwq_get_cqe(cqwq)));
248 
249 	mlx5_cqwq_update_db_record(cqwq);
250 
251 	/* ensure cq space is freed before enabling more cqes */
252 	wmb();
253 
254 	while (metadata_buff_sz > 0)
255 		mlx5e_ptp_metadata_fifo_push(&ptpsq->metadata_freelist,
256 					     metadata_buff[--metadata_buff_sz]);
257 
258 	mlx5e_txqsq_wake(&ptpsq->txqsq);
259 
260 	return work_done == budget;
261 }
262 
mlx5e_ptp_napi_poll(struct napi_struct * napi,int budget)263 static int mlx5e_ptp_napi_poll(struct napi_struct *napi, int budget)
264 {
265 	struct mlx5e_ptp *c = container_of(napi, struct mlx5e_ptp, napi);
266 	struct mlx5e_ch_stats *ch_stats = c->stats;
267 	struct mlx5e_rq *rq = &c->rq;
268 	bool busy = false;
269 	int work_done = 0;
270 	int i;
271 
272 	rcu_read_lock();
273 
274 	ch_stats->poll++;
275 
276 	if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
277 		for (i = 0; i < c->num_tc; i++) {
278 			busy |= mlx5e_poll_tx_cq(&c->ptpsq[i].txqsq.cq, budget);
279 			busy |= mlx5e_ptp_poll_ts_cq(&c->ptpsq[i].ts_cq, budget);
280 		}
281 	}
282 	if (test_bit(MLX5E_PTP_STATE_RX, c->state) && likely(budget)) {
283 		work_done = mlx5e_poll_rx_cq(&rq->cq, budget);
284 		busy |= work_done == budget;
285 		busy |= INDIRECT_CALL_2(rq->post_wqes,
286 					mlx5e_post_rx_mpwqes,
287 					mlx5e_post_rx_wqes,
288 					rq);
289 	}
290 
291 	if (busy) {
292 		work_done = budget;
293 		goto out;
294 	}
295 
296 	if (unlikely(!napi_complete_done(napi, work_done)))
297 		goto out;
298 
299 	ch_stats->arm++;
300 
301 	if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
302 		for (i = 0; i < c->num_tc; i++) {
303 			mlx5e_cq_arm(&c->ptpsq[i].txqsq.cq);
304 			mlx5e_cq_arm(&c->ptpsq[i].ts_cq);
305 		}
306 	}
307 	if (test_bit(MLX5E_PTP_STATE_RX, c->state))
308 		mlx5e_cq_arm(&rq->cq);
309 
310 out:
311 	rcu_read_unlock();
312 
313 	return work_done;
314 }
315 
mlx5e_ptp_alloc_txqsq(struct mlx5e_ptp * c,int txq_ix,struct mlx5e_params * params,struct mlx5e_sq_param * param,struct mlx5e_txqsq * sq,int tc,struct mlx5e_ptpsq * ptpsq)316 static int mlx5e_ptp_alloc_txqsq(struct mlx5e_ptp *c, int txq_ix,
317 				 struct mlx5e_params *params,
318 				 struct mlx5e_sq_param *param,
319 				 struct mlx5e_txqsq *sq, int tc,
320 				 struct mlx5e_ptpsq *ptpsq)
321 {
322 	void *sqc_wq               = MLX5_ADDR_OF(sqc, param->sqc, wq);
323 	struct mlx5_core_dev *mdev = c->mdev;
324 	struct mlx5_wq_cyc *wq = &sq->wq;
325 	int err;
326 	int node;
327 
328 	sq->pdev      = c->pdev;
329 	sq->clock     = &mdev->clock;
330 	sq->mkey_be   = c->mkey_be;
331 	sq->netdev    = c->netdev;
332 	sq->priv      = c->priv;
333 	sq->mdev      = mdev;
334 	sq->ch_ix     = MLX5E_PTP_CHANNEL_IX;
335 	sq->txq_ix    = txq_ix;
336 	sq->uar_map   = mdev->mlx5e_res.hw_objs.bfreg.map;
337 	sq->min_inline_mode = params->tx_min_inline_mode;
338 	sq->hw_mtu    = MLX5E_SW2HW_MTU(params, params->sw_mtu);
339 	sq->stats     = &c->priv->ptp_stats.sq[tc];
340 	sq->ptpsq     = ptpsq;
341 	INIT_WORK(&sq->recover_work, mlx5e_tx_err_cqe_work);
342 	if (!MLX5_CAP_ETH(mdev, wqe_vlan_insert))
343 		set_bit(MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE, &sq->state);
344 	sq->stop_room = param->stop_room;
345 	sq->ptp_cyc2time = mlx5_sq_ts_translator(mdev);
346 
347 	node = dev_to_node(mlx5_core_dma_dev(mdev));
348 
349 	param->wq.db_numa_node = node;
350 	err = mlx5_wq_cyc_create(mdev, &param->wq, sqc_wq, wq, &sq->wq_ctrl);
351 	if (err)
352 		return err;
353 	wq->db    = &wq->db[MLX5_SND_DBR];
354 
355 	err = mlx5e_alloc_txqsq_db(sq, node);
356 	if (err)
357 		goto err_sq_wq_destroy;
358 
359 	return 0;
360 
361 err_sq_wq_destroy:
362 	mlx5_wq_destroy(&sq->wq_ctrl);
363 
364 	return err;
365 }
366 
mlx5e_ptp_destroy_sq(struct mlx5_core_dev * mdev,u32 sqn)367 static void mlx5e_ptp_destroy_sq(struct mlx5_core_dev *mdev, u32 sqn)
368 {
369 	mlx5_core_destroy_sq(mdev, sqn);
370 }
371 
mlx5e_ptp_alloc_traffic_db(struct mlx5e_ptpsq * ptpsq,int numa)372 static int mlx5e_ptp_alloc_traffic_db(struct mlx5e_ptpsq *ptpsq, int numa)
373 {
374 	struct mlx5e_ptp_metadata_fifo *metadata_freelist = &ptpsq->metadata_freelist;
375 	struct mlx5e_ptp_metadata_map *metadata_map = &ptpsq->metadata_map;
376 	struct mlx5e_ptp_port_ts_cqe_list *cqe_list;
377 	int db_sz;
378 	int md;
379 
380 	cqe_list = kvzalloc_node(sizeof(*ptpsq->ts_cqe_pending_list), GFP_KERNEL, numa);
381 	if (!cqe_list)
382 		return -ENOMEM;
383 	ptpsq->ts_cqe_pending_list = cqe_list;
384 
385 	db_sz = min_t(u32, mlx5_wq_cyc_get_size(&ptpsq->txqsq.wq),
386 		      1 << MLX5_CAP_GEN_2(ptpsq->txqsq.mdev,
387 					  ts_cqe_metadata_size2wqe_counter));
388 	ptpsq->ts_cqe_ctr_mask = db_sz - 1;
389 
390 	cqe_list->nodes = kvzalloc_node(array_size(db_sz, sizeof(*cqe_list->nodes)),
391 					GFP_KERNEL, numa);
392 	if (!cqe_list->nodes)
393 		goto free_cqe_list;
394 	INIT_LIST_HEAD(&cqe_list->tracker_list_head);
395 	spin_lock_init(&cqe_list->tracker_list_lock);
396 
397 	metadata_freelist->data =
398 		kvzalloc_node(array_size(db_sz, sizeof(*metadata_freelist->data)),
399 			      GFP_KERNEL, numa);
400 	if (!metadata_freelist->data)
401 		goto free_cqe_list_nodes;
402 	metadata_freelist->mask = ptpsq->ts_cqe_ctr_mask;
403 
404 	for (md = 0; md < db_sz; ++md) {
405 		cqe_list->nodes[md].metadata_id = md;
406 		metadata_freelist->data[md] = md;
407 	}
408 	metadata_freelist->pc = db_sz;
409 
410 	metadata_map->data =
411 		kvzalloc_node(array_size(db_sz, sizeof(*metadata_map->data)),
412 			      GFP_KERNEL, numa);
413 	if (!metadata_map->data)
414 		goto free_metadata_freelist;
415 	metadata_map->capacity = db_sz;
416 
417 	return 0;
418 
419 free_metadata_freelist:
420 	kvfree(metadata_freelist->data);
421 free_cqe_list_nodes:
422 	kvfree(cqe_list->nodes);
423 free_cqe_list:
424 	kvfree(cqe_list);
425 	return -ENOMEM;
426 }
427 
mlx5e_ptp_drain_metadata_map(struct mlx5e_ptp_metadata_map * map)428 static void mlx5e_ptp_drain_metadata_map(struct mlx5e_ptp_metadata_map *map)
429 {
430 	int idx;
431 
432 	for (idx = 0; idx < map->capacity; ++idx) {
433 		struct sk_buff *skb = map->data[idx];
434 
435 		dev_kfree_skb_any(skb);
436 	}
437 }
438 
mlx5e_ptp_free_traffic_db(struct mlx5e_ptpsq * ptpsq)439 static void mlx5e_ptp_free_traffic_db(struct mlx5e_ptpsq *ptpsq)
440 {
441 	mlx5e_ptp_drain_metadata_map(&ptpsq->metadata_map);
442 	kvfree(ptpsq->metadata_map.data);
443 	kvfree(ptpsq->metadata_freelist.data);
444 	kvfree(ptpsq->ts_cqe_pending_list->nodes);
445 	kvfree(ptpsq->ts_cqe_pending_list);
446 }
447 
mlx5e_ptpsq_unhealthy_work(struct work_struct * work)448 static void mlx5e_ptpsq_unhealthy_work(struct work_struct *work)
449 {
450 	struct mlx5e_ptpsq *ptpsq =
451 		container_of(work, struct mlx5e_ptpsq, report_unhealthy_work);
452 
453 	mlx5e_reporter_tx_ptpsq_unhealthy(ptpsq);
454 }
455 
mlx5e_ptp_open_txqsq(struct mlx5e_ptp * c,u32 tisn,int txq_ix,struct mlx5e_ptp_params * cparams,int tc,struct mlx5e_ptpsq * ptpsq)456 static int mlx5e_ptp_open_txqsq(struct mlx5e_ptp *c, u32 tisn,
457 				int txq_ix, struct mlx5e_ptp_params *cparams,
458 				int tc, struct mlx5e_ptpsq *ptpsq)
459 {
460 	struct mlx5e_sq_param *sqp = &cparams->txq_sq_param;
461 	struct mlx5e_txqsq *txqsq = &ptpsq->txqsq;
462 	struct mlx5e_create_sq_param csp = {};
463 	int err;
464 
465 	err = mlx5e_ptp_alloc_txqsq(c, txq_ix, &cparams->params, sqp,
466 				    txqsq, tc, ptpsq);
467 	if (err)
468 		return err;
469 
470 	csp.tisn            = tisn;
471 	csp.tis_lst_sz      = 1;
472 	csp.cqn             = txqsq->cq.mcq.cqn;
473 	csp.wq_ctrl         = &txqsq->wq_ctrl;
474 	csp.min_inline_mode = txqsq->min_inline_mode;
475 	csp.ts_cqe_to_dest_cqn = ptpsq->ts_cq.mcq.cqn;
476 
477 	err = mlx5e_create_sq_rdy(c->mdev, sqp, &csp, 0, &txqsq->sqn);
478 	if (err)
479 		goto err_free_txqsq;
480 
481 	err = mlx5e_ptp_alloc_traffic_db(ptpsq, dev_to_node(mlx5_core_dma_dev(c->mdev)));
482 	if (err)
483 		goto err_free_txqsq;
484 
485 	INIT_WORK(&ptpsq->report_unhealthy_work, mlx5e_ptpsq_unhealthy_work);
486 
487 	return 0;
488 
489 err_free_txqsq:
490 	mlx5e_free_txqsq(txqsq);
491 
492 	return err;
493 }
494 
mlx5e_ptp_close_txqsq(struct mlx5e_ptpsq * ptpsq)495 static void mlx5e_ptp_close_txqsq(struct mlx5e_ptpsq *ptpsq)
496 {
497 	struct mlx5e_txqsq *sq = &ptpsq->txqsq;
498 	struct mlx5_core_dev *mdev = sq->mdev;
499 
500 	if (current_work() != &ptpsq->report_unhealthy_work)
501 		cancel_work_sync(&ptpsq->report_unhealthy_work);
502 	mlx5e_ptp_free_traffic_db(ptpsq);
503 	cancel_work_sync(&sq->recover_work);
504 	mlx5e_ptp_destroy_sq(mdev, sq->sqn);
505 	mlx5e_free_txqsq_descs(sq);
506 	mlx5e_free_txqsq(sq);
507 }
508 
mlx5e_ptp_open_txqsqs(struct mlx5e_ptp * c,struct mlx5e_ptp_params * cparams)509 static int mlx5e_ptp_open_txqsqs(struct mlx5e_ptp *c,
510 				 struct mlx5e_ptp_params *cparams)
511 {
512 	struct mlx5e_params *params = &cparams->params;
513 	u8 num_tc = mlx5e_get_dcb_num_tc(params);
514 	int ix_base;
515 	int err;
516 	int tc;
517 
518 	ix_base = num_tc * params->num_channels;
519 
520 	for (tc = 0; tc < num_tc; tc++) {
521 		int txq_ix = ix_base + tc;
522 		u32 tisn;
523 
524 		tisn = mlx5e_profile_get_tisn(c->mdev, c->priv, c->priv->profile,
525 					      c->lag_port, tc);
526 		err = mlx5e_ptp_open_txqsq(c, tisn, txq_ix, cparams, tc, &c->ptpsq[tc]);
527 		if (err)
528 			goto close_txqsq;
529 	}
530 
531 	return 0;
532 
533 close_txqsq:
534 	for (--tc; tc >= 0; tc--)
535 		mlx5e_ptp_close_txqsq(&c->ptpsq[tc]);
536 
537 	return err;
538 }
539 
mlx5e_ptp_close_txqsqs(struct mlx5e_ptp * c)540 static void mlx5e_ptp_close_txqsqs(struct mlx5e_ptp *c)
541 {
542 	int tc;
543 
544 	for (tc = 0; tc < c->num_tc; tc++)
545 		mlx5e_ptp_close_txqsq(&c->ptpsq[tc]);
546 }
547 
mlx5e_ptp_open_tx_cqs(struct mlx5e_ptp * c,struct mlx5e_ptp_params * cparams)548 static int mlx5e_ptp_open_tx_cqs(struct mlx5e_ptp *c,
549 				 struct mlx5e_ptp_params *cparams)
550 {
551 	struct mlx5e_params *params = &cparams->params;
552 	struct mlx5e_create_cq_param ccp = {};
553 	struct dim_cq_moder ptp_moder = {};
554 	struct mlx5e_cq_param *cq_param;
555 	u8 num_tc;
556 	int err;
557 	int tc;
558 
559 	num_tc = mlx5e_get_dcb_num_tc(params);
560 
561 	ccp.netdev   = c->netdev;
562 	ccp.wq       = c->priv->wq;
563 	ccp.node     = dev_to_node(mlx5_core_dma_dev(c->mdev));
564 	ccp.ch_stats = c->stats;
565 	ccp.napi     = &c->napi;
566 	ccp.ix       = MLX5E_PTP_CHANNEL_IX;
567 
568 	cq_param = &cparams->txq_sq_param.cqp;
569 
570 	for (tc = 0; tc < num_tc; tc++) {
571 		struct mlx5e_cq *cq = &c->ptpsq[tc].txqsq.cq;
572 
573 		err = mlx5e_open_cq(c->mdev, ptp_moder, cq_param, &ccp, cq);
574 		if (err)
575 			goto out_err_txqsq_cq;
576 	}
577 
578 	for (tc = 0; tc < num_tc; tc++) {
579 		struct mlx5e_cq *cq = &c->ptpsq[tc].ts_cq;
580 		struct mlx5e_ptpsq *ptpsq = &c->ptpsq[tc];
581 
582 		err = mlx5e_open_cq(c->mdev, ptp_moder, cq_param, &ccp, cq);
583 		if (err)
584 			goto out_err_ts_cq;
585 
586 		ptpsq->cq_stats = &c->priv->ptp_stats.cq[tc];
587 	}
588 
589 	return 0;
590 
591 out_err_ts_cq:
592 	for (--tc; tc >= 0; tc--)
593 		mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
594 	tc = num_tc;
595 out_err_txqsq_cq:
596 	for (--tc; tc >= 0; tc--)
597 		mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
598 
599 	return err;
600 }
601 
mlx5e_ptp_open_rx_cq(struct mlx5e_ptp * c,struct mlx5e_ptp_params * cparams)602 static int mlx5e_ptp_open_rx_cq(struct mlx5e_ptp *c,
603 				struct mlx5e_ptp_params *cparams)
604 {
605 	struct mlx5e_create_cq_param ccp = {};
606 	struct dim_cq_moder ptp_moder = {};
607 	struct mlx5e_cq_param *cq_param;
608 	struct mlx5e_cq *cq = &c->rq.cq;
609 
610 	ccp.netdev   = c->netdev;
611 	ccp.wq       = c->priv->wq;
612 	ccp.node     = dev_to_node(mlx5_core_dma_dev(c->mdev));
613 	ccp.ch_stats = c->stats;
614 	ccp.napi     = &c->napi;
615 	ccp.ix       = MLX5E_PTP_CHANNEL_IX;
616 
617 	cq_param = &cparams->rq_param.cqp;
618 
619 	return mlx5e_open_cq(c->mdev, ptp_moder, cq_param, &ccp, cq);
620 }
621 
mlx5e_ptp_close_tx_cqs(struct mlx5e_ptp * c)622 static void mlx5e_ptp_close_tx_cqs(struct mlx5e_ptp *c)
623 {
624 	int tc;
625 
626 	for (tc = 0; tc < c->num_tc; tc++)
627 		mlx5e_close_cq(&c->ptpsq[tc].ts_cq);
628 
629 	for (tc = 0; tc < c->num_tc; tc++)
630 		mlx5e_close_cq(&c->ptpsq[tc].txqsq.cq);
631 }
632 
mlx5e_ptp_build_sq_param(struct mlx5_core_dev * mdev,struct mlx5e_params * params,struct mlx5e_sq_param * param)633 static void mlx5e_ptp_build_sq_param(struct mlx5_core_dev *mdev,
634 				     struct mlx5e_params *params,
635 				     struct mlx5e_sq_param *param)
636 {
637 	void *sqc = param->sqc;
638 	void *wq;
639 
640 	mlx5e_build_sq_param_common(mdev, param);
641 
642 	wq = MLX5_ADDR_OF(sqc, sqc, wq);
643 	MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);
644 	param->stop_room = mlx5e_stop_room_for_max_wqe(mdev);
645 	mlx5e_build_tx_cq_param(mdev, params, &param->cqp);
646 }
647 
mlx5e_ptp_build_rq_param(struct mlx5_core_dev * mdev,struct net_device * netdev,struct mlx5e_ptp_params * ptp_params)648 static void mlx5e_ptp_build_rq_param(struct mlx5_core_dev *mdev,
649 				     struct net_device *netdev,
650 				     struct mlx5e_ptp_params *ptp_params)
651 {
652 	struct mlx5e_rq_param *rq_params = &ptp_params->rq_param;
653 	struct mlx5e_params *params = &ptp_params->params;
654 
655 	params->rq_wq_type = MLX5_WQ_TYPE_CYCLIC;
656 	mlx5e_init_rq_type_params(mdev, params);
657 	params->sw_mtu = netdev->max_mtu;
658 	mlx5e_build_rq_param(mdev, params, NULL, rq_params);
659 }
660 
mlx5e_ptp_build_params(struct mlx5e_ptp * c,struct mlx5e_ptp_params * cparams,struct mlx5e_params * orig)661 static void mlx5e_ptp_build_params(struct mlx5e_ptp *c,
662 				   struct mlx5e_ptp_params *cparams,
663 				   struct mlx5e_params *orig)
664 {
665 	struct mlx5e_params *params = &cparams->params;
666 
667 	params->tx_min_inline_mode = orig->tx_min_inline_mode;
668 	params->num_channels = orig->num_channels;
669 	params->hard_mtu = orig->hard_mtu;
670 	params->sw_mtu = orig->sw_mtu;
671 	params->mqprio = orig->mqprio;
672 
673 	/* SQ */
674 	if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
675 		params->log_sq_size =
676 			min(MLX5_CAP_GEN_2(c->mdev, ts_cqe_metadata_size2wqe_counter),
677 			    MLX5E_PTP_MAX_LOG_SQ_SIZE);
678 		params->log_sq_size = min(params->log_sq_size, orig->log_sq_size);
679 		mlx5e_ptp_build_sq_param(c->mdev, params, &cparams->txq_sq_param);
680 	}
681 	/* RQ */
682 	if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
683 		params->vlan_strip_disable = orig->vlan_strip_disable;
684 		mlx5e_ptp_build_rq_param(c->mdev, c->netdev, cparams);
685 	}
686 }
687 
mlx5e_init_ptp_rq(struct mlx5e_ptp * c,struct mlx5e_params * params,struct mlx5e_rq * rq)688 static int mlx5e_init_ptp_rq(struct mlx5e_ptp *c, struct mlx5e_params *params,
689 			     struct mlx5e_rq *rq)
690 {
691 	struct mlx5_core_dev *mdev = c->mdev;
692 	struct mlx5e_priv *priv = c->priv;
693 	int err;
694 
695 	rq->wq_type      = params->rq_wq_type;
696 	rq->pdev         = c->pdev;
697 	rq->netdev       = priv->netdev;
698 	rq->priv         = priv;
699 	rq->clock        = &mdev->clock;
700 	rq->tstamp       = &priv->tstamp;
701 	rq->mdev         = mdev;
702 	rq->hw_mtu       = MLX5E_SW2HW_MTU(params, params->sw_mtu);
703 	rq->stats        = &c->priv->ptp_stats.rq;
704 	rq->ix           = MLX5E_PTP_CHANNEL_IX;
705 	rq->ptp_cyc2time = mlx5_rq_ts_translator(mdev);
706 	err = mlx5e_rq_set_handlers(rq, params, false);
707 	if (err)
708 		return err;
709 
710 	return xdp_rxq_info_reg(&rq->xdp_rxq, rq->netdev, rq->ix, 0);
711 }
712 
mlx5e_ptp_open_rq(struct mlx5e_ptp * c,struct mlx5e_params * params,struct mlx5e_rq_param * rq_param)713 static int mlx5e_ptp_open_rq(struct mlx5e_ptp *c, struct mlx5e_params *params,
714 			     struct mlx5e_rq_param *rq_param)
715 {
716 	int node = dev_to_node(c->mdev->device);
717 	int err, sd_ix;
718 	u16 q_counter;
719 
720 	err = mlx5e_init_ptp_rq(c, params, &c->rq);
721 	if (err)
722 		return err;
723 
724 	sd_ix = mlx5_sd_ch_ix_get_dev_ix(c->mdev, MLX5E_PTP_CHANNEL_IX);
725 	q_counter = c->priv->q_counter[sd_ix];
726 	return mlx5e_open_rq(params, rq_param, NULL, node, q_counter, &c->rq);
727 }
728 
mlx5e_ptp_open_queues(struct mlx5e_ptp * c,struct mlx5e_ptp_params * cparams)729 static int mlx5e_ptp_open_queues(struct mlx5e_ptp *c,
730 				 struct mlx5e_ptp_params *cparams)
731 {
732 	int err;
733 
734 	if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
735 		err = mlx5e_ptp_open_tx_cqs(c, cparams);
736 		if (err)
737 			return err;
738 
739 		err = mlx5e_ptp_open_txqsqs(c, cparams);
740 		if (err)
741 			goto close_tx_cqs;
742 	}
743 	if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
744 		err = mlx5e_ptp_open_rx_cq(c, cparams);
745 		if (err)
746 			goto close_txqsq;
747 
748 		err = mlx5e_ptp_open_rq(c, &cparams->params, &cparams->rq_param);
749 		if (err)
750 			goto close_rx_cq;
751 	}
752 	return 0;
753 
754 close_rx_cq:
755 	if (test_bit(MLX5E_PTP_STATE_RX, c->state))
756 		mlx5e_close_cq(&c->rq.cq);
757 close_txqsq:
758 	if (test_bit(MLX5E_PTP_STATE_TX, c->state))
759 		mlx5e_ptp_close_txqsqs(c);
760 close_tx_cqs:
761 	if (test_bit(MLX5E_PTP_STATE_TX, c->state))
762 		mlx5e_ptp_close_tx_cqs(c);
763 
764 	return err;
765 }
766 
mlx5e_ptp_close_queues(struct mlx5e_ptp * c)767 static void mlx5e_ptp_close_queues(struct mlx5e_ptp *c)
768 {
769 	if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
770 		mlx5e_close_rq(&c->rq);
771 		mlx5e_close_cq(&c->rq.cq);
772 	}
773 	if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
774 		mlx5e_ptp_close_txqsqs(c);
775 		mlx5e_ptp_close_tx_cqs(c);
776 	}
777 }
778 
mlx5e_ptp_set_state(struct mlx5e_ptp * c,struct mlx5e_params * params)779 static int mlx5e_ptp_set_state(struct mlx5e_ptp *c, struct mlx5e_params *params)
780 {
781 	if (MLX5E_GET_PFLAG(params, MLX5E_PFLAG_TX_PORT_TS))
782 		__set_bit(MLX5E_PTP_STATE_TX, c->state);
783 
784 	if (params->ptp_rx)
785 		__set_bit(MLX5E_PTP_STATE_RX, c->state);
786 
787 	return bitmap_empty(c->state, MLX5E_PTP_STATE_NUM_STATES) ? -EINVAL : 0;
788 }
789 
mlx5e_ptp_rx_unset_fs(struct mlx5e_flow_steering * fs)790 static void mlx5e_ptp_rx_unset_fs(struct mlx5e_flow_steering *fs)
791 {
792 	struct mlx5e_ptp_fs *ptp_fs = mlx5e_fs_get_ptp(fs);
793 
794 	if (!ptp_fs->valid)
795 		return;
796 
797 	mlx5e_fs_tt_redirect_del_rule(ptp_fs->l2_rule);
798 	mlx5e_fs_tt_redirect_any_destroy(fs);
799 
800 	mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v6_rule);
801 	mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v4_rule);
802 	mlx5e_fs_tt_redirect_udp_destroy(fs);
803 	ptp_fs->valid = false;
804 }
805 
mlx5e_ptp_rx_set_fs(struct mlx5e_priv * priv)806 static int mlx5e_ptp_rx_set_fs(struct mlx5e_priv *priv)
807 {
808 	u32 tirn = mlx5e_rx_res_get_tirn_ptp(priv->rx_res);
809 	struct mlx5e_flow_steering *fs = priv->fs;
810 	struct mlx5_flow_handle *rule;
811 	struct mlx5e_ptp_fs *ptp_fs;
812 	int err;
813 
814 	ptp_fs = mlx5e_fs_get_ptp(fs);
815 	if (ptp_fs->valid)
816 		return 0;
817 
818 	err = mlx5e_fs_tt_redirect_udp_create(fs);
819 	if (err)
820 		goto out_free;
821 
822 	rule = mlx5e_fs_tt_redirect_udp_add_rule(fs, MLX5_TT_IPV4_UDP,
823 						 tirn, PTP_EV_PORT);
824 	if (IS_ERR(rule)) {
825 		err = PTR_ERR(rule);
826 		goto out_destroy_fs_udp;
827 	}
828 	ptp_fs->udp_v4_rule = rule;
829 
830 	rule = mlx5e_fs_tt_redirect_udp_add_rule(fs, MLX5_TT_IPV6_UDP,
831 						 tirn, PTP_EV_PORT);
832 	if (IS_ERR(rule)) {
833 		err = PTR_ERR(rule);
834 		goto out_destroy_udp_v4_rule;
835 	}
836 	ptp_fs->udp_v6_rule = rule;
837 
838 	err = mlx5e_fs_tt_redirect_any_create(fs);
839 	if (err)
840 		goto out_destroy_udp_v6_rule;
841 
842 	rule = mlx5e_fs_tt_redirect_any_add_rule(fs, tirn, ETH_P_1588);
843 	if (IS_ERR(rule)) {
844 		err = PTR_ERR(rule);
845 		goto out_destroy_fs_any;
846 	}
847 	ptp_fs->l2_rule = rule;
848 	ptp_fs->valid = true;
849 
850 	return 0;
851 
852 out_destroy_fs_any:
853 	mlx5e_fs_tt_redirect_any_destroy(fs);
854 out_destroy_udp_v6_rule:
855 	mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v6_rule);
856 out_destroy_udp_v4_rule:
857 	mlx5e_fs_tt_redirect_del_rule(ptp_fs->udp_v4_rule);
858 out_destroy_fs_udp:
859 	mlx5e_fs_tt_redirect_udp_destroy(fs);
860 out_free:
861 	return err;
862 }
863 
mlx5e_ptp_open(struct mlx5e_priv * priv,struct mlx5e_params * params,u8 lag_port,struct mlx5e_ptp ** cp)864 int mlx5e_ptp_open(struct mlx5e_priv *priv, struct mlx5e_params *params,
865 		   u8 lag_port, struct mlx5e_ptp **cp)
866 {
867 	struct net_device *netdev = priv->netdev;
868 	struct mlx5_core_dev *mdev = priv->mdev;
869 	struct mlx5e_ptp_params *cparams;
870 	struct mlx5e_ptp *c;
871 	int err;
872 
873 
874 	c = kvzalloc_node(sizeof(*c), GFP_KERNEL, dev_to_node(mlx5_core_dma_dev(mdev)));
875 	cparams = kvzalloc(sizeof(*cparams), GFP_KERNEL);
876 	if (!c || !cparams) {
877 		err = -ENOMEM;
878 		goto err_free;
879 	}
880 
881 	c->priv     = priv;
882 	c->mdev     = priv->mdev;
883 	c->tstamp   = &priv->tstamp;
884 	c->pdev     = mlx5_core_dma_dev(priv->mdev);
885 	c->netdev   = priv->netdev;
886 	c->mkey_be  = cpu_to_be32(priv->mdev->mlx5e_res.hw_objs.mkey);
887 	c->num_tc   = mlx5e_get_dcb_num_tc(params);
888 	c->stats    = &priv->ptp_stats.ch;
889 	c->lag_port = lag_port;
890 
891 	err = mlx5e_ptp_set_state(c, params);
892 	if (err)
893 		goto err_free;
894 
895 	netif_napi_add(netdev, &c->napi, mlx5e_ptp_napi_poll);
896 
897 	mlx5e_ptp_build_params(c, cparams, params);
898 
899 	err = mlx5e_ptp_open_queues(c, cparams);
900 	if (unlikely(err))
901 		goto err_napi_del;
902 
903 	if (test_bit(MLX5E_PTP_STATE_RX, c->state))
904 		priv->rx_ptp_opened = true;
905 
906 	*cp = c;
907 
908 	kvfree(cparams);
909 
910 	return 0;
911 
912 err_napi_del:
913 	netif_napi_del(&c->napi);
914 err_free:
915 	kvfree(cparams);
916 	kvfree(c);
917 	return err;
918 }
919 
mlx5e_ptp_close(struct mlx5e_ptp * c)920 void mlx5e_ptp_close(struct mlx5e_ptp *c)
921 {
922 	mlx5e_ptp_close_queues(c);
923 	netif_napi_del(&c->napi);
924 
925 	kvfree(c);
926 }
927 
mlx5e_ptp_activate_channel(struct mlx5e_ptp * c)928 void mlx5e_ptp_activate_channel(struct mlx5e_ptp *c)
929 {
930 	int tc;
931 
932 	napi_enable(&c->napi);
933 
934 	if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
935 		for (tc = 0; tc < c->num_tc; tc++)
936 			mlx5e_activate_txqsq(&c->ptpsq[tc].txqsq);
937 	}
938 	if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
939 		mlx5e_ptp_rx_set_fs(c->priv);
940 		mlx5e_activate_rq(&c->rq);
941 		netif_queue_set_napi(c->netdev, c->rq.ix, NETDEV_QUEUE_TYPE_RX, &c->napi);
942 	}
943 	mlx5e_trigger_napi_sched(&c->napi);
944 }
945 
mlx5e_ptp_deactivate_channel(struct mlx5e_ptp * c)946 void mlx5e_ptp_deactivate_channel(struct mlx5e_ptp *c)
947 {
948 	int tc;
949 
950 	if (test_bit(MLX5E_PTP_STATE_RX, c->state)) {
951 		netif_queue_set_napi(c->netdev, c->rq.ix, NETDEV_QUEUE_TYPE_RX, NULL);
952 		mlx5e_deactivate_rq(&c->rq);
953 	}
954 
955 	if (test_bit(MLX5E_PTP_STATE_TX, c->state)) {
956 		for (tc = 0; tc < c->num_tc; tc++)
957 			mlx5e_deactivate_txqsq(&c->ptpsq[tc].txqsq);
958 	}
959 
960 	napi_disable(&c->napi);
961 }
962 
mlx5e_ptp_get_rqn(struct mlx5e_ptp * c,u32 * rqn)963 int mlx5e_ptp_get_rqn(struct mlx5e_ptp *c, u32 *rqn)
964 {
965 	if (!c || !test_bit(MLX5E_PTP_STATE_RX, c->state))
966 		return -EINVAL;
967 
968 	*rqn = c->rq.rqn;
969 	return 0;
970 }
971 
mlx5e_ptp_alloc_rx_fs(struct mlx5e_flow_steering * fs,const struct mlx5e_profile * profile)972 int mlx5e_ptp_alloc_rx_fs(struct mlx5e_flow_steering *fs,
973 			  const struct mlx5e_profile *profile)
974 {
975 	struct mlx5e_ptp_fs *ptp_fs;
976 
977 	if (!mlx5e_profile_feature_cap(profile, PTP_RX))
978 		return 0;
979 
980 	ptp_fs = kzalloc(sizeof(*ptp_fs), GFP_KERNEL);
981 	if (!ptp_fs)
982 		return -ENOMEM;
983 	mlx5e_fs_set_ptp(fs, ptp_fs);
984 
985 	return 0;
986 }
987 
mlx5e_ptp_free_rx_fs(struct mlx5e_flow_steering * fs,const struct mlx5e_profile * profile)988 void mlx5e_ptp_free_rx_fs(struct mlx5e_flow_steering *fs,
989 			  const struct mlx5e_profile *profile)
990 {
991 	struct mlx5e_ptp_fs *ptp_fs = mlx5e_fs_get_ptp(fs);
992 
993 	if (!mlx5e_profile_feature_cap(profile, PTP_RX))
994 		return;
995 
996 	mlx5e_ptp_rx_unset_fs(fs);
997 	kfree(ptp_fs);
998 }
999 
mlx5e_ptp_rx_manage_fs(struct mlx5e_priv * priv,bool set)1000 int mlx5e_ptp_rx_manage_fs(struct mlx5e_priv *priv, bool set)
1001 {
1002 	struct mlx5e_ptp *c = priv->channels.ptp;
1003 
1004 	if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
1005 		return 0;
1006 
1007 	if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
1008 		return 0;
1009 
1010 	if (set) {
1011 		if (!c || !test_bit(MLX5E_PTP_STATE_RX, c->state)) {
1012 			netdev_WARN_ONCE(priv->netdev, "Don't try to add PTP RX-FS rules");
1013 			return -EINVAL;
1014 		}
1015 		return mlx5e_ptp_rx_set_fs(priv);
1016 	}
1017 	/* set == false */
1018 	if (c && test_bit(MLX5E_PTP_STATE_RX, c->state)) {
1019 		netdev_WARN_ONCE(priv->netdev, "Don't try to remove PTP RX-FS rules");
1020 		return -EINVAL;
1021 	}
1022 	mlx5e_ptp_rx_unset_fs(priv->fs);
1023 	return 0;
1024 }
1025