1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // es8326.c -- es8326 ALSA SoC audio driver
4 // Copyright Everest Semiconductor Co., Ltd
5 //
6 // Authors: David Yang <yangxiaohua@everest-semi.com>
7 //
8
9 #include <linux/clk.h>
10 #include <linux/i2c.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/module.h>
14 #include <sound/jack.h>
15 #include <sound/pcm_params.h>
16 #include <sound/soc.h>
17 #include <sound/soc-dapm.h>
18 #include <sound/tlv.h>
19 #include "es8326.h"
20
21 struct es8326_priv {
22 struct clk *mclk;
23 struct i2c_client *i2c;
24 struct regmap *regmap;
25 struct snd_soc_component *component;
26 struct delayed_work jack_detect_work;
27 struct delayed_work button_press_work;
28 struct snd_soc_jack *jack;
29 int irq;
30 /* The lock protects the situation that an irq is generated
31 * while enabling or disabling or during an irq.
32 */
33 struct mutex lock;
34 u8 jack_pol;
35 u8 interrupt_src;
36 u8 interrupt_clk;
37 u8 hpl_vol;
38 u8 hpr_vol;
39 bool jd_inverted;
40 unsigned int sysclk;
41
42 bool calibrated;
43 int version;
44 int hp;
45 int jack_remove_retry;
46 };
47
es8326_crosstalk1_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)48 static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol,
49 struct snd_ctl_elem_value *ucontrol)
50 {
51 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
52 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
53 unsigned int crosstalk_h, crosstalk_l;
54 unsigned int crosstalk;
55
56 regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
57 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
58 crosstalk_h &= 0x20;
59 crosstalk_l &= 0xf0;
60 crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4;
61 ucontrol->value.integer.value[0] = crosstalk;
62
63 return 0;
64 }
65
es8326_crosstalk1_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)66 static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol,
67 struct snd_ctl_elem_value *ucontrol)
68 {
69 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
70 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
71 unsigned int crosstalk_h, crosstalk_l;
72 unsigned int crosstalk;
73
74 crosstalk = ucontrol->value.integer.value[0];
75 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
76 crosstalk_h = (crosstalk & 0x10) << 1;
77 crosstalk_l &= 0x0f;
78 crosstalk_l |= (crosstalk & 0x0f) << 4;
79 regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
80 0x20, crosstalk_h);
81 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
82
83 return 0;
84 }
85
es8326_crosstalk2_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)86 static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol,
87 struct snd_ctl_elem_value *ucontrol)
88 {
89 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
90 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
91 unsigned int crosstalk_h, crosstalk_l;
92 unsigned int crosstalk;
93
94 regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
95 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
96 crosstalk_h &= 0x10;
97 crosstalk_l &= 0x0f;
98 crosstalk = crosstalk_h | crosstalk_l;
99 ucontrol->value.integer.value[0] = crosstalk;
100
101 return 0;
102 }
103
es8326_crosstalk2_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)104 static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol,
105 struct snd_ctl_elem_value *ucontrol)
106 {
107 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
108 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
109 unsigned int crosstalk_h, crosstalk_l;
110 unsigned int crosstalk;
111
112 crosstalk = ucontrol->value.integer.value[0];
113 regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
114 crosstalk_h = crosstalk & 0x10;
115 crosstalk_l &= 0xf0;
116 crosstalk_l |= crosstalk & 0x0f;
117 regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
118 0x10, crosstalk_h);
119 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
120
121 return 0;
122 }
123
es8326_hplvol_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)124 static int es8326_hplvol_get(struct snd_kcontrol *kcontrol,
125 struct snd_ctl_elem_value *ucontrol)
126 {
127 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
128 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
129
130 ucontrol->value.integer.value[0] = es8326->hpl_vol;
131
132 return 0;
133 }
134
es8326_hplvol_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)135 static int es8326_hplvol_set(struct snd_kcontrol *kcontrol,
136 struct snd_ctl_elem_value *ucontrol)
137 {
138 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
139 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
140 unsigned int hp_vol;
141
142 hp_vol = ucontrol->value.integer.value[0];
143 if (hp_vol > 5)
144 return -EINVAL;
145 if (es8326->hpl_vol != hp_vol) {
146 es8326->hpl_vol = hp_vol;
147 if (hp_vol >= 3)
148 hp_vol++;
149 regmap_update_bits(es8326->regmap, ES8326_HP_VOL,
150 0x70, (hp_vol << 4));
151 return 1;
152 }
153
154 return 0;
155 }
156
es8326_hprvol_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)157 static int es8326_hprvol_get(struct snd_kcontrol *kcontrol,
158 struct snd_ctl_elem_value *ucontrol)
159 {
160 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
161 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
162
163 ucontrol->value.integer.value[0] = es8326->hpr_vol;
164
165 return 0;
166 }
167
es8326_hprvol_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)168 static int es8326_hprvol_set(struct snd_kcontrol *kcontrol,
169 struct snd_ctl_elem_value *ucontrol)
170 {
171 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
172 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
173 unsigned int hp_vol;
174
175 hp_vol = ucontrol->value.integer.value[0];
176 if (hp_vol > 5)
177 return -EINVAL;
178 if (es8326->hpr_vol != hp_vol) {
179 es8326->hpr_vol = hp_vol;
180 if (hp_vol >= 3)
181 hp_vol++;
182 regmap_update_bits(es8326->regmap, ES8326_HP_VOL,
183 0x07, hp_vol);
184 return 1;
185 }
186
187 return 0;
188 }
189
190 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
191 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
192 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);
193 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0);
194 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0);
195 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0);
196 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0);
197
198 static const char *const winsize[] = {
199 "0.25db/2 LRCK",
200 "0.25db/4 LRCK",
201 "0.25db/8 LRCK",
202 "0.25db/16 LRCK",
203 "0.25db/32 LRCK",
204 "0.25db/64 LRCK",
205 "0.25db/128 LRCK",
206 "0.25db/256 LRCK",
207 "0.25db/512 LRCK",
208 "0.25db/1024 LRCK",
209 "0.25db/2048 LRCK",
210 "0.25db/4096 LRCK",
211 "0.25db/8192 LRCK",
212 "0.25db/16384 LRCK",
213 "0.25db/32768 LRCK",
214 "0.25db/65536 LRCK",
215 };
216
217 static const char *const dacpol_txt[] = {
218 "Normal", "R Invert", "L Invert", "L + R Invert" };
219
220 static const char *const hp_spkvol_switch[] = {
221 "HPVOL: HPL+HPL, SPKVOL: HPL+HPL",
222 "HPVOL: HPL+HPR, SPKVOL: HPL+HPR",
223 "HPVOL: HPL+HPL, SPKVOL: SPKL+SPKR",
224 "HPVOL: HPL+HPR, SPKVOL: SPKL+SPKR",
225 };
226
227 static const struct soc_enum dacpol =
228 SOC_ENUM_SINGLE(ES8326_DAC_DSM, 4, 4, dacpol_txt);
229 static const struct soc_enum alc_winsize =
230 SOC_ENUM_SINGLE(ES8326_ADC_RAMPRATE, 4, 16, winsize);
231 static const struct soc_enum drc_winsize =
232 SOC_ENUM_SINGLE(ES8326_DRC_WINSIZE, 4, 16, winsize);
233 static const struct soc_enum hpvol_spkvol_switch =
234 SOC_ENUM_SINGLE(ES8326_HP_MISC, 6, 4, hp_spkvol_switch);
235
236 static const struct snd_kcontrol_new es8326_snd_controls[] = {
237 SOC_SINGLE_TLV("DAC Playback Volume", ES8326_DACL_VOL, 0, 0xbf, 0, dac_vol_tlv),
238 SOC_ENUM("Playback Polarity", dacpol),
239 SOC_SINGLE_TLV("DAC Ramp Rate", ES8326_DAC_RAMPRATE, 0, 0x0f, 0, softramp_rate),
240 SOC_SINGLE_TLV("DRC Recovery Level", ES8326_DRC_RECOVERY, 0, 4, 0, drc_recovery_tlv),
241 SOC_ENUM("DRC Winsize", drc_winsize),
242 SOC_SINGLE_TLV("DRC Target Level", ES8326_DRC_WINSIZE, 0, 0x0f, 0, drc_target_tlv),
243
244 SOC_DOUBLE_R_TLV("ADC Capture Volume", ES8326_ADC1_VOL, ES8326_ADC2_VOL, 0, 0xff, 0,
245 adc_vol_tlv),
246 SOC_DOUBLE_TLV("ADC PGA Volume", ES8326_ADC_SCALE, 4, 0, 5, 0, adc_pga_tlv),
247 SOC_SINGLE_TLV("ADC PGA Gain Volume", ES8326_PGAGAIN, 0, 10, 0, adc_analog_pga_tlv),
248 SOC_SINGLE_TLV("ADC Ramp Rate", ES8326_ADC_RAMPRATE, 0, 0x0f, 0, softramp_rate),
249 SOC_SINGLE("ALC Capture Switch", ES8326_ALC_RECOVERY, 3, 1, 0),
250 SOC_SINGLE_TLV("ALC Capture Recovery Level", ES8326_ALC_LEVEL,
251 0, 4, 0, drc_recovery_tlv),
252 SOC_ENUM("ALC Capture Winsize", alc_winsize),
253 SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,
254 0, 0x0f, 0, drc_target_tlv),
255
256 SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0,
257 es8326_crosstalk1_get, es8326_crosstalk1_set),
258 SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0,
259 es8326_crosstalk2_get, es8326_crosstalk2_set),
260 SOC_SINGLE_EXT("HPL Volume", SND_SOC_NOPM, 0, 5, 0,
261 es8326_hplvol_get, es8326_hplvol_set),
262 SOC_SINGLE_EXT("HPR Volume", SND_SOC_NOPM, 0, 5, 0,
263 es8326_hprvol_get, es8326_hprvol_set),
264
265 SOC_SINGLE_TLV("HPL Playback Volume", ES8326_DACL_VOL, 0, 0xbf, 0, dac_vol_tlv),
266 SOC_SINGLE_TLV("HPR Playback Volume", ES8326_DACR_VOL, 0, 0xbf, 0, dac_vol_tlv),
267 SOC_SINGLE_TLV("SPKL Playback Volume", ES8326_SPKL_VOL, 0, 0xbf, 0, dac_vol_tlv),
268 SOC_SINGLE_TLV("SPKR Playback Volume", ES8326_SPKR_VOL, 0, 0xbf, 0, dac_vol_tlv),
269
270 SOC_ENUM("HPVol SPKVol Switch", hpvol_spkvol_switch),
271 };
272
273 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
274 SND_SOC_DAPM_INPUT("MIC1"),
275 SND_SOC_DAPM_INPUT("MIC2"),
276 SND_SOC_DAPM_INPUT("MIC3"),
277 SND_SOC_DAPM_INPUT("MIC4"),
278
279 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
280 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
281
282 /* Digital Interface */
283 SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),
284 SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),
285
286 /* Analog Power Supply*/
287 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),
288 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),
289 SND_SOC_DAPM_SUPPLY("MICBIAS1", ES8326_ANA_MICBIAS, 2, 0, NULL, 0),
290 SND_SOC_DAPM_SUPPLY("MICBIAS2", ES8326_ANA_MICBIAS, 3, 0, NULL, 0),
291
292 SND_SOC_DAPM_PGA("LHPMIX", ES8326_DAC2HPMIX, 7, 0, NULL, 0),
293 SND_SOC_DAPM_PGA("RHPMIX", ES8326_DAC2HPMIX, 3, 0, NULL, 0),
294
295 SND_SOC_DAPM_OUTPUT("HPOL"),
296 SND_SOC_DAPM_OUTPUT("HPOR"),
297 };
298
299 static const struct snd_soc_dapm_route es8326_dapm_routes[] = {
300 {"ADC L", NULL, "MIC1"},
301 {"ADC R", NULL, "MIC2"},
302 {"ADC L", NULL, "MIC3"},
303 {"ADC R", NULL, "MIC4"},
304
305 {"I2S OUT", NULL, "ADC L"},
306 {"I2S OUT", NULL, "ADC R"},
307
308 {"Right DAC", NULL, "I2S IN"},
309 {"Left DAC", NULL, "I2S IN"},
310
311 {"LHPMIX", NULL, "Left DAC"},
312 {"RHPMIX", NULL, "Right DAC"},
313
314 {"HPOL", NULL, "LHPMIX"},
315 {"HPOR", NULL, "RHPMIX"},
316 };
317
es8326_volatile_register(struct device * dev,unsigned int reg)318 static bool es8326_volatile_register(struct device *dev, unsigned int reg)
319 {
320 switch (reg) {
321 case ES8326_HPL_OFFSET_INI:
322 case ES8326_HPR_OFFSET_INI:
323 case ES8326_HPDET_STA:
324 case ES8326_CTIA_OMTP_STA:
325 case ES8326_CSM_MUTE_STA:
326 return true;
327 default:
328 return false;
329 }
330 }
331
es8326_writeable_register(struct device * dev,unsigned int reg)332 static bool es8326_writeable_register(struct device *dev, unsigned int reg)
333 {
334 switch (reg) {
335 case ES8326_BIAS_SW1:
336 case ES8326_BIAS_SW2:
337 case ES8326_BIAS_SW3:
338 case ES8326_BIAS_SW4:
339 case ES8326_ADC_HPFS1:
340 case ES8326_ADC_HPFS2:
341 return false;
342 default:
343 return true;
344 }
345 }
346
347 static const struct regmap_config es8326_regmap_config = {
348 .reg_bits = 8,
349 .val_bits = 8,
350 .max_register = 0xff,
351 .use_single_read = true,
352 .use_single_write = true,
353 .volatile_reg = es8326_volatile_register,
354 .writeable_reg = es8326_writeable_register,
355 .cache_type = REGCACHE_RBTREE,
356 };
357
358 struct _coeff_div {
359 u16 fs;
360 u32 rate;
361 u32 mclk;
362 u8 reg4;
363 u8 reg5;
364 u8 reg6;
365 u8 reg7;
366 u8 reg8;
367 u8 reg9;
368 u8 rega;
369 u8 regb;
370 };
371
372 /* codec hifi mclk clock divider coefficients */
373 /* {ratio, LRCK, MCLK, REG04, REG05, REG06, REG07, REG08, REG09, REG10, REG11} */
374 static const struct _coeff_div coeff_div_v0[] = {
375 {64, 8000, 512000, 0x60, 0x01, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
376 {64, 16000, 1024000, 0x20, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
377 {64, 44100, 2822400, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
378 {64, 48000, 3072000, 0xE0, 0x00, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
379 {128, 8000, 1024000, 0x60, 0x00, 0x33, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
380 {128, 16000, 2048000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
381 {128, 44100, 5644800, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
382 {128, 48000, 6144000, 0xE0, 0x01, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
383
384 {192, 32000, 6144000, 0xE0, 0x02, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
385 {256, 8000, 2048000, 0x60, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
386 {256, 16000, 4096000, 0x20, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
387 {256, 44100, 11289600, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
388 {256, 48000, 12288000, 0xE0, 0x00, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
389 {384, 32000, 12288000, 0xE0, 0x05, 0x03, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
390 {400, 48000, 19200000, 0xE9, 0x04, 0x0F, 0x6d, 0x4A, 0x0A, 0x1F, 0x1F},
391
392 {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0x4A, 0x0A, 0x1F, 0x1F},
393 {512, 8000, 4096000, 0x60, 0x01, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
394 {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
395 {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
396 {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
397 {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0x4A, 0x0A, 0x1F, 0x1F},
398 {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
399 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
400 };
401
402 static const struct _coeff_div coeff_div_v3[] = {
403 {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
404 {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
405 {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
406 {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
407 {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47},
408 {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x8A, 0x1B, 0x23, 0x47},
409 {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
410 {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
411 {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
412
413 {64, 8000, 512000, 0x60, 0x00, 0x35, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
414 {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
415 {64, 44100, 2822400, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
416 {64, 48000, 3072000, 0xE0, 0x00, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
417 {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x8A, 0x1B, 0x23, 0x47},
418 {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x23, 0x47},
419 {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
420 {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x3F},
421 {100, 48000, 4800000, 0x04, 0x04, 0x3F, 0x6D, 0xB8, 0x08, 0x4f, 0x1f},
422 {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
423
424 {128, 8000, 1024000, 0x60, 0x00, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
425 {128, 16000, 2048000, 0x20, 0x00, 0x31, 0x35, 0x08, 0x19, 0x1F, 0x3F},
426 {128, 44100, 5644800, 0xE0, 0x00, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
427 {128, 48000, 6144000, 0xE0, 0x00, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
428 {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x8A, 0x1B, 0x23, 0x47},
429 {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x8A, 0x1B, 0x23, 0x47},
430 {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
431 {192, 32000, 6144000, 0xE0, 0x02, 0x31, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
432 {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0xCA, 0x1B, 0x1F, 0x3F},
433
434 {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
435 {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0xCA, 0x0A, 0x27, 0x27},
436 {256, 8000, 2048000, 0x60, 0x00, 0x31, 0x35, 0x08, 0x19, 0x1F, 0x7F},
437 {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x08, 0x19, 0x1F, 0x3F},
438 {256, 44100, 11289600, 0xE0, 0x01, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
439 {256, 48000, 12288000, 0xE0, 0x01, 0x01, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
440 {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x8A, 0x1B, 0x23, 0x47},
441 {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x8A, 0x1B, 0x1F, 0x7F},
442 {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
443 {384, 32000, 12288000, 0xE0, 0x02, 0x01, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
444 {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
445
446 {400, 48000, 19200000, 0xE4, 0x04, 0x35, 0x6d, 0xCA, 0x0A, 0x1F, 0x1F},
447 {500, 48000, 24000000, 0xF8, 0x04, 0x3F, 0x6D, 0xCA, 0x0A, 0x1F, 0x1F},
448 {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x08, 0x19, 0x1B, 0x1F, 0x7F},
449 {512, 16000, 8192000, 0x20, 0x00, 0x30, 0x35, 0x08, 0x19, 0x1F, 0x3F},
450 {512, 44100, 22579200, 0xE0, 0x00, 0x00, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
451 {512, 48000, 24576000, 0xE0, 0x00, 0x00, 0x2D, 0x48, 0x08, 0x1F, 0x1F},
452 {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
453 {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
454 {768, 32000, 24576000, 0xE0, 0x02, 0x30, 0x2D, 0xCA, 0x0A, 0x1F, 0x1F},
455 {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x8A, 0x0A, 0x1F, 0x1F},
456
457 {1024, 8000, 8192000, 0x60, 0x00, 0x30, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
458 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
459 {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
460 {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
461 {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x3F},
462 {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
463 {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
464 {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
465 {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x5F},
466 {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x8A, 0x1B, 0x1F, 0x7F},
467 {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x8A, 0x0A, 0x27, 0x27},
468 };
469
get_coeff(int mclk,int rate,int array,const struct _coeff_div * coeff_div)470 static inline int get_coeff(int mclk, int rate, int array,
471 const struct _coeff_div *coeff_div)
472 {
473 int i;
474
475 for (i = 0; i < array; i++) {
476 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
477 return i;
478 }
479
480 return -EINVAL;
481 }
482
es8326_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)483 static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai,
484 int clk_id, unsigned int freq, int dir)
485 {
486 struct snd_soc_component *codec = codec_dai->component;
487 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec);
488
489 es8326->sysclk = freq;
490
491 return 0;
492 }
493
es8326_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)494 static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
495 {
496 struct snd_soc_component *component = codec_dai->component;
497 u8 iface = 0;
498
499 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
500 case SND_SOC_DAIFMT_CBC_CFP:
501 snd_soc_component_update_bits(component, ES8326_RESET,
502 ES8326_MASTER_MODE_EN, ES8326_MASTER_MODE_EN);
503 break;
504 case SND_SOC_DAIFMT_CBC_CFC:
505 break;
506 default:
507 return -EINVAL;
508 }
509
510 /* interface format */
511 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
512 case SND_SOC_DAIFMT_I2S:
513 break;
514 case SND_SOC_DAIFMT_RIGHT_J:
515 dev_err(component->dev, "Codec driver does not support right justified\n");
516 return -EINVAL;
517 case SND_SOC_DAIFMT_LEFT_J:
518 iface |= ES8326_DAIFMT_LEFT_J;
519 break;
520 case SND_SOC_DAIFMT_DSP_A:
521 iface |= ES8326_DAIFMT_DSP_A;
522 break;
523 case SND_SOC_DAIFMT_DSP_B:
524 iface |= ES8326_DAIFMT_DSP_B;
525 break;
526 default:
527 return -EINVAL;
528 }
529
530 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DAIFMT_MASK, iface);
531
532 return 0;
533 }
534
es8326_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)535 static int es8326_pcm_hw_params(struct snd_pcm_substream *substream,
536 struct snd_pcm_hw_params *params,
537 struct snd_soc_dai *dai)
538 {
539 struct snd_soc_component *component = dai->component;
540 const struct _coeff_div *coeff_div;
541 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
542 u8 srate = 0;
543 int coeff, array;
544
545 if (es8326->version == 0) {
546 coeff_div = coeff_div_v0;
547 array = ARRAY_SIZE(coeff_div_v0);
548 } else {
549 coeff_div = coeff_div_v3;
550 array = ARRAY_SIZE(coeff_div_v3);
551 }
552 coeff = get_coeff(es8326->sysclk, params_rate(params), array, coeff_div);
553 /* bit size */
554 switch (params_format(params)) {
555 case SNDRV_PCM_FORMAT_S16_LE:
556 srate |= ES8326_S16_LE;
557 break;
558 case SNDRV_PCM_FORMAT_S20_3LE:
559 srate |= ES8326_S20_3_LE;
560 break;
561 case SNDRV_PCM_FORMAT_S18_3LE:
562 srate |= ES8326_S18_LE;
563 break;
564 case SNDRV_PCM_FORMAT_S24_LE:
565 srate |= ES8326_S24_LE;
566 break;
567 case SNDRV_PCM_FORMAT_S32_LE:
568 srate |= ES8326_S32_LE;
569 break;
570 default:
571 return -EINVAL;
572 }
573
574 /* set iface & srate */
575 snd_soc_component_update_bits(component, ES8326_FMT, ES8326_DATA_LEN_MASK, srate);
576
577 if (coeff >= 0) {
578 regmap_write(es8326->regmap, ES8326_CLK_DIV1,
579 coeff_div[coeff].reg4);
580 regmap_write(es8326->regmap, ES8326_CLK_DIV2,
581 coeff_div[coeff].reg5);
582 regmap_write(es8326->regmap, ES8326_CLK_DLL,
583 coeff_div[coeff].reg6);
584 regmap_write(es8326->regmap, ES8326_CLK_MUX,
585 coeff_div[coeff].reg7);
586 regmap_write(es8326->regmap, ES8326_CLK_ADC_SEL,
587 coeff_div[coeff].reg8);
588 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL,
589 coeff_div[coeff].reg9);
590 regmap_write(es8326->regmap, ES8326_CLK_ADC_OSR,
591 coeff_div[coeff].rega);
592 regmap_write(es8326->regmap, ES8326_CLK_DAC_OSR,
593 coeff_div[coeff].regb);
594 } else {
595 dev_warn(component->dev, "Clock coefficients do not match");
596 }
597
598 return 0;
599 }
600
es8326_mute(struct snd_soc_dai * dai,int mute,int direction)601 static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
602 {
603 struct snd_soc_component *component = dai->component;
604 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
605 unsigned int offset_l, offset_r;
606
607 if (mute) {
608 if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
609 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
610 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
611 ES8326_MUTE_MASK, ES8326_MUTE);
612 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF,
613 0x30, 0x00);
614 } else {
615 regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
616 0x0F, 0x0F);
617 if (es8326->version > ES8326_VERSION_B) {
618 regmap_update_bits(es8326->regmap, ES8326_VMIDSEL, 0x40, 0x40);
619 regmap_update_bits(es8326->regmap, ES8326_ANA_MICBIAS, 0x70, 0x10);
620 }
621 }
622 } else {
623 if (!es8326->calibrated) {
624 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);
625 msleep(30);
626 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
627 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l);
628 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r);
629 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
630 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l);
631 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
632 es8326->calibrated = true;
633 }
634 if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
635 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01);
636 usleep_range(1000, 5000);
637 regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
638 usleep_range(1000, 5000);
639 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20);
640 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30);
641 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
642 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
643 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
644 ES8326_MUTE_MASK, ~(ES8326_MUTE));
645 } else {
646 msleep(300);
647 if (es8326->version > ES8326_VERSION_B) {
648 regmap_update_bits(es8326->regmap, ES8326_ANA_MICBIAS, 0x70, 0x50);
649 regmap_update_bits(es8326->regmap, ES8326_VMIDSEL, 0x40, 0x00);
650 }
651 regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
652 0x0F, 0x00);
653 }
654 }
655 return 0;
656 }
657
es8326_set_bias_level(struct snd_soc_component * codec,enum snd_soc_bias_level level)658 static int es8326_set_bias_level(struct snd_soc_component *codec,
659 enum snd_soc_bias_level level)
660 {
661 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(codec);
662 int ret;
663
664 switch (level) {
665 case SND_SOC_BIAS_ON:
666 ret = clk_prepare_enable(es8326->mclk);
667 if (ret)
668 return ret;
669
670 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02);
671 usleep_range(5000, 10000);
672 regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);
673 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
674 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
675 regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);
676 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
677 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20);
678 regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00);
679 break;
680 case SND_SOC_BIAS_PREPARE:
681 break;
682 case SND_SOC_BIAS_STANDBY:
683 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
684 regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);
685 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);
686 break;
687 case SND_SOC_BIAS_OFF:
688 clk_disable_unprepare(es8326->mclk);
689 break;
690 }
691
692 return 0;
693 }
694
695 #define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
696 SNDRV_PCM_FMTBIT_S24_LE)
697
698 static const struct snd_soc_dai_ops es8326_ops = {
699 .hw_params = es8326_pcm_hw_params,
700 .set_fmt = es8326_set_dai_fmt,
701 .set_sysclk = es8326_set_dai_sysclk,
702 .mute_stream = es8326_mute,
703 .no_capture_mute = 0,
704 };
705
706 static struct snd_soc_dai_driver es8326_dai = {
707 .name = "ES8326 HiFi",
708 .playback = {
709 .stream_name = "Playback",
710 .channels_min = 1,
711 .channels_max = 2,
712 .rates = SNDRV_PCM_RATE_8000_48000,
713 .formats = es8326_FORMATS,
714 },
715 .capture = {
716 .stream_name = "Capture",
717 .channels_min = 1,
718 .channels_max = 2,
719 .rates = SNDRV_PCM_RATE_8000_48000,
720 .formats = es8326_FORMATS,
721 },
722 .ops = &es8326_ops,
723 .symmetric_rate = 1,
724 };
725
es8326_enable_micbias(struct snd_soc_component * component)726 static void es8326_enable_micbias(struct snd_soc_component *component)
727 {
728 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
729
730 snd_soc_dapm_mutex_lock(dapm);
731 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS1");
732 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS2");
733 snd_soc_dapm_sync_unlocked(dapm);
734 snd_soc_dapm_mutex_unlock(dapm);
735 }
736
es8326_disable_micbias(struct snd_soc_component * component)737 static void es8326_disable_micbias(struct snd_soc_component *component)
738 {
739 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
740
741 snd_soc_dapm_mutex_lock(dapm);
742 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS1");
743 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS2");
744 snd_soc_dapm_sync_unlocked(dapm);
745 snd_soc_dapm_mutex_unlock(dapm);
746 }
747
748 /*
749 * For button detection, set the following in soundcard
750 * snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
751 * snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
752 * snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
753 */
es8326_jack_button_handler(struct work_struct * work)754 static void es8326_jack_button_handler(struct work_struct *work)
755 {
756 struct es8326_priv *es8326 =
757 container_of(work, struct es8326_priv, button_press_work.work);
758 struct snd_soc_component *comp = es8326->component;
759 unsigned int iface;
760 static int button_to_report, press_count;
761 static int prev_button, cur_button;
762
763 if (!(es8326->jack->status & SND_JACK_HEADSET)) /* Jack unplugged */
764 return;
765
766 mutex_lock(&es8326->lock);
767 iface = snd_soc_component_read(comp, ES8326_HPDET_STA);
768 switch (iface) {
769 case 0x93:
770 /* pause button detected */
771 cur_button = SND_JACK_BTN_0;
772 break;
773 case 0x6f:
774 case 0x4b:
775 /* button volume up */
776 cur_button = SND_JACK_BTN_1;
777 break;
778 case 0x27:
779 /* button volume down */
780 cur_button = SND_JACK_BTN_2;
781 break;
782 case 0x1e:
783 case 0xe2:
784 /* button released or not pressed */
785 cur_button = 0;
786 break;
787 default:
788 break;
789 }
790
791 if ((prev_button == cur_button) && (cur_button != 0)) {
792 press_count++;
793 if (press_count > 3) {
794 /* report a press every 120ms */
795 snd_soc_jack_report(es8326->jack, cur_button,
796 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
797 press_count = 0;
798 }
799 button_to_report = cur_button;
800 queue_delayed_work(system_wq, &es8326->button_press_work,
801 msecs_to_jiffies(35));
802 } else if (prev_button != cur_button) {
803 /* mismatch, detect again */
804 prev_button = cur_button;
805 queue_delayed_work(system_wq, &es8326->button_press_work,
806 msecs_to_jiffies(35));
807 } else {
808 /* released or no pressed */
809 if (button_to_report != 0) {
810 snd_soc_jack_report(es8326->jack, button_to_report,
811 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
812 snd_soc_jack_report(es8326->jack, 0,
813 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
814 button_to_report = 0;
815 }
816 es8326_disable_micbias(es8326->component);
817 }
818 mutex_unlock(&es8326->lock);
819 }
820
es8326_jack_detect_handler(struct work_struct * work)821 static void es8326_jack_detect_handler(struct work_struct *work)
822 {
823 struct es8326_priv *es8326 =
824 container_of(work, struct es8326_priv, jack_detect_work.work);
825 struct snd_soc_component *comp = es8326->component;
826 unsigned int iface;
827
828 mutex_lock(&es8326->lock);
829 iface = snd_soc_component_read(comp, ES8326_HPDET_STA);
830 dev_dbg(comp->dev, "gpio flag %#04x", iface);
831
832 if ((es8326->jack_remove_retry == 1) && (es8326->version < ES8326_VERSION_B)) {
833 if (iface & ES8326_HPINSERT_FLAG)
834 es8326->jack_remove_retry = 2;
835 else
836 es8326->jack_remove_retry = 0;
837
838 dev_dbg(comp->dev, "remove event check, set HPJACK_POL normal, cnt = %d\n",
839 es8326->jack_remove_retry);
840 /*
841 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
842 */
843 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE,
844 ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ?
845 ~es8326->jack_pol : es8326->jack_pol));
846 goto exit;
847 }
848
849 if ((iface & ES8326_HPINSERT_FLAG) == 0) {
850 /* Jack unplugged or spurious IRQ */
851 dev_dbg(comp->dev, "No headset detected\n");
852 es8326_disable_micbias(es8326->component);
853 if (es8326->jack->status & SND_JACK_HEADPHONE) {
854 dev_dbg(comp->dev, "Report hp remove event\n");
855 snd_soc_jack_report(es8326->jack, 0,
856 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2);
857 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);
858 /* mute adc when mic path switch */
859 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44);
860 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66);
861 }
862 es8326->hp = 0;
863 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
864 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a);
865 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03);
866 regmap_write(es8326->regmap, ES8326_INT_SOURCE, ES8326_INT_SRC_PIN9);
867 /*
868 * Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
869 */
870 if ((es8326->jack_remove_retry == 0) && (es8326->version < ES8326_VERSION_B)) {
871 es8326->jack_remove_retry = 1;
872 dev_dbg(comp->dev, "remove event check, invert HPJACK_POL, cnt = %d\n",
873 es8326->jack_remove_retry);
874 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE,
875 ES8326_HP_DET_JACK_POL, (es8326->jd_inverted ?
876 es8326->jack_pol : ~es8326->jack_pol));
877
878 } else {
879 es8326->jack_remove_retry = 0;
880 }
881 } else if ((iface & ES8326_HPINSERT_FLAG) == ES8326_HPINSERT_FLAG) {
882 es8326->jack_remove_retry = 0;
883 if (es8326->hp == 0) {
884 dev_dbg(comp->dev, "First insert, start OMTP/CTIA type check\n");
885 /*
886 * set auto-check mode, then restart jack_detect_work after 400ms.
887 * Don't report jack status.
888 */
889 regmap_write(es8326->regmap, ES8326_INT_SOURCE, 0x00);
890 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
891 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x00);
892 usleep_range(50000, 70000);
893 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
894 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x10, 0x10);
895 usleep_range(50000, 70000);
896 regmap_write(es8326->regmap, ES8326_INT_SOURCE,
897 (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));
898 regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f);
899 regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08);
900 queue_delayed_work(system_wq, &es8326->jack_detect_work,
901 msecs_to_jiffies(400));
902 es8326->hp = 1;
903 goto exit;
904 }
905 if (es8326->jack->status & SND_JACK_HEADSET) {
906 /* detect button */
907 dev_dbg(comp->dev, "button pressed\n");
908 regmap_write(es8326->regmap, ES8326_INT_SOURCE,
909 (ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));
910 es8326_enable_micbias(es8326->component);
911 queue_delayed_work(system_wq, &es8326->button_press_work, 10);
912 goto exit;
913 }
914 if ((iface & ES8326_HPBUTTON_FLAG) == 0x01) {
915 dev_dbg(comp->dev, "Headphone detected\n");
916 snd_soc_jack_report(es8326->jack,
917 SND_JACK_HEADPHONE, SND_JACK_HEADSET);
918 } else {
919 dev_dbg(comp->dev, "Headset detected\n");
920 snd_soc_jack_report(es8326->jack,
921 SND_JACK_HEADSET, SND_JACK_HEADSET);
922
923 regmap_update_bits(es8326->regmap, ES8326_PGA_PDN,
924 0x08, 0x08);
925 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN,
926 0x80, 0x80);
927 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x00);
928 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x00);
929 regmap_update_bits(es8326->regmap, ES8326_PGA_PDN,
930 0x08, 0x00);
931 usleep_range(10000, 15000);
932 }
933 }
934 exit:
935 mutex_unlock(&es8326->lock);
936 }
937
es8326_irq(int irq,void * dev_id)938 static irqreturn_t es8326_irq(int irq, void *dev_id)
939 {
940 struct es8326_priv *es8326 = dev_id;
941
942 if (!es8326->jack)
943 goto out;
944
945 if (es8326->jack->status & SND_JACK_HEADSET)
946 queue_delayed_work(system_wq, &es8326->jack_detect_work,
947 msecs_to_jiffies(10));
948 else
949 queue_delayed_work(system_wq, &es8326->jack_detect_work,
950 msecs_to_jiffies(300));
951
952 out:
953 return IRQ_HANDLED;
954 }
955
es8326_calibrate(struct snd_soc_component * component)956 static int es8326_calibrate(struct snd_soc_component *component)
957 {
958 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
959 unsigned int reg;
960 unsigned int offset_l, offset_r;
961
962 regmap_read(es8326->regmap, ES8326_CHIP_VERSION, ®);
963 es8326->version = reg;
964
965 if ((es8326->version >= ES8326_VERSION_B) && (es8326->calibrated == false)) {
966 dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");
967 regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);
968 regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03);
969 regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);
970 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);
971 regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);
972 regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);
973 regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);
974 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);
975 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);
976 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);
977 usleep_range(15000, 20000);
978 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
979 usleep_range(15000, 20000);
980 regmap_write(es8326->regmap, ES8326_RESET, 0xc0);
981 usleep_range(15000, 20000);
982
983 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, ES8326_HP_OFF);
984 regmap_read(es8326->regmap, ES8326_CSM_MUTE_STA, ®);
985 if ((reg & 0xf0) != 0x40)
986 msleep(50);
987
988 regmap_write(es8326->regmap, ES8326_HP_CAL, 0xd4);
989 msleep(200);
990 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x4d);
991 msleep(200);
992 regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
993 regmap_read(es8326->regmap, ES8326_HPL_OFFSET_INI, &offset_l);
994 regmap_read(es8326->regmap, ES8326_HPR_OFFSET_INI, &offset_r);
995 regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
996 regmap_write(es8326->regmap, ES8326_HPL_OFFSET_INI, offset_l);
997 regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
998 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
999
1000 es8326->calibrated = true;
1001 }
1002
1003 return 0;
1004 }
1005
es8326_init(struct snd_soc_component * component)1006 static void es8326_init(struct snd_soc_component *component)
1007 {
1008 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1009
1010 regmap_write(es8326->regmap, ES8326_RESET, 0x1f);
1011 regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
1012 regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
1013 usleep_range(10000, 15000);
1014 regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xd9);
1015 regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xd8);
1016 /* set headphone default type and detect pin */
1017 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);
1018 regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);
1019
1020 /* set internal oscillator as clock source of headpone cp */
1021 regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);
1022 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON);
1023 /* clock manager reset release */
1024 regmap_write(es8326->regmap, ES8326_RESET, 0x17);
1025 /* set headphone detection as half scan mode */
1026 regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d);
1027 regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);
1028
1029 /* enable headphone driver */
1030 regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4);
1031 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);
1032 usleep_range(2000, 5000);
1033 regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23);
1034 regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33);
1035 regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
1036
1037 regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
1038 regmap_write(es8326->regmap, ES8326_CLK_VMIDS1, 0xc4);
1039 regmap_write(es8326->regmap, ES8326_CLK_VMIDS2, 0x81);
1040 regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);
1041 /* calibrate for B version */
1042 es8326_calibrate(component);
1043 regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa);
1044 regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00);
1045 /* turn off headphone out */
1046 regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);
1047 /* set ADC and DAC in low power mode */
1048 regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
1049
1050 regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7F);
1051 /* select vdda as micbias source */
1052 regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03);
1053 /* set dac dsmclip = 1 */
1054 regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);
1055 regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);
1056
1057 regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
1058 ((es8326->version >= ES8326_VERSION_B) ?
1059 (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
1060 (ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
1061 usleep_range(5000, 10000);
1062 es8326_enable_micbias(es8326->component);
1063 usleep_range(50000, 70000);
1064 regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
1065 regmap_write(es8326->regmap, ES8326_INTOUT_IO,
1066 es8326->interrupt_clk);
1067 regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
1068 (ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
1069 regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);
1070
1071 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
1072 regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);
1073 regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,
1074 ES8326_MIC1_SEL);
1075
1076 regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,
1077 ES8326_MUTE);
1078
1079 regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f);
1080 regmap_write(es8326->regmap, ES8326_CLK_DIV_LRCK, 0xff);
1081 regmap_write(es8326->regmap, ES8326_ADC1_SRC, 0x44);
1082 regmap_write(es8326->regmap, ES8326_ADC2_SRC, 0x66);
1083 es8326_disable_micbias(es8326->component);
1084 if (es8326->version > ES8326_VERSION_B) {
1085 regmap_update_bits(es8326->regmap, ES8326_ANA_MICBIAS, 0x73, 0x13);
1086 regmap_update_bits(es8326->regmap, ES8326_VMIDSEL, 0x40, 0x40);
1087 }
1088
1089 msleep(200);
1090 regmap_write(es8326->regmap, ES8326_INT_SOURCE, ES8326_INT_SRC_PIN9);
1091 }
1092
es8326_resume(struct snd_soc_component * component)1093 static int es8326_resume(struct snd_soc_component *component)
1094 {
1095 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1096 unsigned int reg;
1097
1098 regcache_cache_only(es8326->regmap, false);
1099 regcache_cache_bypass(es8326->regmap, true);
1100 regmap_read(es8326->regmap, ES8326_CLK_RESAMPLE, ®);
1101 regcache_cache_bypass(es8326->regmap, false);
1102 /* reset internal clock state */
1103 if (reg == 0x05)
1104 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_ON);
1105 else
1106 es8326_init(component);
1107
1108 regcache_sync(es8326->regmap);
1109
1110 es8326_irq(es8326->irq, es8326);
1111 return 0;
1112 }
1113
es8326_suspend(struct snd_soc_component * component)1114 static int es8326_suspend(struct snd_soc_component *component)
1115 {
1116 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1117
1118 cancel_delayed_work_sync(&es8326->jack_detect_work);
1119 es8326_disable_micbias(component);
1120 es8326->calibrated = false;
1121 regmap_write(es8326->regmap, ES8326_CLK_MUX, 0x2d);
1122 regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x00);
1123 regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
1124 regmap_write(es8326->regmap, ES8326_CLK_CTL, ES8326_CLK_OFF);
1125 regcache_cache_only(es8326->regmap, true);
1126
1127 /* reset register value to default */
1128 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);
1129 usleep_range(1000, 3000);
1130 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);
1131
1132 regcache_mark_dirty(es8326->regmap);
1133 return 0;
1134 }
1135
es8326_probe(struct snd_soc_component * component)1136 static int es8326_probe(struct snd_soc_component *component)
1137 {
1138 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1139 int ret;
1140
1141 es8326->component = component;
1142 es8326->jd_inverted = device_property_read_bool(component->dev,
1143 "everest,jack-detect-inverted");
1144
1145 ret = device_property_read_u8(component->dev, "everest,jack-pol", &es8326->jack_pol);
1146 if (ret != 0) {
1147 dev_dbg(component->dev, "jack-pol return %d", ret);
1148 es8326->jack_pol = ES8326_HP_TYPE_AUTO;
1149 }
1150 dev_dbg(component->dev, "jack-pol %x", es8326->jack_pol);
1151
1152 ret = device_property_read_u8(component->dev, "everest,interrupt-src",
1153 &es8326->interrupt_src);
1154 if (ret != 0) {
1155 dev_dbg(component->dev, "interrupt-src return %d", ret);
1156 es8326->interrupt_src = ES8326_HP_DET_SRC_PIN9;
1157 }
1158 dev_dbg(component->dev, "interrupt-src %x", es8326->interrupt_src);
1159
1160 ret = device_property_read_u8(component->dev, "everest,interrupt-clk",
1161 &es8326->interrupt_clk);
1162 if (ret != 0) {
1163 dev_dbg(component->dev, "interrupt-clk return %d", ret);
1164 es8326->interrupt_clk = 0x00;
1165 }
1166 dev_dbg(component->dev, "interrupt-clk %x", es8326->interrupt_clk);
1167
1168 es8326_init(component);
1169 return 0;
1170 }
1171
es8326_enable_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * jack)1172 static void es8326_enable_jack_detect(struct snd_soc_component *component,
1173 struct snd_soc_jack *jack)
1174 {
1175 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1176
1177 mutex_lock(&es8326->lock);
1178 if (es8326->jd_inverted)
1179 snd_soc_component_update_bits(component, ES8326_HPDET_TYPE,
1180 ES8326_HP_DET_JACK_POL, ~es8326->jack_pol);
1181 es8326->jack = jack;
1182
1183 mutex_unlock(&es8326->lock);
1184 es8326_irq(es8326->irq, es8326);
1185 }
1186
es8326_disable_jack_detect(struct snd_soc_component * component)1187 static void es8326_disable_jack_detect(struct snd_soc_component *component)
1188 {
1189 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1190
1191 dev_dbg(component->dev, "Enter into %s\n", __func__);
1192 if (!es8326->jack)
1193 return; /* Already disabled (or never enabled) */
1194 cancel_delayed_work_sync(&es8326->jack_detect_work);
1195
1196 mutex_lock(&es8326->lock);
1197 if (es8326->jack->status & SND_JACK_MICROPHONE) {
1198 es8326_disable_micbias(component);
1199 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);
1200 }
1201 es8326->jack = NULL;
1202 mutex_unlock(&es8326->lock);
1203 }
1204
es8326_set_jack(struct snd_soc_component * component,struct snd_soc_jack * jack,void * data)1205 static int es8326_set_jack(struct snd_soc_component *component,
1206 struct snd_soc_jack *jack, void *data)
1207 {
1208 if (jack)
1209 es8326_enable_jack_detect(component, jack);
1210 else
1211 es8326_disable_jack_detect(component);
1212
1213 return 0;
1214 }
1215
es8326_remove(struct snd_soc_component * component)1216 static void es8326_remove(struct snd_soc_component *component)
1217 {
1218 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
1219
1220 es8326_disable_jack_detect(component);
1221 es8326_set_bias_level(component, SND_SOC_BIAS_OFF);
1222 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);
1223 usleep_range(1000, 3000);
1224 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);
1225 }
1226
1227 static const struct snd_soc_component_driver soc_component_dev_es8326 = {
1228 .probe = es8326_probe,
1229 .remove = es8326_remove,
1230 .resume = es8326_resume,
1231 .suspend = es8326_suspend,
1232 .set_bias_level = es8326_set_bias_level,
1233 .set_jack = es8326_set_jack,
1234 .dapm_widgets = es8326_dapm_widgets,
1235 .num_dapm_widgets = ARRAY_SIZE(es8326_dapm_widgets),
1236 .dapm_routes = es8326_dapm_routes,
1237 .num_dapm_routes = ARRAY_SIZE(es8326_dapm_routes),
1238 .controls = es8326_snd_controls,
1239 .num_controls = ARRAY_SIZE(es8326_snd_controls),
1240 .use_pmdown_time = 1,
1241 .endianness = 1,
1242 };
1243
es8326_i2c_probe(struct i2c_client * i2c)1244 static int es8326_i2c_probe(struct i2c_client *i2c)
1245 {
1246 struct es8326_priv *es8326;
1247 int ret;
1248
1249 es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL);
1250 if (!es8326)
1251 return -ENOMEM;
1252
1253 i2c_set_clientdata(i2c, es8326);
1254 es8326->i2c = i2c;
1255 mutex_init(&es8326->lock);
1256 es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config);
1257 if (IS_ERR(es8326->regmap)) {
1258 ret = PTR_ERR(es8326->regmap);
1259 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret);
1260 return ret;
1261 }
1262
1263 es8326->irq = i2c->irq;
1264 es8326->jack_remove_retry = 0;
1265 es8326->hp = 0;
1266 es8326->hpl_vol = 0x03;
1267 es8326->hpr_vol = 0x03;
1268 INIT_DELAYED_WORK(&es8326->jack_detect_work,
1269 es8326_jack_detect_handler);
1270 INIT_DELAYED_WORK(&es8326->button_press_work,
1271 es8326_jack_button_handler);
1272 /* ES8316 is level-based while ES8326 is edge-based */
1273 ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq,
1274 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1275 "es8326", es8326);
1276 if (ret) {
1277 dev_warn(&i2c->dev, "Failed to request IRQ: %d: %d\n",
1278 es8326->irq, ret);
1279 es8326->irq = -ENXIO;
1280 }
1281
1282 es8326->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
1283 if (IS_ERR(es8326->mclk)) {
1284 dev_err(&i2c->dev, "unable to get mclk\n");
1285 return PTR_ERR(es8326->mclk);
1286 }
1287 if (!es8326->mclk)
1288 dev_warn(&i2c->dev, "assuming static mclk\n");
1289
1290 ret = clk_prepare_enable(es8326->mclk);
1291 if (ret) {
1292 dev_err(&i2c->dev, "unable to enable mclk\n");
1293 return ret;
1294 }
1295 return devm_snd_soc_register_component(&i2c->dev,
1296 &soc_component_dev_es8326,
1297 &es8326_dai, 1);
1298 }
1299
1300
es8326_i2c_shutdown(struct i2c_client * i2c)1301 static void es8326_i2c_shutdown(struct i2c_client *i2c)
1302 {
1303 struct snd_soc_component *component;
1304 struct es8326_priv *es8326;
1305
1306 es8326 = i2c_get_clientdata(i2c);
1307 component = es8326->component;
1308 dev_dbg(component->dev, "Enter into %s\n", __func__);
1309 cancel_delayed_work_sync(&es8326->jack_detect_work);
1310 cancel_delayed_work_sync(&es8326->button_press_work);
1311
1312 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x01);
1313 usleep_range(1000, 3000);
1314 regmap_write(es8326->regmap, ES8326_CSM_I2C_STA, 0x00);
1315
1316 }
1317
es8326_i2c_remove(struct i2c_client * i2c)1318 static void es8326_i2c_remove(struct i2c_client *i2c)
1319 {
1320 es8326_i2c_shutdown(i2c);
1321 }
1322
1323 static const struct i2c_device_id es8326_i2c_id[] = {
1324 {"es8326" },
1325 {}
1326 };
1327 MODULE_DEVICE_TABLE(i2c, es8326_i2c_id);
1328
1329 #ifdef CONFIG_OF
1330 static const struct of_device_id es8326_of_match[] = {
1331 { .compatible = "everest,es8326", },
1332 {}
1333 };
1334 MODULE_DEVICE_TABLE(of, es8326_of_match);
1335 #endif
1336
1337 #ifdef CONFIG_ACPI
1338 static const struct acpi_device_id es8326_acpi_match[] = {
1339 {"ESSX8326", 0},
1340 {},
1341 };
1342 MODULE_DEVICE_TABLE(acpi, es8326_acpi_match);
1343 #endif
1344
1345 static struct i2c_driver es8326_i2c_driver = {
1346 .driver = {
1347 .name = "es8326",
1348 .acpi_match_table = ACPI_PTR(es8326_acpi_match),
1349 .of_match_table = of_match_ptr(es8326_of_match),
1350 },
1351 .probe = es8326_i2c_probe,
1352 .shutdown = es8326_i2c_shutdown,
1353 .remove = es8326_i2c_remove,
1354 .id_table = es8326_i2c_id,
1355 };
1356 module_i2c_driver(es8326_i2c_driver);
1357
1358 MODULE_DESCRIPTION("ASoC es8326 driver");
1359 MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com>");
1360 MODULE_LICENSE("GPL");
1361