1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited 4 */ 5 6 #ifndef __ASM_LOONGARCH_KVM_HOST_H__ 7 #define __ASM_LOONGARCH_KVM_HOST_H__ 8 9 #include <linux/cpumask.h> 10 #include <linux/hrtimer.h> 11 #include <linux/interrupt.h> 12 #include <linux/kvm.h> 13 #include <linux/kvm_types.h> 14 #include <linux/mutex.h> 15 #include <linux/perf_event.h> 16 #include <linux/spinlock.h> 17 #include <linux/threads.h> 18 #include <linux/types.h> 19 20 #include <asm/inst.h> 21 #include <asm/kvm_mmu.h> 22 #include <asm/kvm_ipi.h> 23 #include <asm/kvm_dmsintc.h> 24 #include <asm/kvm_eiointc.h> 25 #include <asm/kvm_pch_pic.h> 26 #include <asm/loongarch.h> 27 28 #define __KVM_HAVE_ARCH_INTC_INITIALIZED 29 30 /* Loongarch KVM register ids */ 31 #define KVM_GET_IOC_CSR_IDX(id) ((id & KVM_CSR_IDX_MASK) >> LOONGARCH_REG_SHIFT) 32 #define KVM_GET_IOC_CPUCFG_IDX(id) ((id & KVM_CPUCFG_IDX_MASK) >> LOONGARCH_REG_SHIFT) 33 34 #define KVM_MAX_VCPUS 256 35 #define KVM_MAX_CPUCFG_REGS 21 36 37 #define KVM_HALT_POLL_NS_DEFAULT 500000 38 #define KVM_REQ_TLB_FLUSH_GPA KVM_ARCH_REQ(0) 39 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(1) 40 #define KVM_REQ_PMU KVM_ARCH_REQ(2) 41 #define KVM_REQ_FPU_LOAD KVM_ARCH_REQ(3) 42 #define KVM_REQ_LBT_LOAD KVM_ARCH_REQ(4) 43 44 #define KVM_GUESTDBG_SW_BP_MASK \ 45 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP) 46 #define KVM_GUESTDBG_VALID_MASK \ 47 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP | KVM_GUESTDBG_SINGLESTEP) 48 49 #define KVM_DIRTY_LOG_MANUAL_CAPS \ 50 (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | KVM_DIRTY_LOG_INITIALLY_SET) 51 52 struct kvm_vm_stat { 53 struct kvm_vm_stat_generic generic; 54 u64 pages; 55 u64 hugepages; 56 }; 57 58 struct kvm_vcpu_stat { 59 struct kvm_vcpu_stat_generic generic; 60 u64 int_exits; 61 u64 idle_exits; 62 u64 cpucfg_exits; 63 u64 signal_exits; 64 u64 hypercall_exits; 65 u64 ipi_read_exits; 66 u64 ipi_write_exits; 67 u64 eiointc_read_exits; 68 u64 eiointc_write_exits; 69 u64 pch_pic_read_exits; 70 u64 pch_pic_write_exits; 71 }; 72 73 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0) 74 #define KVM_MEM_HUGEPAGE_INCAPABLE (1UL << 1) 75 struct kvm_arch_memory_slot { 76 unsigned long flags; 77 }; 78 79 #define HOST_MAX_PMNUM 16 80 struct kvm_context { 81 unsigned long vpid_cache; 82 struct kvm_vcpu *last_vcpu; 83 /* Host PMU CSR */ 84 u64 perf_ctrl[HOST_MAX_PMNUM]; 85 u64 perf_cntr[HOST_MAX_PMNUM]; 86 }; 87 88 struct kvm_world_switch { 89 int (*exc_entry)(void); 90 int (*enter_guest)(struct kvm_run *run, struct kvm_vcpu *vcpu); 91 }; 92 93 #define MAX_PGTABLE_LEVELS 4 94 95 /* 96 * Physical CPUID is used for interrupt routing, there are different 97 * definitions about physical cpuid on different hardwares. 98 * 99 * For LOONGARCH_CSR_CPUID register, max CPUID size if 512 100 * For IPI hardware, max destination CPUID size 1024 101 * For eiointc interrupt controller, max destination CPUID size is 256 102 * For msgint interrupt controller, max supported CPUID size is 65536 103 * 104 * Currently max CPUID is defined as 256 for KVM hypervisor, in future 105 * it will be expanded to 4096, including 16 packages at most. And every 106 * package supports at most 256 vcpus 107 */ 108 #define KVM_MAX_PHYID 256 109 110 struct kvm_phyid_info { 111 struct kvm_vcpu *vcpu; 112 bool enabled; 113 }; 114 115 struct kvm_phyid_map { 116 int max_phyid; 117 struct kvm_phyid_info phys_map[KVM_MAX_PHYID]; 118 }; 119 120 struct kvm_arch { 121 /* Guest physical mm */ 122 kvm_pte_t *pgd; 123 unsigned long gpa_size; 124 unsigned long invalid_ptes[MAX_PGTABLE_LEVELS]; 125 unsigned int pte_shifts[MAX_PGTABLE_LEVELS]; 126 unsigned int root_level; 127 spinlock_t phyid_map_lock; 128 struct kvm_phyid_map *phyid_map; 129 /* Enabled PV features */ 130 unsigned long pv_features; 131 /* Supported KVM features */ 132 unsigned long kvm_features; 133 134 s64 time_offset; 135 struct kvm_context __percpu *vmcs; 136 struct loongarch_ipi *ipi; 137 struct loongarch_dmsintc *dmsintc; 138 struct loongarch_eiointc *eiointc; 139 struct loongarch_pch_pic *pch_pic; 140 }; 141 142 #define CSR_MAX_NUMS 0x800 143 144 struct loongarch_csrs { 145 unsigned long csrs[CSR_MAX_NUMS]; 146 }; 147 148 /* Resume Flags */ 149 #define RESUME_HOST 0 150 #define RESUME_GUEST 1 151 152 enum emulation_result { 153 EMULATE_DONE, /* no further processing */ 154 EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */ 155 EMULATE_DO_IOCSR, /* handle IOCSR request */ 156 EMULATE_FAIL, /* can't emulate this instruction */ 157 EMULATE_EXCEPT, /* A guest exception has been generated */ 158 }; 159 160 #define KVM_LARCH_FPU (0x1 << 0) 161 #define KVM_LARCH_LBT (0x1 << 1) 162 #define KVM_LARCH_PMU (0x1 << 2) 163 #define KVM_LARCH_SWCSR_LATEST (0x1 << 3) 164 #define KVM_LARCH_HWCSR_USABLE (0x1 << 4) 165 166 #define LOONGARCH_PV_FEAT_UPDATED BIT_ULL(63) 167 #define LOONGARCH_PV_FEAT_MASK (BIT(KVM_FEATURE_IPI) | \ 168 BIT(KVM_FEATURE_PREEMPT) | \ 169 BIT(KVM_FEATURE_STEAL_TIME) | \ 170 BIT(KVM_FEATURE_USER_HCALL) | \ 171 BIT(KVM_FEATURE_VIRT_EXTIOI)) 172 173 struct kvm_vcpu_arch { 174 /* 175 * Switch pointer-to-function type to unsigned long 176 * for loading the value into register directly. 177 */ 178 unsigned long host_eentry; 179 unsigned long guest_eentry; 180 181 /* Pointers stored here for easy accessing from assembly code */ 182 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); 183 184 /* GPA (=HVA) of PGD for secondary mmu */ 185 unsigned long kvm_pgd; 186 187 /* Host registers preserved across guest mode execution */ 188 unsigned long host_sp; 189 unsigned long host_tp; 190 unsigned long host_pgd; 191 192 /* Host CSRs are used when handling exits from guest */ 193 unsigned long badi; 194 unsigned long badv; 195 unsigned long host_ecfg; 196 unsigned long host_estat; 197 unsigned long host_percpu; 198 199 /* GPRs */ 200 unsigned long gprs[32]; 201 unsigned long pc; 202 203 /* Which auxiliary state is loaded (KVM_LARCH_*) */ 204 unsigned int aux_inuse; 205 206 /* FPU state */ 207 struct loongarch_fpu fpu FPU_ALIGN; 208 struct loongarch_lbt lbt; 209 210 /* CSR state */ 211 struct loongarch_csrs *csr; 212 213 /* Guest max PMU CSR id */ 214 int max_pmu_csrid; 215 216 /* GPR used as IO source/target */ 217 u32 io_gpr; 218 219 /* KVM register to control count timer */ 220 u32 count_ctl; 221 struct hrtimer swtimer; 222 223 /* Bitmask of intr that are pending */ 224 unsigned long irq_pending; 225 /* Bitmask of pending intr to be cleared */ 226 unsigned long irq_clear; 227 228 /* Bitmask of exceptions that are pending */ 229 unsigned long exception_pending; 230 unsigned int esubcode; 231 232 /* Cache for pages needed inside spinlock regions */ 233 struct kvm_mmu_memory_cache mmu_page_cache; 234 235 /* vcpu's vpid */ 236 u64 vpid; 237 gpa_t flush_gpa; 238 239 /* Frequency of stable timer in Hz */ 240 u64 timer_mhz; 241 ktime_t expire; 242 243 /* Last CPU the vCPU state was loaded on */ 244 int last_sched_cpu; 245 /* mp state */ 246 struct kvm_mp_state mp_state; 247 /* ipi state */ 248 struct ipi_state ipi_state; 249 struct dmsintc_state dmsintc_state; 250 /* cpucfg */ 251 u32 cpucfg[KVM_MAX_CPUCFG_REGS]; 252 253 /* paravirt steal time */ 254 struct { 255 u64 guest_addr; 256 u64 last_steal; 257 struct gfn_to_hva_cache cache; 258 u8 preempted; 259 } st; 260 }; 261 262 static inline unsigned long readl_sw_gcsr(struct loongarch_csrs *csr, int reg) 263 { 264 return csr->csrs[reg]; 265 } 266 267 static inline void writel_sw_gcsr(struct loongarch_csrs *csr, int reg, unsigned long val) 268 { 269 csr->csrs[reg] = val; 270 } 271 272 static inline bool kvm_guest_has_msgint(struct kvm_vcpu_arch *arch) 273 { 274 return arch->cpucfg[1] & CPUCFG1_MSGINT; 275 } 276 277 static inline bool kvm_guest_has_fpu(struct kvm_vcpu_arch *arch) 278 { 279 return arch->cpucfg[2] & CPUCFG2_FP; 280 } 281 282 static inline bool kvm_guest_has_lsx(struct kvm_vcpu_arch *arch) 283 { 284 return arch->cpucfg[2] & CPUCFG2_LSX; 285 } 286 287 static inline bool kvm_guest_has_lasx(struct kvm_vcpu_arch *arch) 288 { 289 return arch->cpucfg[2] & CPUCFG2_LASX; 290 } 291 292 static inline bool kvm_guest_has_lbt(struct kvm_vcpu_arch *arch) 293 { 294 return arch->cpucfg[2] & (CPUCFG2_X86BT | CPUCFG2_ARMBT | CPUCFG2_MIPSBT); 295 } 296 297 static inline bool kvm_guest_has_pmu(struct kvm_vcpu_arch *arch) 298 { 299 return arch->cpucfg[6] & CPUCFG6_PMP; 300 } 301 302 static inline int kvm_get_pmu_num(struct kvm_vcpu_arch *arch) 303 { 304 return (arch->cpucfg[6] & CPUCFG6_PMNUM) >> CPUCFG6_PMNUM_SHIFT; 305 } 306 307 /* Check whether KVM support this feature (VMM may disable it) */ 308 static inline bool kvm_vm_support(struct kvm_arch *arch, int feature) 309 { 310 return !!(arch->kvm_features & BIT_ULL(feature)); 311 } 312 313 bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu); 314 315 /* Debug: dump vcpu state */ 316 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu); 317 318 /* MMU handling */ 319 void kvm_flush_tlb_all(void); 320 void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa); 321 int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write, int ecode); 322 323 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable); 324 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 325 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 326 327 static inline void update_pc(struct kvm_vcpu_arch *arch) 328 { 329 arch->pc += 4; 330 } 331 332 /* 333 * kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault. 334 * @vcpu: Virtual CPU. 335 * 336 * Returns: Whether the TLBL exception was likely due to an instruction 337 * fetch fault rather than a data load fault. 338 */ 339 static inline bool kvm_is_ifetch_fault(struct kvm_vcpu_arch *arch) 340 { 341 return arch->pc == arch->badv; 342 } 343 344 /* Misc */ 345 static inline void kvm_arch_hardware_unsetup(void) {} 346 static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {} 347 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {} 348 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {} 349 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 350 static inline void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) {} 351 void kvm_check_vpid(struct kvm_vcpu *vcpu); 352 enum hrtimer_restart kvm_swtimer_wakeup(struct hrtimer *timer); 353 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, const struct kvm_memory_slot *memslot); 354 void kvm_init_vmcs(struct kvm *kvm); 355 void kvm_exc_entry(void); 356 int kvm_enter_guest(struct kvm_run *run, struct kvm_vcpu *vcpu); 357 358 extern unsigned long vpid_mask; 359 extern struct kvm_world_switch *kvm_loongarch_ops; 360 361 #define SW_GCSR (1 << 0) 362 #define HW_GCSR (1 << 1) 363 #define INVALID_GCSR (1 << 2) 364 365 int get_gcsr_flag(int csr); 366 void set_hw_gcsr(int csr_id, unsigned long val); 367 368 #endif /* __ASM_LOONGARCH_KVM_HOST_H__ */ 369