1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
4 * Cherrytrail and Braswell, with RT5672 codec.
5 *
6 * Copyright (C) 2014 Intel Corp
7 * Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
8 * Mengdong Lin <mengdong.lin@intel.com>
9 */
10
11 #include <linux/gpio/consumer.h>
12 #include <linux/input.h>
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/soc.h>
20 #include <sound/jack.h>
21 #include <sound/soc-acpi.h>
22 #include "../../codecs/rt5670.h"
23 #include "../atom/sst-atom-controls.h"
24 #include "../common/soc-intel-quirks.h"
25
26
27 /* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
28 #define CHT_PLAT_CLK_3_HZ 19200000
29 #define CHT_CODEC_DAI "rt5670-aif1"
30
31 struct cht_mc_private {
32 struct snd_soc_jack headset;
33 char codec_name[SND_ACPI_I2C_ID_LEN];
34 struct clk *mclk;
35 bool use_ssp0;
36 };
37
38 /* Headset jack detection DAPM pins */
39 static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
40 {
41 .pin = "Headset Mic",
42 .mask = SND_JACK_MICROPHONE,
43 },
44 {
45 .pin = "Headphone",
46 .mask = SND_JACK_HEADPHONE,
47 },
48 };
49
platform_clock_control(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,int event)50 static int platform_clock_control(struct snd_soc_dapm_widget *w,
51 struct snd_kcontrol *k, int event)
52 {
53 struct snd_soc_dapm_context *dapm = w->dapm;
54 struct snd_soc_card *card = dapm->card;
55 struct snd_soc_dai *codec_dai;
56 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
57 int ret;
58
59 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
60 if (!codec_dai) {
61 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
62 return -EIO;
63 }
64
65 if (SND_SOC_DAPM_EVENT_ON(event)) {
66 if (ctx->mclk) {
67 ret = clk_prepare_enable(ctx->mclk);
68 if (ret < 0) {
69 dev_err(card->dev,
70 "could not configure MCLK state");
71 return ret;
72 }
73 }
74
75 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
76 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
77 CHT_PLAT_CLK_3_HZ, 48000 * 512);
78 if (ret < 0) {
79 dev_err(card->dev, "can't set codec pll: %d\n", ret);
80 return ret;
81 }
82
83 /* set codec sysclk source to PLL */
84 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
85 48000 * 512, SND_SOC_CLOCK_IN);
86 if (ret < 0) {
87 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
88 return ret;
89 }
90 } else {
91 /* Set codec sysclk source to its internal clock because codec
92 * PLL will be off when idle and MCLK will also be off by ACPI
93 * when codec is runtime suspended. Codec needs clock for jack
94 * detection and button press.
95 */
96 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
97 48000 * 512, SND_SOC_CLOCK_IN);
98 if (ret < 0) {
99 dev_err(card->dev, "failed to set codec sysclk: %d\n", ret);
100 return ret;
101 }
102
103 if (ctx->mclk)
104 clk_disable_unprepare(ctx->mclk);
105 }
106 return 0;
107 }
108
109 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
110 SND_SOC_DAPM_HP("Headphone", NULL),
111 SND_SOC_DAPM_MIC("Headset Mic", NULL),
112 SND_SOC_DAPM_MIC("Int Mic", NULL),
113 SND_SOC_DAPM_SPK("Ext Spk", NULL),
114 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
115 platform_clock_control, SND_SOC_DAPM_PRE_PMU |
116 SND_SOC_DAPM_POST_PMD),
117 };
118
119 static const struct snd_soc_dapm_route cht_audio_map[] = {
120 {"IN1P", NULL, "Headset Mic"},
121 {"IN1N", NULL, "Headset Mic"},
122 {"DMIC L1", NULL, "Int Mic"},
123 {"DMIC R1", NULL, "Int Mic"},
124 {"Headphone", NULL, "HPOL"},
125 {"Headphone", NULL, "HPOR"},
126 {"Ext Spk", NULL, "SPOLP"},
127 {"Ext Spk", NULL, "SPOLN"},
128 {"Ext Spk", NULL, "SPORP"},
129 {"Ext Spk", NULL, "SPORN"},
130 {"Headphone", NULL, "Platform Clock"},
131 {"Headset Mic", NULL, "Platform Clock"},
132 {"Int Mic", NULL, "Platform Clock"},
133 {"Ext Spk", NULL, "Platform Clock"},
134 };
135
136 static const struct snd_soc_dapm_route cht_audio_ssp0_map[] = {
137 {"AIF1 Playback", NULL, "ssp0 Tx"},
138 {"ssp0 Tx", NULL, "modem_out"},
139 {"modem_in", NULL, "ssp0 Rx"},
140 {"ssp0 Rx", NULL, "AIF1 Capture"},
141 };
142
143 static const struct snd_soc_dapm_route cht_audio_ssp2_map[] = {
144 {"AIF1 Playback", NULL, "ssp2 Tx"},
145 {"ssp2 Tx", NULL, "codec_out0"},
146 {"ssp2 Tx", NULL, "codec_out1"},
147 {"codec_in0", NULL, "ssp2 Rx"},
148 {"codec_in1", NULL, "ssp2 Rx"},
149 {"ssp2 Rx", NULL, "AIF1 Capture"},
150 };
151
152 static const struct snd_kcontrol_new cht_mc_controls[] = {
153 SOC_DAPM_PIN_SWITCH("Headphone"),
154 SOC_DAPM_PIN_SWITCH("Headset Mic"),
155 SOC_DAPM_PIN_SWITCH("Int Mic"),
156 SOC_DAPM_PIN_SWITCH("Ext Spk"),
157 };
158
cht_aif1_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)159 static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
160 struct snd_pcm_hw_params *params)
161 {
162 struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
163 struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
164 int ret;
165
166 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */
167 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
168 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
169 if (ret < 0) {
170 dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
171 return ret;
172 }
173
174 /* set codec sysclk source to PLL */
175 ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
176 params_rate(params) * 512,
177 SND_SOC_CLOCK_IN);
178 if (ret < 0) {
179 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
180 return ret;
181 }
182 return 0;
183 }
184
185 static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
186
187 static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
188 { "headset-gpios", &headset_gpios, 1 },
189 {},
190 };
191
cht_codec_init(struct snd_soc_pcm_runtime * runtime)192 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
193 {
194 int ret;
195 struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(runtime, 0);
196 struct snd_soc_component *component = codec_dai->component;
197 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
198
199 if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
200 dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
201
202 /* Select codec ASRC clock source to track I2S1 clock, because codec
203 * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
204 * be supported by RT5672. Otherwise, ASRC will be disabled and cause
205 * noise.
206 */
207 rt5670_sel_asrc_clk_src(component,
208 RT5670_DA_STEREO_FILTER
209 | RT5670_DA_MONO_L_FILTER
210 | RT5670_DA_MONO_R_FILTER
211 | RT5670_AD_STEREO_FILTER
212 | RT5670_AD_MONO_L_FILTER
213 | RT5670_AD_MONO_R_FILTER,
214 RT5670_CLK_SEL_I2S1_ASRC);
215
216 if (ctx->use_ssp0) {
217 ret = snd_soc_dapm_add_routes(&runtime->card->dapm,
218 cht_audio_ssp0_map,
219 ARRAY_SIZE(cht_audio_ssp0_map));
220 } else {
221 ret = snd_soc_dapm_add_routes(&runtime->card->dapm,
222 cht_audio_ssp2_map,
223 ARRAY_SIZE(cht_audio_ssp2_map));
224 }
225 if (ret)
226 return ret;
227
228 ret = snd_soc_card_jack_new_pins(runtime->card, "Headset",
229 SND_JACK_HEADSET | SND_JACK_BTN_0 |
230 SND_JACK_BTN_1 | SND_JACK_BTN_2,
231 &ctx->headset,
232 cht_bsw_headset_pins,
233 ARRAY_SIZE(cht_bsw_headset_pins));
234 if (ret)
235 return ret;
236
237 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
238 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
239 snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
240
241 rt5670_set_jack_detect(component, &ctx->headset);
242 if (ctx->mclk) {
243 /*
244 * The firmware might enable the clock at
245 * boot (this information may or may not
246 * be reflected in the enable clock register).
247 * To change the rate we must disable the clock
248 * first to cover these cases. Due to common
249 * clock framework restrictions that do not allow
250 * to disable a clock that has not been enabled,
251 * we need to enable the clock first.
252 */
253 ret = clk_prepare_enable(ctx->mclk);
254 if (!ret)
255 clk_disable_unprepare(ctx->mclk);
256
257 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
258
259 if (ret) {
260 dev_err(runtime->dev, "unable to set MCLK rate\n");
261 return ret;
262 }
263 }
264 return 0;
265 }
266
cht_codec_fixup(struct snd_soc_pcm_runtime * rtd,struct snd_pcm_hw_params * params)267 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
268 struct snd_pcm_hw_params *params)
269 {
270 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(rtd->card);
271 struct snd_interval *rate = hw_param_interval(params,
272 SNDRV_PCM_HW_PARAM_RATE);
273 struct snd_interval *channels = hw_param_interval(params,
274 SNDRV_PCM_HW_PARAM_CHANNELS);
275 int ret, bits;
276
277 /* The DSP will convert the FE rate to 48k, stereo, 24bits */
278 rate->min = rate->max = 48000;
279 channels->min = channels->max = 2;
280
281 if (ctx->use_ssp0) {
282 /* set SSP0 to 16-bit */
283 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
284 bits = 16;
285 } else {
286 /* set SSP2 to 24-bit */
287 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
288 bits = 24;
289 }
290
291 /*
292 * The default mode for the cpu-dai is TDM 4 slot. The default mode
293 * for the codec-dai is I2S. So we need to either set the cpu-dai to
294 * I2S mode to match the codec-dai, or set the codec-dai to TDM 4 slot
295 * (or program both to yet another mode).
296 * One board, the Lenovo Miix 2 10, uses not 1 but 2 codecs connected
297 * to SSP2. The second piggy-backed, output-only codec is inside the
298 * keyboard-dock (which has extra speakers). Unlike the main rt5672
299 * codec, we cannot configure this codec, it is hard coded to use
300 * 2 channel 24 bit I2S. For this to work we must use I2S mode on this
301 * board. Since we only support 2 channels anyways, there is no need
302 * for TDM on any cht-bsw-rt5672 designs. So we use I2S 2ch everywhere.
303 */
304 ret = snd_soc_dai_set_fmt(snd_soc_rtd_to_cpu(rtd, 0),
305 SND_SOC_DAIFMT_I2S |
306 SND_SOC_DAIFMT_NB_NF |
307 SND_SOC_DAIFMT_BP_FP);
308 if (ret < 0) {
309 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
310 return ret;
311 }
312
313 ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
314 if (ret < 0) {
315 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
316 return ret;
317 }
318
319 return 0;
320 }
321
cht_aif1_startup(struct snd_pcm_substream * substream)322 static int cht_aif1_startup(struct snd_pcm_substream *substream)
323 {
324 return snd_pcm_hw_constraint_single(substream->runtime,
325 SNDRV_PCM_HW_PARAM_RATE, 48000);
326 }
327
328 static const struct snd_soc_ops cht_aif1_ops = {
329 .startup = cht_aif1_startup,
330 };
331
332 static const struct snd_soc_ops cht_be_ssp2_ops = {
333 .hw_params = cht_aif1_hw_params,
334 };
335
336 SND_SOC_DAILINK_DEF(dummy,
337 DAILINK_COMP_ARRAY(COMP_DUMMY()));
338
339 SND_SOC_DAILINK_DEF(media,
340 DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
341
342 SND_SOC_DAILINK_DEF(deepbuffer,
343 DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
344
345 SND_SOC_DAILINK_DEF(ssp2_port,
346 DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
347 SND_SOC_DAILINK_DEF(ssp2_codec,
348 DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
349 "rt5670-aif1")));
350
351 SND_SOC_DAILINK_DEF(platform,
352 DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
353
354 static struct snd_soc_dai_link cht_dailink[] = {
355 /* Front End DAI links */
356 [MERR_DPCM_AUDIO] = {
357 .name = "Audio Port",
358 .stream_name = "Audio",
359 .nonatomic = true,
360 .dynamic = 1,
361 .dpcm_playback = 1,
362 .dpcm_capture = 1,
363 .ops = &cht_aif1_ops,
364 SND_SOC_DAILINK_REG(media, dummy, platform),
365 },
366 [MERR_DPCM_DEEP_BUFFER] = {
367 .name = "Deep-Buffer Audio Port",
368 .stream_name = "Deep-Buffer Audio",
369 .nonatomic = true,
370 .dynamic = 1,
371 .dpcm_playback = 1,
372 .ops = &cht_aif1_ops,
373 SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
374 },
375
376 /* Back End DAI links */
377 {
378 /* SSP2 - Codec */
379 .name = "SSP2-Codec",
380 .id = 0,
381 .no_pcm = 1,
382 .init = cht_codec_init,
383 .be_hw_params_fixup = cht_codec_fixup,
384 .dpcm_playback = 1,
385 .dpcm_capture = 1,
386 .ops = &cht_be_ssp2_ops,
387 SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
388 },
389 };
390
cht_suspend_pre(struct snd_soc_card * card)391 static int cht_suspend_pre(struct snd_soc_card *card)
392 {
393 struct snd_soc_component *component;
394 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
395
396 for_each_card_components(card, component) {
397 if (!strncmp(component->name,
398 ctx->codec_name, sizeof(ctx->codec_name))) {
399
400 dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
401 rt5670_jack_suspend(component);
402 break;
403 }
404 }
405 return 0;
406 }
407
cht_resume_post(struct snd_soc_card * card)408 static int cht_resume_post(struct snd_soc_card *card)
409 {
410 struct snd_soc_component *component;
411 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
412
413 for_each_card_components(card, component) {
414 if (!strncmp(component->name,
415 ctx->codec_name, sizeof(ctx->codec_name))) {
416
417 dev_dbg(component->dev, "enabling jack detect for resume.\n");
418 rt5670_jack_resume(component);
419 break;
420 }
421 }
422
423 return 0;
424 }
425
426 /* use space before codec name to simplify card ID, and simplify driver name */
427 #define SOF_CARD_NAME "bytcht rt5672" /* card name will be 'sof-bytcht rt5672' */
428 #define SOF_DRIVER_NAME "SOF"
429
430 #define CARD_NAME "cht-bsw-rt5672"
431 #define DRIVER_NAME NULL /* card name will be used for driver name */
432
433 /* SoC card */
434 static struct snd_soc_card snd_soc_card_cht = {
435 .owner = THIS_MODULE,
436 .dai_link = cht_dailink,
437 .num_links = ARRAY_SIZE(cht_dailink),
438 .dapm_widgets = cht_dapm_widgets,
439 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
440 .dapm_routes = cht_audio_map,
441 .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
442 .controls = cht_mc_controls,
443 .num_controls = ARRAY_SIZE(cht_mc_controls),
444 .suspend_pre = cht_suspend_pre,
445 .resume_post = cht_resume_post,
446 };
447
448 #define RT5672_I2C_DEFAULT "i2c-10EC5670:00"
449
snd_cht_mc_probe(struct platform_device * pdev)450 static int snd_cht_mc_probe(struct platform_device *pdev)
451 {
452 int ret_val = 0;
453 struct cht_mc_private *drv;
454 struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
455 const char *platform_name;
456 struct acpi_device *adev;
457 bool sof_parent;
458 int dai_index = 0;
459 int i;
460
461 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
462 if (!drv)
463 return -ENOMEM;
464
465 strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
466
467 /* find index of codec dai */
468 for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
469 if (cht_dailink[i].num_codecs &&
470 !strcmp(cht_dailink[i].codecs->name, RT5672_I2C_DEFAULT)) {
471 dai_index = i;
472 break;
473 }
474 }
475
476 /* fixup codec name based on HID */
477 adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
478 if (adev) {
479 snprintf(drv->codec_name, sizeof(drv->codec_name),
480 "i2c-%s", acpi_dev_name(adev));
481 cht_dailink[dai_index].codecs->name = drv->codec_name;
482 } else {
483 dev_err(&pdev->dev, "Error cannot find '%s' dev\n", mach->id);
484 return -ENOENT;
485 }
486
487 acpi_dev_put(adev);
488
489 /* Use SSP0 on Bay Trail CR devices */
490 if (soc_intel_is_byt() && mach->mach_params.acpi_ipc_irq_index == 0) {
491 cht_dailink[dai_index].cpus->dai_name = "ssp0-port";
492 drv->use_ssp0 = true;
493 }
494
495 /* override platform name, if required */
496 snd_soc_card_cht.dev = &pdev->dev;
497 platform_name = mach->mach_params.platform;
498
499 ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
500 platform_name);
501 if (ret_val)
502 return ret_val;
503
504 snd_soc_card_cht.components = rt5670_components();
505
506 drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
507 if (IS_ERR(drv->mclk)) {
508 dev_err(&pdev->dev,
509 "Failed to get MCLK from pmc_plt_clk_3: %ld\n",
510 PTR_ERR(drv->mclk));
511 return PTR_ERR(drv->mclk);
512 }
513 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
514
515 sof_parent = snd_soc_acpi_sof_parent(&pdev->dev);
516
517 /* set card and driver name */
518 if (sof_parent) {
519 snd_soc_card_cht.name = SOF_CARD_NAME;
520 snd_soc_card_cht.driver_name = SOF_DRIVER_NAME;
521 } else {
522 snd_soc_card_cht.name = CARD_NAME;
523 snd_soc_card_cht.driver_name = DRIVER_NAME;
524 }
525
526 /* set pm ops */
527 if (sof_parent)
528 pdev->dev.driver->pm = &snd_soc_pm_ops;
529
530 /* register the soc card */
531 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
532 if (ret_val) {
533 dev_err(&pdev->dev,
534 "snd_soc_register_card failed %d\n", ret_val);
535 return ret_val;
536 }
537 platform_set_drvdata(pdev, &snd_soc_card_cht);
538 return ret_val;
539 }
540
541 static struct platform_driver snd_cht_mc_driver = {
542 .driver = {
543 .name = "cht-bsw-rt5672",
544 },
545 .probe = snd_cht_mc_probe,
546 };
547
548 module_platform_driver(snd_cht_mc_driver);
549
550 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
551 MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
552 MODULE_LICENSE("GPL v2");
553 MODULE_ALIAS("platform:cht-bsw-rt5672");
554