1 /*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26 #ifndef VIRTIO_DRV_H
27 #define VIRTIO_DRV_H
28
29 #include <linux/dma-direction.h>
30 #include <linux/virtio.h>
31 #include <linux/virtio_ids.h>
32 #include <linux/virtio_config.h>
33 #include <linux/virtio_gpu.h>
34
35 #include <drm/drm_atomic.h>
36 #include <drm/drm_drv.h>
37 #include <drm/drm_encoder.h>
38 #include <drm/drm_fourcc.h>
39 #include <drm/drm_framebuffer.h>
40 #include <drm/drm_gem.h>
41 #include <drm/drm_gem_shmem_helper.h>
42 #include <drm/drm_ioctl.h>
43 #include <drm/drm_probe_helper.h>
44 #include <drm/virtgpu_drm.h>
45
46 #include <xen/xen.h>
47
48 #define DRIVER_NAME "virtio_gpu"
49 #define DRIVER_DESC "virtio GPU"
50
51 #define DRIVER_MAJOR 0
52 #define DRIVER_MINOR 1
53 #define DRIVER_PATCHLEVEL 0
54
55 #define STATE_INITIALIZING 0
56 #define STATE_OK 1
57 #define STATE_ERR 2
58
59 #define MAX_CAPSET_ID 63
60 #define MAX_RINGS 64
61
62 /* See virtio_gpu_ctx_create. One additional character for NULL terminator. */
63 #define DEBUG_NAME_MAX_LEN 65
64
65 /*
66 * Whether the host must be told about resource backing pages by DMA address
67 * rather than guest-physical address.
68 *
69 * This mirrors vring_use_map_api() in drivers/virtio/virtio_ring.c, including
70 * its xen_domain() case.
71 */
virtio_gpu_use_dma_api(const struct virtio_device * vdev)72 static inline bool virtio_gpu_use_dma_api(const struct virtio_device *vdev)
73 {
74 if (!virtio_has_dma_quirk(vdev))
75 return true;
76
77 if (xen_domain())
78 return true;
79
80 return false;
81 }
82
83 struct virtio_gpu_object_params {
84 unsigned long size;
85 bool dumb;
86 /* 3d */
87 bool virgl;
88 bool blob;
89
90 /* classic resources only */
91 uint32_t format;
92 uint32_t width;
93 uint32_t height;
94 uint32_t target;
95 uint32_t bind;
96 uint32_t depth;
97 uint32_t array_size;
98 uint32_t last_level;
99 uint32_t nr_samples;
100 uint32_t flags;
101
102 /* blob resources only */
103 uint32_t ctx_id;
104 uint32_t blob_mem;
105 uint32_t blob_flags;
106 uint64_t blob_id;
107 uint32_t blob_hints;
108 };
109
110 struct virtio_gpu_object {
111 struct drm_gem_shmem_object base;
112 struct sg_table *sgt;
113 uint32_t hw_res_handle;
114 bool dumb;
115 bool created;
116 bool attached;
117 /* a guest-bound transfer is queued and its mapping not yet synced */
118 bool from_host_pending;
119 bool host3d_blob, guest_blob;
120 uint32_t blob_mem, blob_flags;
121
122 int uuid_state;
123 uuid_t uuid;
124
125 /* for restoration of objects after hibernation */
126 struct virtio_gpu_object_params params;
127 struct list_head restore_node;
128 };
129 #define gem_to_virtio_gpu_obj(gobj) \
130 container_of((gobj), struct virtio_gpu_object, base.base)
131
132 struct virtio_gpu_object_shmem {
133 struct virtio_gpu_object base;
134 };
135
136 struct virtio_gpu_object_vram {
137 struct virtio_gpu_object base;
138 uint32_t map_state;
139 uint32_t map_info;
140 struct drm_mm_node vram_node;
141 };
142
143 #define to_virtio_gpu_shmem(virtio_gpu_object) \
144 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base)
145
146 #define to_virtio_gpu_vram(virtio_gpu_object) \
147 container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base)
148
149 struct virtio_gpu_object_array {
150 struct ww_acquire_ctx ticket;
151 struct list_head next;
152 u32 nents, total;
153 struct drm_gem_object *objs[] __counted_by(total);
154 };
155
156 struct virtio_gpu_vbuffer;
157 struct virtio_gpu_device;
158
159 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
160 struct virtio_gpu_vbuffer *vbuf);
161
162 struct virtio_gpu_fence_driver {
163 atomic64_t last_fence_id;
164 uint64_t current_fence_id;
165 uint64_t context;
166 struct list_head fences;
167 spinlock_t lock;
168 };
169
170 struct virtio_gpu_fence_event {
171 struct drm_pending_event base;
172 struct drm_event event;
173 };
174
175 struct virtio_gpu_fence {
176 struct dma_fence f;
177 uint32_t ring_idx;
178 uint64_t fence_id;
179 bool emit_fence_info;
180 struct virtio_gpu_fence_event *e;
181 struct virtio_gpu_fence_driver *drv;
182 struct list_head node;
183 };
184
185 struct virtio_gpu_vbuffer {
186 char *buf;
187 int size;
188
189 void *data_buf;
190 uint32_t data_size;
191
192 char *resp_buf;
193 int resp_size;
194 virtio_gpu_resp_cb resp_cb;
195 void *resp_cb_data;
196
197 struct virtio_gpu_object_array *objs;
198 struct list_head list;
199
200 uint32_t seqno;
201
202 /* guest-bound transfer whose shmem backing needs a CPU sync */
203 bool sync_for_cpu;
204 };
205
206 struct virtio_gpu_output {
207 int index;
208 struct drm_crtc crtc;
209 struct drm_connector conn;
210 struct drm_encoder enc;
211 struct virtio_gpu_display_one info;
212 struct virtio_gpu_update_cursor cursor;
213 const struct drm_edid *drm_edid;
214 int cur_x;
215 int cur_y;
216 bool needs_modeset;
217 };
218 #define drm_crtc_to_virtio_gpu_output(x) \
219 container_of(x, struct virtio_gpu_output, crtc)
220
221 struct virtio_gpu_framebuffer {
222 struct drm_framebuffer base;
223 struct virtio_gpu_fence *fence;
224 };
225 #define to_virtio_gpu_framebuffer(x) \
226 container_of(x, struct virtio_gpu_framebuffer, base)
227
228 struct virtio_gpu_plane_state {
229 struct drm_plane_state base;
230 struct virtio_gpu_fence *fence;
231 };
232 #define to_virtio_gpu_plane_state(x) \
233 container_of(x, struct virtio_gpu_plane_state, base)
234
235 struct virtio_gpu_queue {
236 struct virtqueue *vq;
237 spinlock_t qlock;
238 wait_queue_head_t ack_queue;
239 struct work_struct dequeue_work;
240 uint32_t seqno;
241 };
242
243 struct virtio_gpu_drv_capset {
244 uint32_t id;
245 uint32_t max_version;
246 uint32_t max_size;
247 };
248
249 struct virtio_gpu_drv_cap_cache {
250 struct list_head head;
251 void *caps_cache;
252 uint32_t id;
253 uint32_t version;
254 uint32_t size;
255 atomic_t is_valid;
256 };
257
258 struct virtio_gpu_device {
259 struct drm_device *ddev;
260
261 struct virtio_device *vdev;
262
263 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
264 uint32_t num_scanouts;
265
266 struct virtio_gpu_queue ctrlq;
267 struct virtio_gpu_queue cursorq;
268 bool vqs_released;
269 struct kmem_cache *vbufs;
270
271 atomic_t pending_commands;
272
273 struct ida resource_ida;
274
275 wait_queue_head_t resp_wq;
276 /* current display info */
277 spinlock_t display_info_lock;
278 bool display_info_pending;
279
280 struct virtio_gpu_fence_driver fence_drv;
281
282 struct ida ctx_id_ida;
283
284 bool has_virgl_3d;
285 bool has_edid;
286 bool has_indirect;
287 bool has_resource_assign_uuid;
288 bool has_resource_blob;
289 bool has_host_visible;
290 bool has_context_init;
291 bool has_blob_alignment;
292 bool hibernated;
293 struct virtio_shm_region host_visible_region;
294 struct drm_mm host_visible_mm;
295
296 struct work_struct config_changed_work;
297
298 struct work_struct obj_free_work;
299 spinlock_t obj_free_lock;
300 struct list_head obj_free_list;
301 struct mutex obj_restore_lock;
302 struct list_head obj_restore_list;
303
304 struct virtio_gpu_drv_capset *capsets;
305 uint32_t num_capsets;
306 uint64_t capset_id_mask;
307 struct list_head cap_cache;
308 uint32_t blob_alignment;
309
310 struct notifier_block pm_nb;
311
312 /* protects uuid state when exporting */
313 spinlock_t resource_export_lock;
314 /* protects map state and host_visible_mm */
315 spinlock_t host_visible_lock;
316 };
317
318 struct virtio_gpu_fpriv {
319 uint32_t ctx_id;
320 uint32_t context_init;
321 bool context_created;
322 uint32_t num_rings;
323 uint64_t base_fence_ctx;
324 uint64_t ring_idx_mask;
325 struct mutex context_lock;
326 char debug_name[DEBUG_NAME_MAX_LEN];
327 bool explicit_debug_name;
328 };
329
330 /* virtgpu_ioctl.c */
331 #define DRM_VIRTIO_NUM_IOCTLS 12
332 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
333 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file);
334
335 /* virtgpu_kms.c */
336 int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev);
337 void virtio_gpu_deinit(struct drm_device *dev);
338 void virtio_gpu_release(struct drm_device *dev);
339 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
340 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
341 int virtio_gpu_find_vqs(struct virtio_gpu_device *vgdev);
342
343 /* virtgpu_gem.c */
344 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
345 struct drm_file *file);
346 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
347 struct drm_file *file);
348 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
349 struct drm_device *dev,
350 struct drm_mode_create_dumb *args);
351
352 struct virtio_gpu_object_array *virtio_gpu_panic_array_alloc(void);
353 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
354 struct virtio_gpu_object_array*
355 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
356 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
357 struct drm_gem_object *obj);
358 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
359 int virtio_gpu_lock_one_resv_uninterruptible(struct virtio_gpu_object_array *objs);
360 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
361 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
362 struct dma_fence *fence);
363 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
364 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
365 struct virtio_gpu_object_array *objs);
366 void virtio_gpu_array_put_free_work(struct work_struct *work);
367
368 /* virtgpu_vq.c */
369 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
370 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
371 void virtio_gpu_reclaim_vbufs(struct virtio_gpu_device *vgdev);
372 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
373 struct virtio_gpu_object *bo,
374 struct virtio_gpu_object_params *params,
375 struct virtio_gpu_object_array *objs,
376 struct virtio_gpu_fence *fence);
377 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
378 struct virtio_gpu_object *bo,
379 bool no_cb);
380 int virtio_gpu_panic_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
381 uint64_t offset,
382 uint32_t width, uint32_t height,
383 uint32_t x, uint32_t y,
384 struct virtio_gpu_object_array *objs);
385 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
386 uint64_t offset,
387 uint32_t width, uint32_t height,
388 uint32_t x, uint32_t y,
389 struct virtio_gpu_object_array *objs,
390 struct virtio_gpu_fence *fence);
391 void virtio_gpu_panic_cmd_resource_flush(struct virtio_gpu_device *vgdev,
392 uint32_t resource_id,
393 uint32_t x, uint32_t y,
394 uint32_t width, uint32_t height);
395 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
396 uint32_t resource_id,
397 uint32_t x, uint32_t y,
398 uint32_t width, uint32_t height,
399 struct virtio_gpu_object_array *objs,
400 struct virtio_gpu_fence *fence);
401 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
402 uint32_t scanout_id, uint32_t resource_id,
403 uint32_t width, uint32_t height,
404 uint32_t x, uint32_t y);
405 void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
406 struct virtio_gpu_object *obj,
407 struct virtio_gpu_mem_entry *ents,
408 unsigned int nents);
409 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
410 struct virtio_gpu_object *obj,
411 struct virtio_gpu_fence *fence);
412 int virtio_gpu_detach_object_fenced(struct virtio_gpu_object *bo);
413 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
414 struct virtio_gpu_output *output);
415 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
416 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
417 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
418 int idx, int version,
419 struct virtio_gpu_drv_cap_cache **cache_p);
420 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
421 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
422 uint32_t context_init, uint32_t nlen,
423 const char *name);
424 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
425 uint32_t id);
426 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
427 uint32_t ctx_id,
428 struct virtio_gpu_object_array *objs);
429 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
430 uint32_t ctx_id,
431 struct virtio_gpu_object_array *objs);
432 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
433 void *data, uint32_t data_size,
434 uint32_t ctx_id,
435 struct virtio_gpu_object_array *objs,
436 struct virtio_gpu_fence *fence);
437 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
438 uint32_t ctx_id,
439 uint64_t offset, uint32_t level,
440 uint32_t stride,
441 uint32_t layer_stride,
442 struct drm_virtgpu_3d_box *box,
443 struct virtio_gpu_object_array *objs,
444 struct virtio_gpu_fence *fence);
445 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
446 uint32_t ctx_id,
447 uint64_t offset, uint32_t level,
448 uint32_t stride,
449 uint32_t layer_stride,
450 struct drm_virtgpu_3d_box *box,
451 struct virtio_gpu_object_array *objs,
452 struct virtio_gpu_fence *fence);
453 void
454 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
455 struct virtio_gpu_object *bo,
456 struct virtio_gpu_object_params *params,
457 struct virtio_gpu_object_array *objs,
458 struct virtio_gpu_fence *fence);
459 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
460 void virtio_gpu_cursor_ack(struct virtqueue *vq);
461 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
462 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
463 void virtio_gpu_panic_notify(struct virtio_gpu_device *vgdev);
464 void virtio_gpu_notify(struct virtio_gpu_device *vgdev);
465 int virtio_gpu_wait_queue(struct virtio_gpu_queue *vgvq, unsigned int num_elem);
466
467 int
468 virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev,
469 struct virtio_gpu_object_array *objs);
470
471 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev,
472 struct virtio_gpu_object_array *objs, uint64_t offset);
473
474 void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev,
475 struct virtio_gpu_object *bo);
476
477 void
478 virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev,
479 struct virtio_gpu_object *bo,
480 struct virtio_gpu_object_params *params,
481 struct virtio_gpu_mem_entry *ents,
482 uint32_t nents);
483 void
484 virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev,
485 uint32_t scanout_id,
486 struct virtio_gpu_object *bo,
487 struct drm_framebuffer *fb,
488 uint32_t width, uint32_t height,
489 uint32_t x, uint32_t y);
490
491 /* virtgpu_display.c */
492 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
493 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
494
495 /* virtgpu_plane.c */
496 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
497 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
498 enum drm_plane_type type,
499 int index);
500
501 /* virtgpu_fence.c */
502 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,
503 uint64_t base_fence_ctx,
504 uint32_t ring_idx);
505 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
506 struct virtio_gpu_ctrl_hdr *cmd_hdr,
507 struct virtio_gpu_fence *fence);
508 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
509 u64 fence_id);
510
511 /* virtgpu_object.c */
512 void virtio_gpu_remove_from_restore_list(struct virtio_gpu_object *bo);
513 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo);
514 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
515 size_t size);
516 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
517 struct virtio_gpu_object_params *params,
518 struct virtio_gpu_object **bo_ptr,
519 struct virtio_gpu_fence *fence);
520
521 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo);
522
523 int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
524 uint32_t *resid);
525
526 void virtio_gpu_add_object_to_restore_list(struct virtio_gpu_device *vgdev,
527 struct virtio_gpu_object *bo);
528
529 int virtio_gpu_object_restore_all(struct virtio_gpu_device *vgdev);
530
531 void virtio_gpu_object_unref_all(struct virtio_gpu_device *vgdev);
532
533 /* virtgpu_prime.c */
534 int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev,
535 struct virtio_gpu_object *bo);
536 struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj,
537 int flags);
538 struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev,
539 struct dma_buf *buf);
540 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
541 struct drm_device *dev, struct dma_buf_attachment *attach,
542 struct sg_table *sgt);
543 int virtgpu_dma_buf_import_sgt(struct virtio_gpu_mem_entry **ents,
544 unsigned int *nents,
545 struct virtio_gpu_object *bo,
546 struct dma_buf_attachment *attach);
547 int virtgpu_dma_buf_obj_resubmit(struct virtio_gpu_device *vgdev,
548 struct virtio_gpu_object *bo);
549
550 /* virtgpu_debugfs.c */
551 void virtio_gpu_debugfs_init(struct drm_minor *minor);
552
553 /* virtgpu_vram.c */
554 bool virtio_gpu_is_vram(struct virtio_gpu_object *bo);
555 int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev,
556 struct virtio_gpu_object_params *params,
557 struct virtio_gpu_object **bo_ptr);
558 struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo,
559 struct device *dev,
560 enum dma_data_direction dir);
561 void virtio_gpu_vram_unmap_dma_buf(struct device *dev,
562 struct sg_table *sgt,
563 enum dma_data_direction dir);
564 void virtio_gpu_vram_map_deferred(struct virtio_gpu_object_vram *vram);
565
566 /* virtgpu_submit.c */
567 int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data,
568 struct drm_file *file);
569
570 #endif
571