1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Google virtual Ethernet (gve) driver
3 *
4 * Copyright (C) 2015-2021 Google, Inc.
5 */
6
7 #include "gve.h"
8 #include "gve_dqo.h"
9 #include "gve_adminq.h"
10 #include "gve_utils.h"
11 #include <linux/bpf.h>
12 #include <linux/ip.h>
13 #include <linux/ipv6.h>
14 #include <linux/skbuff.h>
15 #include <linux/slab.h>
16 #include <net/ip6_checksum.h>
17 #include <net/ipv6.h>
18 #include <net/tcp.h>
19 #include <net/xdp_sock_drv.h>
20
gve_rx_starvation_timer(struct timer_list * t)21 static void gve_rx_starvation_timer(struct timer_list *t)
22 {
23 struct gve_rx_ring *rx = timer_container_of(rx, t, starvation_timer);
24 struct gve_priv *priv = rx->gve;
25 struct gve_notify_block *block;
26
27 block = &priv->ntfy_blocks[rx->ntfy_id];
28 napi_schedule(&block->napi);
29 }
30
gve_rx_free_hdr_bufs(struct gve_priv * priv,struct gve_rx_ring * rx)31 static void gve_rx_free_hdr_bufs(struct gve_priv *priv, struct gve_rx_ring *rx)
32 {
33 struct device *hdev = &priv->pdev->dev;
34
35 if (rx->dqo.hdr_bufs.data) {
36 size_t size =
37 (size_t)priv->header_buf_size * rx->dqo.num_buf_states;
38
39 dma_free_coherent(hdev, size, rx->dqo.hdr_bufs.data,
40 rx->dqo.hdr_bufs.addr);
41 rx->dqo.hdr_bufs.data = NULL;
42 }
43 }
44
gve_rx_init_ring_state_dqo(struct gve_rx_ring * rx,const u32 buffer_queue_slots,const u32 completion_queue_slots)45 static void gve_rx_init_ring_state_dqo(struct gve_rx_ring *rx,
46 const u32 buffer_queue_slots,
47 const u32 completion_queue_slots)
48 {
49 int i;
50
51 /* Set buffer queue state */
52 rx->dqo.bufq.mask = buffer_queue_slots - 1;
53 rx->dqo.bufq.head = 0;
54 rx->dqo.bufq.tail = 0;
55
56 /* Set completion queue state */
57 rx->dqo.complq.num_free_slots = completion_queue_slots;
58 rx->dqo.complq.mask = completion_queue_slots - 1;
59 rx->dqo.complq.cur_gen_bit = 0;
60 rx->dqo.complq.head = 0;
61
62 /* Set RX SKB context */
63 rx->ctx.skb_head = NULL;
64 rx->ctx.skb_tail = NULL;
65
66 /* Set up linked list of buffer IDs */
67 if (rx->dqo.buf_states) {
68 for (i = 0; i < rx->dqo.num_buf_states - 1; i++)
69 rx->dqo.buf_states[i].next = i + 1;
70 rx->dqo.buf_states[rx->dqo.num_buf_states - 1].next = -1;
71 }
72
73 rx->dqo.free_buf_states = 0;
74 rx->dqo.recycled_buf_states.head = -1;
75 rx->dqo.recycled_buf_states.tail = -1;
76 rx->dqo.used_buf_states.head = -1;
77 rx->dqo.used_buf_states.tail = -1;
78 }
79
gve_rx_reset_ring_dqo(struct gve_priv * priv,int idx)80 static void gve_rx_reset_ring_dqo(struct gve_priv *priv, int idx)
81 {
82 struct gve_rx_ring *rx = &priv->rx[idx];
83 size_t size;
84 int i;
85
86 const u32 buffer_queue_slots = priv->rx_desc_cnt;
87 const u32 completion_queue_slots = priv->rx_desc_cnt;
88
89 /* Reset buffer queue */
90 if (rx->dqo.bufq.desc_ring) {
91 size = sizeof(rx->dqo.bufq.desc_ring[0]) *
92 buffer_queue_slots;
93 memset(rx->dqo.bufq.desc_ring, 0, size);
94 }
95
96 /* Reset completion queue */
97 if (rx->dqo.complq.desc_ring) {
98 size = sizeof(rx->dqo.complq.desc_ring[0]) *
99 completion_queue_slots;
100 memset(rx->dqo.complq.desc_ring, 0, size);
101 }
102
103 /* Reset q_resources */
104 if (rx->q_resources)
105 memset(rx->q_resources, 0, sizeof(*rx->q_resources));
106
107 /* Reset buf states */
108 if (rx->dqo.buf_states) {
109 for (i = 0; i < rx->dqo.num_buf_states; i++) {
110 struct gve_rx_buf_state_dqo *bs = &rx->dqo.buf_states[i];
111
112 if (rx->dqo.page_pool)
113 gve_free_to_page_pool(rx, bs, false);
114 else
115 gve_free_qpl_page_dqo(bs);
116 }
117 }
118
119 gve_rx_init_ring_state_dqo(rx, buffer_queue_slots,
120 completion_queue_slots);
121 }
122
gve_rx_stop_ring_dqo(struct gve_priv * priv,int idx)123 void gve_rx_stop_ring_dqo(struct gve_priv *priv, int idx)
124 {
125 int ntfy_idx = gve_rx_idx_to_ntfy(priv, idx);
126 struct gve_rx_ring *rx = &priv->rx[idx];
127
128 if (!gve_rx_was_added_to_block(priv, idx))
129 return;
130
131 if (rx->dqo.page_pool)
132 page_pool_disable_direct_recycling(rx->dqo.page_pool);
133 timer_shutdown_sync(&rx->starvation_timer);
134 gve_remove_napi(priv, ntfy_idx);
135 gve_rx_remove_from_block(priv, idx);
136 gve_rx_reset_ring_dqo(priv, idx);
137 }
138
gve_rx_free_ring_dqo(struct gve_priv * priv,struct gve_rx_ring * rx,struct gve_rx_alloc_rings_cfg * cfg)139 void gve_rx_free_ring_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,
140 struct gve_rx_alloc_rings_cfg *cfg)
141 {
142 struct device *hdev = &priv->pdev->dev;
143 size_t completion_queue_slots;
144 size_t buffer_queue_slots;
145 int idx = rx->q_num;
146 size_t size;
147 u32 qpl_id;
148 int i;
149
150 completion_queue_slots = rx->dqo.complq.mask + 1;
151 buffer_queue_slots = rx->dqo.bufq.mask + 1;
152
153 if (rx->q_resources) {
154 dma_free_coherent(hdev, sizeof(*rx->q_resources),
155 rx->q_resources, rx->q_resources_bus);
156 rx->q_resources = NULL;
157 }
158
159 for (i = 0; i < rx->dqo.num_buf_states; i++) {
160 struct gve_rx_buf_state_dqo *bs = &rx->dqo.buf_states[i];
161
162 if (rx->dqo.page_pool)
163 gve_free_to_page_pool(rx, bs, false);
164 else
165 gve_free_qpl_page_dqo(bs);
166 if (gve_buf_state_is_allocated(rx, bs) && bs->xsk_buff) {
167 xsk_buff_free(bs->xsk_buff);
168 bs->xsk_buff = NULL;
169 }
170 }
171
172 if (rx->dqo.qpl) {
173 qpl_id = gve_get_rx_qpl_id(cfg->qcfg_tx, rx->q_num);
174 gve_free_queue_page_list(priv, rx->dqo.qpl, qpl_id);
175 rx->dqo.qpl = NULL;
176 }
177
178 if (rx->dqo.bufq.desc_ring) {
179 size = sizeof(rx->dqo.bufq.desc_ring[0]) * buffer_queue_slots;
180 dma_free_coherent(hdev, size, rx->dqo.bufq.desc_ring,
181 rx->dqo.bufq.bus);
182 rx->dqo.bufq.desc_ring = NULL;
183 }
184
185 if (rx->dqo.complq.desc_ring) {
186 size = sizeof(rx->dqo.complq.desc_ring[0]) *
187 completion_queue_slots;
188 dma_free_coherent(hdev, size, rx->dqo.complq.desc_ring,
189 rx->dqo.complq.bus);
190 rx->dqo.complq.desc_ring = NULL;
191 }
192
193 kvfree(rx->dqo.buf_states);
194 rx->dqo.buf_states = NULL;
195
196 if (rx->dqo.page_pool) {
197 page_pool_destroy(rx->dqo.page_pool);
198 rx->dqo.page_pool = NULL;
199 }
200
201 gve_rx_free_hdr_bufs(priv, rx);
202
203 netif_dbg(priv, drv, priv->dev, "freed rx ring %d\n", idx);
204 }
205
gve_rx_alloc_hdr_bufs(struct gve_priv * priv,struct gve_rx_ring * rx,const u32 buf_count)206 static int gve_rx_alloc_hdr_bufs(struct gve_priv *priv, struct gve_rx_ring *rx,
207 const u32 buf_count)
208 {
209 struct device *hdev = &priv->pdev->dev;
210
211 rx->dqo.hdr_bufs.data = dma_alloc_coherent(hdev, priv->header_buf_size * buf_count,
212 &rx->dqo.hdr_bufs.addr, GFP_KERNEL);
213 if (!rx->dqo.hdr_bufs.data)
214 return -ENOMEM;
215
216 return 0;
217 }
218
gve_rx_start_ring_dqo(struct gve_priv * priv,int idx)219 void gve_rx_start_ring_dqo(struct gve_priv *priv, int idx)
220 {
221 int ntfy_idx = gve_rx_idx_to_ntfy(priv, idx);
222 struct gve_rx_ring *rx = &priv->rx[idx];
223
224 gve_rx_add_to_block(priv, idx);
225 timer_setup(&rx->starvation_timer, gve_rx_starvation_timer, 0);
226 gve_add_napi(priv, ntfy_idx, gve_napi_poll_dqo);
227 }
228
gve_rx_alloc_ring_dqo(struct gve_priv * priv,struct gve_rx_alloc_rings_cfg * cfg,struct gve_rx_ring * rx,int idx)229 int gve_rx_alloc_ring_dqo(struct gve_priv *priv,
230 struct gve_rx_alloc_rings_cfg *cfg,
231 struct gve_rx_ring *rx,
232 int idx)
233 {
234 struct device *hdev = &priv->pdev->dev;
235 struct page_pool *pool;
236 size_t size;
237 u32 qpl_id;
238
239 const u32 buffer_queue_slots = cfg->ring_size;
240 const u32 completion_queue_slots = cfg->ring_size;
241
242 netif_dbg(priv, drv, priv->dev, "allocating rx ring DQO\n");
243
244 memset(rx, 0, sizeof(*rx));
245 rx->gve = priv;
246 rx->q_num = idx;
247 rx->packet_buffer_size = cfg->packet_buffer_size;
248
249 if (cfg->xdp) {
250 rx->packet_buffer_truesize = GVE_XDP_RX_BUFFER_SIZE_DQO;
251 rx->rx_headroom = XDP_PACKET_HEADROOM;
252 } else {
253 rx->packet_buffer_truesize = rx->packet_buffer_size;
254 rx->rx_headroom = 0;
255 }
256
257 /* struct gve_xdp_buff is overlaid on struct xdp_buff_xsk and utilizes
258 * the 24 byte field cb to store gve specific data.
259 */
260 XSK_CHECK_PRIV_TYPE(struct gve_xdp_buff);
261
262 rx->dqo.num_buf_states = cfg->raw_addressing ? buffer_queue_slots :
263 cfg->pages_per_qpl;
264 rx->dqo.buf_states = kvcalloc_node(rx->dqo.num_buf_states,
265 sizeof(rx->dqo.buf_states[0]),
266 GFP_KERNEL, priv->numa_node);
267 if (!rx->dqo.buf_states)
268 return -ENOMEM;
269
270 /* Allocate header buffers for header-split */
271 if (cfg->enable_header_split)
272 if (gve_rx_alloc_hdr_bufs(priv, rx, rx->dqo.num_buf_states))
273 goto err;
274
275 /* Allocate RX completion queue */
276 size = sizeof(rx->dqo.complq.desc_ring[0]) *
277 completion_queue_slots;
278 rx->dqo.complq.desc_ring =
279 dma_alloc_coherent(hdev, size, &rx->dqo.complq.bus, GFP_KERNEL);
280 if (!rx->dqo.complq.desc_ring)
281 goto err;
282
283 /* Allocate RX buffer queue */
284 size = sizeof(rx->dqo.bufq.desc_ring[0]) * buffer_queue_slots;
285 rx->dqo.bufq.desc_ring =
286 dma_alloc_coherent(hdev, size, &rx->dqo.bufq.bus, GFP_KERNEL);
287 if (!rx->dqo.bufq.desc_ring)
288 goto err;
289
290 if (cfg->raw_addressing) {
291 pool = gve_rx_create_page_pool(priv, rx, cfg->xdp);
292 if (IS_ERR(pool))
293 goto err;
294
295 rx->dqo.page_pool = pool;
296 } else {
297 qpl_id = gve_get_rx_qpl_id(cfg->qcfg_tx, rx->q_num);
298
299 rx->dqo.qpl = gve_alloc_queue_page_list(priv, qpl_id,
300 cfg->pages_per_qpl);
301 if (!rx->dqo.qpl)
302 goto err;
303 rx->dqo.next_qpl_page_idx = 0;
304 }
305
306 rx->q_resources = dma_alloc_coherent(hdev, sizeof(*rx->q_resources),
307 &rx->q_resources_bus, GFP_KERNEL);
308 if (!rx->q_resources)
309 goto err;
310
311 gve_rx_init_ring_state_dqo(rx, buffer_queue_slots,
312 completion_queue_slots);
313
314 return 0;
315
316 err:
317 gve_rx_free_ring_dqo(priv, rx, cfg);
318 return -ENOMEM;
319 }
320
gve_rx_write_doorbell_dqo(const struct gve_priv * priv,int queue_idx)321 void gve_rx_write_doorbell_dqo(const struct gve_priv *priv, int queue_idx)
322 {
323 const struct gve_rx_ring *rx = &priv->rx[queue_idx];
324 u64 index = be32_to_cpu(rx->q_resources->db_index);
325
326 iowrite32(rx->dqo.bufq.tail, &priv->db_bar2[index]);
327 }
328
gve_rx_alloc_rings_dqo(struct gve_priv * priv,struct gve_rx_alloc_rings_cfg * cfg)329 int gve_rx_alloc_rings_dqo(struct gve_priv *priv,
330 struct gve_rx_alloc_rings_cfg *cfg)
331 {
332 struct gve_rx_ring *rx;
333 int err;
334 int i;
335
336 rx = kvzalloc_objs(struct gve_rx_ring, cfg->qcfg_rx->max_queues);
337 if (!rx)
338 return -ENOMEM;
339
340 for (i = 0; i < cfg->qcfg_rx->num_queues; i++) {
341 err = gve_rx_alloc_ring_dqo(priv, cfg, &rx[i], i);
342 if (err) {
343 netif_err(priv, drv, priv->dev,
344 "Failed to alloc rx ring=%d: err=%d\n",
345 i, err);
346 goto err;
347 }
348 }
349
350 cfg->rx = rx;
351 return 0;
352
353 err:
354 for (i--; i >= 0; i--)
355 gve_rx_free_ring_dqo(priv, &rx[i], cfg);
356 kvfree(rx);
357 return err;
358 }
359
gve_rx_free_rings_dqo(struct gve_priv * priv,struct gve_rx_alloc_rings_cfg * cfg)360 void gve_rx_free_rings_dqo(struct gve_priv *priv,
361 struct gve_rx_alloc_rings_cfg *cfg)
362 {
363 struct gve_rx_ring *rx = cfg->rx;
364 int i;
365
366 if (!rx)
367 return;
368
369 for (i = 0; i < cfg->qcfg_rx->num_queues; i++)
370 gve_rx_free_ring_dqo(priv, &rx[i], cfg);
371
372 kvfree(rx);
373 cfg->rx = NULL;
374 }
375
gve_rx_post_buffers_dqo(struct gve_rx_ring * rx)376 void gve_rx_post_buffers_dqo(struct gve_rx_ring *rx)
377 {
378 struct gve_rx_compl_queue_dqo *complq = &rx->dqo.complq;
379 struct gve_rx_buf_queue_dqo *bufq = &rx->dqo.bufq;
380 struct gve_priv *priv = rx->gve;
381 u32 num_bufs_avail_to_hw;
382 u32 num_avail_slots;
383 u32 num_full_slots;
384 u32 num_posted = 0;
385
386 num_full_slots = (bufq->tail - bufq->head) & bufq->mask;
387 num_avail_slots = bufq->mask - num_full_slots;
388
389 num_avail_slots = min_t(u32, num_avail_slots, complq->num_free_slots);
390 while (num_posted < num_avail_slots) {
391 struct gve_rx_desc_dqo *desc = &bufq->desc_ring[bufq->tail];
392
393 if (unlikely(gve_alloc_buffer(rx, desc))) {
394 u64_stats_update_begin(&rx->statss);
395 rx->rx_buf_alloc_fail++;
396 u64_stats_update_end(&rx->statss);
397 break;
398 }
399
400 if (rx->dqo.hdr_bufs.data) {
401 u16 buf_id = le16_to_cpu(desc->buf_id);
402
403 desc->header_buf_addr =
404 cpu_to_le64(rx->dqo.hdr_bufs.addr +
405 (size_t)priv->header_buf_size * buf_id);
406 }
407
408 bufq->tail = (bufq->tail + 1) & bufq->mask;
409 complq->num_free_slots--;
410 num_posted++;
411
412 if ((bufq->tail & (GVE_RX_BUF_THRESH_DQO - 1)) == 0)
413 gve_rx_write_doorbell_dqo(priv, rx->q_num);
414 }
415
416 rx->fill_cnt += num_posted;
417
418 /* If the queue has fewer than GVE_RX_BUF_THRESH_DQO descriptors
419 * visible to the hardware, the hardware is in danger of starving
420 * and cannot trigger interrupts.
421 *
422 * We use a threshold of 32 because a single maximum-sized RSC
423 * packet can consume up to 19 descriptors in the Rx path. Lower
424 * thresholds (e.g., 8 or 16) would be unsafe as they could cause
425 * the device to drop/stall on a maximum-sized RSC packet.
426 *
427 * Start the timer to periodically reschedule NAPI and recover.
428 */
429 num_bufs_avail_to_hw =
430 ((bufq->tail & ~(GVE_RX_BUF_THRESH_DQO - 1)) -
431 bufq->head) & bufq->mask;
432
433 if (num_bufs_avail_to_hw < GVE_RX_BUF_THRESH_DQO) {
434 mod_timer(&rx->starvation_timer,
435 jiffies + msecs_to_jiffies(GVE_RX_NAPI_RESCHED_MS));
436 }
437 }
438
gve_rx_skb_csum(struct sk_buff * skb,const struct gve_rx_compl_desc_dqo * desc,struct gve_ptype ptype)439 static void gve_rx_skb_csum(struct sk_buff *skb,
440 const struct gve_rx_compl_desc_dqo *desc,
441 struct gve_ptype ptype)
442 {
443 skb->ip_summed = CHECKSUM_NONE;
444
445 /* HW did not identify and process L3 and L4 headers. */
446 if (unlikely(!desc->l3_l4_processed))
447 return;
448
449 if (ptype.l3_type == GVE_L3_TYPE_IPV4) {
450 if (unlikely(desc->csum_ip_err || desc->csum_external_ip_err))
451 return;
452 } else if (ptype.l3_type == GVE_L3_TYPE_IPV6) {
453 /* Checksum should be skipped if this flag is set. */
454 if (unlikely(desc->ipv6_ex_add))
455 return;
456 }
457
458 if (unlikely(desc->csum_l4_err))
459 return;
460
461 switch (ptype.l4_type) {
462 case GVE_L4_TYPE_TCP:
463 case GVE_L4_TYPE_UDP:
464 case GVE_L4_TYPE_ICMP:
465 case GVE_L4_TYPE_SCTP:
466 skb->ip_summed = CHECKSUM_UNNECESSARY;
467 break;
468 default:
469 break;
470 }
471 }
472
gve_rx_skb_hash(struct sk_buff * skb,const struct gve_rx_compl_desc_dqo * compl_desc,struct gve_ptype ptype)473 static void gve_rx_skb_hash(struct sk_buff *skb,
474 const struct gve_rx_compl_desc_dqo *compl_desc,
475 struct gve_ptype ptype)
476 {
477 enum pkt_hash_types hash_type = PKT_HASH_TYPE_L2;
478
479 if (ptype.l4_type != GVE_L4_TYPE_UNKNOWN)
480 hash_type = PKT_HASH_TYPE_L4;
481 else if (ptype.l3_type != GVE_L3_TYPE_UNKNOWN)
482 hash_type = PKT_HASH_TYPE_L3;
483
484 skb_set_hash(skb, le32_to_cpu(compl_desc->hash), hash_type);
485 }
486
487 /* Expand the hardware timestamp to the full 64 bits of width, and add it to the
488 * skb.
489 *
490 * This algorithm works by using the passed hardware timestamp to generate a
491 * diff relative to the last read of the nic clock. This diff can be positive or
492 * negative, as it is possible that we have read the clock more recently than
493 * the hardware has received this packet. To detect this, we use the high bit of
494 * the diff, and assume that the read is more recent if the high bit is set. In
495 * this case we invert the process.
496 *
497 * Note that this means if the time delta between packet reception and the last
498 * clock read is greater than ~2 seconds, this will provide invalid results.
499 */
gve_rx_get_hwtstamp(struct gve_priv * gve,u32 hwts)500 static ktime_t gve_rx_get_hwtstamp(struct gve_priv *gve, u32 hwts)
501 {
502 u64 last_read = READ_ONCE(gve->last_sync_nic_counter);
503 u32 low = (u32)last_read;
504 s32 diff = hwts - low;
505
506 return ns_to_ktime(last_read + diff);
507 }
508
gve_rx_skb_hwtstamp(struct gve_rx_ring * rx,const struct gve_rx_compl_desc_dqo * desc)509 static void gve_rx_skb_hwtstamp(struct gve_rx_ring *rx,
510 const struct gve_rx_compl_desc_dqo *desc)
511 {
512 struct sk_buff *skb = rx->ctx.skb_head;
513
514 if (desc->ts_sub_nsecs_low & GVE_DQO_RX_HWTSTAMP_VALID)
515 skb_hwtstamps(skb)->hwtstamp =
516 gve_rx_get_hwtstamp(rx->gve, le32_to_cpu(desc->ts));
517 }
518
gve_xdp_rx_timestamp(const struct xdp_md * _ctx,u64 * timestamp)519 int gve_xdp_rx_timestamp(const struct xdp_md *_ctx, u64 *timestamp)
520 {
521 const struct gve_xdp_buff *ctx = (void *)_ctx;
522
523 if (!gve_is_clock_enabled(ctx->gve))
524 return -ENODATA;
525
526 if (!(ctx->compl_desc->ts_sub_nsecs_low & GVE_DQO_RX_HWTSTAMP_VALID))
527 return -ENODATA;
528
529 *timestamp = gve_rx_get_hwtstamp(ctx->gve,
530 le32_to_cpu(ctx->compl_desc->ts));
531 return 0;
532 }
533
gve_rx_free_skb(struct napi_struct * napi,struct gve_rx_ring * rx)534 static void gve_rx_free_skb(struct napi_struct *napi, struct gve_rx_ring *rx)
535 {
536 if (!rx->ctx.skb_head)
537 return;
538
539 if (rx->ctx.skb_head == napi->skb)
540 napi->skb = NULL;
541 dev_kfree_skb_any(rx->ctx.skb_head);
542 rx->ctx.skb_head = NULL;
543 rx->ctx.skb_tail = NULL;
544 }
545
gve_rx_should_trigger_copy_ondemand(struct gve_rx_ring * rx)546 static bool gve_rx_should_trigger_copy_ondemand(struct gve_rx_ring *rx)
547 {
548 if (!rx->dqo.qpl)
549 return false;
550 if (rx->dqo.used_buf_states_cnt <
551 (rx->dqo.num_buf_states -
552 GVE_DQO_QPL_ONDEMAND_ALLOC_THRESHOLD))
553 return false;
554 return true;
555 }
556
gve_rx_copy_ondemand(struct gve_rx_ring * rx,struct gve_rx_buf_state_dqo * buf_state,u16 buf_len)557 static int gve_rx_copy_ondemand(struct gve_rx_ring *rx,
558 struct gve_rx_buf_state_dqo *buf_state,
559 u16 buf_len)
560 {
561 struct page *page = alloc_pages_node(rx->gve->numa_node, GFP_ATOMIC, 0);
562 int num_frags;
563
564 if (!page)
565 return -ENOMEM;
566
567 memcpy(page_address(page),
568 buf_state->page_info.page_address +
569 buf_state->page_info.page_offset,
570 buf_len);
571 num_frags = skb_shinfo(rx->ctx.skb_tail)->nr_frags;
572 skb_add_rx_frag(rx->ctx.skb_tail, num_frags, page,
573 0, buf_len, PAGE_SIZE);
574
575 u64_stats_update_begin(&rx->statss);
576 rx->rx_frag_alloc_cnt++;
577 u64_stats_update_end(&rx->statss);
578 /* Return unused buffer. */
579 gve_enqueue_buf_state(rx, &rx->dqo.recycled_buf_states, buf_state);
580 return 0;
581 }
582
gve_skb_add_rx_frag(struct gve_rx_ring * rx,struct gve_rx_buf_state_dqo * buf_state,int num_frags,u16 buf_len)583 static void gve_skb_add_rx_frag(struct gve_rx_ring *rx,
584 struct gve_rx_buf_state_dqo *buf_state,
585 int num_frags, u16 buf_len)
586 {
587 if (rx->dqo.page_pool) {
588 skb_add_rx_frag_netmem(rx->ctx.skb_tail, num_frags,
589 buf_state->page_info.netmem,
590 buf_state->page_info.page_offset +
591 buf_state->page_info.pad, buf_len,
592 buf_state->page_info.buf_size);
593 } else {
594 skb_add_rx_frag(rx->ctx.skb_tail, num_frags,
595 buf_state->page_info.page,
596 buf_state->page_info.page_offset +
597 buf_state->page_info.pad, buf_len,
598 buf_state->page_info.buf_size);
599 }
600 }
601
602 /* Chains multi skbs for single rx packet.
603 * Returns 0 if buffer is appended, -1 otherwise.
604 */
gve_rx_append_frags(struct napi_struct * napi,struct gve_rx_buf_state_dqo * buf_state,u16 buf_len,struct gve_rx_ring * rx,struct gve_priv * priv)605 static int gve_rx_append_frags(struct napi_struct *napi,
606 struct gve_rx_buf_state_dqo *buf_state,
607 u16 buf_len, struct gve_rx_ring *rx,
608 struct gve_priv *priv)
609 {
610 int num_frags = skb_shinfo(rx->ctx.skb_tail)->nr_frags;
611
612 if (unlikely(num_frags == MAX_SKB_FRAGS)) {
613 struct sk_buff *skb;
614
615 skb = napi_alloc_skb(napi, 0);
616 if (!skb)
617 return -1;
618
619 if (rx->dqo.page_pool)
620 skb_mark_for_recycle(skb);
621
622 if (rx->ctx.skb_tail == rx->ctx.skb_head)
623 skb_shinfo(rx->ctx.skb_head)->frag_list = skb;
624 else
625 rx->ctx.skb_tail->next = skb;
626 rx->ctx.skb_tail = skb;
627 num_frags = 0;
628 }
629 if (rx->ctx.skb_tail != rx->ctx.skb_head) {
630 rx->ctx.skb_head->len += buf_len;
631 rx->ctx.skb_head->data_len += buf_len;
632 rx->ctx.skb_head->truesize += buf_state->page_info.buf_size;
633 }
634
635 /* Trigger ondemand page allocation if we are running low on buffers */
636 if (gve_rx_should_trigger_copy_ondemand(rx))
637 return gve_rx_copy_ondemand(rx, buf_state, buf_len);
638
639 gve_skb_add_rx_frag(rx, buf_state, num_frags, buf_len);
640 gve_reuse_buffer(rx, buf_state);
641 return 0;
642 }
643
gve_xdp_tx_dqo(struct gve_priv * priv,struct gve_rx_ring * rx,struct xdp_buff * xdp)644 static int gve_xdp_tx_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,
645 struct xdp_buff *xdp)
646 {
647 struct gve_tx_ring *tx;
648 struct xdp_frame *xdpf;
649 u32 tx_qid;
650 int err;
651
652 xdpf = xdp_convert_buff_to_frame(xdp);
653 if (unlikely(!xdpf)) {
654 if (rx->xsk_pool)
655 xsk_buff_free(xdp);
656 return -ENOSPC;
657 }
658
659 tx_qid = gve_xdp_tx_queue_id(priv, rx->q_num);
660 tx = &priv->tx[tx_qid];
661 spin_lock(&tx->dqo_tx.xdp_lock);
662 err = gve_xdp_xmit_one_dqo(priv, tx, xdpf);
663 spin_unlock(&tx->dqo_tx.xdp_lock);
664
665 return err;
666 }
667
gve_xsk_done_dqo(struct gve_priv * priv,struct gve_rx_ring * rx,struct xdp_buff * xdp,struct bpf_prog * xprog,int xdp_act)668 static void gve_xsk_done_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,
669 struct xdp_buff *xdp, struct bpf_prog *xprog,
670 int xdp_act)
671 {
672 switch (xdp_act) {
673 case XDP_ABORTED:
674 case XDP_DROP:
675 default:
676 xsk_buff_free(xdp);
677 break;
678 case XDP_TX:
679 if (unlikely(gve_xdp_tx_dqo(priv, rx, xdp)))
680 goto err;
681 break;
682 case XDP_REDIRECT:
683 if (unlikely(xdp_do_redirect(priv->dev, xdp, xprog)))
684 goto err;
685 break;
686 }
687
688 u64_stats_update_begin(&rx->statss);
689 if ((u32)xdp_act < GVE_XDP_ACTIONS)
690 rx->xdp_actions[xdp_act]++;
691 u64_stats_update_end(&rx->statss);
692 return;
693
694 err:
695 u64_stats_update_begin(&rx->statss);
696 if (xdp_act == XDP_TX)
697 rx->xdp_tx_errors++;
698 if (xdp_act == XDP_REDIRECT)
699 rx->xdp_redirect_errors++;
700 u64_stats_update_end(&rx->statss);
701 }
702
gve_xdp_done_dqo(struct gve_priv * priv,struct gve_rx_ring * rx,struct xdp_buff * xdp,struct bpf_prog * xprog,int xdp_act,struct gve_rx_buf_state_dqo * buf_state)703 static void gve_xdp_done_dqo(struct gve_priv *priv, struct gve_rx_ring *rx,
704 struct xdp_buff *xdp, struct bpf_prog *xprog,
705 int xdp_act,
706 struct gve_rx_buf_state_dqo *buf_state)
707 {
708 int err;
709 switch (xdp_act) {
710 case XDP_ABORTED:
711 case XDP_DROP:
712 default:
713 gve_free_buffer(rx, buf_state);
714 break;
715 case XDP_TX:
716 err = gve_xdp_tx_dqo(priv, rx, xdp);
717 if (unlikely(err))
718 goto err;
719 gve_reuse_buffer(rx, buf_state);
720 break;
721 case XDP_REDIRECT:
722 err = xdp_do_redirect(priv->dev, xdp, xprog);
723 if (unlikely(err))
724 goto err;
725 gve_reuse_buffer(rx, buf_state);
726 break;
727 }
728 u64_stats_update_begin(&rx->statss);
729 if ((u32)xdp_act < GVE_XDP_ACTIONS)
730 rx->xdp_actions[xdp_act]++;
731 u64_stats_update_end(&rx->statss);
732 return;
733 err:
734 u64_stats_update_begin(&rx->statss);
735 if (xdp_act == XDP_TX)
736 rx->xdp_tx_errors++;
737 else if (xdp_act == XDP_REDIRECT)
738 rx->xdp_redirect_errors++;
739 u64_stats_update_end(&rx->statss);
740 gve_free_buffer(rx, buf_state);
741 return;
742 }
743
gve_rx_xsk_dqo(struct napi_struct * napi,struct gve_rx_ring * rx,const struct gve_rx_compl_desc_dqo * compl_desc,struct gve_rx_buf_state_dqo * buf_state,struct bpf_prog * xprog)744 static int gve_rx_xsk_dqo(struct napi_struct *napi, struct gve_rx_ring *rx,
745 const struct gve_rx_compl_desc_dqo *compl_desc,
746 struct gve_rx_buf_state_dqo *buf_state,
747 struct bpf_prog *xprog)
748 {
749 struct xdp_buff *xdp = buf_state->xsk_buff;
750 int buf_len = compl_desc->packet_len;
751 struct gve_priv *priv = rx->gve;
752 struct gve_xdp_buff *gve_xdp;
753 int xdp_act;
754
755 xdp->data_end = xdp->data + buf_len;
756 xsk_buff_dma_sync_for_cpu(xdp);
757
758 gve_xdp = (void *)xdp;
759 gve_xdp->gve = priv;
760 gve_xdp->compl_desc = compl_desc;
761
762 if (xprog) {
763 xdp_act = bpf_prog_run_xdp(xprog, xdp);
764 buf_len = xdp->data_end - xdp->data;
765 if (xdp_act != XDP_PASS) {
766 gve_xsk_done_dqo(priv, rx, xdp, xprog, xdp_act);
767 gve_free_buf_state(rx, buf_state);
768 return 0;
769 }
770 }
771
772 /* Copy the data to skb */
773 rx->ctx.skb_head = xdp_build_skb_from_zc(xdp);
774 if (unlikely(!rx->ctx.skb_head)) {
775 xsk_buff_free(xdp);
776 gve_free_buf_state(rx, buf_state);
777 return -ENOMEM;
778 }
779 rx->ctx.skb_tail = rx->ctx.skb_head;
780
781 gve_free_buf_state(rx, buf_state);
782
783 /* Update Stats */
784 u64_stats_update_begin(&rx->statss);
785 rx->xdp_actions[XDP_PASS]++;
786 u64_stats_update_end(&rx->statss);
787 return 0;
788 }
789
gve_dma_sync(struct gve_priv * priv,struct gve_rx_ring * rx,struct gve_rx_buf_state_dqo * buf_state,u16 buf_len)790 static void gve_dma_sync(struct gve_priv *priv, struct gve_rx_ring *rx,
791 struct gve_rx_buf_state_dqo *buf_state, u16 buf_len)
792 {
793 struct gve_rx_slot_page_info *page_info = &buf_state->page_info;
794
795 if (rx->dqo.page_pool) {
796 page_pool_dma_sync_netmem_for_cpu(rx->dqo.page_pool,
797 page_info->netmem,
798 page_info->page_offset,
799 buf_len);
800 } else {
801 dma_sync_single_range_for_cpu(&priv->pdev->dev, buf_state->addr,
802 page_info->page_offset +
803 page_info->pad,
804 buf_len, DMA_FROM_DEVICE);
805 }
806 }
807
808 /* Returns 0 if descriptor is completed successfully.
809 * Returns -EINVAL if descriptor is invalid.
810 * Returns -ENOMEM if data cannot be copied to skb.
811 */
gve_rx_dqo(struct napi_struct * napi,struct gve_rx_ring * rx,const struct gve_rx_compl_desc_dqo * compl_desc,u32 desc_idx,int queue_idx)812 static int gve_rx_dqo(struct napi_struct *napi, struct gve_rx_ring *rx,
813 const struct gve_rx_compl_desc_dqo *compl_desc,
814 u32 desc_idx, int queue_idx)
815 {
816 const u16 buffer_id = le16_to_cpu(compl_desc->buf_id);
817 const bool hbo = compl_desc->header_buffer_overflow;
818 const bool eop = compl_desc->end_of_packet != 0;
819 const bool hsplit = compl_desc->split_header;
820 struct gve_rx_buf_state_dqo *buf_state;
821 struct gve_priv *priv = rx->gve;
822 struct bpf_prog *xprog;
823 u16 buf_len;
824 u16 hdr_len;
825
826 if (unlikely(buffer_id >= rx->dqo.num_buf_states)) {
827 net_err_ratelimited("%s: Invalid RX buffer_id=%u\n",
828 priv->dev->name, buffer_id);
829 return -EINVAL;
830 }
831 buf_state = &rx->dqo.buf_states[buffer_id];
832 if (unlikely(!gve_buf_state_is_allocated(rx, buf_state))) {
833 net_err_ratelimited("%s: RX buffer_id is not allocated: %u\n",
834 priv->dev->name, buffer_id);
835 return -EINVAL;
836 }
837
838 if (unlikely(compl_desc->rx_error)) {
839 gve_free_buffer(rx, buf_state);
840 return -EINVAL;
841 }
842
843 buf_len = compl_desc->packet_len;
844 hdr_len = compl_desc->header_len;
845
846 xprog = READ_ONCE(priv->xdp_prog);
847 if (buf_state->xsk_buff)
848 return gve_rx_xsk_dqo(napi, rx, compl_desc, buf_state, xprog);
849
850 /* Page might have not been used for awhile and was likely last written
851 * by a different thread.
852 */
853 if (rx->dqo.page_pool) {
854 if (!netmem_is_net_iov(buf_state->page_info.netmem))
855 prefetch(netmem_to_page(buf_state->page_info.netmem));
856 } else {
857 prefetch(buf_state->page_info.page);
858 }
859
860 /* Copy the header into the skb in the case of header split */
861 if (hsplit) {
862 int unsplit = 0;
863
864 if (hdr_len && !hbo) {
865 size_t offset =
866 (size_t)buffer_id * priv->header_buf_size;
867
868 rx->ctx.skb_head =
869 gve_rx_copy_data(priv->dev, napi,
870 rx->dqo.hdr_bufs.data + offset,
871 hdr_len);
872 if (unlikely(!rx->ctx.skb_head))
873 goto error;
874 rx->ctx.skb_tail = rx->ctx.skb_head;
875
876 if (rx->dqo.page_pool)
877 skb_mark_for_recycle(rx->ctx.skb_head);
878 } else {
879 unsplit = 1;
880 }
881 u64_stats_update_begin(&rx->statss);
882 rx->rx_hsplit_pkt++;
883 rx->rx_hsplit_unsplit_pkt += unsplit;
884 rx->rx_hsplit_bytes += hdr_len;
885 u64_stats_update_end(&rx->statss);
886
887 if (!buf_len) {
888 gve_free_buffer(rx, buf_state);
889 return 0;
890 }
891 } else if (!rx->ctx.skb_head && rx->dqo.page_pool &&
892 netmem_is_net_iov(buf_state->page_info.netmem)) {
893 /* when header split is disabled, the header went to the packet
894 * buffer. If the packet buffer is a net_iov, those can't be
895 * easily mapped into the kernel space to access the header
896 * required to process the packet.
897 */
898 goto error;
899 }
900
901 /* Sync the portion of dma buffer for CPU to read. */
902 gve_dma_sync(priv, rx, buf_state, buf_len);
903
904 /* Append to current skb if one exists. */
905 if (rx->ctx.skb_head) {
906 if (unlikely(gve_rx_append_frags(napi, buf_state, buf_len, rx,
907 priv)) != 0) {
908 goto error;
909 }
910 return 0;
911 }
912
913 if (xprog) {
914 struct gve_xdp_buff gve_xdp;
915 void *old_data;
916 int xdp_act;
917
918 xdp_init_buff(&gve_xdp.xdp, buf_state->page_info.buf_size,
919 &rx->xdp_rxq);
920 xdp_prepare_buff(&gve_xdp.xdp,
921 buf_state->page_info.page_address +
922 buf_state->page_info.page_offset,
923 buf_state->page_info.pad,
924 buf_len, true);
925 gve_xdp.gve = priv;
926 gve_xdp.compl_desc = compl_desc;
927
928 old_data = gve_xdp.xdp.data;
929 xdp_act = bpf_prog_run_xdp(xprog, &gve_xdp.xdp);
930 buf_state->page_info.pad += gve_xdp.xdp.data - old_data;
931 buf_len = gve_xdp.xdp.data_end - gve_xdp.xdp.data;
932 if (xdp_act != XDP_PASS) {
933 gve_xdp_done_dqo(priv, rx, &gve_xdp.xdp, xprog, xdp_act,
934 buf_state);
935 return 0;
936 }
937
938 rx->ctx.skb_head = xdp_build_skb_from_buff(&gve_xdp.xdp);
939 if (unlikely(!rx->ctx.skb_head))
940 goto error;
941 rx->ctx.skb_tail = rx->ctx.skb_head;
942
943 gve_reuse_buffer(rx, buf_state);
944
945 u64_stats_update_begin(&rx->statss);
946 rx->xdp_actions[XDP_PASS]++;
947 u64_stats_update_end(&rx->statss);
948 return 0;
949 }
950
951 if (eop && buf_len <= priv->rx_copybreak &&
952 !(rx->dqo.page_pool &&
953 netmem_is_net_iov(buf_state->page_info.netmem))) {
954 rx->ctx.skb_head = gve_rx_copy(priv->dev, napi,
955 &buf_state->page_info, buf_len);
956 if (unlikely(!rx->ctx.skb_head))
957 goto error;
958 rx->ctx.skb_tail = rx->ctx.skb_head;
959
960 u64_stats_update_begin(&rx->statss);
961 rx->rx_copied_pkt++;
962 rx->rx_copybreak_pkt++;
963 u64_stats_update_end(&rx->statss);
964
965 gve_free_buffer(rx, buf_state);
966 return 0;
967 }
968
969 rx->ctx.skb_head = napi_get_frags(napi);
970 if (unlikely(!rx->ctx.skb_head))
971 goto error;
972 rx->ctx.skb_tail = rx->ctx.skb_head;
973
974 if (gve_rx_should_trigger_copy_ondemand(rx)) {
975 if (gve_rx_copy_ondemand(rx, buf_state, buf_len) < 0)
976 goto error;
977 return 0;
978 }
979
980 if (rx->dqo.page_pool)
981 skb_mark_for_recycle(rx->ctx.skb_head);
982
983 gve_skb_add_rx_frag(rx, buf_state, 0, buf_len);
984 gve_reuse_buffer(rx, buf_state);
985 return 0;
986
987 error:
988 gve_free_buffer(rx, buf_state);
989 return -ENOMEM;
990 }
991
gve_rx_complete_rsc(struct sk_buff * skb,const struct gve_rx_compl_desc_dqo * desc,struct gve_ptype ptype)992 static int gve_rx_complete_rsc(struct sk_buff *skb,
993 const struct gve_rx_compl_desc_dqo *desc,
994 struct gve_ptype ptype)
995 {
996 struct skb_shared_info *shinfo = skb_shinfo(skb);
997 int rsc_segments, rsc_seg_len, hdr_len;
998 skb_frag_t *frag;
999 void *va;
1000
1001 /* HW-GRO only coalesces TCP. */
1002 if (ptype.l4_type != GVE_L4_TYPE_TCP)
1003 return -EINVAL;
1004
1005 rsc_seg_len = le16_to_cpu(desc->rsc_seg_len);
1006 if (!rsc_seg_len)
1007 return 0;
1008
1009 switch (ptype.l3_type) {
1010 case GVE_L3_TYPE_IPV4:
1011 shinfo->gso_type = SKB_GSO_TCPV4;
1012 break;
1013 case GVE_L3_TYPE_IPV6:
1014 shinfo->gso_type = SKB_GSO_TCPV6;
1015 break;
1016 default:
1017 return -EINVAL;
1018 }
1019
1020 if (skb_headlen(skb)) {
1021 /* With header-split, payload is in the non-linear part */
1022 rsc_segments = DIV_ROUND_UP(skb->data_len, rsc_seg_len);
1023 } else {
1024 /* HW-GRO packets are guaranteed to have complete TCP/IP
1025 * headers in frag[0] when header-split is not enabled.
1026 */
1027 frag = &skb_shinfo(skb)->frags[0];
1028 va = skb_frag_address(frag);
1029 hdr_len =
1030 eth_get_headlen(skb->dev, va, skb_frag_size(frag));
1031 rsc_segments = DIV_ROUND_UP(skb->len - hdr_len, rsc_seg_len);
1032 skb_copy_to_linear_data(skb, va, hdr_len);
1033 skb_frag_size_sub(frag, hdr_len);
1034 /* Verify we didn't empty the fragment completely as that could
1035 * otherwise lead to page leaks.
1036 */
1037 DEBUG_NET_WARN_ON_ONCE(!skb_frag_size(frag));
1038 skb_frag_off_add(frag, hdr_len);
1039 skb->data_len -= hdr_len;
1040 skb->tail += hdr_len;
1041 }
1042 shinfo->gso_size = rsc_seg_len;
1043 shinfo->gso_segs = rsc_segments;
1044
1045 return 0;
1046 }
1047
1048 /* Returns 0 if skb is completed successfully, -1 otherwise. */
gve_rx_complete_skb(struct gve_rx_ring * rx,struct napi_struct * napi,const struct gve_rx_compl_desc_dqo * desc,netdev_features_t feat)1049 static int gve_rx_complete_skb(struct gve_rx_ring *rx, struct napi_struct *napi,
1050 const struct gve_rx_compl_desc_dqo *desc,
1051 netdev_features_t feat)
1052 {
1053 struct gve_ptype ptype =
1054 rx->gve->ptype_lut_dqo->ptypes[desc->packet_type];
1055 int err;
1056
1057 skb_record_rx_queue(rx->ctx.skb_head, rx->q_num);
1058
1059 if (feat & NETIF_F_RXHASH)
1060 gve_rx_skb_hash(rx->ctx.skb_head, desc, ptype);
1061
1062 if (feat & NETIF_F_RXCSUM)
1063 gve_rx_skb_csum(rx->ctx.skb_head, desc, ptype);
1064
1065 if (rx->gve->ts_config.rx_filter == HWTSTAMP_FILTER_ALL)
1066 gve_rx_skb_hwtstamp(rx, desc);
1067
1068 /* RSC packets must set gso_size otherwise the TCP stack will complain
1069 * that packets are larger than MTU.
1070 */
1071 if (desc->rsc) {
1072 err = gve_rx_complete_rsc(rx->ctx.skb_head, desc, ptype);
1073 if (err < 0)
1074 return err;
1075 }
1076
1077 if (rx->ctx.skb_head == napi->skb)
1078 napi_gro_frags(napi);
1079 else
1080 napi_gro_receive(napi, rx->ctx.skb_head);
1081
1082 return 0;
1083 }
1084
gve_rx_poll_dqo(struct gve_notify_block * block,int budget)1085 int gve_rx_poll_dqo(struct gve_notify_block *block, int budget)
1086 {
1087 struct gve_rx_compl_queue_dqo *complq;
1088 struct napi_struct *napi;
1089 netdev_features_t feat;
1090 struct gve_rx_ring *rx;
1091 struct gve_priv *priv;
1092 u64 xdp_redirects;
1093 u32 work_done = 0;
1094 u64 bytes = 0;
1095 u64 xdp_txs;
1096 int err;
1097
1098 napi = &block->napi;
1099 feat = napi->dev->features;
1100
1101 rx = block->rx;
1102 priv = rx->gve;
1103 complq = &rx->dqo.complq;
1104
1105 xdp_redirects = rx->xdp_actions[XDP_REDIRECT];
1106 xdp_txs = rx->xdp_actions[XDP_TX];
1107
1108 while (work_done < budget) {
1109 struct gve_rx_compl_desc_dqo *compl_desc =
1110 &complq->desc_ring[complq->head];
1111 u32 pkt_bytes;
1112
1113 /* No more new packets */
1114 if (compl_desc->generation == complq->cur_gen_bit)
1115 break;
1116
1117 /* Prefetch the next two descriptors. */
1118 prefetch(&complq->desc_ring[(complq->head + 1) & complq->mask]);
1119 prefetch(&complq->desc_ring[(complq->head + 2) & complq->mask]);
1120
1121 /* Do not read data until we own the descriptor */
1122 dma_rmb();
1123
1124 err = gve_rx_dqo(napi, rx, compl_desc, complq->head, rx->q_num);
1125 if (err < 0) {
1126 gve_rx_free_skb(napi, rx);
1127 u64_stats_update_begin(&rx->statss);
1128 if (err == -ENOMEM)
1129 rx->rx_skb_alloc_fail++;
1130 else if (err == -EINVAL)
1131 rx->rx_desc_err_dropped_pkt++;
1132 u64_stats_update_end(&rx->statss);
1133 }
1134
1135 complq->head = (complq->head + 1) & complq->mask;
1136 complq->num_free_slots++;
1137
1138 /* When the ring wraps, the generation bit is flipped. */
1139 complq->cur_gen_bit ^= (complq->head == 0);
1140
1141 /* Receiving a completion means we have space to post another
1142 * buffer on the buffer queue.
1143 */
1144 {
1145 struct gve_rx_buf_queue_dqo *bufq = &rx->dqo.bufq;
1146
1147 bufq->head = (bufq->head + 1) & bufq->mask;
1148 }
1149
1150 /* Free running counter of completed descriptors */
1151 rx->cnt++;
1152
1153 if (!rx->ctx.skb_head)
1154 continue;
1155
1156 if (!compl_desc->end_of_packet)
1157 continue;
1158
1159 work_done++;
1160 pkt_bytes = rx->ctx.skb_head->len;
1161 /* The ethernet header (first ETH_HLEN bytes) is snipped off
1162 * by eth_type_trans.
1163 */
1164 if (skb_headlen(rx->ctx.skb_head))
1165 pkt_bytes += ETH_HLEN;
1166
1167 /* gve_rx_complete_skb() will consume skb if successful */
1168 if (gve_rx_complete_skb(rx, napi, compl_desc, feat) != 0) {
1169 gve_rx_free_skb(napi, rx);
1170 u64_stats_update_begin(&rx->statss);
1171 rx->rx_desc_err_dropped_pkt++;
1172 u64_stats_update_end(&rx->statss);
1173 continue;
1174 }
1175
1176 bytes += pkt_bytes;
1177 rx->ctx.skb_head = NULL;
1178 rx->ctx.skb_tail = NULL;
1179 }
1180
1181 if (xdp_txs != rx->xdp_actions[XDP_TX])
1182 gve_xdp_tx_flush_dqo(priv, rx->q_num);
1183
1184 if (xdp_redirects != rx->xdp_actions[XDP_REDIRECT])
1185 xdp_do_flush();
1186
1187 gve_rx_post_buffers_dqo(rx);
1188
1189 u64_stats_update_begin(&rx->statss);
1190 rx->rpackets += work_done;
1191 rx->rbytes += bytes;
1192 u64_stats_update_end(&rx->statss);
1193
1194 return work_done;
1195 }
1196