1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2005-2006 Fen Systems Ltd. 5 * Copyright 2005-2013 Solarflare Communications Inc. 6 */ 7 8 /* Common definitions for all Efx net driver code */ 9 10 #ifndef EFX_NET_DRIVER_H 11 #define EFX_NET_DRIVER_H 12 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/ethtool.h> 16 #include <linux/if_vlan.h> 17 #include <linux/timer.h> 18 #include <linux/mii.h> 19 #include <linux/list.h> 20 #include <linux/pci.h> 21 #include <linux/device.h> 22 #include <linux/highmem.h> 23 #include <linux/workqueue.h> 24 #include <linux/mutex.h> 25 #include <linux/rwsem.h> 26 #include <linux/vmalloc.h> 27 #include <linux/mtd/mtd.h> 28 #include <net/busy_poll.h> 29 #include <net/xdp.h> 30 #include <net/netevent.h> 31 32 #include "enum.h" 33 #include "bitfield.h" 34 #include "filter.h" 35 36 /************************************************************************** 37 * 38 * Build definitions 39 * 40 **************************************************************************/ 41 42 #ifdef DEBUG 43 #define EFX_WARN_ON_ONCE_PARANOID(x) WARN_ON_ONCE(x) 44 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x) 45 #else 46 #define EFX_WARN_ON_ONCE_PARANOID(x) do {} while (0) 47 #define EFX_WARN_ON_PARANOID(x) do {} while (0) 48 #endif 49 50 /************************************************************************** 51 * 52 * Efx data structures 53 * 54 **************************************************************************/ 55 56 #define EFX_MAX_CHANNELS 32U 57 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS 58 #define EFX_EXTRA_CHANNEL_IOV 0 59 #define EFX_EXTRA_CHANNEL_PTP 1 60 #define EFX_EXTRA_CHANNEL_TC 2 61 #define EFX_MAX_EXTRA_CHANNELS 3U 62 63 /* Checksum generation is a per-queue option in hardware, so each 64 * queue visible to the networking core is backed by two hardware TX 65 * queues. */ 66 #define EFX_MAX_TX_TC 2 67 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS) 68 #define EFX_TXQ_TYPE_OUTER_CSUM 1 /* Outer checksum offload */ 69 #define EFX_TXQ_TYPE_INNER_CSUM 2 /* Inner checksum offload */ 70 #define EFX_TXQ_TYPES 4 71 #define EFX_MAX_TXQ_PER_CHANNEL 4 72 #define EFX_MAX_TX_QUEUES (EFX_MAX_TXQ_PER_CHANNEL * EFX_MAX_CHANNELS) 73 74 /* Maximum possible MTU the driver supports */ 75 #define EFX_MAX_MTU (9 * 1024) 76 77 /* Minimum MTU, from RFC791 (IP) */ 78 #define EFX_MIN_MTU 68 79 80 /* Maximum total header length for TSOv2 */ 81 #define EFX_TSO2_MAX_HDRLEN 208 82 83 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page, 84 * and should be a multiple of the cache line size. 85 */ 86 #define EFX_RX_USR_BUF_SIZE (2048 - 256) 87 88 /* If possible, we should ensure cache line alignment at start and end 89 * of every buffer. Otherwise, we just need to ensure 4-byte 90 * alignment of the network header. 91 */ 92 #if NET_IP_ALIGN == 0 93 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES 94 #else 95 #define EFX_RX_BUF_ALIGNMENT 4 96 #endif 97 98 /* Non-standard XDP_PACKET_HEADROOM and tailroom to satisfy XDP_REDIRECT and 99 * still fit two standard MTU size packets into a single 4K page. 100 */ 101 #define EFX_XDP_HEADROOM 128 102 #define EFX_XDP_TAILROOM SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) 103 104 /* Forward declare Precision Time Protocol (PTP) support structure. */ 105 struct efx_ptp_data; 106 struct hwtstamp_config; 107 108 struct efx_self_tests; 109 110 /** 111 * struct efx_buffer - A general-purpose DMA buffer 112 * @addr: host base address of the buffer 113 * @dma_addr: DMA base address of the buffer 114 * @len: Buffer length, in bytes 115 * 116 * The NIC uses these buffers for its interrupt status registers and 117 * MAC stats dumps. 118 */ 119 struct efx_buffer { 120 void *addr; 121 dma_addr_t dma_addr; 122 unsigned int len; 123 }; 124 125 /** 126 * struct efx_tx_buffer - buffer state for a TX descriptor 127 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be 128 * freed when descriptor completes 129 * @xdpf: When @flags & %EFX_TX_BUF_XDP, the XDP frame information; its @data 130 * member is the associated buffer to drop a page reference on. 131 * @option: When @flags & %EFX_TX_BUF_OPTION, an EF10-specific option 132 * descriptor. 133 * @dma_addr: DMA address of the fragment. 134 * @flags: Flags for allocation and DMA mapping type 135 * @len: Length of this fragment. 136 * This field is zero when the queue slot is empty. 137 * @unmap_len: Length of this fragment to unmap 138 * @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping. 139 * Only valid if @unmap_len != 0. 140 */ 141 struct efx_tx_buffer { 142 union { 143 const struct sk_buff *skb; 144 struct xdp_frame *xdpf; 145 }; 146 union { 147 efx_qword_t option; /* EF10 */ 148 dma_addr_t dma_addr; 149 }; 150 unsigned short flags; 151 unsigned short len; 152 unsigned short unmap_len; 153 unsigned short dma_offset; 154 }; 155 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */ 156 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */ 157 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */ 158 #define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */ 159 #define EFX_TX_BUF_XDP 0x20 /* buffer was sent with XDP */ 160 #define EFX_TX_BUF_TSO_V3 0x40 /* empty buffer for a TSO_V3 descriptor */ 161 #define EFX_TX_BUF_EFV 0x100 /* buffer was sent from representor */ 162 163 /** 164 * struct efx_tx_queue - An Efx TX queue 165 * 166 * This is a ring buffer of TX fragments. 167 * Since the TX completion path always executes on the same 168 * CPU and the xmit path can operate on different CPUs, 169 * performance is increased by ensuring that the completion 170 * path and the xmit path operate on different cache lines. 171 * This is particularly important if the xmit path is always 172 * executing on one CPU which is different from the completion 173 * path. There is also a cache line for members which are 174 * read but not written on the fast path. 175 * 176 * @efx: The associated Efx NIC 177 * @queue: DMA queue number 178 * @label: Label for TX completion events. 179 * Is our index within @channel->tx_queue array. 180 * @type: configuration type of this TX queue. A bitmask of %EFX_TXQ_TYPE_* flags. 181 * @tso_version: Version of TSO in use for this queue. 182 * @tso_encap: Is encapsulated TSO supported? Supported in TSOv2 on 8000 series. 183 * @channel: The associated channel 184 * @core_txq: The networking core TX queue structure 185 * @buffer: The software buffer ring 186 * @cb_page: Array of pages of copy buffers. Carved up according to 187 * %EFX_TX_CB_ORDER into %EFX_TX_CB_SIZE-sized chunks. 188 * @txd: The hardware descriptor ring 189 * @ptr_mask: The size of the ring minus 1. 190 * @piobuf: PIO buffer region for this TX queue (shared with its partner). 191 * Size of the region is efx_piobuf_size. 192 * @piobuf_offset: Buffer offset to be specified in PIO descriptors 193 * @initialised: Has hardware queue been initialised? 194 * @timestamping: Is timestamping enabled for this channel? 195 * @xdp_tx: Is this an XDP tx queue? 196 * @old_complete_packets: Value of @complete_packets as of last 197 * efx_init_tx_queue() 198 * @old_complete_bytes: Value of @complete_bytes as of last 199 * efx_init_tx_queue() 200 * @old_tso_bursts: Value of @tso_bursts as of last efx_init_tx_queue() 201 * @old_tso_packets: Value of @tso_packets as of last efx_init_tx_queue() 202 * @read_count: Current read pointer. 203 * This is the number of buffers that have been removed from both rings. 204 * @old_write_count: The value of @write_count when last checked. 205 * This is here for performance reasons. The xmit path will 206 * only get the up-to-date value of @write_count if this 207 * variable indicates that the queue is empty. This is to 208 * avoid cache-line ping-pong between the xmit path and the 209 * completion path. 210 * @merge_events: Number of TX merged completion events 211 * @bytes_compl: Number of bytes completed during this NAPI poll 212 * (efx_process_channel()). For BQL. 213 * @pkts_compl: Number of packets completed during this NAPI poll. 214 * @complete_packets: Number of packets completed since this struct was 215 * created. Only counts SKB packets, not XDP TX (it accumulates 216 * the same values that are reported to BQL). 217 * @complete_bytes: Number of bytes completed since this struct was 218 * created. For TSO, counts the superframe size, not the sizes of 219 * generated frames on the wire (i.e. the headers are only counted 220 * once) 221 * @complete_xdp_packets: Number of XDP TX packets completed since this 222 * struct was created. 223 * @complete_xdp_bytes: Number of XDP TX bytes completed since this 224 * struct was created. 225 * @completed_timestamp_major: Top part of the most recent tx timestamp. 226 * @completed_timestamp_minor: Low part of the most recent tx timestamp. 227 * @insert_count: Current insert pointer 228 * This is the number of buffers that have been added to the 229 * software ring. 230 * @write_count: Current write pointer 231 * This is the number of buffers that have been added to the 232 * hardware ring. 233 * @packet_write_count: Completable write pointer 234 * This is the write pointer of the last packet written. 235 * Normally this will equal @write_count, but as option descriptors 236 * don't produce completion events, they won't update this. 237 * Filled in iff @efx->type->option_descriptors; only used for PIO. 238 * Thus, this is only written and used on EF10. 239 * @old_read_count: The value of read_count when last checked. 240 * This is here for performance reasons. The xmit path will 241 * only get the up-to-date value of read_count if this 242 * variable indicates that the queue is full. This is to 243 * avoid cache-line ping-pong between the xmit path and the 244 * completion path. 245 * @tso_bursts: Number of times TSO xmit invoked by kernel 246 * @tso_long_headers: Number of packets with headers too long for standard 247 * blocks 248 * @tso_packets: Number of packets via the TSO xmit path 249 * @tso_fallbacks: Number of times TSO fallback used 250 * @pushes: Number of times the TX push feature has been used 251 * @pio_packets: Number of times the TX PIO feature has been used 252 * @xmit_pending: Are any packets waiting to be pushed to the NIC 253 * @cb_packets: Number of times the TX copybreak feature has been used 254 * @notify_count: Count of notified descriptors to the NIC 255 * @tx_packets: Number of packets sent since this struct was created 256 * @empty_read_count: If the completion path has seen the queue as empty 257 * and the transmission path has not yet checked this, the value of 258 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0. 259 */ 260 struct efx_tx_queue { 261 /* Members which don't change on the fast path */ 262 struct efx_nic *efx ____cacheline_aligned_in_smp; 263 unsigned int queue; 264 unsigned int label; 265 unsigned int type; 266 unsigned int tso_version; 267 bool tso_encap; 268 struct efx_channel *channel; 269 struct netdev_queue *core_txq; 270 struct efx_tx_buffer *buffer; 271 struct efx_buffer *cb_page; 272 struct efx_buffer txd; 273 unsigned int ptr_mask; 274 void __iomem *piobuf; 275 unsigned int piobuf_offset; 276 bool initialised; 277 bool timestamping; 278 bool xdp_tx; 279 unsigned long old_complete_packets; 280 unsigned long old_complete_bytes; 281 unsigned int old_tso_bursts; 282 unsigned int old_tso_packets; 283 284 /* Members used mainly on the completion path */ 285 unsigned int read_count ____cacheline_aligned_in_smp; 286 unsigned int old_write_count; 287 unsigned int merge_events; 288 unsigned int bytes_compl; 289 unsigned int pkts_compl; 290 unsigned long complete_packets; 291 unsigned long complete_bytes; 292 unsigned long complete_xdp_packets; 293 unsigned long complete_xdp_bytes; 294 u32 completed_timestamp_major; 295 u32 completed_timestamp_minor; 296 297 /* Members used only on the xmit path */ 298 unsigned int insert_count ____cacheline_aligned_in_smp; 299 unsigned int write_count; 300 unsigned int packet_write_count; 301 unsigned int old_read_count; 302 unsigned int tso_bursts; 303 unsigned int tso_long_headers; 304 unsigned int tso_packets; 305 unsigned int tso_fallbacks; 306 unsigned int pushes; 307 unsigned int pio_packets; 308 bool xmit_pending; 309 unsigned int cb_packets; 310 unsigned int notify_count; 311 /* Statistics to supplement MAC stats */ 312 unsigned long tx_packets; 313 314 /* Members shared between paths and sometimes updated */ 315 unsigned int empty_read_count ____cacheline_aligned_in_smp; 316 #define EFX_EMPTY_COUNT_VALID 0x80000000 317 }; 318 319 #define EFX_TX_CB_ORDER 7 320 #define EFX_TX_CB_SIZE (1 << EFX_TX_CB_ORDER) - NET_IP_ALIGN 321 322 /** 323 * struct efx_rx_buffer - An Efx RX data buffer 324 * @dma_addr: DMA base address of the buffer 325 * @page: The associated page buffer. 326 * Will be %NULL if the buffer slot is currently free. 327 * @page_offset: If pending: offset in @page of DMA base address. 328 * If completed: offset in @page of Ethernet header. 329 * @len: If pending: length for DMA descriptor. 330 * If completed: received length, excluding hash prefix. 331 * @flags: Flags for buffer and packet state. These are only set on the 332 * first buffer of a scattered packet. 333 */ 334 struct efx_rx_buffer { 335 dma_addr_t dma_addr; 336 struct page *page; 337 u16 page_offset; 338 u16 len; 339 u16 flags; 340 }; 341 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001 342 #define EFX_RX_PKT_CSUMMED 0x0002 343 #define EFX_RX_PKT_DISCARD 0x0004 344 #define EFX_RX_PKT_TCP 0x0040 345 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */ 346 #define EFX_RX_PKT_CSUM_LEVEL 0x0200 347 348 /** 349 * struct efx_rx_page_state - Page-based rx buffer state 350 * 351 * Inserted at the start of every page allocated for receive buffers. 352 * Used to facilitate sharing dma mappings between recycled rx buffers 353 * and those passed up to the kernel. 354 * 355 * @dma_addr: The dma address of this page. 356 */ 357 struct efx_rx_page_state { 358 dma_addr_t dma_addr; 359 360 unsigned int __pad[] ____cacheline_aligned; 361 }; 362 363 /** 364 * struct efx_rx_queue - An Efx RX queue 365 * @efx: The associated Efx NIC 366 * @core_index: Index of network core RX queue. Will be >= 0 iff this 367 * is associated with a real RX queue. 368 * @buffer: The software buffer ring 369 * @rxd: The hardware descriptor ring 370 * @ptr_mask: The size of the ring minus 1. 371 * @refill_enabled: Enable refill whenever fill level is low 372 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as 373 * @rxq_flush_pending. 374 * @grant_credits: Posted RX descriptors need to be granted to the MAE with 375 * %MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS. For %EFX_EXTRA_CHANNEL_TC, 376 * and only supported on EF100. 377 * @added_count: Number of buffers added to the receive queue. 378 * @notified_count: Number of buffers given to NIC (<= @added_count). 379 * @granted_count: Number of buffers granted to the MAE (<= @notified_count). 380 * @removed_count: Number of buffers removed from the receive queue. 381 * @scatter_n: Used by NIC specific receive code. 382 * @scatter_len: Used by NIC specific receive code. 383 * @page_ring: The ring to store DMA mapped pages for reuse. 384 * @page_add: Counter to calculate the write pointer for the recycle ring. 385 * @page_remove: Counter to calculate the read pointer for the recycle ring. 386 * @page_recycle_count: The number of pages that have been recycled. 387 * @page_recycle_failed: The number of pages that couldn't be recycled because 388 * the kernel still held a reference to them. 389 * @page_recycle_full: The number of pages that were released because the 390 * recycle ring was full. 391 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1. 392 * @max_fill: RX descriptor maximum fill level (<= ring size) 393 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill 394 * (<= @max_fill) 395 * @min_fill: RX descriptor minimum non-zero fill level. 396 * This records the minimum fill level observed when a ring 397 * refill was triggered. 398 * @recycle_count: RX buffer recycle counter. 399 * @slow_fill: Timer used to defer efx_nic_generate_fill_event(). 400 * @grant_work: workitem used to grant credits to the MAE if @grant_credits 401 * @rx_packets: Number of packets received since this struct was created 402 * @rx_bytes: Number of bytes received since this struct was created 403 * @old_rx_packets: Value of @rx_packets as of last efx_init_rx_queue() 404 * @old_rx_bytes: Value of @rx_bytes as of last efx_init_rx_queue() 405 * @xdp_rxq_info: XDP specific RX queue information. 406 */ 407 struct efx_rx_queue { 408 struct efx_nic *efx; 409 int core_index; 410 struct efx_rx_buffer *buffer; 411 struct efx_buffer rxd; 412 unsigned int ptr_mask; 413 bool refill_enabled; 414 bool flush_pending; 415 bool grant_credits; 416 417 unsigned int added_count; 418 unsigned int notified_count; 419 unsigned int granted_count; 420 unsigned int removed_count; 421 unsigned int scatter_n; 422 unsigned int scatter_len; 423 struct page **page_ring; 424 unsigned int page_add; 425 unsigned int page_remove; 426 unsigned int page_recycle_count; 427 unsigned int page_recycle_failed; 428 unsigned int page_recycle_full; 429 unsigned int page_ptr_mask; 430 unsigned int max_fill; 431 unsigned int fast_fill_trigger; 432 unsigned int min_fill; 433 unsigned int recycle_count; 434 struct timer_list slow_fill; 435 unsigned int slow_fill_count; 436 struct work_struct grant_work; 437 /* Statistics to supplement MAC stats */ 438 unsigned long rx_packets; 439 unsigned long rx_bytes; 440 unsigned long old_rx_packets; 441 unsigned long old_rx_bytes; 442 struct xdp_rxq_info xdp_rxq_info; 443 }; 444 445 enum efx_sync_events_state { 446 SYNC_EVENTS_DISABLED = 0, 447 SYNC_EVENTS_QUIESCENT, 448 SYNC_EVENTS_REQUESTED, 449 SYNC_EVENTS_VALID, 450 }; 451 452 /** 453 * struct efx_channel - An Efx channel 454 * 455 * A channel comprises an event queue, at least one TX queue, at least 456 * one RX queue, and an associated tasklet for processing the event 457 * queue. 458 * 459 * @efx: Associated Efx NIC 460 * @channel: Channel instance number 461 * @type: Channel type definition 462 * @eventq_init: Event queue initialised flag 463 * @enabled: Channel enabled indicator 464 * @irq: IRQ number (MSI and MSI-X only) 465 * @irq_moderation_us: IRQ moderation value (in microseconds) 466 * @napi_dev: Net device used with NAPI 467 * @napi_str: NAPI control structure 468 * @eventq: Event queue buffer 469 * @eventq_mask: Event queue pointer mask 470 * @eventq_read_ptr: Event queue read pointer 471 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel 472 * @irq_count: Number of IRQs since last adaptive moderation decision 473 * @irq_mod_score: IRQ moderation score 474 * @rfs_filter_count: number of accelerated RFS filters currently in place; 475 * equals the count of @rps_flow_id slots filled 476 * @rfs_last_expiry: value of jiffies last time some accelerated RFS filters 477 * were checked for expiry 478 * @rfs_expire_index: next accelerated RFS filter ID to check for expiry 479 * @n_rfs_succeeded: number of successful accelerated RFS filter insertions 480 * @n_rfs_failed: number of failed accelerated RFS filter insertions 481 * @filter_work: Work item for efx_filter_rfs_expire() 482 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS, 483 * indexed by filter ID 484 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors 485 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors 486 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors 487 * @n_rx_overlength: Count of RX_OVERLENGTH errors 488 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun 489 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to 490 * lack of descriptors 491 * @n_rx_merge_events: Number of RX merged completion events 492 * @n_rx_merge_packets: Number of RX packets completed by merged events 493 * @n_rx_xdp_drops: Count of RX packets intentionally dropped due to XDP 494 * @n_rx_xdp_bad_drops: Count of RX packets dropped due to XDP errors 495 * @n_rx_xdp_tx: Count of RX packets retransmitted due to XDP 496 * @n_rx_xdp_redirect: Count of RX packets redirected to a different NIC by XDP 497 * @n_rx_mport_bad: Count of RX packets dropped because their ingress mport was 498 * not recognised 499 * @old_n_rx_hw_drops: Count of all RX packets dropped for any reason as of last 500 * efx_start_channels() 501 * @old_n_rx_hw_drop_overruns: Value of @n_rx_nodesc_trunc as of last 502 * efx_start_channels() 503 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by 504 * __efx_rx_packet(), or zero if there is none 505 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered 506 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0 507 * @rx_list: list of SKBs from current RX, awaiting processing 508 * @rx_queue: RX queue for this channel 509 * @tx_queue: TX queues for this channel 510 * @tx_queue_by_type: pointers into @tx_queue, or %NULL, indexed by txq type 511 * @sync_events_state: Current state of sync events on this channel 512 * @sync_timestamp_major: Major part of the last ptp sync event 513 * @sync_timestamp_minor: Minor part of the last ptp sync event 514 */ 515 struct efx_channel { 516 struct efx_nic *efx; 517 int channel; 518 const struct efx_channel_type *type; 519 bool eventq_init; 520 bool enabled; 521 int irq; 522 unsigned int irq_moderation_us; 523 struct net_device *napi_dev; 524 struct napi_struct napi_str; 525 struct efx_buffer eventq; 526 unsigned int eventq_mask; 527 unsigned int eventq_read_ptr; 528 int event_test_cpu; 529 530 unsigned int irq_count; 531 unsigned int irq_mod_score; 532 #ifdef CONFIG_RFS_ACCEL 533 unsigned int rfs_filter_count; 534 unsigned int rfs_last_expiry; 535 unsigned int rfs_expire_index; 536 unsigned int n_rfs_succeeded; 537 unsigned int n_rfs_failed; 538 struct delayed_work filter_work; 539 #define RPS_FLOW_ID_INVALID 0xFFFFFFFF 540 u32 *rps_flow_id; 541 #endif 542 543 unsigned int n_rx_ip_hdr_chksum_err; 544 unsigned int n_rx_tcp_udp_chksum_err; 545 unsigned int n_rx_outer_ip_hdr_chksum_err; 546 unsigned int n_rx_outer_tcp_udp_chksum_err; 547 unsigned int n_rx_inner_ip_hdr_chksum_err; 548 unsigned int n_rx_inner_tcp_udp_chksum_err; 549 unsigned int n_rx_eth_crc_err; 550 unsigned int n_rx_frm_trunc; 551 unsigned int n_rx_overlength; 552 unsigned int n_skbuff_leaks; 553 unsigned int n_rx_nodesc_trunc; 554 unsigned int n_rx_merge_events; 555 unsigned int n_rx_merge_packets; 556 unsigned int n_rx_xdp_drops; 557 unsigned int n_rx_xdp_bad_drops; 558 unsigned int n_rx_xdp_tx; 559 unsigned int n_rx_xdp_redirect; 560 unsigned int n_rx_mport_bad; 561 562 unsigned int old_n_rx_hw_drops; 563 unsigned int old_n_rx_hw_drop_overruns; 564 565 unsigned int rx_pkt_n_frags; 566 unsigned int rx_pkt_index; 567 568 struct list_head *rx_list; 569 570 struct efx_rx_queue rx_queue; 571 struct efx_tx_queue tx_queue[EFX_MAX_TXQ_PER_CHANNEL]; 572 struct efx_tx_queue *tx_queue_by_type[EFX_TXQ_TYPES]; 573 574 enum efx_sync_events_state sync_events_state; 575 u32 sync_timestamp_major; 576 u32 sync_timestamp_minor; 577 }; 578 579 /** 580 * struct efx_msi_context - Context for each MSI 581 * @efx: The associated NIC 582 * @index: Index of the channel/IRQ 583 * @name: Name of the channel/IRQ 584 * 585 * Unlike &struct efx_channel, this is never reallocated and is always 586 * safe for the IRQ handler to access. 587 */ 588 struct efx_msi_context { 589 struct efx_nic *efx; 590 unsigned int index; 591 char name[IFNAMSIZ + 6]; 592 }; 593 594 /** 595 * struct efx_channel_type - distinguishes traffic and extra channels 596 * @handle_no_channel: Handle failure to allocate an extra channel 597 * @pre_probe: Set up extra state prior to initialisation 598 * @start: called early in efx_start_channels() 599 * @stop: called early in efx_stop_channels() 600 * @post_remove: Tear down extra state after finalisation, if allocated. 601 * May be called on channels that have not been probed. 602 * @get_name: Generate the channel's name (used for its IRQ handler) 603 * @copy: Copy the channel state prior to reallocation. May be %NULL if 604 * reallocation is not supported. 605 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb() 606 * @receive_raw: Handle an RX buffer ready to be passed to __efx_rx_packet() 607 * @want_txqs: Determine whether this channel should have TX queues 608 * created. If %NULL, TX queues are not created. 609 * @keep_eventq: Flag for whether event queue should be kept initialised 610 * while the device is stopped 611 * @want_pio: Flag for whether PIO buffers should be linked to this 612 * channel's TX queues. 613 */ 614 struct efx_channel_type { 615 void (*handle_no_channel)(struct efx_nic *); 616 int (*pre_probe)(struct efx_channel *); 617 int (*start)(struct efx_channel *); 618 void (*stop)(struct efx_channel *); 619 void (*post_remove)(struct efx_channel *); 620 void (*get_name)(struct efx_channel *, char *buf, size_t len); 621 struct efx_channel *(*copy)(const struct efx_channel *); 622 bool (*receive_skb)(struct efx_channel *, struct sk_buff *); 623 bool (*receive_raw)(struct efx_rx_queue *, u32); 624 bool (*want_txqs)(struct efx_channel *); 625 bool keep_eventq; 626 bool want_pio; 627 }; 628 629 enum efx_led_mode { 630 EFX_LED_OFF = 0, 631 EFX_LED_ON = 1, 632 EFX_LED_DEFAULT = 2 633 }; 634 635 #define STRING_TABLE_LOOKUP(val, member) \ 636 ((val) < member ## _max) ? member ## _names[val] : "(invalid)" 637 638 extern const char *const efx_loopback_mode_names[]; 639 extern const unsigned int efx_loopback_mode_max; 640 #define LOOPBACK_MODE(efx) \ 641 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode) 642 643 enum efx_int_mode { 644 /* Be careful if altering to correct macro below */ 645 EFX_INT_MODE_MSIX = 0, 646 EFX_INT_MODE_MSI = 1, 647 EFX_INT_MODE_LEGACY = 2, 648 EFX_INT_MODE_MAX /* Insert any new items before this */ 649 }; 650 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI) 651 652 enum nic_state { 653 STATE_UNINIT = 0, /* device being probed/removed */ 654 STATE_PROBED, /* hardware probed */ 655 STATE_NET_DOWN, /* netdev registered */ 656 STATE_NET_UP, /* ready for traffic */ 657 STATE_DISABLED, /* device disabled due to hardware errors */ 658 659 STATE_RECOVERY = 0x100,/* recovering from PCI error */ 660 STATE_FROZEN = 0x200, /* frozen by power management */ 661 }; 662 663 static inline bool efx_net_active(enum nic_state state) 664 { 665 return state == STATE_NET_DOWN || state == STATE_NET_UP; 666 } 667 668 static inline bool efx_frozen(enum nic_state state) 669 { 670 return state & STATE_FROZEN; 671 } 672 673 static inline bool efx_recovering(enum nic_state state) 674 { 675 return state & STATE_RECOVERY; 676 } 677 678 static inline enum nic_state efx_freeze(enum nic_state state) 679 { 680 WARN_ON(!efx_net_active(state)); 681 return state | STATE_FROZEN; 682 } 683 684 static inline enum nic_state efx_thaw(enum nic_state state) 685 { 686 WARN_ON(!efx_frozen(state)); 687 return state & ~STATE_FROZEN; 688 } 689 690 static inline enum nic_state efx_recover(enum nic_state state) 691 { 692 WARN_ON(!efx_net_active(state)); 693 return state | STATE_RECOVERY; 694 } 695 696 static inline enum nic_state efx_recovered(enum nic_state state) 697 { 698 WARN_ON(!efx_recovering(state)); 699 return state & ~STATE_RECOVERY; 700 } 701 702 /* Forward declaration */ 703 struct efx_nic; 704 705 /* Pseudo bit-mask flow control field */ 706 #define EFX_FC_RX FLOW_CTRL_RX 707 #define EFX_FC_TX FLOW_CTRL_TX 708 #define EFX_FC_AUTO 4 709 710 /** 711 * struct efx_link_state - Current state of the link 712 * @up: Link is up 713 * @fd: Link is full-duplex 714 * @fc: Actual flow control flags 715 * @speed: Link speed (Mbps) 716 */ 717 struct efx_link_state { 718 bool up; 719 bool fd; 720 u8 fc; 721 unsigned int speed; 722 }; 723 724 static inline bool efx_link_state_equal(const struct efx_link_state *left, 725 const struct efx_link_state *right) 726 { 727 return left->up == right->up && left->fd == right->fd && 728 left->fc == right->fc && left->speed == right->speed; 729 } 730 731 /** 732 * enum efx_phy_mode - PHY operating mode flags 733 * @PHY_MODE_NORMAL: on and should pass traffic 734 * @PHY_MODE_TX_DISABLED: on with TX disabled 735 * @PHY_MODE_LOW_POWER: set to low power through MDIO 736 * @PHY_MODE_OFF: switched off through external control 737 * @PHY_MODE_SPECIAL: on but will not pass traffic 738 */ 739 enum efx_phy_mode { 740 PHY_MODE_NORMAL = 0, 741 PHY_MODE_TX_DISABLED = 1, 742 PHY_MODE_LOW_POWER = 2, 743 PHY_MODE_OFF = 4, 744 PHY_MODE_SPECIAL = 8, 745 }; 746 747 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode) 748 { 749 return !!(mode & ~PHY_MODE_TX_DISABLED); 750 } 751 752 /** 753 * struct efx_hw_stat_desc - Description of a hardware statistic 754 * @name: Name of the statistic as visible through ethtool, or %NULL if 755 * it should not be exposed 756 * @dma_width: Width in bits (0 for non-DMA statistics) 757 * @offset: Offset within stats (ignored for non-DMA statistics) 758 */ 759 struct efx_hw_stat_desc { 760 const char *name; 761 u16 dma_width; 762 u16 offset; 763 }; 764 765 struct vfdi_status; 766 767 /* The reserved RSS context value */ 768 #define EFX_MCDI_RSS_CONTEXT_INVALID 0xffffffff 769 /** 770 * struct efx_rss_context_priv - driver private data for an RSS context 771 * @context_id: the RSS_CONTEXT_ID returned by MC firmware, or 772 * %EFX_MCDI_RSS_CONTEXT_INVALID if this context is not present on the NIC. 773 * @rx_hash_udp_4tuple: UDP 4-tuple hashing enabled 774 */ 775 struct efx_rss_context_priv { 776 u32 context_id; 777 bool rx_hash_udp_4tuple; 778 }; 779 780 /** 781 * struct efx_rss_context - an RSS context 782 * @priv: hardware-specific state 783 * @rx_hash_key: Toeplitz hash key for this RSS context 784 * @rx_indir_table: Indirection table for this RSS context 785 */ 786 struct efx_rss_context { 787 struct efx_rss_context_priv priv; 788 u8 rx_hash_key[40]; 789 u32 rx_indir_table[128]; 790 }; 791 792 #ifdef CONFIG_RFS_ACCEL 793 /* Order of these is important, since filter_id >= %EFX_ARFS_FILTER_ID_PENDING 794 * is used to test if filter does or will exist. 795 */ 796 #define EFX_ARFS_FILTER_ID_PENDING -1 797 #define EFX_ARFS_FILTER_ID_ERROR -2 798 #define EFX_ARFS_FILTER_ID_REMOVING -3 799 /** 800 * struct efx_arfs_rule - record of an ARFS filter and its IDs 801 * @node: linkage into hash table 802 * @spec: details of the filter (used as key for hash table). Use efx->type to 803 * determine which member to use. 804 * @rxq_index: channel to which the filter will steer traffic. 805 * @arfs_id: filter ID which was returned to ARFS 806 * @filter_id: index in software filter table. May be 807 * %EFX_ARFS_FILTER_ID_PENDING if filter was not inserted yet, 808 * %EFX_ARFS_FILTER_ID_ERROR if filter insertion failed, or 809 * %EFX_ARFS_FILTER_ID_REMOVING if expiry is currently removing the filter. 810 */ 811 struct efx_arfs_rule { 812 struct hlist_node node; 813 struct efx_filter_spec spec; 814 u16 rxq_index; 815 u16 arfs_id; 816 s32 filter_id; 817 }; 818 819 /* Size chosen so that the table is one page (4kB) */ 820 #define EFX_ARFS_HASH_TABLE_SIZE 512 821 822 /** 823 * struct efx_async_filter_insertion - Request to asynchronously insert a filter 824 * @net_dev: Reference to the netdevice 825 * @net_dev_tracker: reference tracker entry for @net_dev 826 * @spec: The filter to insert 827 * @work: Workitem for this request 828 * @rxq_index: Identifies the channel for which this request was made 829 * @flow_id: Identifies the kernel-side flow for which this request was made 830 */ 831 struct efx_async_filter_insertion { 832 struct net_device *net_dev; 833 netdevice_tracker net_dev_tracker; 834 struct efx_filter_spec spec; 835 struct work_struct work; 836 u16 rxq_index; 837 u32 flow_id; 838 }; 839 840 /* Maximum number of ARFS workitems that may be in flight on an efx_nic */ 841 #define EFX_RPS_MAX_IN_FLIGHT 8 842 #endif /* CONFIG_RFS_ACCEL */ 843 844 enum efx_xdp_tx_queues_mode { 845 EFX_XDP_TX_QUEUES_DEDICATED, /* one queue per core, locking not needed */ 846 EFX_XDP_TX_QUEUES_SHARED, /* each queue used by more than 1 core */ 847 EFX_XDP_TX_QUEUES_BORROWED /* queues borrowed from net stack */ 848 }; 849 850 struct efx_mae; 851 852 /** 853 * struct efx_nic - an Efx NIC 854 * @name: Device name (net device name or bus id before net device registered) 855 * @pci_dev: The PCI device 856 * @node: List node for maintaning primary/secondary function lists 857 * @primary: &struct efx_nic instance for the primary function of this 858 * controller. May be the same structure, and may be %NULL if no 859 * primary function is bound. Serialised by rtnl_lock. 860 * @secondary_list: List of &struct efx_nic instances for the secondary PCI 861 * functions of the controller, if this is for the primary function. 862 * Serialised by rtnl_lock. 863 * @type: Controller type attributes 864 * @legacy_irq: IRQ number 865 * @workqueue: Workqueue for port reconfigures and the HW monitor. 866 * Work items do not hold and must not acquire RTNL. 867 * @workqueue_name: Name of workqueue 868 * @reset_work: Scheduled reset workitem 869 * @membase_phys: Memory BAR value as physical address 870 * @membase: Memory BAR value 871 * @vi_stride: step between per-VI registers / memory regions 872 * @interrupt_mode: Interrupt mode 873 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds 874 * @timer_max_ns: Interrupt timer maximum value, in nanoseconds 875 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues 876 * @irqs_hooked: Channel interrupts are hooked 877 * @irq_mod_step_us: Step size for IRQ moderation for RX event queues 878 * @irq_rx_moderation_us: IRQ moderation time for RX event queues 879 * @msg_enable: Log message enable flags 880 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock. 881 * @reset_pending: Bitmask for pending resets 882 * @channel: Channels 883 * @msi_context: Context for each MSI 884 * @extra_channel_type: Types of extra (non-traffic) channels that 885 * should be allocated for this NIC 886 * @mae: Details of the Match Action Engine 887 * @xdp_tx_queue_count: Number of entries in %xdp_tx_queues. 888 * @xdp_tx_queues: Array of pointers to tx queues used for XDP transmit. 889 * @xdp_txq_queues_mode: XDP TX queues sharing strategy. 890 * @rxq_entries: Size of receive queues requested by user. 891 * @txq_entries: Size of transmit queues requested by user. 892 * @txq_stop_thresh: TX queue fill level at or above which we stop it. 893 * @txq_wake_thresh: TX queue fill level at or below which we wake it. 894 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches 895 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches 896 * @sram_lim_qw: Qword address limit of SRAM 897 * @n_channels: Number of channels in use 898 * @n_rx_channels: Number of channels used for RX (= number of RX queues) 899 * @n_tx_channels: Number of channels used for TX 900 * @n_extra_tx_channels: Number of extra channels with TX queues 901 * @tx_queues_per_channel: number of TX queues probed on each channel 902 * @n_xdp_channels: Number of channels used for XDP TX 903 * @xdp_channel_offset: Offset of zeroth channel used for XPD TX. 904 * @xdp_tx_per_channel: Max number of TX queues on an XDP TX channel. 905 * @rx_ip_align: RX DMA address offset to have IP header aligned in 906 * in accordance with NET_IP_ALIGN 907 * @rx_dma_len: Current maximum RX DMA length 908 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer 909 * @rx_buffer_truesize: Amortised allocation size of an RX buffer, 910 * for use in sk_buff::truesize 911 * @rx_prefix_size: Size of RX prefix before packet data 912 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data 913 * (valid only if @rx_prefix_size != 0; always negative) 914 * @rx_packet_len_offset: Offset of RX packet length from start of packet data 915 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative) 916 * @rx_packet_ts_offset: Offset of timestamp from start of packet data 917 * (valid only if channel->sync_timestamps_enabled; always negative) 918 * @rx_scatter: Scatter mode enabled for receives 919 * @rss_context: Main RSS context. 920 * @vport_id: The function's vport ID, only relevant for PFs 921 * @int_error_count: Number of internal errors seen recently 922 * @int_error_expire: Time at which error count will be expired 923 * @must_realloc_vis: Flag: VIs have yet to be reallocated after MC reboot 924 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will 925 * acknowledge but do nothing else. 926 * @irq_status: Interrupt status buffer 927 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0 928 * @irq_level: IRQ level/index for IRQs not triggered by an event queue 929 * @selftest_work: Work item for asynchronous self-test 930 * @mtd_list: List of MTDs attached to the NIC 931 * @nic_data: Hardware dependent state 932 * @mcdi: Management-Controller-to-Driver Interface state 933 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode, 934 * efx_monitor() and efx_reconfigure_port() 935 * @port_enabled: Port enabled indicator. 936 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and 937 * efx_mac_work() with kernel interfaces. Safe to read under any 938 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must 939 * be held to modify it. 940 * @port_initialized: Port initialized? 941 * @net_dev: Operating system network device. Consider holding the rtnl lock 942 * @fixed_features: Features which cannot be turned off 943 * @num_mac_stats: Number of MAC stats reported by firmware (MAC_STATS_NUM_STATS 944 * field of %MC_CMD_GET_CAPABILITIES_V4 response, or %MC_CMD_MAC_NSTATS) 945 * @stats_buffer: DMA buffer for statistics 946 * @phy_type: PHY type 947 * @phy_data: PHY private data (including PHY-specific stats) 948 * @phy_mode: PHY operating mode. Serialised by @mac_lock. 949 * @link_advertising: Autonegotiation advertising flags 950 * @fec_config: Forward Error Correction configuration flags. For bit positions 951 * see &enum ethtool_fec_config_bits. 952 * @link_state: Current state of the link 953 * @n_link_state_changes: Number of times the link has changed state 954 * @wanted_fc: Wanted flow control flags 955 * @fc_disable: When non-zero flow control is disabled. Typically used to 956 * ensure that network back pressure doesn't delay dma queue flushes. 957 * Serialised by the rtnl lock. 958 * @mac_work: Work item for changing MAC promiscuity and multicast hash 959 * @loopback_mode: Loopback status 960 * @loopback_modes: Supported loopback mode bitmask 961 * @loopback_selftest: Offline self-test private state 962 * @xdp_prog: Current XDP programme for this interface 963 * @filter_sem: Filter table rw_semaphore, protects existence of @filter_state 964 * @filter_state: Architecture-dependent filter table state 965 * @rps_mutex: Protects RPS state of all channels 966 * @rps_slot_map: bitmap of in-flight entries in @rps_slot 967 * @rps_slot: array of ARFS insertion requests for efx_filter_rfs_work() 968 * @rps_hash_lock: Protects ARFS filter mapping state (@rps_hash_table and 969 * @rps_next_id). 970 * @rps_hash_table: Mapping between ARFS filters and their various IDs 971 * @rps_next_id: next arfs_id for an ARFS filter 972 * @active_queues: Count of RX and TX queues that haven't been flushed and drained. 973 * @rxq_flush_pending: Count of number of receive queues that need to be flushed. 974 * Decremented when the efx_flush_rx_queue() is called. 975 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet 976 * completed (either success or failure). Not used when MCDI is used to 977 * flush receive queues. 978 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions. 979 * @vf_count: Number of VFs intended to be enabled. 980 * @vf_init_count: Number of VFs that have been fully initialised. 981 * @vi_scale: log2 number of vnics per VF. 982 * @vf_reps_lock: Protects vf_reps list 983 * @vf_reps: local VF reps 984 * @ptp_data: PTP state data 985 * @ptp_warned: has this NIC seen and warned about unexpected PTP events? 986 * @vpd_sn: Serial number read from VPD 987 * @xdp_rxq_info_failed: Have any of the rx queues failed to initialise their 988 * xdp_rxq_info structures? 989 * @netdev_notifier: Netdevice notifier. 990 * @netevent_notifier: Netevent notifier (for neighbour updates). 991 * @tc: state for TC offload (EF100). 992 * @devlink: reference to devlink structure owned by this device 993 * @dl_port: devlink port associated with the PF 994 * @mem_bar: The BAR that is mapped into membase. 995 * @reg_base: Offset from the start of the bar to the function control window. 996 * @reflash_mutex: Mutex for serialising firmware reflash operations. 997 * @monitor_work: Hardware monitor workitem 998 * @biu_lock: BIU (bus interface unit) lock 999 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This 1000 * field is used by efx_test_interrupts() to verify that an 1001 * interrupt has occurred. 1002 * @stats_lock: Statistics update lock. Must be held when calling 1003 * efx_nic_type::{update,start,stop}_stats. 1004 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb 1005 * 1006 * This is stored in the private area of the &struct net_device. 1007 */ 1008 struct efx_nic { 1009 /* The following fields should be written very rarely */ 1010 1011 char name[IFNAMSIZ]; 1012 struct list_head node; 1013 struct efx_nic *primary; 1014 struct list_head secondary_list; 1015 struct pci_dev *pci_dev; 1016 unsigned int port_num; 1017 const struct efx_nic_type *type; 1018 int legacy_irq; 1019 bool eeh_disabled_legacy_irq; 1020 struct workqueue_struct *workqueue; 1021 char workqueue_name[16]; 1022 struct work_struct reset_work; 1023 resource_size_t membase_phys; 1024 void __iomem *membase; 1025 1026 unsigned int vi_stride; 1027 1028 enum efx_int_mode interrupt_mode; 1029 unsigned int timer_quantum_ns; 1030 unsigned int timer_max_ns; 1031 bool irq_rx_adaptive; 1032 bool irqs_hooked; 1033 unsigned int irq_mod_step_us; 1034 unsigned int irq_rx_moderation_us; 1035 u32 msg_enable; 1036 1037 enum nic_state state; 1038 unsigned long reset_pending; 1039 1040 struct efx_channel *channel[EFX_MAX_CHANNELS]; 1041 struct efx_msi_context msi_context[EFX_MAX_CHANNELS]; 1042 const struct efx_channel_type * 1043 extra_channel_type[EFX_MAX_EXTRA_CHANNELS]; 1044 struct efx_mae *mae; 1045 1046 unsigned int xdp_tx_queue_count; 1047 struct efx_tx_queue **xdp_tx_queues; 1048 enum efx_xdp_tx_queues_mode xdp_txq_queues_mode; 1049 1050 unsigned rxq_entries; 1051 unsigned txq_entries; 1052 unsigned int txq_stop_thresh; 1053 unsigned int txq_wake_thresh; 1054 1055 unsigned tx_dc_base; 1056 unsigned rx_dc_base; 1057 unsigned sram_lim_qw; 1058 1059 unsigned int max_channels; 1060 unsigned int max_vis; 1061 unsigned int max_tx_channels; 1062 unsigned n_channels; 1063 unsigned n_rx_channels; 1064 unsigned rss_spread; 1065 unsigned tx_channel_offset; 1066 unsigned n_tx_channels; 1067 unsigned n_extra_tx_channels; 1068 unsigned int tx_queues_per_channel; 1069 unsigned int n_xdp_channels; 1070 unsigned int xdp_channel_offset; 1071 unsigned int xdp_tx_per_channel; 1072 unsigned int rx_ip_align; 1073 unsigned int rx_dma_len; 1074 unsigned int rx_buffer_order; 1075 unsigned int rx_buffer_truesize; 1076 unsigned int rx_page_buf_step; 1077 unsigned int rx_bufs_per_page; 1078 unsigned int rx_pages_per_batch; 1079 unsigned int rx_prefix_size; 1080 int rx_packet_hash_offset; 1081 int rx_packet_len_offset; 1082 int rx_packet_ts_offset; 1083 bool rx_scatter; 1084 struct efx_rss_context rss_context; 1085 u32 vport_id; 1086 1087 unsigned int_error_count; 1088 unsigned long int_error_expire; 1089 1090 bool must_realloc_vis; 1091 bool irq_soft_enabled; 1092 struct efx_buffer irq_status; 1093 unsigned irq_zero_count; 1094 unsigned irq_level; 1095 struct delayed_work selftest_work; 1096 1097 #ifdef CONFIG_SFC_MTD 1098 struct list_head mtd_list; 1099 #endif 1100 1101 void *nic_data; 1102 struct efx_mcdi_data *mcdi; 1103 1104 struct mutex mac_lock; 1105 struct work_struct mac_work; 1106 bool port_enabled; 1107 1108 bool mc_bist_for_other_fn; 1109 bool port_initialized; 1110 struct net_device *net_dev; 1111 1112 netdev_features_t fixed_features; 1113 1114 u16 num_mac_stats; 1115 struct efx_buffer stats_buffer; 1116 u64 rx_nodesc_drops_total; 1117 u64 rx_nodesc_drops_while_down; 1118 bool rx_nodesc_drops_prev_state; 1119 1120 unsigned int phy_type; 1121 void *phy_data; 1122 enum efx_phy_mode phy_mode; 1123 1124 __ETHTOOL_DECLARE_LINK_MODE_MASK(link_advertising); 1125 u32 fec_config; 1126 struct efx_link_state link_state; 1127 unsigned int n_link_state_changes; 1128 1129 u8 wanted_fc; 1130 unsigned fc_disable; 1131 1132 atomic_t rx_reset; 1133 enum efx_loopback_mode loopback_mode; 1134 u64 loopback_modes; 1135 1136 void *loopback_selftest; 1137 /* We access loopback_selftest immediately before running XDP, 1138 * so we want them next to each other. 1139 */ 1140 struct bpf_prog __rcu *xdp_prog; 1141 1142 struct rw_semaphore filter_sem; 1143 void *filter_state; 1144 #ifdef CONFIG_RFS_ACCEL 1145 struct mutex rps_mutex; 1146 unsigned long rps_slot_map; 1147 struct efx_async_filter_insertion rps_slot[EFX_RPS_MAX_IN_FLIGHT]; 1148 spinlock_t rps_hash_lock; 1149 struct hlist_head *rps_hash_table; 1150 u32 rps_next_id; 1151 #endif 1152 1153 atomic_t active_queues; 1154 atomic_t rxq_flush_pending; 1155 atomic_t rxq_flush_outstanding; 1156 wait_queue_head_t flush_wq; 1157 1158 #ifdef CONFIG_SFC_SRIOV 1159 unsigned vf_count; 1160 unsigned vf_init_count; 1161 unsigned vi_scale; 1162 #endif 1163 spinlock_t vf_reps_lock; 1164 struct list_head vf_reps; 1165 1166 struct efx_ptp_data *ptp_data; 1167 bool ptp_warned; 1168 1169 char *vpd_sn; 1170 bool xdp_rxq_info_failed; 1171 1172 struct notifier_block netdev_notifier; 1173 struct notifier_block netevent_notifier; 1174 struct efx_tc_state *tc; 1175 1176 struct devlink *devlink; 1177 struct devlink_port *dl_port; 1178 unsigned int mem_bar; 1179 u32 reg_base; 1180 struct mutex reflash_mutex; 1181 1182 /* The following fields may be written more often */ 1183 1184 struct delayed_work monitor_work ____cacheline_aligned_in_smp; 1185 spinlock_t biu_lock; 1186 int last_irq_cpu; 1187 spinlock_t stats_lock; 1188 atomic_t n_rx_noskb_drops; 1189 }; 1190 1191 #ifdef CONFIG_SFC_CXL 1192 struct efx_cxl; 1193 #endif 1194 1195 /** 1196 * struct efx_probe_data - State after hardware probe 1197 * @pci_dev: The PCI device 1198 * @efx: Efx NIC details 1199 * @cxl: details of related cxl objects 1200 * @cxl_pio_initialised: cxl initialization outcome. 1201 */ 1202 struct efx_probe_data { 1203 struct pci_dev *pci_dev; 1204 struct efx_nic efx; 1205 #ifdef CONFIG_SFC_CXL 1206 struct efx_cxl *cxl; 1207 bool cxl_pio_initialised; 1208 #endif 1209 }; 1210 1211 static inline struct efx_nic *efx_netdev_priv(struct net_device *dev) 1212 { 1213 struct efx_probe_data **probe_ptr = netdev_priv(dev); 1214 struct efx_probe_data *probe_data = *probe_ptr; 1215 1216 return &probe_data->efx; 1217 } 1218 1219 static inline int efx_dev_registered(struct efx_nic *efx) 1220 { 1221 return efx->net_dev->reg_state == NETREG_REGISTERED; 1222 } 1223 1224 static inline unsigned int efx_port_num(struct efx_nic *efx) 1225 { 1226 return efx->port_num; 1227 } 1228 1229 struct efx_mtd_partition { 1230 struct list_head node; 1231 struct mtd_info mtd; 1232 const char *dev_type_name; 1233 const char *type_name; 1234 char name[IFNAMSIZ + 20]; 1235 }; 1236 1237 struct efx_udp_tunnel { 1238 #define TUNNEL_ENCAP_UDP_PORT_ENTRY_INVALID 0xffff 1239 u16 type; /* TUNNEL_ENCAP_UDP_PORT_ENTRY_foo, see mcdi_pcol.h */ 1240 __be16 port; 1241 }; 1242 1243 /** 1244 * struct efx_nic_type - Efx device type definition 1245 * @mem_bar: Get the memory BAR 1246 * @mem_map_size: Get memory BAR mapped size 1247 * @probe: Probe the controller 1248 * @remove: Free resources allocated by probe() 1249 * @init: Initialise the controller 1250 * @dimension_resources: Dimension controller resources (buffer table, 1251 * and VIs once the available interrupt resources are clear) 1252 * @fini: Shut down the controller 1253 * @monitor: Periodic function for polling link state and hardware monitor 1254 * @map_reset_reason: Map ethtool reset reason to a reset method 1255 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible 1256 * @reset: Reset the controller hardware and possibly the PHY. This will 1257 * be called while the controller is uninitialised. 1258 * @probe_port: Probe the MAC and PHY 1259 * @remove_port: Free resources allocated by probe_port() 1260 * @handle_global_event: Handle a "global" event (may be %NULL) 1261 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues) 1262 * @prepare_flr: Prepare for an FLR 1263 * @finish_flr: Clean up after an FLR 1264 * @describe_stats: Describe statistics for ethtool 1265 * @update_stats: Update statistics not provided by event handling. 1266 * Either argument may be %NULL. 1267 * @update_stats_atomic: Update statistics while in atomic context, if that 1268 * is more limiting than @update_stats. Otherwise, leave %NULL and 1269 * driver core will call @update_stats. 1270 * @start_stats: Start the regular fetching of statistics 1271 * @pull_stats: Pull stats from the NIC and wait until they arrive. 1272 * @stop_stats: Stop the regular fetching of statistics 1273 * @push_irq_moderation: Apply interrupt moderation value 1274 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY 1275 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL) 1276 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings 1277 * to the hardware. Serialised by the mac_lock. 1278 * @check_mac_fault: Check MAC fault state. True if fault present. 1279 * @get_wol: Get WoL configuration from driver state 1280 * @set_wol: Push WoL configuration to the NIC 1281 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume) 1282 * @get_fec_stats: Get standard FEC statistics. 1283 * @test_chip: Test registers. This is expected to reset the NIC. 1284 * @test_nvram: Test validity of NVRAM contents 1285 * @mcdi_request: Send an MCDI request with the given header and SDU. 1286 * The SDU length may be any value from 0 up to the protocol- 1287 * defined maximum, but its buffer will be padded to a multiple 1288 * of 4 bytes. 1289 * @mcdi_poll_response: Test whether an MCDI response is available. 1290 * @mcdi_read_response: Read the MCDI response PDU. The offset will 1291 * be a multiple of 4. The length may not be, but the buffer 1292 * will be padded so it is safe to round up. 1293 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so, 1294 * return an appropriate error code for aborting any current 1295 * request; otherwise return 0. 1296 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must 1297 * be separately enabled after this. 1298 * @irq_test_generate: Generate a test IRQ 1299 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event 1300 * queue must be separately disabled before this. 1301 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is 1302 * a pointer to the &struct efx_msi_context for the channel. 1303 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument 1304 * is a pointer to the &struct efx_nic. 1305 * @tx_probe: Allocate resources for TX queue (and select TXQ type) 1306 * @tx_init: Initialise TX queue on the NIC 1307 * @tx_remove: Free resources for TX queue 1308 * @tx_write: Write TX descriptors and doorbell 1309 * @tx_enqueue: Add an SKB to TX queue 1310 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC 1311 * @rx_pull_rss_config: Read RSS hash key and indirection table back from the NIC 1312 * @rx_push_rss_context_config: Write RSS hash key and indirection table for 1313 * user RSS context to the NIC 1314 * @rx_pull_rss_context_config: Read RSS hash key and indirection table for user 1315 * RSS context back from the NIC 1316 * @rx_probe: Allocate resources for RX queue 1317 * @rx_init: Initialise RX queue on the NIC 1318 * @rx_remove: Free resources for RX queue 1319 * @rx_write: Write RX descriptors and doorbell 1320 * @rx_defer_refill: Generate a refill reminder event 1321 * @rx_packet: Receive the queued RX buffer on a channel 1322 * @rx_buf_hash_valid: Determine whether the RX prefix contains a valid hash 1323 * @ev_probe: Allocate resources for event queue 1324 * @ev_init: Initialise event queue on the NIC 1325 * @ev_fini: Deinitialise event queue on the NIC 1326 * @ev_remove: Free resources for event queue 1327 * @ev_process: Process events for a queue, up to the given NAPI quota 1328 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ 1329 * @ev_test_generate: Generate a test event 1330 * @filter_table_probe: Probe filter capabilities and set up filter software state 1331 * @filter_table_restore: Restore filters removed from hardware 1332 * @filter_table_remove: Remove filters from hardware and tear down software state 1333 * @filter_update_rx_scatter: Update filters after change to rx scatter setting 1334 * @filter_insert: add or replace a filter 1335 * @filter_remove_safe: remove a filter by ID, carefully 1336 * @filter_get_safe: retrieve a filter by ID, carefully 1337 * @filter_clear_rx: Remove all RX filters whose priority is less than or 1338 * equal to the given priority and is not %EFX_FILTER_PRI_AUTO 1339 * @filter_count_rx_used: Get the number of filters in use at a given priority 1340 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1 1341 * @filter_get_rx_ids: Get list of RX filters at a given priority 1342 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS. 1343 * This must check whether the specified table entry is used by RFS 1344 * and that rps_may_expire_flow() returns true for it. 1345 * @mtd_probe: Probe and add MTD partitions associated with this net device, 1346 * using efx_mtd_add() 1347 * @mtd_rename: Set an MTD partition name using the net device name 1348 * @mtd_read: Read from an MTD partition 1349 * @mtd_erase: Erase part of an MTD partition 1350 * @mtd_write: Write to an MTD partition 1351 * @mtd_sync: Wait for write-back to complete on MTD partition. This 1352 * also notifies the driver that a writer has finished using this 1353 * partition. 1354 * @ptp_write_host_time: Send host time to MC as part of sync protocol 1355 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX 1356 * timestamping, possibly only temporarily for the purposes of a reset. 1357 * @ptp_set_ts_config: Set hardware timestamp configuration. The flags 1358 * and tx_type will already have been validated but this operation 1359 * must validate and update rx_filter. 1360 * @get_phys_port_id: Get the underlying physical port id. 1361 * @set_mac_address: Set the MAC address of the device 1362 * @tso_versions: Returns mask of firmware-assisted TSO versions supported. 1363 * If %NULL, then device does not support any TSO version. 1364 * @udp_tnl_push_ports: Push the list of UDP tunnel ports to the NIC if required. 1365 * @udp_tnl_has_port: Check if a port has been added as UDP tunnel 1366 * @print_additional_fwver: Dump NIC-specific additional FW version info 1367 * @sensor_event: Handle a sensor event from MCDI 1368 * @rx_recycle_ring_size: Size of the RX recycle ring 1369 * @revision: Hardware architecture revision 1370 * @txd_ptr_tbl_base: TX descriptor ring base address 1371 * @rxd_ptr_tbl_base: RX descriptor ring base address 1372 * @buf_tbl_base: Buffer table base address 1373 * @evq_ptr_tbl_base: Event queue pointer table base address 1374 * @evq_rptr_tbl_base: Event queue read-pointer table base address 1375 * @max_dma_mask: Maximum possible DMA mask 1376 * @rx_prefix_size: Size of RX prefix before packet data 1377 * @rx_hash_offset: Offset of RX flow hash within prefix 1378 * @rx_ts_offset: Offset of timestamp within prefix 1379 * @rx_buffer_padding: Size of padding at end of RX packet 1380 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers 1381 * @always_rx_scatter: NIC will always scatter packets to multiple buffers 1382 * @option_descriptors: NIC supports TX option descriptors 1383 * @flash_auto_partition: firmware flash uses AUTO partition, driver does 1384 * not need to perform image parsing 1385 * @min_interrupt_mode: Lowest capability interrupt mode supported 1386 * from &enum efx_int_mode. 1387 * @timer_period_max: Maximum period of interrupt timer (in ticks) 1388 * @offload_features: net_device feature flags for protocol offload 1389 * features implemented in hardware 1390 * @mcdi_max_ver: Maximum MCDI version supported 1391 * @hwtstamp_filters: Mask of hardware timestamp filter types supported 1392 */ 1393 struct efx_nic_type { 1394 bool is_vf; 1395 unsigned int (*mem_bar)(struct efx_nic *efx); 1396 unsigned int (*mem_map_size)(struct efx_nic *efx); 1397 int (*probe)(struct efx_nic *efx); 1398 void (*remove)(struct efx_nic *efx); 1399 int (*init)(struct efx_nic *efx); 1400 int (*dimension_resources)(struct efx_nic *efx); 1401 void (*fini)(struct efx_nic *efx); 1402 void (*monitor)(struct efx_nic *efx); 1403 enum reset_type (*map_reset_reason)(enum reset_type reason); 1404 int (*map_reset_flags)(u32 *flags); 1405 int (*reset)(struct efx_nic *efx, enum reset_type method); 1406 int (*probe_port)(struct efx_nic *efx); 1407 void (*remove_port)(struct efx_nic *efx); 1408 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *); 1409 int (*fini_dmaq)(struct efx_nic *efx); 1410 void (*prepare_flr)(struct efx_nic *efx); 1411 void (*finish_flr)(struct efx_nic *efx); 1412 size_t (*describe_stats)(struct efx_nic *efx, u8 **names); 1413 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats, 1414 struct rtnl_link_stats64 *core_stats); 1415 size_t (*update_stats_atomic)(struct efx_nic *efx, u64 *full_stats, 1416 struct rtnl_link_stats64 *core_stats); 1417 void (*start_stats)(struct efx_nic *efx); 1418 void (*pull_stats)(struct efx_nic *efx); 1419 void (*stop_stats)(struct efx_nic *efx); 1420 void (*push_irq_moderation)(struct efx_channel *channel); 1421 int (*reconfigure_port)(struct efx_nic *efx); 1422 void (*prepare_enable_fc_tx)(struct efx_nic *efx); 1423 int (*reconfigure_mac)(struct efx_nic *efx, bool mtu_only); 1424 bool (*check_mac_fault)(struct efx_nic *efx); 1425 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol); 1426 int (*set_wol)(struct efx_nic *efx, u32 type); 1427 void (*resume_wol)(struct efx_nic *efx); 1428 void (*get_fec_stats)(struct efx_nic *efx, 1429 struct ethtool_fec_stats *fec_stats); 1430 unsigned int (*check_caps)(const struct efx_nic *efx, 1431 u8 flag, 1432 u32 offset); 1433 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests); 1434 int (*test_nvram)(struct efx_nic *efx); 1435 void (*mcdi_request)(struct efx_nic *efx, 1436 const efx_dword_t *hdr, size_t hdr_len, 1437 const efx_dword_t *sdu, size_t sdu_len); 1438 bool (*mcdi_poll_response)(struct efx_nic *efx); 1439 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu, 1440 size_t pdu_offset, size_t pdu_len); 1441 int (*mcdi_poll_reboot)(struct efx_nic *efx); 1442 void (*mcdi_reboot_detected)(struct efx_nic *efx); 1443 void (*irq_enable_master)(struct efx_nic *efx); 1444 int (*irq_test_generate)(struct efx_nic *efx); 1445 void (*irq_disable_non_ev)(struct efx_nic *efx); 1446 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id); 1447 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id); 1448 int (*tx_probe)(struct efx_tx_queue *tx_queue); 1449 void (*tx_init)(struct efx_tx_queue *tx_queue); 1450 void (*tx_remove)(struct efx_tx_queue *tx_queue); 1451 void (*tx_write)(struct efx_tx_queue *tx_queue); 1452 netdev_tx_t (*tx_enqueue)(struct efx_tx_queue *tx_queue, struct sk_buff *skb); 1453 unsigned int (*tx_limit_len)(struct efx_tx_queue *tx_queue, 1454 dma_addr_t dma_addr, unsigned int len); 1455 int (*rx_push_rss_config)(struct efx_nic *efx, bool user, 1456 const u32 *rx_indir_table, const u8 *key); 1457 int (*rx_pull_rss_config)(struct efx_nic *efx); 1458 int (*rx_push_rss_context_config)(struct efx_nic *efx, 1459 struct efx_rss_context_priv *ctx, 1460 const u32 *rx_indir_table, 1461 const u8 *key, bool delete); 1462 int (*rx_pull_rss_context_config)(struct efx_nic *efx, 1463 struct efx_rss_context *ctx); 1464 void (*rx_restore_rss_contexts)(struct efx_nic *efx); 1465 int (*rx_probe)(struct efx_rx_queue *rx_queue); 1466 void (*rx_init)(struct efx_rx_queue *rx_queue); 1467 void (*rx_remove)(struct efx_rx_queue *rx_queue); 1468 void (*rx_write)(struct efx_rx_queue *rx_queue); 1469 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue); 1470 void (*rx_packet)(struct efx_channel *channel); 1471 bool (*rx_buf_hash_valid)(const u8 *prefix); 1472 int (*ev_probe)(struct efx_channel *channel); 1473 int (*ev_init)(struct efx_channel *channel); 1474 void (*ev_fini)(struct efx_channel *channel); 1475 void (*ev_remove)(struct efx_channel *channel); 1476 int (*ev_process)(struct efx_channel *channel, int quota); 1477 void (*ev_read_ack)(struct efx_channel *channel); 1478 void (*ev_test_generate)(struct efx_channel *channel); 1479 int (*filter_table_probe)(struct efx_nic *efx); 1480 void (*filter_table_restore)(struct efx_nic *efx); 1481 void (*filter_table_remove)(struct efx_nic *efx); 1482 void (*filter_update_rx_scatter)(struct efx_nic *efx); 1483 s32 (*filter_insert)(struct efx_nic *efx, 1484 struct efx_filter_spec *spec, bool replace); 1485 int (*filter_remove_safe)(struct efx_nic *efx, 1486 enum efx_filter_priority priority, 1487 u32 filter_id); 1488 int (*filter_get_safe)(struct efx_nic *efx, 1489 enum efx_filter_priority priority, 1490 u32 filter_id, struct efx_filter_spec *); 1491 int (*filter_clear_rx)(struct efx_nic *efx, 1492 enum efx_filter_priority priority); 1493 u32 (*filter_count_rx_used)(struct efx_nic *efx, 1494 enum efx_filter_priority priority); 1495 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx); 1496 s32 (*filter_get_rx_ids)(struct efx_nic *efx, 1497 enum efx_filter_priority priority, 1498 u32 *buf, u32 size); 1499 #ifdef CONFIG_RFS_ACCEL 1500 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id, 1501 unsigned int index); 1502 #endif 1503 #ifdef CONFIG_SFC_MTD 1504 int (*mtd_probe)(struct efx_nic *efx); 1505 void (*mtd_rename)(struct efx_mtd_partition *part); 1506 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len, 1507 size_t *retlen, u8 *buffer); 1508 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len); 1509 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len, 1510 size_t *retlen, const u8 *buffer); 1511 int (*mtd_sync)(struct mtd_info *mtd); 1512 #endif 1513 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time); 1514 int (*ptp_set_ts_sync_events)(struct efx_nic *efx, bool en, bool temp); 1515 int (*ptp_set_ts_config)(struct efx_nic *efx, 1516 struct kernel_hwtstamp_config *init); 1517 int (*sriov_configure)(struct efx_nic *efx, int num_vfs); 1518 int (*vlan_rx_add_vid)(struct efx_nic *efx, __be16 proto, u16 vid); 1519 int (*vlan_rx_kill_vid)(struct efx_nic *efx, __be16 proto, u16 vid); 1520 int (*get_phys_port_id)(struct efx_nic *efx, 1521 struct netdev_phys_item_id *ppid); 1522 int (*sriov_init)(struct efx_nic *efx); 1523 void (*sriov_fini)(struct efx_nic *efx); 1524 bool (*sriov_wanted)(struct efx_nic *efx); 1525 int (*sriov_set_vf_mac)(struct efx_nic *efx, int vf_i, const u8 *mac); 1526 int (*sriov_set_vf_vlan)(struct efx_nic *efx, int vf_i, u16 vlan, 1527 u8 qos); 1528 int (*sriov_set_vf_spoofchk)(struct efx_nic *efx, int vf_i, 1529 bool spoofchk); 1530 int (*sriov_get_vf_config)(struct efx_nic *efx, int vf_i, 1531 struct ifla_vf_info *ivi); 1532 int (*sriov_set_vf_link_state)(struct efx_nic *efx, int vf_i, 1533 int link_state); 1534 int (*vswitching_probe)(struct efx_nic *efx); 1535 int (*vswitching_restore)(struct efx_nic *efx); 1536 void (*vswitching_remove)(struct efx_nic *efx); 1537 int (*get_mac_address)(struct efx_nic *efx, unsigned char *perm_addr); 1538 int (*set_mac_address)(struct efx_nic *efx); 1539 u32 (*tso_versions)(struct efx_nic *efx); 1540 int (*udp_tnl_push_ports)(struct efx_nic *efx); 1541 bool (*udp_tnl_has_port)(struct efx_nic *efx, __be16 port); 1542 size_t (*print_additional_fwver)(struct efx_nic *efx, char *buf, 1543 size_t len); 1544 void (*sensor_event)(struct efx_nic *efx, efx_qword_t *ev); 1545 unsigned int (*rx_recycle_ring_size)(const struct efx_nic *efx); 1546 1547 int revision; 1548 unsigned int txd_ptr_tbl_base; 1549 unsigned int rxd_ptr_tbl_base; 1550 unsigned int buf_tbl_base; 1551 unsigned int evq_ptr_tbl_base; 1552 unsigned int evq_rptr_tbl_base; 1553 u64 max_dma_mask; 1554 unsigned int rx_prefix_size; 1555 unsigned int rx_hash_offset; 1556 unsigned int rx_ts_offset; 1557 unsigned int rx_buffer_padding; 1558 bool can_rx_scatter; 1559 bool always_rx_scatter; 1560 bool option_descriptors; 1561 bool flash_auto_partition; 1562 unsigned int min_interrupt_mode; 1563 unsigned int timer_period_max; 1564 netdev_features_t offload_features; 1565 int mcdi_max_ver; 1566 unsigned int max_rx_ip_filters; 1567 u32 hwtstamp_filters; 1568 unsigned int rx_hash_key_size; 1569 }; 1570 1571 /************************************************************************** 1572 * 1573 * Prototypes and inline functions 1574 * 1575 *************************************************************************/ 1576 1577 static inline struct efx_channel * 1578 efx_get_channel(struct efx_nic *efx, unsigned index) 1579 { 1580 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_channels); 1581 return efx->channel[index]; 1582 } 1583 1584 /* Iterate over all used channels */ 1585 #define efx_for_each_channel(_channel, _efx) \ 1586 for (_channel = (_efx)->channel[0]; \ 1587 _channel; \ 1588 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \ 1589 (_efx)->channel[_channel->channel + 1] : NULL) 1590 1591 /* Iterate over all used channels in reverse */ 1592 #define efx_for_each_channel_rev(_channel, _efx) \ 1593 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \ 1594 _channel; \ 1595 _channel = _channel->channel ? \ 1596 (_efx)->channel[_channel->channel - 1] : NULL) 1597 1598 static inline struct efx_channel * 1599 efx_get_tx_channel(struct efx_nic *efx, unsigned int index) 1600 { 1601 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_tx_channels); 1602 return efx->channel[efx->tx_channel_offset + index]; 1603 } 1604 1605 static inline struct efx_channel * 1606 efx_get_xdp_channel(struct efx_nic *efx, unsigned int index) 1607 { 1608 EFX_WARN_ON_ONCE_PARANOID(index >= efx->n_xdp_channels); 1609 return efx->channel[efx->xdp_channel_offset + index]; 1610 } 1611 1612 static inline bool efx_channel_is_xdp_tx(struct efx_channel *channel) 1613 { 1614 return channel->channel - channel->efx->xdp_channel_offset < 1615 channel->efx->n_xdp_channels; 1616 } 1617 1618 static inline bool efx_channel_has_tx_queues(struct efx_channel *channel) 1619 { 1620 return channel && channel->channel >= channel->efx->tx_channel_offset; 1621 } 1622 1623 static inline unsigned int efx_channel_num_tx_queues(struct efx_channel *channel) 1624 { 1625 if (efx_channel_is_xdp_tx(channel)) 1626 return channel->efx->xdp_tx_per_channel; 1627 return channel->efx->tx_queues_per_channel; 1628 } 1629 1630 static inline struct efx_tx_queue * 1631 efx_channel_get_tx_queue(struct efx_channel *channel, unsigned int type) 1632 { 1633 EFX_WARN_ON_ONCE_PARANOID(type >= EFX_TXQ_TYPES); 1634 return channel->tx_queue_by_type[type]; 1635 } 1636 1637 static inline struct efx_tx_queue * 1638 efx_get_tx_queue(struct efx_nic *efx, unsigned int index, unsigned int type) 1639 { 1640 struct efx_channel *channel = efx_get_tx_channel(efx, index); 1641 1642 return efx_channel_get_tx_queue(channel, type); 1643 } 1644 1645 /* Iterate over all TX queues belonging to a channel */ 1646 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \ 1647 if (!efx_channel_has_tx_queues(_channel)) \ 1648 ; \ 1649 else \ 1650 for (_tx_queue = (_channel)->tx_queue; \ 1651 _tx_queue < (_channel)->tx_queue + \ 1652 efx_channel_num_tx_queues(_channel); \ 1653 _tx_queue++) 1654 1655 static inline bool efx_channel_has_rx_queue(struct efx_channel *channel) 1656 { 1657 return channel->rx_queue.core_index >= 0; 1658 } 1659 1660 static inline struct efx_rx_queue * 1661 efx_channel_get_rx_queue(struct efx_channel *channel) 1662 { 1663 EFX_WARN_ON_ONCE_PARANOID(!efx_channel_has_rx_queue(channel)); 1664 return &channel->rx_queue; 1665 } 1666 1667 /* Iterate over all RX queues belonging to a channel */ 1668 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \ 1669 if (!efx_channel_has_rx_queue(_channel)) \ 1670 ; \ 1671 else \ 1672 for (_rx_queue = &(_channel)->rx_queue; \ 1673 _rx_queue; \ 1674 _rx_queue = NULL) 1675 1676 static inline struct efx_channel * 1677 efx_rx_queue_channel(struct efx_rx_queue *rx_queue) 1678 { 1679 return container_of(rx_queue, struct efx_channel, rx_queue); 1680 } 1681 1682 static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue) 1683 { 1684 return efx_rx_queue_channel(rx_queue)->channel; 1685 } 1686 1687 /* Returns a pointer to the specified receive buffer in the RX 1688 * descriptor queue. 1689 */ 1690 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue, 1691 unsigned int index) 1692 { 1693 return &rx_queue->buffer[index]; 1694 } 1695 1696 static inline struct efx_rx_buffer * 1697 efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf) 1698 { 1699 if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask))) 1700 return efx_rx_buffer(rx_queue, 0); 1701 else 1702 return rx_buf + 1; 1703 } 1704 1705 #define EFX_FRAME_PAD 16 1706 1707 /** 1708 * EFX_MAX_FRAME_LEN - calculate maximum frame length 1709 * @mtu: MTU to calculate the maximum frame length for 1710 * 1711 * This calculates the maximum frame length that will be used for a 1712 * given MTU. The frame length will be equal to the MTU plus a 1713 * constant amount of header space and padding. This is the quantity 1714 * that the net driver will program into the MAC as the maximum frame 1715 * length. 1716 * 1717 * The 10G MAC requires 8-byte alignment on the frame 1718 * length, so we round up to the nearest 8. 1719 * 1720 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an 1721 * XGMII cycle). If the frame length reaches the maximum value in the 1722 * same cycle, the XMAC can miss the IPG altogether. We work around 1723 * this by adding a further 16 bytes (EFX_FRAME_PAD). 1724 */ 1725 #define EFX_MAX_FRAME_LEN(mtu) \ 1726 (ALIGN(((mtu) + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN + EFX_FRAME_PAD), 8)) 1727 1728 static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb) 1729 { 1730 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP; 1731 } 1732 static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb) 1733 { 1734 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1735 } 1736 1737 /* Get the max fill level of the TX queues on this channel */ 1738 static inline unsigned int 1739 efx_channel_tx_fill_level(struct efx_channel *channel) 1740 { 1741 struct efx_tx_queue *tx_queue; 1742 unsigned int fill_level = 0; 1743 1744 efx_for_each_channel_tx_queue(tx_queue, channel) 1745 fill_level = max(fill_level, 1746 tx_queue->insert_count - tx_queue->read_count); 1747 1748 return fill_level; 1749 } 1750 1751 /* Conservative approximation of efx_channel_tx_fill_level using cached value */ 1752 static inline unsigned int 1753 efx_channel_tx_old_fill_level(struct efx_channel *channel) 1754 { 1755 struct efx_tx_queue *tx_queue; 1756 unsigned int fill_level = 0; 1757 1758 efx_for_each_channel_tx_queue(tx_queue, channel) 1759 fill_level = max(fill_level, 1760 tx_queue->insert_count - tx_queue->old_read_count); 1761 1762 return fill_level; 1763 } 1764 1765 /* Get all supported features. 1766 * If a feature is not fixed, it is present in hw_features. 1767 * If a feature is fixed, it does not present in hw_features, but 1768 * always in features. 1769 */ 1770 static inline netdev_features_t efx_supported_features(const struct efx_nic *efx) 1771 { 1772 const struct net_device *net_dev = efx->net_dev; 1773 1774 return net_dev->features | net_dev->hw_features; 1775 } 1776 1777 /* Get the current TX queue insert index. */ 1778 static inline unsigned int 1779 efx_tx_queue_get_insert_index(const struct efx_tx_queue *tx_queue) 1780 { 1781 return tx_queue->insert_count & tx_queue->ptr_mask; 1782 } 1783 1784 /* Get a TX buffer. */ 1785 static inline struct efx_tx_buffer * 1786 __efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 1787 { 1788 return &tx_queue->buffer[efx_tx_queue_get_insert_index(tx_queue)]; 1789 } 1790 1791 /* Get a TX buffer, checking it's not currently in use. */ 1792 static inline struct efx_tx_buffer * 1793 efx_tx_queue_get_insert_buffer(const struct efx_tx_queue *tx_queue) 1794 { 1795 struct efx_tx_buffer *buffer = 1796 __efx_tx_queue_get_insert_buffer(tx_queue); 1797 1798 EFX_WARN_ON_ONCE_PARANOID(buffer->len); 1799 EFX_WARN_ON_ONCE_PARANOID(buffer->flags); 1800 EFX_WARN_ON_ONCE_PARANOID(buffer->unmap_len); 1801 1802 return buffer; 1803 } 1804 1805 #endif /* EFX_NET_DRIVER_H */ 1806