1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25
26 #include <subdev/gsp.h>
27
28 const struct nvkm_intr_data
29 gp100_mc_intrs[] = {
30 { NVKM_ENGINE_DISP , 0, 0, 0x04000000, true },
31 { NVKM_ENGINE_FIFO , 0, 0, 0x00000100 },
32 { NVKM_SUBDEV_FAULT , 0, 0, 0x00000200, true },
33 { NVKM_SUBDEV_PRIVRING, 0, 0, 0x40000000, true },
34 { NVKM_SUBDEV_BUS , 0, 0, 0x10000000, true },
35 { NVKM_SUBDEV_FB , 0, 0, 0x08002000, true },
36 { NVKM_SUBDEV_LTC , 0, 0, 0x02000000, true },
37 { NVKM_SUBDEV_PMU , 0, 0, 0x01000000, true },
38 { NVKM_SUBDEV_GPIO , 0, 0, 0x00200000, true },
39 { NVKM_SUBDEV_I2C , 0, 0, 0x00200000, true },
40 { NVKM_SUBDEV_TIMER , 0, 0, 0x00100000, true },
41 { NVKM_SUBDEV_THERM , 0, 0, 0x00040000, true },
42 { NVKM_SUBDEV_TOP , 0, 0, 0x00009000 },
43 { NVKM_SUBDEV_TOP , 0, 0, 0xffff6fff, true },
44 {},
45 };
46
47 static void
gp100_mc_intr_allow(struct nvkm_intr * intr,int leaf,u32 mask)48 gp100_mc_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask)
49 {
50 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
51
52 nvkm_wr32(mc->subdev.device, 0x000160 + (leaf * 4), mask);
53 }
54
55 static void
gp100_mc_intr_block(struct nvkm_intr * intr,int leaf,u32 mask)56 gp100_mc_intr_block(struct nvkm_intr *intr, int leaf, u32 mask)
57 {
58 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr);
59
60 nvkm_wr32(mc->subdev.device, 0x000180 + (leaf * 4), mask);
61 }
62
63 static void
gp100_mc_intr_rearm(struct nvkm_intr * intr)64 gp100_mc_intr_rearm(struct nvkm_intr *intr)
65 {
66 int i;
67
68 for (i = 0; i < intr->leaves; i++)
69 intr->func->allow(intr, i, intr->mask[i]);
70 }
71
72 static void
gp100_mc_intr_unarm(struct nvkm_intr * intr)73 gp100_mc_intr_unarm(struct nvkm_intr *intr)
74 {
75 int i;
76
77 for (i = 0; i < intr->leaves; i++)
78 intr->func->block(intr, i, 0xffffffff);
79 }
80
81 const struct nvkm_intr_func
82 gp100_mc_intr = {
83 .pending = nv04_mc_intr_pending,
84 .unarm = gp100_mc_intr_unarm,
85 .rearm = gp100_mc_intr_rearm,
86 .block = gp100_mc_intr_block,
87 .allow = gp100_mc_intr_allow,
88 };
89
90 static const struct nvkm_mc_func
91 gp100_mc = {
92 .init = nv50_mc_init,
93 .intr = &gp100_mc_intr,
94 .intrs = gp100_mc_intrs,
95 .intr_nonstall = true,
96 .device = &nv04_mc_device,
97 .reset = gk104_mc_reset,
98 };
99
100 int
gp100_mc_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_mc ** pmc)101 gp100_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
102 {
103 if (nvkm_gsp_rm(device->gsp))
104 return -ENODEV;
105
106 return nvkm_mc_new_(&gp100_mc, device, type, inst, pmc);
107 }
108