1 /*
2 * Copyright 2016 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
24 #include "ctxgf100.h"
25
26 #include <subdev/fb.h>
27
28 /*******************************************************************************
29 * PGRAPH context implementation
30 ******************************************************************************/
31
32 void
gp100_grctx_generate_pagepool(struct gf100_gr_chan * chan,u64 addr)33 gp100_grctx_generate_pagepool(struct gf100_gr_chan *chan, u64 addr)
34 {
35 gf100_grctx_patch_wr32(chan, 0x40800c, addr >> 8);
36 gf100_grctx_patch_wr32(chan, 0x408010, 0x8007d800);
37 gf100_grctx_patch_wr32(chan, 0x419004, addr >> 8);
38 gf100_grctx_patch_wr32(chan, 0x419008, 0x00000000);
39 }
40
41 static void
gp100_grctx_generate_attrib(struct gf100_gr_chan * chan)42 gp100_grctx_generate_attrib(struct gf100_gr_chan *chan)
43 {
44 struct gf100_gr *gr = chan->gr;
45 const struct gf100_grctx_func *grctx = gr->func->grctx;
46 const u32 alpha = grctx->alpha_nr;
47 const u32 attrib = grctx->attrib_nr;
48 const int max_batches = 0xffff;
49 u32 size = grctx->alpha_nr_max * gr->tpc_total;
50 u32 ao = 0;
51 u32 bo = ao + size;
52 int gpc, ppc, n = 0;
53
54 gf100_grctx_patch_wr32(chan, 0x405830, attrib);
55 gf100_grctx_patch_wr32(chan, 0x40585c, alpha);
56 gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);
57
58 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
59 for (ppc = 0; ppc < gr->func->ppc_nr; ppc++, n++) {
60 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc];
61 const u32 bs = attrib * gr->ppc_tpc_max;
62 const u32 u = 0x418ea0 + (n * 0x04);
63 const u32 o = PPC_UNIT(gpc, ppc, 0);
64
65 if (!(gr->ppc_mask[gpc] & (1 << ppc)))
66 continue;
67
68 gf100_grctx_patch_wr32(chan, o + 0xc0, bs);
69 gf100_grctx_patch_wr32(chan, o + 0xf4, bo);
70 gf100_grctx_patch_wr32(chan, o + 0xf0, bs);
71 bo += grctx->attrib_nr_max * gr->ppc_tpc_max;
72 gf100_grctx_patch_wr32(chan, o + 0xe4, as);
73 gf100_grctx_patch_wr32(chan, o + 0xf8, ao);
74 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc];
75 gf100_grctx_patch_wr32(chan, u, bs);
76 }
77 }
78
79 gf100_grctx_patch_wr32(chan, 0x418eec, 0x00000000);
80 gf100_grctx_patch_wr32(chan, 0x41befc, 0x00000000);
81 }
82
83 void
gp100_grctx_generate_attrib_cb(struct gf100_gr_chan * chan,u64 addr,u32 size)84 gp100_grctx_generate_attrib_cb(struct gf100_gr_chan *chan, u64 addr, u32 size)
85 {
86 gm107_grctx_generate_attrib_cb(chan, addr, size);
87
88 gf100_grctx_patch_wr32(chan, 0x419b00, 0x00000000 | addr >> 12);
89 gf100_grctx_patch_wr32(chan, 0x419b04, 0x80000000 | size >> 7);
90 }
91
92 static u32
gp100_grctx_generate_attrib_cb_size(struct gf100_gr * gr)93 gp100_grctx_generate_attrib_cb_size(struct gf100_gr *gr)
94 {
95 const struct gf100_grctx_func *grctx = gr->func->grctx;
96 u32 size = grctx->alpha_nr_max * gr->tpc_total;
97 int gpc;
98
99 for (gpc = 0; gpc < gr->gpc_nr; gpc++)
100 size += grctx->attrib_nr_max * gr->func->ppc_nr * gr->ppc_tpc_max;
101
102 return ((size * 0x20) + 128) & ~127;
103 }
104
105 void
gp100_grctx_generate_smid_config(struct gf100_gr * gr)106 gp100_grctx_generate_smid_config(struct gf100_gr *gr)
107 {
108 struct nvkm_device *device = gr->base.engine.subdev.device;
109 const u32 dist_nr = DIV_ROUND_UP(gr->tpc_total, 4);
110 u32 dist[TPC_MAX / 4] = {}, gpcs[16] = {};
111 u8 sm, i;
112
113 for (sm = 0; sm < gr->sm_nr; sm++) {
114 const u8 gpc = gr->sm[sm].gpc;
115 const u8 tpc = gr->sm[sm].tpc;
116 dist[sm / 4] |= ((gpc << 4) | tpc) << ((sm % 4) * 8);
117 gpcs[gpc + (gr->func->gpc_nr * (tpc / 4))] |= sm << ((tpc % 4) * 8);
118 }
119
120 for (i = 0; i < dist_nr; i++)
121 nvkm_wr32(device, 0x405b60 + (i * 4), dist[i]);
122 for (i = 0; i < ARRAY_SIZE(gpcs); i++)
123 nvkm_wr32(device, 0x405ba0 + (i * 4), gpcs[i]);
124 }
125
126 const struct gf100_grctx_func
127 gp100_grctx = {
128 .main = gf100_grctx_generate_main,
129 .unkn = gk104_grctx_generate_unkn,
130 .bundle = gm107_grctx_generate_bundle,
131 .bundle_size = 0x3000,
132 .bundle_min_gpm_fifo_depth = 0x180,
133 .bundle_token_limit = 0x1080,
134 .pagepool = gp100_grctx_generate_pagepool,
135 .pagepool_size = 0x20000,
136 .attrib_cb_size = gp100_grctx_generate_attrib_cb_size,
137 .attrib_cb = gp100_grctx_generate_attrib_cb,
138 .attrib = gp100_grctx_generate_attrib,
139 .attrib_nr_max = 0x660,
140 .attrib_nr = 0x440,
141 .alpha_nr_max = 0xc00,
142 .alpha_nr = 0x800,
143 .sm_id = gm107_grctx_generate_sm_id,
144 .rop_mapping = gf117_grctx_generate_rop_mapping,
145 .dist_skip_table = gm200_grctx_generate_dist_skip_table,
146 .r406500 = gm200_grctx_generate_r406500,
147 .gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,
148 .tpc_mask = gm200_grctx_generate_tpc_mask,
149 .smid_config = gp100_grctx_generate_smid_config,
150 .r419a3c = gm200_grctx_generate_r419a3c,
151 };
152