xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1 /*
2  * Copyright 2018 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Lyude Paul
23  */
24 #include <core/device.h>
25 
26 #include "priv.h"
27 #include "gk104.h"
28 
29 void
gk104_clkgate_enable(struct nvkm_therm * base)30 gk104_clkgate_enable(struct nvkm_therm *base)
31 {
32 	struct gk104_therm *therm = gk104_therm(base);
33 	struct nvkm_device *dev = therm->base.subdev.device;
34 	const struct gk104_clkgate_engine_info *order = therm->clkgate_order;
35 	int i;
36 
37 	/* Program ENG_MANT, ENG_FILTER */
38 	for (i = 0; order[i].type != NVKM_SUBDEV_NR; i++) {
39 		if (!nvkm_device_subdev(dev, order[i].type, order[i].inst))
40 			continue;
41 
42 		nvkm_mask(dev, 0x20200 + order[i].offset, 0xff00, 0x4500);
43 	}
44 
45 	/* magic */
46 	nvkm_wr32(dev, 0x020288, therm->idle_filter->fecs);
47 	nvkm_wr32(dev, 0x02028c, therm->idle_filter->hubmmu);
48 
49 	/* Enable clockgating (ENG_CLK = RUN->AUTO) */
50 	for (i = 0; order[i].type != NVKM_SUBDEV_NR; i++) {
51 		if (!nvkm_device_subdev(dev, order[i].type, order[i].inst))
52 			continue;
53 
54 		nvkm_mask(dev, 0x20200 + order[i].offset, 0x00ff, 0x0045);
55 	}
56 }
57 
58 void
gk104_clkgate_fini(struct nvkm_therm * base,bool suspend)59 gk104_clkgate_fini(struct nvkm_therm *base, bool suspend)
60 {
61 	struct gk104_therm *therm = gk104_therm(base);
62 	struct nvkm_device *dev = therm->base.subdev.device;
63 	const struct gk104_clkgate_engine_info *order = therm->clkgate_order;
64 	int i;
65 
66 	/* ENG_CLK = AUTO->RUN, ENG_PWR = RUN->AUTO */
67 	for (i = 0; order[i].type != NVKM_SUBDEV_NR; i++) {
68 		if (!nvkm_device_subdev(dev, order[i].type, order[i].inst))
69 			continue;
70 
71 		nvkm_mask(dev, 0x20200 + order[i].offset, 0xff, 0x54);
72 	}
73 }
74 
75 const struct gk104_clkgate_engine_info gk104_clkgate_engine_info[] = {
76 	{ NVKM_ENGINE_GR,     0, 0x00 },
77 	{ NVKM_ENGINE_MSPDEC, 0, 0x04 },
78 	{ NVKM_ENGINE_MSPPP,  0, 0x08 },
79 	{ NVKM_ENGINE_MSVLD,  0, 0x0c },
80 	{ NVKM_ENGINE_CE,     0, 0x10 },
81 	{ NVKM_ENGINE_CE,     1, 0x14 },
82 	{ NVKM_ENGINE_MSENC,  0, 0x18 },
83 	{ NVKM_ENGINE_CE,     2, 0x1c },
84 	{ NVKM_SUBDEV_NR },
85 };
86 
87 const struct gf100_idle_filter gk104_idle_filter = {
88 	.fecs = 0x00001000,
89 	.hubmmu = 0x00001000,
90 };
91 
92 static const struct nvkm_therm_func
93 gk104_therm_func = {
94 	.init = gf119_therm_init,
95 	.fini = g84_therm_fini,
96 	.pwm_ctrl = gf119_fan_pwm_ctrl,
97 	.pwm_get = gf119_fan_pwm_get,
98 	.pwm_set = gf119_fan_pwm_set,
99 	.pwm_clock = gf119_fan_pwm_clock,
100 	.temp_get = g84_temp_get,
101 	.fan_sense = gt215_therm_fan_sense,
102 	.program_alarms = nvkm_therm_program_alarms_polling,
103 	.clkgate_init = gf100_clkgate_init,
104 	.clkgate_enable = gk104_clkgate_enable,
105 	.clkgate_fini = gk104_clkgate_fini,
106 };
107 
108 static int
gk104_therm_new_(const struct nvkm_therm_func * func,struct nvkm_device * device,enum nvkm_subdev_type type,int inst,const struct gk104_clkgate_engine_info * clkgate_order,const struct gf100_idle_filter * idle_filter,struct nvkm_therm ** ptherm)109 gk104_therm_new_(const struct nvkm_therm_func *func, struct nvkm_device *device,
110 		 enum nvkm_subdev_type type, int inst,
111 		 const struct gk104_clkgate_engine_info *clkgate_order,
112 		 const struct gf100_idle_filter *idle_filter,
113 		 struct nvkm_therm **ptherm)
114 {
115 	struct gk104_therm *therm = kzalloc(sizeof(*therm), GFP_KERNEL);
116 
117 	if (!therm)
118 		return -ENOMEM;
119 
120 	nvkm_therm_ctor(&therm->base, device, type, inst, func);
121 	*ptherm = &therm->base;
122 	therm->clkgate_order = clkgate_order;
123 	therm->idle_filter = idle_filter;
124 	return 0;
125 }
126 
127 int
gk104_therm_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_therm ** ptherm)128 gk104_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_therm **ptherm)
129 {
130 	return gk104_therm_new_(&gk104_therm_func, device, type, inst,
131 				gk104_clkgate_engine_info, &gk104_idle_filter,
132 				ptherm);
133 }
134