xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gh100.c (revision 3f1c07fc21c68bd3bd2df9d2c9441f6485e934d9)
1 /* SPDX-License-Identifier: MIT
2  *
3  * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
4  */
5 #include "priv.h"
6 
7 #include <nvhw/drf.h>
8 #include <nvhw/ref/gh100/dev_fb.h>
9 
10 static void
gh100_fb_sysmem_flush_page_init(struct nvkm_fb * fb)11 gh100_fb_sysmem_flush_page_init(struct nvkm_fb *fb)
12 {
13 	const u64 addr = fb->sysmem.flush_page_addr >> NV_PFB_NISO_FLUSH_SYSMEM_ADDR_SHIFT;
14 	struct nvkm_device *device = fb->subdev.device;
15 
16 	// Ensure that the address is within hardware limits
17 	WARN_ON(fb->sysmem.flush_page_addr > DMA_BIT_MASK(52));
18 
19 	nvkm_wr32(device, NV_PFB_FBHUB_PCIE_FLUSH_SYSMEM_ADDR_HI, upper_32_bits(addr));
20 	nvkm_wr32(device, NV_PFB_FBHUB_PCIE_FLUSH_SYSMEM_ADDR_LO, lower_32_bits(addr));
21 }
22 
23 static const struct nvkm_fb_func
24 gh100_fb = {
25 	.sysmem.flush_page_init = gh100_fb_sysmem_flush_page_init,
26 	.vidmem.size = ga102_fb_vidmem_size,
27 };
28 
29 int
gh100_fb_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_fb ** pfb)30 gh100_fb_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_fb **pfb)
31 {
32 	return r535_fb_new(&gh100_fb, device, type, inst, pfb);
33 }
34