xref: /linux/sound/soc/samsung/i2s.c (revision 67f8bc848ee31831336bd478e57d2f993551902e)
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // ALSA SoC Audio Layer - Samsung I2S Controller driver
4 //
5 // Copyright (c) 2010 Samsung Electronics Co. Ltd.
6 //	Jaswinder Singh <jassisinghbrar@gmail.com>
7 
8 #include <dt-bindings/sound/samsung-i2s.h>
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/cleanup.h>
12 #include <linux/clk.h>
13 #include <linux/clk-provider.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/pm_runtime.h>
18 
19 #include <sound/soc.h>
20 #include <sound/pcm_params.h>
21 
22 #include <linux/platform_data/asoc-s3c.h>
23 
24 #include "dma.h"
25 #include "idma.h"
26 #include "i2s.h"
27 #include "i2s-regs.h"
28 
29 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
30 
31 #define SAMSUNG_I2S_ID_PRIMARY		1
32 #define SAMSUNG_I2S_ID_SECONDARY	2
33 
34 struct samsung_i2s_variant_regs {
35 	unsigned int	bfs_off;
36 	unsigned int	rfs_off;
37 	unsigned int	sdf_off;
38 	unsigned int	txr_off;
39 	unsigned int	rclksrc_off;
40 	unsigned int	mss_off;
41 	unsigned int	cdclkcon_off;
42 	unsigned int	lrp_off;
43 	unsigned int	bfs_mask;
44 	unsigned int	rfs_mask;
45 	unsigned int	ftx0cnt_off;
46 };
47 
48 struct samsung_i2s_dai_data {
49 	u32 quirks;
50 	unsigned int pcm_rates;
51 	const struct samsung_i2s_variant_regs *i2s_variant_regs;
52 	void (*fixup_early)(struct snd_pcm_substream *substream,
53 					struct snd_soc_dai *dai);
54 	void (*fixup_late)(struct snd_pcm_substream *substream,
55 					struct snd_soc_dai *dai);
56 };
57 
58 struct i2s_dai {
59 	/* Platform device for this DAI */
60 	struct platform_device *pdev;
61 
62 	/* Frame clock */
63 	unsigned frmclk;
64 	/*
65 	 * Specifically requested RCLK, BCLK by machine driver.
66 	 * 0 indicates CPU driver is free to choose any value.
67 	 */
68 	unsigned rfs, bfs;
69 	/* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
70 	struct i2s_dai *pri_dai;
71 	/* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
72 	struct i2s_dai *sec_dai;
73 
74 #define DAI_OPENED	(1 << 0) /* DAI is opened */
75 #define DAI_MANAGER	(1 << 1) /* DAI is the manager */
76 	unsigned mode;
77 
78 	/* Driver for this DAI */
79 	struct snd_soc_dai_driver *drv;
80 
81 	/* DMA parameters */
82 	struct snd_dmaengine_dai_dma_data dma_playback;
83 	struct snd_dmaengine_dai_dma_data dma_capture;
84 	struct snd_dmaengine_dai_dma_data idma_playback;
85 	dma_filter_fn filter;
86 
87 	struct samsung_i2s_priv *priv;
88 };
89 
90 struct samsung_i2s_priv {
91 	struct platform_device *pdev;
92 	struct platform_device *pdev_sec;
93 
94 	/* Lock for cross interface checks */
95 	spinlock_t pcm_lock;
96 
97 	/* CPU DAIs and their corresponding drivers */
98 	struct i2s_dai *dai;
99 	struct snd_soc_dai_driver *dai_drv;
100 	int num_dais;
101 
102 	/* The I2S controller's core clock */
103 	struct clk *clk;
104 
105 	/* Clock for generating I2S signals */
106 	struct clk *op_clk;
107 
108 	/* Rate of RCLK source clock */
109 	unsigned long rclk_srcrate;
110 
111 	/* Cache of selected I2S registers for system suspend */
112 	u32 suspend_i2smod;
113 	u32 suspend_i2scon;
114 	u32 suspend_i2spsr;
115 
116 	const struct samsung_i2s_variant_regs *variant_regs;
117 	void (*fixup_early)(struct snd_pcm_substream *substream,
118 						struct snd_soc_dai *dai);
119 	void (*fixup_late)(struct snd_pcm_substream *substream,
120 						struct snd_soc_dai *dai);
121 	u32 quirks;
122 
123 	/* The clock provider's data */
124 	struct clk *clk_table[3];
125 	struct clk_onecell_data clk_data;
126 
127 	/* Spinlock protecting member fields below */
128 	spinlock_t lock;
129 
130 	/* Memory mapped SFR region */
131 	void __iomem *addr;
132 
133 	/* A flag indicating the I2S slave mode operation */
134 	bool slave_mode;
135 };
136 
137 /* Returns true if this is the 'overlay' stereo DAI */
138 static inline bool is_secondary(struct i2s_dai *i2s)
139 {
140 	return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY;
141 }
142 
143 /* If this interface of the controller is transmitting data */
144 static inline bool tx_active(struct i2s_dai *i2s)
145 {
146 	u32 active;
147 
148 	if (!i2s)
149 		return false;
150 
151 	active = readl(i2s->priv->addr + I2SCON);
152 
153 	if (is_secondary(i2s))
154 		active &= CON_TXSDMA_ACTIVE;
155 	else
156 		active &= CON_TXDMA_ACTIVE;
157 
158 	return active ? true : false;
159 }
160 
161 /* Return pointer to the other DAI */
162 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
163 {
164 	return i2s->pri_dai ? : i2s->sec_dai;
165 }
166 
167 /* If the other interface of the controller is transmitting data */
168 static inline bool other_tx_active(struct i2s_dai *i2s)
169 {
170 	struct i2s_dai *other = get_other_dai(i2s);
171 
172 	return tx_active(other);
173 }
174 
175 /* If any interface of the controller is transmitting data */
176 static inline bool any_tx_active(struct i2s_dai *i2s)
177 {
178 	return tx_active(i2s) || other_tx_active(i2s);
179 }
180 
181 /* If this interface of the controller is receiving data */
182 static inline bool rx_active(struct i2s_dai *i2s)
183 {
184 	u32 active;
185 
186 	if (!i2s)
187 		return false;
188 
189 	active = readl(i2s->priv->addr + I2SCON) & CON_RXDMA_ACTIVE;
190 
191 	return active ? true : false;
192 }
193 
194 /* If the other interface of the controller is receiving data */
195 static inline bool other_rx_active(struct i2s_dai *i2s)
196 {
197 	struct i2s_dai *other = get_other_dai(i2s);
198 
199 	return rx_active(other);
200 }
201 
202 /* If any interface of the controller is receiving data */
203 static inline bool any_rx_active(struct i2s_dai *i2s)
204 {
205 	return rx_active(i2s) || other_rx_active(i2s);
206 }
207 
208 /* If the other DAI is transmitting or receiving data */
209 static inline bool other_active(struct i2s_dai *i2s)
210 {
211 	return other_rx_active(i2s) || other_tx_active(i2s);
212 }
213 
214 /* If this DAI is transmitting or receiving data */
215 static inline bool this_active(struct i2s_dai *i2s)
216 {
217 	return tx_active(i2s) || rx_active(i2s);
218 }
219 
220 /* If the controller is active anyway */
221 static inline bool any_active(struct i2s_dai *i2s)
222 {
223 	return this_active(i2s) || other_active(i2s);
224 }
225 
226 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
227 {
228 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
229 
230 	return &priv->dai[dai->id - 1];
231 }
232 
233 static inline bool is_opened(struct i2s_dai *i2s)
234 {
235 	if (i2s && (i2s->mode & DAI_OPENED))
236 		return true;
237 	else
238 		return false;
239 }
240 
241 static inline bool is_manager(struct i2s_dai *i2s)
242 {
243 	if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
244 		return true;
245 	else
246 		return false;
247 }
248 
249 /* Read RCLK of I2S (in multiples of LRCLK) */
250 static inline unsigned get_rfs(struct i2s_dai *i2s)
251 {
252 	struct samsung_i2s_priv *priv = i2s->priv;
253 	u32 rfs;
254 
255 	rfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->rfs_off;
256 	rfs &= priv->variant_regs->rfs_mask;
257 
258 	switch (rfs) {
259 	case 7: return 192;
260 	case 6: return 96;
261 	case 5: return 128;
262 	case 4: return 64;
263 	case 3:	return 768;
264 	case 2: return 384;
265 	case 1:	return 512;
266 	default: return 256;
267 	}
268 }
269 
270 /* Write RCLK of I2S (in multiples of LRCLK) */
271 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
272 {
273 	struct samsung_i2s_priv *priv = i2s->priv;
274 	u32 mod = readl(priv->addr + I2SMOD);
275 	int rfs_shift = priv->variant_regs->rfs_off;
276 
277 	mod &= ~(priv->variant_regs->rfs_mask << rfs_shift);
278 
279 	switch (rfs) {
280 	case 192:
281 		mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
282 		break;
283 	case 96:
284 		mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
285 		break;
286 	case 128:
287 		mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
288 		break;
289 	case 64:
290 		mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
291 		break;
292 	case 768:
293 		mod |= (MOD_RCLK_768FS << rfs_shift);
294 		break;
295 	case 512:
296 		mod |= (MOD_RCLK_512FS << rfs_shift);
297 		break;
298 	case 384:
299 		mod |= (MOD_RCLK_384FS << rfs_shift);
300 		break;
301 	default:
302 		mod |= (MOD_RCLK_256FS << rfs_shift);
303 		break;
304 	}
305 
306 	writel(mod, priv->addr + I2SMOD);
307 }
308 
309 /* Read bit-clock of I2S (in multiples of LRCLK) */
310 static inline unsigned get_bfs(struct i2s_dai *i2s)
311 {
312 	struct samsung_i2s_priv *priv = i2s->priv;
313 	u32 bfs;
314 
315 	bfs = readl(priv->addr + I2SMOD) >> priv->variant_regs->bfs_off;
316 	bfs &= priv->variant_regs->bfs_mask;
317 
318 	switch (bfs) {
319 	case 8: return 256;
320 	case 7: return 192;
321 	case 6: return 128;
322 	case 5: return 96;
323 	case 4: return 64;
324 	case 3: return 24;
325 	case 2: return 16;
326 	case 1:	return 48;
327 	default: return 32;
328 	}
329 }
330 
331 /* Write bit-clock of I2S (in multiples of LRCLK) */
332 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
333 {
334 	struct samsung_i2s_priv *priv = i2s->priv;
335 	u32 mod = readl(priv->addr + I2SMOD);
336 	int tdm = priv->quirks & QUIRK_SUPPORTS_TDM;
337 	int bfs_shift = priv->variant_regs->bfs_off;
338 
339 	/* Non-TDM I2S controllers do not support BCLK > 48 * FS */
340 	if (!tdm && bfs > 48) {
341 		dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
342 		return;
343 	}
344 
345 	mod &= ~(priv->variant_regs->bfs_mask << bfs_shift);
346 
347 	switch (bfs) {
348 	case 48:
349 		mod |= (MOD_BCLK_48FS << bfs_shift);
350 		break;
351 	case 32:
352 		mod |= (MOD_BCLK_32FS << bfs_shift);
353 		break;
354 	case 24:
355 		mod |= (MOD_BCLK_24FS << bfs_shift);
356 		break;
357 	case 16:
358 		mod |= (MOD_BCLK_16FS << bfs_shift);
359 		break;
360 	case 64:
361 		mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
362 		break;
363 	case 96:
364 		mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
365 		break;
366 	case 128:
367 		mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
368 		break;
369 	case 192:
370 		mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
371 		break;
372 	case 256:
373 		mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
374 		break;
375 	default:
376 		dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
377 		return;
378 	}
379 
380 	writel(mod, priv->addr + I2SMOD);
381 }
382 
383 /* Sample size */
384 static inline int get_blc(struct i2s_dai *i2s)
385 {
386 	int blc = readl(i2s->priv->addr + I2SMOD);
387 
388 	blc = (blc >> 13) & 0x3;
389 
390 	switch (blc) {
391 	case 2: return 24;
392 	case 1:	return 8;
393 	default: return 16;
394 	}
395 }
396 
397 /* TX channel control */
398 static void i2s_txctrl(struct i2s_dai *i2s, int on)
399 {
400 	struct samsung_i2s_priv *priv = i2s->priv;
401 	void __iomem *addr = priv->addr;
402 	int txr_off = priv->variant_regs->txr_off;
403 	u32 con = readl(addr + I2SCON);
404 	u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
405 
406 	if (on) {
407 		con |= CON_ACTIVE;
408 		con &= ~CON_TXCH_PAUSE;
409 
410 		if (is_secondary(i2s)) {
411 			con |= CON_TXSDMA_ACTIVE;
412 			con &= ~CON_TXSDMA_PAUSE;
413 		} else {
414 			con |= CON_TXDMA_ACTIVE;
415 			con &= ~CON_TXDMA_PAUSE;
416 		}
417 
418 		if (any_rx_active(i2s))
419 			mod |= 2 << txr_off;
420 		else
421 			mod |= 0 << txr_off;
422 	} else {
423 		if (is_secondary(i2s)) {
424 			con |=  CON_TXSDMA_PAUSE;
425 			con &= ~CON_TXSDMA_ACTIVE;
426 		} else {
427 			con |=  CON_TXDMA_PAUSE;
428 			con &= ~CON_TXDMA_ACTIVE;
429 		}
430 
431 		if (other_tx_active(i2s)) {
432 			writel(con, addr + I2SCON);
433 			return;
434 		}
435 
436 		con |=  CON_TXCH_PAUSE;
437 
438 		if (any_rx_active(i2s))
439 			mod |= 1 << txr_off;
440 		else
441 			con &= ~CON_ACTIVE;
442 	}
443 
444 	writel(mod, addr + I2SMOD);
445 	writel(con, addr + I2SCON);
446 }
447 
448 /* RX Channel Control */
449 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
450 {
451 	struct samsung_i2s_priv *priv = i2s->priv;
452 	void __iomem *addr = priv->addr;
453 	int txr_off = priv->variant_regs->txr_off;
454 	u32 con = readl(addr + I2SCON);
455 	u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
456 
457 	if (on) {
458 		con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
459 		con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
460 
461 		if (any_tx_active(i2s))
462 			mod |= 2 << txr_off;
463 		else
464 			mod |= 1 << txr_off;
465 	} else {
466 		con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
467 		con &= ~CON_RXDMA_ACTIVE;
468 
469 		if (any_tx_active(i2s))
470 			mod |= 0 << txr_off;
471 		else
472 			con &= ~CON_ACTIVE;
473 	}
474 
475 	writel(mod, addr + I2SMOD);
476 	writel(con, addr + I2SCON);
477 }
478 
479 /* Flush FIFO of an interface */
480 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
481 {
482 	void __iomem *fic;
483 	u32 val;
484 
485 	if (!i2s)
486 		return;
487 
488 	if (is_secondary(i2s))
489 		fic = i2s->priv->addr + I2SFICS;
490 	else
491 		fic = i2s->priv->addr + I2SFIC;
492 
493 	/* Flush the FIFO */
494 	writel(readl(fic) | flush, fic);
495 
496 	/* Be patient */
497 	val = msecs_to_loops(1) / 1000; /* 1 usec */
498 	while (--val)
499 		cpu_relax();
500 
501 	writel(readl(fic) & ~flush, fic);
502 }
503 
504 static int i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int rfs,
505 			  int dir)
506 {
507 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
508 	struct i2s_dai *i2s = to_info(dai);
509 	struct i2s_dai *other = get_other_dai(i2s);
510 	const struct samsung_i2s_variant_regs *i2s_regs = priv->variant_regs;
511 	unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
512 	unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
513 	u32 mod, mask, val = 0;
514 	int ret = 0;
515 
516 	guard(pm_runtime_active)(dai->dev);
517 
518 	scoped_guard(spinlock_irqsave, &priv->lock)
519 		mod = readl(priv->addr + I2SMOD);
520 
521 
522 	switch (clk_id) {
523 	case SAMSUNG_I2S_OPCLK:
524 		mask = MOD_OPCLK_MASK;
525 		val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
526 		break;
527 	case SAMSUNG_I2S_CDCLK:
528 		mask = 1 << i2s_regs->cdclkcon_off;
529 		/* Shouldn't matter in GATING(CLOCK_IN) mode */
530 		if (dir == SND_SOC_CLOCK_IN)
531 			rfs = 0;
532 
533 		if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
534 				(any_active(i2s) &&
535 				(((dir == SND_SOC_CLOCK_IN)
536 					&& !(mod & cdcon_mask)) ||
537 				((dir == SND_SOC_CLOCK_OUT)
538 					&& (mod & cdcon_mask))))) {
539 			dev_err(&i2s->pdev->dev,
540 				"%s:%d Other DAI busy\n", __func__, __LINE__);
541 			return -EAGAIN;
542 		}
543 
544 		if (dir == SND_SOC_CLOCK_IN)
545 			val = 1 << i2s_regs->cdclkcon_off;
546 
547 		i2s->rfs = rfs;
548 		break;
549 
550 	case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
551 	case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
552 		mask = 1 << i2s_regs->rclksrc_off;
553 
554 		if ((priv->quirks & QUIRK_NO_MUXPSR)
555 				|| (clk_id == SAMSUNG_I2S_RCLKSRC_0))
556 			clk_id = 0;
557 		else
558 			clk_id = 1;
559 
560 		if (!any_active(i2s)) {
561 			if (priv->op_clk && !IS_ERR(priv->op_clk)) {
562 				if ((clk_id && !(mod & rsrc_mask)) ||
563 					(!clk_id && (mod & rsrc_mask))) {
564 					clk_disable_unprepare(priv->op_clk);
565 					clk_put(priv->op_clk);
566 				} else {
567 					priv->rclk_srcrate =
568 						clk_get_rate(priv->op_clk);
569 					return 0;
570 				}
571 			}
572 
573 			if (clk_id)
574 				priv->op_clk = clk_get(&i2s->pdev->dev,
575 						"i2s_opclk1");
576 			else
577 				priv->op_clk = clk_get(&i2s->pdev->dev,
578 						"i2s_opclk0");
579 
580 			if (WARN_ON(IS_ERR(priv->op_clk))) {
581 				ret = PTR_ERR(priv->op_clk);
582 				priv->op_clk = NULL;
583 				return ret;
584 			}
585 
586 			ret = clk_prepare_enable(priv->op_clk);
587 			if (ret) {
588 				clk_put(priv->op_clk);
589 				priv->op_clk = NULL;
590 				return ret;
591 			}
592 			priv->rclk_srcrate = clk_get_rate(priv->op_clk);
593 
594 		} else if ((!clk_id && (mod & rsrc_mask))
595 				|| (clk_id && !(mod & rsrc_mask))) {
596 			dev_err(&i2s->pdev->dev,
597 				"%s:%d Other DAI busy\n", __func__, __LINE__);
598 			return -EAGAIN;
599 		} else {
600 			/* Call can't be on the active DAI */
601 			return 0;
602 		}
603 
604 		if (clk_id == 1)
605 			val = 1 << i2s_regs->rclksrc_off;
606 		break;
607 	default:
608 		dev_err(&i2s->pdev->dev, "We don't serve that!\n");
609 		return -EINVAL;
610 	}
611 
612 	scoped_guard(spinlock_irqsave, &priv->lock) {
613 		mod = readl(priv->addr + I2SMOD);
614 		mod = (mod & ~mask) | val;
615 		writel(mod, priv->addr + I2SMOD);
616 	}
617 
618 	return 0;
619 }
620 
621 static int i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
622 {
623 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
624 	struct i2s_dai *i2s = to_info(dai);
625 	int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
626 	u32 mod, tmp = 0;
627 	unsigned long flags;
628 
629 	lrp_shift = priv->variant_regs->lrp_off;
630 	sdf_shift = priv->variant_regs->sdf_off;
631 	mod_slave = 1 << priv->variant_regs->mss_off;
632 
633 	sdf_mask = MOD_SDF_MASK << sdf_shift;
634 	lrp_rlow = MOD_LR_RLOW << lrp_shift;
635 
636 	/* Format is priority */
637 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
638 	case SND_SOC_DAIFMT_RIGHT_J:
639 		tmp |= lrp_rlow;
640 		tmp |= (MOD_SDF_MSB << sdf_shift);
641 		break;
642 	case SND_SOC_DAIFMT_LEFT_J:
643 		tmp |= lrp_rlow;
644 		tmp |= (MOD_SDF_LSB << sdf_shift);
645 		break;
646 	case SND_SOC_DAIFMT_I2S:
647 		tmp |= (MOD_SDF_IIS << sdf_shift);
648 		break;
649 	default:
650 		dev_err(&i2s->pdev->dev, "Format not supported\n");
651 		return -EINVAL;
652 	}
653 
654 	/*
655 	 * INV flag is relative to the FORMAT flag - if set it simply
656 	 * flips the polarity specified by the Standard
657 	 */
658 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
659 	case SND_SOC_DAIFMT_NB_NF:
660 		break;
661 	case SND_SOC_DAIFMT_NB_IF:
662 		if (tmp & lrp_rlow)
663 			tmp &= ~lrp_rlow;
664 		else
665 			tmp |= lrp_rlow;
666 		break;
667 	default:
668 		dev_err(&i2s->pdev->dev, "Polarity not supported\n");
669 		return -EINVAL;
670 	}
671 
672 	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
673 	case SND_SOC_DAIFMT_BC_FC:
674 		tmp |= mod_slave;
675 		break;
676 	case SND_SOC_DAIFMT_BP_FP:
677 		/*
678 		 * Set default source clock in Master mode, only when the
679 		 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
680 		 * clock configuration assigned in DT is not overwritten.
681 		 */
682 		if (priv->rclk_srcrate == 0 && priv->clk_data.clks == NULL)
683 			i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
684 							0, SND_SOC_CLOCK_IN);
685 		break;
686 	default:
687 		dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
688 		return -EINVAL;
689 	}
690 
691 	pm_runtime_get_sync(dai->dev);
692 	spin_lock_irqsave(&priv->lock, flags);
693 	mod = readl(priv->addr + I2SMOD);
694 	/*
695 	 * Don't change the I2S mode if any controller is active on this
696 	 * channel.
697 	 */
698 	if (any_active(i2s) &&
699 		((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
700 		spin_unlock_irqrestore(&priv->lock, flags);
701 		pm_runtime_put(dai->dev);
702 		dev_err(&i2s->pdev->dev,
703 				"%s:%d Other DAI busy\n", __func__, __LINE__);
704 		return -EAGAIN;
705 	}
706 
707 	mod &= ~(sdf_mask | lrp_rlow | mod_slave);
708 	mod |= tmp;
709 	writel(mod, priv->addr + I2SMOD);
710 	priv->slave_mode = (mod & mod_slave);
711 	spin_unlock_irqrestore(&priv->lock, flags);
712 	pm_runtime_put(dai->dev);
713 
714 	return 0;
715 }
716 
717 static int i2s_hw_params(struct snd_pcm_substream *substream,
718 	struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
719 {
720 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
721 	struct i2s_dai *i2s = to_info(dai);
722 	u32 mod, mask = 0, val = 0;
723 	struct clk *rclksrc;
724 
725 	WARN_ON(!pm_runtime_active(dai->dev));
726 
727 	if (!is_secondary(i2s))
728 		mask |= (MOD_DC2_EN | MOD_DC1_EN);
729 
730 	switch (params_channels(params)) {
731 	case 6:
732 		val |= MOD_DC2_EN;
733 		fallthrough;
734 	case 4:
735 		val |= MOD_DC1_EN;
736 		break;
737 	case 2:
738 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
739 			i2s->dma_playback.addr_width = 4;
740 		else
741 			i2s->dma_capture.addr_width = 4;
742 		break;
743 	case 1:
744 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
745 			i2s->dma_playback.addr_width = 2;
746 		else
747 			i2s->dma_capture.addr_width = 2;
748 
749 		break;
750 	default:
751 		dev_err(&i2s->pdev->dev, "%d channels not supported\n",
752 				params_channels(params));
753 		return -EINVAL;
754 	}
755 
756 	if (is_secondary(i2s))
757 		mask |= MOD_BLCS_MASK;
758 	else
759 		mask |= MOD_BLCP_MASK;
760 
761 	if (is_manager(i2s))
762 		mask |= MOD_BLC_MASK;
763 
764 	switch (params_width(params)) {
765 	case 8:
766 		if (is_secondary(i2s))
767 			val |= MOD_BLCS_8BIT;
768 		else
769 			val |= MOD_BLCP_8BIT;
770 		if (is_manager(i2s))
771 			val |= MOD_BLC_8BIT;
772 		break;
773 	case 16:
774 		if (is_secondary(i2s))
775 			val |= MOD_BLCS_16BIT;
776 		else
777 			val |= MOD_BLCP_16BIT;
778 		if (is_manager(i2s))
779 			val |= MOD_BLC_16BIT;
780 		break;
781 	case 24:
782 		if (is_secondary(i2s))
783 			val |= MOD_BLCS_24BIT;
784 		else
785 			val |= MOD_BLCP_24BIT;
786 		if (is_manager(i2s))
787 			val |= MOD_BLC_24BIT;
788 		break;
789 	default:
790 		dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
791 				params_format(params));
792 		return -EINVAL;
793 	}
794 
795 	scoped_guard(spinlock_irqsave, &priv->lock) {
796 		mod = readl(priv->addr + I2SMOD);
797 		mod = (mod & ~mask) | val;
798 		writel(mod, priv->addr + I2SMOD);
799 	}
800 
801 	snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
802 
803 	i2s->frmclk = params_rate(params);
804 
805 	rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC];
806 	if (rclksrc && !IS_ERR(rclksrc))
807 		priv->rclk_srcrate = clk_get_rate(rclksrc);
808 
809 	return 0;
810 }
811 
812 /* We set constraints on the substream according to the version of I2S */
813 static int i2s_startup(struct snd_pcm_substream *substream,
814 	  struct snd_soc_dai *dai)
815 {
816 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
817 	struct i2s_dai *i2s = to_info(dai);
818 	struct i2s_dai *other = get_other_dai(i2s);
819 
820 	pm_runtime_get_sync(dai->dev);
821 
822 	guard(spinlock_irqsave)(&priv->pcm_lock);
823 
824 	i2s->mode |= DAI_OPENED;
825 
826 	if (is_manager(other))
827 		i2s->mode &= ~DAI_MANAGER;
828 	else
829 		i2s->mode |= DAI_MANAGER;
830 
831 	if (!any_active(i2s) && (priv->quirks & QUIRK_NEED_RSTCLR))
832 		writel(CON_RSTCLR, i2s->priv->addr + I2SCON);
833 
834 	return 0;
835 }
836 
837 static void i2s_shutdown(struct snd_pcm_substream *substream,
838 	struct snd_soc_dai *dai)
839 {
840 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
841 	struct i2s_dai *i2s = to_info(dai);
842 	struct i2s_dai *other = get_other_dai(i2s);
843 
844 	scoped_guard(spinlock_irqsave, &priv->pcm_lock) {
845 		i2s->mode &= ~DAI_OPENED;
846 		i2s->mode &= ~DAI_MANAGER;
847 
848 		if (is_opened(other))
849 			other->mode |= DAI_MANAGER;
850 
851 		/* Reset any constraint on RFS and BFS */
852 		i2s->rfs = 0;
853 		i2s->bfs = 0;
854 	}
855 
856 	pm_runtime_put(dai->dev);
857 }
858 
859 static int config_setup(struct i2s_dai *i2s)
860 {
861 	struct samsung_i2s_priv *priv = i2s->priv;
862 	struct i2s_dai *other = get_other_dai(i2s);
863 	unsigned rfs, bfs, blc;
864 	u32 psr;
865 
866 	blc = get_blc(i2s);
867 
868 	bfs = i2s->bfs;
869 
870 	if (!bfs && other)
871 		bfs = other->bfs;
872 
873 	/* Select least possible multiple(2) if no constraint set */
874 	if (!bfs)
875 		bfs = blc * 2;
876 
877 	rfs = i2s->rfs;
878 
879 	if (!rfs && other)
880 		rfs = other->rfs;
881 
882 	if ((rfs == 256 || rfs == 512) && (blc == 24)) {
883 		dev_err(&i2s->pdev->dev,
884 			"%d-RFS not supported for 24-blc\n", rfs);
885 		return -EINVAL;
886 	}
887 
888 	if (!rfs) {
889 		if (bfs == 16 || bfs == 32)
890 			rfs = 256;
891 		else
892 			rfs = 384;
893 	}
894 
895 	/* If already setup and running */
896 	if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
897 		dev_err(&i2s->pdev->dev,
898 				"%s:%d Other DAI busy\n", __func__, __LINE__);
899 		return -EAGAIN;
900 	}
901 
902 	set_bfs(i2s, bfs);
903 	set_rfs(i2s, rfs);
904 
905 	/* Don't bother with PSR in Slave mode */
906 	if (priv->slave_mode)
907 		return 0;
908 
909 	if (!(priv->quirks & QUIRK_NO_MUXPSR)) {
910 		psr = priv->rclk_srcrate / i2s->frmclk / rfs;
911 		writel(((psr - 1) << 8) | PSR_PSREN, priv->addr + I2SPSR);
912 		dev_dbg(&i2s->pdev->dev,
913 			"RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
914 				priv->rclk_srcrate, psr, rfs, bfs);
915 	}
916 
917 	return 0;
918 }
919 
920 static int i2s_trigger(struct snd_pcm_substream *substream,
921 	int cmd, struct snd_soc_dai *dai)
922 {
923 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
924 	int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
925 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
926 	struct i2s_dai *i2s = to_info(snd_soc_rtd_to_cpu(rtd, 0));
927 
928 	switch (cmd) {
929 	case SNDRV_PCM_TRIGGER_START:
930 	case SNDRV_PCM_TRIGGER_RESUME:
931 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
932 		pm_runtime_get_sync(dai->dev);
933 
934 		if (priv->fixup_early)
935 			priv->fixup_early(substream, dai);
936 
937 		scoped_guard(spinlock_irqsave, &priv->lock) {
938 			if (config_setup(i2s))
939 				return -EINVAL;
940 
941 			if (priv->fixup_late)
942 				priv->fixup_late(substream, dai);
943 
944 			if (capture)
945 				i2s_rxctrl(i2s, 1);
946 			else
947 				i2s_txctrl(i2s, 1);
948 		}
949 		break;
950 	case SNDRV_PCM_TRIGGER_STOP:
951 	case SNDRV_PCM_TRIGGER_SUSPEND:
952 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
953 		scoped_guard(spinlock_irqsave, &priv->lock) {
954 			if (capture) {
955 				i2s_rxctrl(i2s, 0);
956 				i2s_fifo(i2s, FIC_RXFLUSH);
957 			} else {
958 				i2s_txctrl(i2s, 0);
959 				i2s_fifo(i2s, FIC_TXFLUSH);
960 			}
961 		}
962 		pm_runtime_put(dai->dev);
963 		break;
964 	}
965 
966 	return 0;
967 }
968 
969 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
970 	int div_id, int div)
971 {
972 	struct i2s_dai *i2s = to_info(dai);
973 	struct i2s_dai *other = get_other_dai(i2s);
974 
975 	switch (div_id) {
976 	case SAMSUNG_I2S_DIV_BCLK:
977 		pm_runtime_get_sync(dai->dev);
978 		if ((any_active(i2s) && div && (get_bfs(i2s) != div))
979 			|| (other && other->bfs && (other->bfs != div))) {
980 			pm_runtime_put(dai->dev);
981 			dev_err(&i2s->pdev->dev,
982 				"%s:%d Other DAI busy\n", __func__, __LINE__);
983 			return -EAGAIN;
984 		}
985 		i2s->bfs = div;
986 		pm_runtime_put(dai->dev);
987 		break;
988 	default:
989 		dev_err(&i2s->pdev->dev,
990 			"Invalid clock divider(%d)\n", div_id);
991 		return -EINVAL;
992 	}
993 
994 	return 0;
995 }
996 
997 static snd_pcm_sframes_t
998 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
999 {
1000 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1001 	struct i2s_dai *i2s = to_info(dai);
1002 	u32 reg = readl(priv->addr + I2SFIC);
1003 	snd_pcm_sframes_t delay;
1004 
1005 	WARN_ON(!pm_runtime_active(dai->dev));
1006 
1007 	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
1008 		delay = FIC_RXCOUNT(reg);
1009 	else if (is_secondary(i2s))
1010 		delay = FICS_TXCOUNT(readl(priv->addr + I2SFICS));
1011 	else
1012 		delay = (reg >> priv->variant_regs->ftx0cnt_off) & 0x7f;
1013 
1014 	return delay;
1015 }
1016 
1017 #ifdef CONFIG_PM
1018 static int i2s_suspend(struct snd_soc_component *component)
1019 {
1020 	return pm_runtime_force_suspend(component->dev);
1021 }
1022 
1023 static int i2s_resume(struct snd_soc_component *component)
1024 {
1025 	return pm_runtime_force_resume(component->dev);
1026 }
1027 #else
1028 #define i2s_suspend NULL
1029 #define i2s_resume  NULL
1030 #endif
1031 
1032 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
1033 {
1034 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1035 	struct i2s_dai *i2s = to_info(dai);
1036 	struct i2s_dai *other = get_other_dai(i2s);
1037 
1038 	pm_runtime_get_sync(dai->dev);
1039 
1040 	if (is_secondary(i2s)) {
1041 		/* If this is probe on the secondary DAI */
1042 		snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, NULL);
1043 	} else {
1044 		snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1045 					  &i2s->dma_capture);
1046 
1047 		if (priv->quirks & QUIRK_NEED_RSTCLR)
1048 			writel(CON_RSTCLR, priv->addr + I2SCON);
1049 
1050 		if (priv->quirks & QUIRK_SUPPORTS_IDMA)
1051 			idma_reg_addr_init(priv->addr,
1052 					   other->idma_playback.addr);
1053 	}
1054 
1055 	/* Reset any constraint on RFS and BFS */
1056 	i2s->rfs = 0;
1057 	i2s->bfs = 0;
1058 
1059 	scoped_guard(spinlock_irqsave, &priv->lock) {
1060 		i2s_txctrl(i2s, 0);
1061 		i2s_rxctrl(i2s, 0);
1062 		i2s_fifo(i2s, FIC_TXFLUSH);
1063 		i2s_fifo(other, FIC_TXFLUSH);
1064 		i2s_fifo(i2s, FIC_RXFLUSH);
1065 	}
1066 
1067 	/* Gate CDCLK by default */
1068 	if (!is_opened(other))
1069 		i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1070 				0, SND_SOC_CLOCK_IN);
1071 	pm_runtime_put(dai->dev);
1072 
1073 	return 0;
1074 }
1075 
1076 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1077 {
1078 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1079 	struct i2s_dai *i2s = to_info(dai);
1080 
1081 	pm_runtime_get_sync(dai->dev);
1082 
1083 	if (!is_secondary(i2s)) {
1084 		if (priv->quirks & QUIRK_NEED_RSTCLR) {
1085 			scoped_guard(spinlock_irqsave, &priv->lock)
1086 				writel(0, priv->addr + I2SCON);
1087 		}
1088 	}
1089 
1090 	pm_runtime_put(dai->dev);
1091 
1092 	return 0;
1093 }
1094 
1095 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1096 	.probe = samsung_i2s_dai_probe,
1097 	.remove = samsung_i2s_dai_remove,
1098 	.trigger = i2s_trigger,
1099 	.hw_params = i2s_hw_params,
1100 	.set_fmt = i2s_set_fmt,
1101 	.set_clkdiv = i2s_set_clkdiv,
1102 	.set_sysclk = i2s_set_sysclk,
1103 	.startup = i2s_startup,
1104 	.shutdown = i2s_shutdown,
1105 	.delay = i2s_delay,
1106 };
1107 
1108 static const struct snd_soc_dapm_widget samsung_i2s_widgets[] = {
1109 	/* Backend DAI  */
1110 	SND_SOC_DAPM_AIF_OUT("Mixer DAI TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1111 	SND_SOC_DAPM_AIF_IN("Mixer DAI RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1112 
1113 	/* Playback Mixer */
1114 	SND_SOC_DAPM_MIXER("Playback Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
1115 };
1116 
1117 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes[] = {
1118 	{ "Playback Mixer", NULL, "Primary Playback" },
1119 	{ "Mixer DAI TX", NULL, "Playback Mixer" },
1120 	{ "Primary Capture", NULL, "Mixer DAI RX" },
1121 };
1122 
1123 static const struct snd_soc_dapm_route samsung_i2s_dapm_routes_sec_play[] = {
1124 	{ "Playback Mixer", NULL, "Secondary Playback" },
1125 };
1126 
1127 static int samsung_i2s_component_probe(struct snd_soc_component *component)
1128 {
1129 	struct samsung_i2s_priv *priv = snd_soc_component_get_drvdata(component);
1130 
1131 	if (priv->quirks & QUIRK_SEC_DAI)
1132 		snd_soc_dapm_add_routes(snd_soc_component_to_dapm(component),
1133 					samsung_i2s_dapm_routes_sec_play,
1134 					ARRAY_SIZE(samsung_i2s_dapm_routes_sec_play));
1135 
1136 	return 0;
1137 }
1138 
1139 static const struct snd_soc_component_driver samsung_i2s_component = {
1140 	.name = "samsung-i2s",
1141 
1142 	.probe = samsung_i2s_component_probe,
1143 
1144 	.dapm_widgets = samsung_i2s_widgets,
1145 	.num_dapm_widgets = ARRAY_SIZE(samsung_i2s_widgets),
1146 
1147 	.dapm_routes = samsung_i2s_dapm_routes,
1148 	.num_dapm_routes = ARRAY_SIZE(samsung_i2s_dapm_routes),
1149 
1150 	.suspend = i2s_suspend,
1151 	.resume = i2s_resume,
1152 
1153 	.legacy_dai_naming = 1,
1154 };
1155 
1156 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
1157 			  SNDRV_PCM_FMTBIT_S24_LE)
1158 
1159 static int i2s_alloc_dais(struct samsung_i2s_priv *priv,
1160 			  const struct samsung_i2s_dai_data *i2s_dai_data,
1161 			  int num_dais)
1162 {
1163 	static const char *dai_names[] = { "samsung-i2s", "samsung-i2s-sec" };
1164 	static const char *stream_names[] = { "Primary Playback",
1165 					      "Secondary Playback" };
1166 	struct snd_soc_dai_driver *dai_drv;
1167 	int i;
1168 
1169 	priv->dai = devm_kcalloc(&priv->pdev->dev, num_dais,
1170 				     sizeof(struct i2s_dai), GFP_KERNEL);
1171 	if (!priv->dai)
1172 		return -ENOMEM;
1173 
1174 	priv->dai_drv = devm_kcalloc(&priv->pdev->dev, num_dais,
1175 				     sizeof(*dai_drv), GFP_KERNEL);
1176 	if (!priv->dai_drv)
1177 		return -ENOMEM;
1178 
1179 	for (i = 0; i < num_dais; i++) {
1180 		dai_drv = &priv->dai_drv[i];
1181 
1182 		dai_drv->symmetric_rate = 1;
1183 		dai_drv->ops = &samsung_i2s_dai_ops;
1184 
1185 		dai_drv->playback.channels_min = 1;
1186 		dai_drv->playback.channels_max = 2;
1187 		dai_drv->playback.rates = i2s_dai_data->pcm_rates;
1188 		dai_drv->playback.formats = SAMSUNG_I2S_FMTS;
1189 		dai_drv->playback.stream_name = stream_names[i];
1190 
1191 		dai_drv->id = i + 1;
1192 		dai_drv->name = dai_names[i];
1193 
1194 		priv->dai[i].drv = &priv->dai_drv[i];
1195 		priv->dai[i].pdev = priv->pdev;
1196 	}
1197 
1198 	/* Initialize capture only for the primary DAI */
1199 	dai_drv = &priv->dai_drv[SAMSUNG_I2S_ID_PRIMARY - 1];
1200 
1201 	dai_drv->capture.channels_min = 1;
1202 	dai_drv->capture.channels_max = 2;
1203 	dai_drv->capture.rates = i2s_dai_data->pcm_rates;
1204 	dai_drv->capture.formats = SAMSUNG_I2S_FMTS;
1205 	dai_drv->capture.stream_name = "Primary Capture";
1206 
1207 	return 0;
1208 }
1209 
1210 static int i2s_runtime_suspend(struct device *dev)
1211 {
1212 	struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1213 
1214 	priv->suspend_i2smod = readl(priv->addr + I2SMOD);
1215 	priv->suspend_i2scon = readl(priv->addr + I2SCON);
1216 	priv->suspend_i2spsr = readl(priv->addr + I2SPSR);
1217 
1218 	clk_disable_unprepare(priv->op_clk);
1219 	clk_disable_unprepare(priv->clk);
1220 
1221 	return 0;
1222 }
1223 
1224 static int i2s_runtime_resume(struct device *dev)
1225 {
1226 	struct samsung_i2s_priv *priv = dev_get_drvdata(dev);
1227 	int ret;
1228 
1229 	ret = clk_prepare_enable(priv->clk);
1230 	if (ret)
1231 		return ret;
1232 
1233 	if (priv->op_clk) {
1234 		ret = clk_prepare_enable(priv->op_clk);
1235 		if (ret) {
1236 			clk_disable_unprepare(priv->clk);
1237 			return ret;
1238 		}
1239 	}
1240 
1241 	writel(priv->suspend_i2scon, priv->addr + I2SCON);
1242 	writel(priv->suspend_i2smod, priv->addr + I2SMOD);
1243 	writel(priv->suspend_i2spsr, priv->addr + I2SPSR);
1244 
1245 	return 0;
1246 }
1247 
1248 static void i2s_unregister_clocks(struct samsung_i2s_priv *priv)
1249 {
1250 	int i;
1251 
1252 	for (i = 0; i < priv->clk_data.clk_num; i++) {
1253 		if (!IS_ERR(priv->clk_table[i]))
1254 			clk_unregister(priv->clk_table[i]);
1255 	}
1256 }
1257 
1258 static void i2s_unregister_clock_provider(struct samsung_i2s_priv *priv)
1259 {
1260 	of_clk_del_provider(priv->pdev->dev.of_node);
1261 	i2s_unregister_clocks(priv);
1262 }
1263 
1264 
1265 static int i2s_register_clock_provider(struct samsung_i2s_priv *priv)
1266 {
1267 
1268 	const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
1269 	const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1270 	const char *p_names[2] = { NULL };
1271 	struct device *dev = &priv->pdev->dev;
1272 	const struct samsung_i2s_variant_regs *reg_info = priv->variant_regs;
1273 	const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
1274 	struct clk *rclksrc;
1275 	int ret, i;
1276 
1277 	/* Register the clock provider only if it's expected in the DTB */
1278 	if (!of_property_present(dev->of_node, "#clock-cells"))
1279 		return 0;
1280 
1281 	/* Get the RCLKSRC mux clock parent clock names */
1282 	for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1283 		rclksrc = clk_get(dev, clk_name[i]);
1284 		if (IS_ERR(rclksrc))
1285 			continue;
1286 		p_names[i] = __clk_get_name(rclksrc);
1287 		clk_put(rclksrc);
1288 	}
1289 
1290 	for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
1291 		i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
1292 						dev_name(dev), i2s_clk_desc[i]);
1293 		if (!i2s_clk_name[i])
1294 			return -ENOMEM;
1295 	}
1296 
1297 	if (!(priv->quirks & QUIRK_NO_MUXPSR)) {
1298 		/* Activate the prescaler */
1299 		u32 val = readl(priv->addr + I2SPSR);
1300 		writel(val | PSR_PSREN, priv->addr + I2SPSR);
1301 
1302 		priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
1303 				i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
1304 				ARRAY_SIZE(p_names),
1305 				CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1306 				priv->addr + I2SMOD, reg_info->rclksrc_off,
1307 				1, 0, &priv->lock);
1308 
1309 		priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
1310 				i2s_clk_name[CLK_I2S_RCLK_PSR],
1311 				i2s_clk_name[CLK_I2S_RCLK_SRC],
1312 				CLK_SET_RATE_PARENT,
1313 				priv->addr + I2SPSR, 8, 6, 0, &priv->lock);
1314 
1315 		p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
1316 		priv->clk_data.clk_num = 2;
1317 	}
1318 
1319 	priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
1320 				i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
1321 				CLK_SET_RATE_PARENT,
1322 				priv->addr + I2SMOD, reg_info->cdclkcon_off,
1323 				CLK_GATE_SET_TO_DISABLE, &priv->lock);
1324 
1325 	priv->clk_data.clk_num += 1;
1326 	priv->clk_data.clks = priv->clk_table;
1327 
1328 	ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1329 				  &priv->clk_data);
1330 	if (ret < 0) {
1331 		dev_err(dev, "failed to add clock provider: %d\n", ret);
1332 		i2s_unregister_clocks(priv);
1333 	}
1334 
1335 	return ret;
1336 }
1337 
1338 /* Create platform device for the secondary PCM */
1339 static int i2s_create_secondary_device(struct samsung_i2s_priv *priv)
1340 {
1341 	struct platform_device *pdev_sec;
1342 	const char *devname;
1343 	int ret;
1344 
1345 	devname = devm_kasprintf(&priv->pdev->dev, GFP_KERNEL, "%s-sec",
1346 				 dev_name(&priv->pdev->dev));
1347 	if (!devname)
1348 		return -ENOMEM;
1349 
1350 	pdev_sec = platform_device_alloc(devname, -1);
1351 	if (!pdev_sec)
1352 		return -ENOMEM;
1353 
1354 	ret = device_set_driver_override(&pdev_sec->dev, "samsung-i2s");
1355 	if (ret) {
1356 		platform_device_put(pdev_sec);
1357 		return ret;
1358 	}
1359 
1360 	ret = platform_device_add(pdev_sec);
1361 	if (ret < 0) {
1362 		platform_device_put(pdev_sec);
1363 		return ret;
1364 	}
1365 
1366 	ret = device_attach(&pdev_sec->dev);
1367 	if (ret <= 0) {
1368 		platform_device_unregister(priv->pdev_sec);
1369 		dev_info(&pdev_sec->dev, "device_attach() failed\n");
1370 		return ret;
1371 	}
1372 
1373 	priv->pdev_sec = pdev_sec;
1374 
1375 	return 0;
1376 }
1377 
1378 static void i2s_delete_secondary_device(struct samsung_i2s_priv *priv)
1379 {
1380 	platform_device_unregister(priv->pdev_sec);
1381 	priv->pdev_sec = NULL;
1382 }
1383 
1384 static int samsung_i2s_probe(struct platform_device *pdev)
1385 {
1386 	struct i2s_dai *pri_dai, *sec_dai = NULL;
1387 	struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1388 	u32 regs_base, idma_addr = 0;
1389 	struct device_node *np = pdev->dev.of_node;
1390 	const struct samsung_i2s_dai_data *i2s_dai_data;
1391 	const struct platform_device_id *id;
1392 	struct samsung_i2s_priv *priv;
1393 	struct resource *res;
1394 	int num_dais, ret;
1395 
1396 	if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
1397 		i2s_dai_data = of_device_get_match_data(&pdev->dev);
1398 	} else {
1399 		id = platform_get_device_id(pdev);
1400 
1401 		/* Nothing to do if it is the secondary device probe */
1402 		if (!id)
1403 			return 0;
1404 
1405 		i2s_dai_data = (struct samsung_i2s_dai_data *)id->driver_data;
1406 	}
1407 
1408 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1409 	if (!priv)
1410 		return -ENOMEM;
1411 
1412 	if (np) {
1413 		priv->quirks = i2s_dai_data->quirks;
1414 		priv->fixup_early = i2s_dai_data->fixup_early;
1415 		priv->fixup_late = i2s_dai_data->fixup_late;
1416 	} else {
1417 		if (!i2s_pdata) {
1418 			dev_err(&pdev->dev, "Missing platform data\n");
1419 			return -EINVAL;
1420 		}
1421 		priv->quirks = i2s_pdata->type.quirks;
1422 	}
1423 
1424 	num_dais = (priv->quirks & QUIRK_SEC_DAI) ? 2 : 1;
1425 	priv->pdev = pdev;
1426 	priv->variant_regs = i2s_dai_data->i2s_variant_regs;
1427 
1428 	ret = i2s_alloc_dais(priv, i2s_dai_data, num_dais);
1429 	if (ret < 0)
1430 		return ret;
1431 
1432 	pri_dai = &priv->dai[SAMSUNG_I2S_ID_PRIMARY - 1];
1433 
1434 	spin_lock_init(&priv->lock);
1435 	spin_lock_init(&priv->pcm_lock);
1436 
1437 	if (!np) {
1438 		pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1439 		pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1440 		pri_dai->filter = i2s_pdata->dma_filter;
1441 
1442 		idma_addr = i2s_pdata->type.idma_addr;
1443 	} else {
1444 		if (of_property_read_u32(np, "samsung,idma-addr",
1445 					 &idma_addr)) {
1446 			if (priv->quirks & QUIRK_SUPPORTS_IDMA) {
1447 				dev_info(&pdev->dev, "idma address is not"\
1448 						"specified");
1449 			}
1450 		}
1451 	}
1452 
1453 	priv->addr = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1454 	if (IS_ERR(priv->addr))
1455 		return PTR_ERR(priv->addr);
1456 
1457 	regs_base = res->start;
1458 
1459 	priv->clk = devm_clk_get(&pdev->dev, "iis");
1460 	if (IS_ERR(priv->clk))
1461 		return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk),
1462 				     "Failed to get iis clock\n");
1463 
1464 
1465 	ret = clk_prepare_enable(priv->clk);
1466 	if (ret != 0) {
1467 		dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1468 		return ret;
1469 	}
1470 	pri_dai->dma_playback.addr = regs_base + I2STXD;
1471 	pri_dai->dma_capture.addr = regs_base + I2SRXD;
1472 	pri_dai->dma_playback.chan_name = "tx";
1473 	pri_dai->dma_capture.chan_name = "rx";
1474 	pri_dai->dma_playback.addr_width = 4;
1475 	pri_dai->dma_capture.addr_width = 4;
1476 	pri_dai->priv = priv;
1477 
1478 	if (priv->quirks & QUIRK_PRI_6CHAN)
1479 		pri_dai->drv->playback.channels_max = 6;
1480 
1481 	ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1482 						 "tx", "rx", NULL);
1483 	if (ret < 0)
1484 		goto err_disable_clk;
1485 
1486 	if (priv->quirks & QUIRK_SEC_DAI) {
1487 		sec_dai = &priv->dai[SAMSUNG_I2S_ID_SECONDARY - 1];
1488 
1489 		sec_dai->dma_playback.addr = regs_base + I2STXDS;
1490 		sec_dai->dma_playback.chan_name = "tx-sec";
1491 
1492 		if (!np) {
1493 			sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1494 			sec_dai->filter = i2s_pdata->dma_filter;
1495 		}
1496 
1497 		sec_dai->dma_playback.addr_width = 4;
1498 		sec_dai->idma_playback.addr = idma_addr;
1499 		sec_dai->pri_dai = pri_dai;
1500 		sec_dai->priv = priv;
1501 		pri_dai->sec_dai = sec_dai;
1502 
1503 		ret = i2s_create_secondary_device(priv);
1504 		if (ret < 0)
1505 			goto err_disable_clk;
1506 
1507 		ret = samsung_asoc_dma_platform_register(&priv->pdev_sec->dev,
1508 						sec_dai->filter, "tx-sec", NULL,
1509 						&pdev->dev);
1510 		if (ret < 0)
1511 			goto err_del_sec;
1512 
1513 	}
1514 
1515 	if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1516 		dev_err(&pdev->dev, "Unable to configure gpio\n");
1517 		ret = -EINVAL;
1518 		goto err_del_sec;
1519 	}
1520 
1521 	dev_set_drvdata(&pdev->dev, priv);
1522 
1523 	ret = devm_snd_soc_register_component(&pdev->dev,
1524 					&samsung_i2s_component,
1525 					priv->dai_drv, num_dais);
1526 	if (ret < 0)
1527 		goto err_del_sec;
1528 
1529 	pm_runtime_set_active(&pdev->dev);
1530 	pm_runtime_enable(&pdev->dev);
1531 
1532 	ret = i2s_register_clock_provider(priv);
1533 	if (ret < 0)
1534 		goto err_disable_pm;
1535 
1536 	priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]);
1537 
1538 	return 0;
1539 
1540 err_disable_pm:
1541 	pm_runtime_disable(&pdev->dev);
1542 err_del_sec:
1543 	i2s_delete_secondary_device(priv);
1544 err_disable_clk:
1545 	clk_disable_unprepare(priv->clk);
1546 	return ret;
1547 }
1548 
1549 static void samsung_i2s_remove(struct platform_device *pdev)
1550 {
1551 	struct samsung_i2s_priv *priv = dev_get_drvdata(&pdev->dev);
1552 
1553 	/* The secondary device has no driver data assigned */
1554 	if (!priv)
1555 		return;
1556 
1557 	pm_runtime_get_sync(&pdev->dev);
1558 	pm_runtime_disable(&pdev->dev);
1559 
1560 	i2s_unregister_clock_provider(priv);
1561 	i2s_delete_secondary_device(priv);
1562 	clk_disable_unprepare(priv->clk);
1563 
1564 	pm_runtime_put_noidle(&pdev->dev);
1565 }
1566 
1567 static void fsd_i2s_fixup_early(struct snd_pcm_substream *substream,
1568 		struct snd_soc_dai *dai)
1569 {
1570 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
1571 	struct i2s_dai *i2s = to_info(snd_soc_rtd_to_cpu(rtd, 0));
1572 	struct i2s_dai *other = get_other_dai(i2s);
1573 
1574 	if (!is_opened(other)) {
1575 		i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 0, SND_SOC_CLOCK_OUT);
1576 		i2s_set_sysclk(dai, SAMSUNG_I2S_OPCLK, 0, MOD_OPCLK_PCLK);
1577 	}
1578 }
1579 
1580 static void fsd_i2s_fixup_late(struct snd_pcm_substream *substream,
1581 		struct snd_soc_dai *dai)
1582 {
1583 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
1584 	struct samsung_i2s_priv *priv = snd_soc_dai_get_drvdata(dai);
1585 	struct i2s_dai *i2s = to_info(snd_soc_rtd_to_cpu(rtd, 0));
1586 	struct i2s_dai *other = get_other_dai(i2s);
1587 
1588 	if (!is_opened(other))
1589 		writel(PSR_PSVAL(2) | PSR_PSREN, priv->addr + I2SPSR);
1590 }
1591 
1592 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1593 	.bfs_off = 1,
1594 	.rfs_off = 3,
1595 	.sdf_off = 5,
1596 	.txr_off = 8,
1597 	.rclksrc_off = 10,
1598 	.mss_off = 11,
1599 	.cdclkcon_off = 12,
1600 	.lrp_off = 7,
1601 	.bfs_mask = 0x3,
1602 	.rfs_mask = 0x3,
1603 	.ftx0cnt_off = 8,
1604 };
1605 
1606 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1607 	.bfs_off = 0,
1608 	.rfs_off = 4,
1609 	.sdf_off = 6,
1610 	.txr_off = 8,
1611 	.rclksrc_off = 10,
1612 	.mss_off = 11,
1613 	.cdclkcon_off = 12,
1614 	.lrp_off = 15,
1615 	.bfs_mask = 0xf,
1616 	.rfs_mask = 0x3,
1617 	.ftx0cnt_off = 8,
1618 };
1619 
1620 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1621 	.bfs_off = 0,
1622 	.rfs_off = 4,
1623 	.sdf_off = 7,
1624 	.txr_off = 9,
1625 	.rclksrc_off = 11,
1626 	.mss_off = 12,
1627 	.cdclkcon_off = 22,
1628 	.lrp_off = 15,
1629 	.bfs_mask = 0xf,
1630 	.rfs_mask = 0x7,
1631 	.ftx0cnt_off = 0,
1632 };
1633 
1634 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1635 	.bfs_off = 0,
1636 	.rfs_off = 3,
1637 	.sdf_off = 6,
1638 	.txr_off = 8,
1639 	.rclksrc_off = 10,
1640 	.mss_off = 11,
1641 	.cdclkcon_off = 12,
1642 	.lrp_off = 15,
1643 	.bfs_mask = 0x7,
1644 	.rfs_mask = 0x7,
1645 	.ftx0cnt_off = 8,
1646 };
1647 
1648 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1649 	.quirks = QUIRK_NO_MUXPSR,
1650 	.pcm_rates = SNDRV_PCM_RATE_8000_96000,
1651 	.i2s_variant_regs = &i2sv3_regs,
1652 };
1653 
1654 static const struct samsung_i2s_dai_data i2sv5_dai_type __maybe_unused = {
1655 	.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1656 			QUIRK_SUPPORTS_IDMA,
1657 	.pcm_rates = SNDRV_PCM_RATE_8000_96000,
1658 	.i2s_variant_regs = &i2sv3_regs,
1659 };
1660 
1661 static const struct samsung_i2s_dai_data i2sv6_dai_type __maybe_unused = {
1662 	.quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1663 			QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1664 	.pcm_rates = SNDRV_PCM_RATE_8000_96000,
1665 	.i2s_variant_regs = &i2sv6_regs,
1666 };
1667 
1668 static const struct samsung_i2s_dai_data i2sv7_dai_type __maybe_unused = {
1669 	.quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR | QUIRK_SUPPORTS_TDM,
1670 	.pcm_rates = SNDRV_PCM_RATE_8000_192000,
1671 	.i2s_variant_regs = &i2sv7_regs,
1672 };
1673 
1674 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 __maybe_unused = {
1675 	.quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1676 	.pcm_rates = SNDRV_PCM_RATE_8000_96000,
1677 	.i2s_variant_regs = &i2sv5_i2s1_regs,
1678 };
1679 
1680 static const struct samsung_i2s_dai_data fsd_dai_type __maybe_unused = {
1681 	.quirks = QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR | QUIRK_SUPPORTS_TDM,
1682 	.pcm_rates = SNDRV_PCM_RATE_8000_192000,
1683 	.i2s_variant_regs = &i2sv7_regs,
1684 	.fixup_early = fsd_i2s_fixup_early,
1685 	.fixup_late = fsd_i2s_fixup_late,
1686 };
1687 
1688 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1689 	{
1690 		.name           = "samsung-i2s",
1691 		.driver_data	= (kernel_ulong_t)&i2sv3_dai_type,
1692 	},
1693 	{ }
1694 };
1695 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1696 
1697 #ifdef CONFIG_OF
1698 static const struct of_device_id exynos_i2s_match[] = {
1699 	{
1700 		.compatible = "samsung,s3c6410-i2s",
1701 		.data = &i2sv3_dai_type,
1702 	}, {
1703 		.compatible = "samsung,s5pv210-i2s",
1704 		.data = &i2sv5_dai_type,
1705 	}, {
1706 		.compatible = "samsung,exynos5420-i2s",
1707 		.data = &i2sv6_dai_type,
1708 	}, {
1709 		.compatible = "samsung,exynos7-i2s",
1710 		.data = &i2sv7_dai_type,
1711 	}, {
1712 		.compatible = "samsung,exynos7-i2s1",
1713 		.data = &i2sv5_dai_type_i2s1,
1714 	}, {
1715 		.compatible = "tesla,fsd-i2s",
1716 		.data = &fsd_dai_type,
1717 	},
1718 	{},
1719 };
1720 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1721 #endif
1722 
1723 static const struct dev_pm_ops samsung_i2s_pm = {
1724 	RUNTIME_PM_OPS(i2s_runtime_suspend, i2s_runtime_resume, NULL)
1725 	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
1726 };
1727 
1728 static struct platform_driver samsung_i2s_driver = {
1729 	.probe  = samsung_i2s_probe,
1730 	.remove = samsung_i2s_remove,
1731 	.id_table = samsung_i2s_driver_ids,
1732 	.driver = {
1733 		.name = "samsung-i2s",
1734 		.of_match_table = of_match_ptr(exynos_i2s_match),
1735 		.pm = pm_ptr(&samsung_i2s_pm),
1736 	},
1737 };
1738 
1739 module_platform_driver(samsung_i2s_driver);
1740 
1741 /* Module information */
1742 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1743 MODULE_DESCRIPTION("Samsung I2S Interface");
1744 MODULE_LICENSE("GPL");
1745