1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Renesas R-Car Audio DMAC support 4 // 5 // Copyright (C) 2015 Renesas Electronics Corp. 6 // Copyright (c) 2015 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 7 8 #include <linux/delay.h> 9 #include <linux/of_dma.h> 10 #include <sound/dmaengine_pcm.h> 11 #include "rsnd.h" 12 13 /* 14 * Audio DMAC peri peri register 15 */ 16 #define PDMASAR 0x00 17 #define PDMADAR 0x04 18 #define PDMACHCR 0x0c 19 20 /* PDMACHCR */ 21 #define PDMACHCR_DE (1 << 0) 22 23 24 struct rsnd_dmaen { 25 struct dma_chan *chan; 26 }; 27 28 struct rsnd_dmapp { 29 int dmapp_id; 30 u32 chcr; 31 }; 32 33 struct rsnd_dma { 34 struct rsnd_mod mod; 35 struct rsnd_mod *mod_from; 36 struct rsnd_mod *mod_to; 37 dma_addr_t src_addr; 38 dma_addr_t dst_addr; 39 union { 40 struct rsnd_dmaen en; 41 struct rsnd_dmapp pp; 42 } dma; 43 }; 44 45 struct rsnd_dma_ctrl { 46 void __iomem *ppbase; 47 phys_addr_t ppres; 48 int dmaen_num; 49 int dmapp_num; 50 /* RZ/G3E: Audio DMAC peri-peri clock and reset */ 51 struct clk *audmapp_clk; 52 struct reset_control *audmapp_rstc; 53 }; 54 55 #define rsnd_priv_to_dmac(p) ((struct rsnd_dma_ctrl *)(p)->dma) 56 #define rsnd_mod_to_dma(_mod) container_of((_mod), struct rsnd_dma, mod) 57 #define rsnd_dma_to_dmaen(dma) (&(dma)->dma.en) 58 #define rsnd_dma_to_dmapp(dma) (&(dma)->dma.pp) 59 60 /* for DEBUG */ 61 static struct rsnd_mod_ops mem_ops = { 62 .name = "mem", 63 }; 64 65 static struct rsnd_mod mem = { 66 }; 67 68 /* 69 * Audio DMAC 70 */ 71 static struct dma_chan *rsnd_dmaen_request_channel(struct rsnd_dai_stream *io, 72 struct rsnd_mod *mod_from, 73 struct rsnd_mod *mod_to) 74 { 75 if ((!mod_from && !mod_to) || 76 (mod_from && mod_to)) 77 return NULL; 78 79 if (mod_from) 80 return rsnd_mod_dma_req(io, mod_from); 81 else 82 return rsnd_mod_dma_req(io, mod_to); 83 } 84 85 static int rsnd_dmaen_stop(struct rsnd_mod *mod, 86 struct rsnd_dai_stream *io, 87 struct rsnd_priv *priv) 88 { 89 return snd_dmaengine_pcm_trigger(io->substream, SNDRV_PCM_TRIGGER_STOP); 90 } 91 92 static int rsnd_dmaen_cleanup(struct rsnd_mod *mod, 93 struct rsnd_dai_stream *io, 94 struct rsnd_priv *priv) 95 { 96 struct rsnd_dma *dma = rsnd_mod_to_dma(mod); 97 struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma); 98 99 /* 100 * DMAEngine release uses mutex lock. 101 * Thus, it shouldn't be called under spinlock. 102 * Let's call it under prepare 103 */ 104 if (dmaen->chan) 105 snd_dmaengine_pcm_close_release_chan(io->substream); 106 107 dmaen->chan = NULL; 108 109 return 0; 110 } 111 112 static int rsnd_dmaen_prepare(struct rsnd_mod *mod, 113 struct rsnd_dai_stream *io, 114 struct rsnd_priv *priv) 115 { 116 struct rsnd_dma *dma = rsnd_mod_to_dma(mod); 117 struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma); 118 struct device *dev = rsnd_priv_to_dev(priv); 119 120 /* maybe suspended */ 121 if (dmaen->chan) 122 return 0; 123 124 /* 125 * DMAEngine request uses mutex lock. 126 * Thus, it shouldn't be called under spinlock. 127 * Let's call it under prepare 128 */ 129 dmaen->chan = rsnd_dmaen_request_channel(io, 130 dma->mod_from, 131 dma->mod_to); 132 if (IS_ERR_OR_NULL(dmaen->chan)) { 133 dmaen->chan = NULL; 134 dev_err(dev, "can't get dma channel\n"); 135 return -EIO; 136 } 137 138 return snd_dmaengine_pcm_open(io->substream, dmaen->chan); 139 } 140 141 static int rsnd_dmaen_start(struct rsnd_mod *mod, 142 struct rsnd_dai_stream *io, 143 struct rsnd_priv *priv) 144 { 145 struct rsnd_dma *dma = rsnd_mod_to_dma(mod); 146 struct rsnd_dmaen *dmaen = rsnd_dma_to_dmaen(dma); 147 struct device *dev = rsnd_priv_to_dev(priv); 148 struct dma_slave_config cfg = {}; 149 enum dma_slave_buswidth buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES; 150 int ret; 151 152 /* 153 * in case of monaural data writing or reading through Audio-DMAC 154 * data is always in Left Justified format, so both src and dst 155 * DMA Bus width need to be set equal to physical data width. 156 */ 157 if (rsnd_runtime_channel_original(io) == 1) { 158 struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); 159 int bits = snd_pcm_format_physical_width(runtime->format); 160 161 switch (bits) { 162 case 8: 163 buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE; 164 break; 165 case 16: 166 buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES; 167 break; 168 case 32: 169 buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES; 170 break; 171 default: 172 dev_err(dev, "invalid format width %d\n", bits); 173 return -EINVAL; 174 } 175 } 176 177 cfg.direction = snd_pcm_substream_to_dma_direction(io->substream); 178 cfg.src_addr = dma->src_addr; 179 cfg.dst_addr = dma->dst_addr; 180 cfg.src_addr_width = buswidth; 181 cfg.dst_addr_width = buswidth; 182 183 dev_dbg(dev, "%s %pad -> %pad\n", 184 rsnd_mod_name(mod), 185 &cfg.src_addr, &cfg.dst_addr); 186 187 ret = dmaengine_slave_config(dmaen->chan, &cfg); 188 if (ret < 0) 189 return ret; 190 191 return snd_dmaengine_pcm_trigger(io->substream, SNDRV_PCM_TRIGGER_START); 192 } 193 194 struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node, char *name, 195 struct rsnd_mod *mod, char *x) 196 { 197 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 198 struct device *dev = rsnd_priv_to_dev(priv); 199 struct dma_chan *chan = NULL; 200 int i = 0; 201 202 for_each_child_of_node_scoped(of_node, np) { 203 i = rsnd_node_fixed_index(dev, np, name, i); 204 if (i < 0) { 205 chan = NULL; 206 break; 207 } 208 209 if (i == rsnd_mod_id_raw(mod) && (!chan)) 210 chan = of_dma_request_slave_channel(np, x); 211 i++; 212 } 213 214 /* It should call of_node_put(), since, it is rsnd_xxx_of_node() */ 215 of_node_put(of_node); 216 217 return chan; 218 } 219 220 static int rsnd_dmaen_attach(struct rsnd_dai_stream *io, 221 struct rsnd_dma *dma, 222 struct rsnd_mod *mod_from, struct rsnd_mod *mod_to) 223 { 224 struct rsnd_priv *priv = rsnd_io_to_priv(io); 225 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 226 struct dma_chan *chan; 227 228 /* try to get DMAEngine channel */ 229 chan = rsnd_dmaen_request_channel(io, mod_from, mod_to); 230 if (IS_ERR_OR_NULL(chan)) { 231 /* Let's follow when -EPROBE_DEFER case */ 232 if (PTR_ERR(chan) == -EPROBE_DEFER) 233 return PTR_ERR(chan); 234 235 /* 236 * DMA failed. try to PIO mode 237 * see 238 * rsnd_ssi_fallback() 239 * rsnd_rdai_continuance_probe() 240 */ 241 return -EAGAIN; 242 } 243 244 /* 245 * use it for IPMMU if needed 246 * see 247 * rsnd_preallocate_pages() 248 */ 249 io->dmac_dev = chan->device->dev; 250 251 dma_release_channel(chan); 252 253 dmac->dmaen_num++; 254 255 return 0; 256 } 257 258 static int rsnd_dmaen_pointer(struct rsnd_mod *mod, 259 struct rsnd_dai_stream *io, 260 snd_pcm_uframes_t *pointer) 261 { 262 *pointer = snd_dmaengine_pcm_pointer(io->substream); 263 264 return 0; 265 } 266 267 static struct rsnd_mod_ops rsnd_dmaen_ops = { 268 .name = "audmac", 269 .prepare = rsnd_dmaen_prepare, 270 .cleanup = rsnd_dmaen_cleanup, 271 .start = rsnd_dmaen_start, 272 .stop = rsnd_dmaen_stop, 273 .pointer = rsnd_dmaen_pointer, 274 .get_status = rsnd_mod_get_status, 275 }; 276 277 /* 278 * Audio DMAC peri peri 279 */ 280 static const u8 gen2_id_table_ssiu[] = { 281 /* SSI00 ~ SSI07 */ 282 0x00, 0x01, 0x02, 0x03, 0x39, 0x3a, 0x3b, 0x3c, 283 /* SSI10 ~ SSI17 */ 284 0x04, 0x05, 0x06, 0x07, 0x3d, 0x3e, 0x3f, 0x40, 285 /* SSI20 ~ SSI27 */ 286 0x08, 0x09, 0x0a, 0x0b, 0x41, 0x42, 0x43, 0x44, 287 /* SSI30 ~ SSI37 */ 288 0x0c, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 289 /* SSI40 ~ SSI47 */ 290 0x0d, 0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x52, 291 /* SSI5 */ 292 0x0e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 293 /* SSI6 */ 294 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 295 /* SSI7 */ 296 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 297 /* SSI8 */ 298 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 299 /* SSI90 ~ SSI97 */ 300 0x12, 0x13, 0x14, 0x15, 0x53, 0x54, 0x55, 0x56, 301 }; 302 static const u8 gen2_id_table_scu[] = { 303 0x2d, /* SCU_SRCI0 */ 304 0x2e, /* SCU_SRCI1 */ 305 0x2f, /* SCU_SRCI2 */ 306 0x30, /* SCU_SRCI3 */ 307 0x31, /* SCU_SRCI4 */ 308 0x32, /* SCU_SRCI5 */ 309 0x33, /* SCU_SRCI6 */ 310 0x34, /* SCU_SRCI7 */ 311 0x35, /* SCU_SRCI8 */ 312 0x36, /* SCU_SRCI9 */ 313 }; 314 static const u8 gen2_id_table_cmd[] = { 315 0x37, /* SCU_CMD0 */ 316 0x38, /* SCU_CMD1 */ 317 }; 318 319 static u32 rsnd_dmapp_get_id(struct rsnd_dai_stream *io, 320 struct rsnd_mod *mod) 321 { 322 struct rsnd_mod *ssi = rsnd_io_to_mod_ssi(io); 323 struct rsnd_mod *ssiu = rsnd_io_to_mod_ssiu(io); 324 struct rsnd_mod *src = rsnd_io_to_mod_src(io); 325 struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io); 326 const u8 *entry = NULL; 327 int id = 255; 328 int size = 0; 329 330 if ((mod == ssi) || 331 (mod == ssiu)) { 332 int busif = rsnd_mod_id_sub(ssiu); 333 334 entry = gen2_id_table_ssiu; 335 size = ARRAY_SIZE(gen2_id_table_ssiu); 336 id = (rsnd_mod_id(mod) * 8) + busif; 337 } else if (mod == src) { 338 entry = gen2_id_table_scu; 339 size = ARRAY_SIZE(gen2_id_table_scu); 340 id = rsnd_mod_id(mod); 341 } else if (mod == dvc) { 342 entry = gen2_id_table_cmd; 343 size = ARRAY_SIZE(gen2_id_table_cmd); 344 id = rsnd_mod_id(mod); 345 } 346 347 if ((!entry) || (size <= id)) { 348 struct device *dev = rsnd_priv_to_dev(rsnd_io_to_priv(io)); 349 350 dev_err(dev, "unknown connection (%s)\n", rsnd_mod_name(mod)); 351 352 /* use non-prohibited SRS number as error */ 353 return 0x00; /* SSI00 */ 354 } 355 356 return entry[id]; 357 } 358 359 static u32 rsnd_dmapp_get_chcr(struct rsnd_dai_stream *io, 360 struct rsnd_mod *mod_from, 361 struct rsnd_mod *mod_to) 362 { 363 return (rsnd_dmapp_get_id(io, mod_from) << 24) + 364 (rsnd_dmapp_get_id(io, mod_to) << 16); 365 } 366 367 #define rsnd_dmapp_addr(dmac, dma, reg) \ 368 (dmac->ppbase + 0x20 + reg + \ 369 (0x10 * rsnd_dma_to_dmapp(dma)->dmapp_id)) 370 static void rsnd_dmapp_write(struct rsnd_dma *dma, u32 data, u32 reg) 371 { 372 struct rsnd_mod *mod = rsnd_mod_get(dma); 373 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 374 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 375 struct device *dev = rsnd_priv_to_dev(priv); 376 377 dev_dbg(dev, "w 0x%px : %08x\n", rsnd_dmapp_addr(dmac, dma, reg), data); 378 379 iowrite32(data, rsnd_dmapp_addr(dmac, dma, reg)); 380 } 381 382 static u32 rsnd_dmapp_read(struct rsnd_dma *dma, u32 reg) 383 { 384 struct rsnd_mod *mod = rsnd_mod_get(dma); 385 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 386 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 387 388 return ioread32(rsnd_dmapp_addr(dmac, dma, reg)); 389 } 390 391 static void rsnd_dmapp_bset(struct rsnd_dma *dma, u32 data, u32 mask, u32 reg) 392 { 393 struct rsnd_mod *mod = rsnd_mod_get(dma); 394 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 395 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 396 void __iomem *addr = rsnd_dmapp_addr(dmac, dma, reg); 397 u32 val = ioread32(addr); 398 399 val &= ~mask; 400 val |= (data & mask); 401 402 iowrite32(val, addr); 403 } 404 405 static int rsnd_dmapp_stop(struct rsnd_mod *mod, 406 struct rsnd_dai_stream *io, 407 struct rsnd_priv *priv) 408 { 409 struct rsnd_dma *dma = rsnd_mod_to_dma(mod); 410 int i; 411 412 rsnd_dmapp_bset(dma, 0, PDMACHCR_DE, PDMACHCR); 413 414 for (i = 0; i < 1024; i++) { 415 if (0 == (rsnd_dmapp_read(dma, PDMACHCR) & PDMACHCR_DE)) 416 return 0; 417 udelay(1); 418 } 419 420 return -EIO; 421 } 422 423 static int rsnd_dmapp_start(struct rsnd_mod *mod, 424 struct rsnd_dai_stream *io, 425 struct rsnd_priv *priv) 426 { 427 struct rsnd_dma *dma = rsnd_mod_to_dma(mod); 428 struct rsnd_dmapp *dmapp = rsnd_dma_to_dmapp(dma); 429 430 rsnd_dmapp_write(dma, dma->src_addr, PDMASAR); 431 rsnd_dmapp_write(dma, dma->dst_addr, PDMADAR); 432 rsnd_dmapp_write(dma, dmapp->chcr, PDMACHCR); 433 434 return 0; 435 } 436 437 static int rsnd_dmapp_attach(struct rsnd_dai_stream *io, 438 struct rsnd_dma *dma, 439 struct rsnd_mod *mod_from, struct rsnd_mod *mod_to) 440 { 441 struct rsnd_dmapp *dmapp = rsnd_dma_to_dmapp(dma); 442 struct rsnd_priv *priv = rsnd_io_to_priv(io); 443 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 444 struct device *dev = rsnd_priv_to_dev(priv); 445 446 dmapp->dmapp_id = dmac->dmapp_num; 447 dmapp->chcr = rsnd_dmapp_get_chcr(io, mod_from, mod_to) | PDMACHCR_DE; 448 449 dmac->dmapp_num++; 450 451 dev_dbg(dev, "id/src/dst/chcr = %d/%pad/%pad/%08x\n", 452 dmapp->dmapp_id, &dma->src_addr, &dma->dst_addr, dmapp->chcr); 453 454 return 0; 455 } 456 457 #ifdef CONFIG_DEBUG_FS 458 static void rsnd_dmapp_debug_info(struct seq_file *m, 459 struct rsnd_dai_stream *io, 460 struct rsnd_mod *mod) 461 { 462 struct rsnd_priv *priv = rsnd_mod_to_priv(mod); 463 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 464 struct rsnd_dma *dma = rsnd_mod_to_dma(mod); 465 struct rsnd_dmapp *dmapp = rsnd_dma_to_dmapp(dma); 466 467 rsnd_debugfs_reg_show(m, dmac->ppres, dmac->ppbase, 468 0x20 + 0x10 * dmapp->dmapp_id, 0x10); 469 } 470 #define DEBUG_INFO .debug_info = rsnd_dmapp_debug_info 471 #else 472 #define DEBUG_INFO 473 #endif 474 475 static struct rsnd_mod_ops rsnd_dmapp_ops = { 476 .name = "audmac-pp", 477 .start = rsnd_dmapp_start, 478 .stop = rsnd_dmapp_stop, 479 .quit = rsnd_dmapp_stop, 480 .get_status = rsnd_mod_get_status, 481 DEBUG_INFO 482 }; 483 484 struct rsnd_dma_addr { 485 dma_addr_t out_addr; 486 dma_addr_t in_addr; 487 }; 488 489 struct rsnd_dma_addr_dir { 490 struct rsnd_dma_addr capture[3]; 491 struct rsnd_dma_addr playback[3]; 492 }; 493 494 struct rsnd_dma_addr_map { 495 struct rsnd_dma_addr_dir src; 496 struct rsnd_dma_addr_dir ssi; 497 struct rsnd_dma_addr_dir ssiu; 498 }; 499 500 static dma_addr_t 501 rsnd_dma_addr_lookup(struct rsnd_dai_stream *io, 502 struct rsnd_mod *mod, 503 struct rsnd_priv *priv, 504 const struct rsnd_dma_addr_map *map, 505 int is_play, int is_from) 506 { 507 struct device *dev = rsnd_priv_to_dev(priv); 508 int is_ssi = !!(rsnd_io_to_mod_ssi(io) == mod) || 509 !!(rsnd_io_to_mod_ssiu(io) == mod); 510 int use_src = !!rsnd_io_to_mod_src(io); 511 int use_cmd = !!rsnd_io_to_mod_dvc(io) || 512 !!rsnd_io_to_mod_mix(io) || 513 !!rsnd_io_to_mod_ctu(io); 514 int id = rsnd_mod_id(mod); 515 const struct rsnd_dma_addr_dir *dir; 516 const struct rsnd_dma_addr *addr; 517 518 /* it shouldn't happen */ 519 if (use_cmd && !use_src) 520 dev_err(dev, "DVC is selected without SRC\n"); 521 522 /* use SSIU or SSI? */ 523 if (is_ssi && rsnd_ssi_use_busif(io)) 524 is_ssi++; 525 526 dev_dbg(dev, "dma%d addr : is_ssi=%d use_src=%d use_cmd=%d\n", 527 id, is_ssi, use_src, use_cmd); 528 529 switch (is_ssi) { 530 case 2: 531 dir = &map->ssiu; 532 break; 533 case 1: 534 dir = &map->ssi; 535 break; 536 default: 537 dir = &map->src; 538 break; 539 } 540 541 addr = is_play ? &dir->playback[use_src + use_cmd] 542 : &dir->capture[use_src + use_cmd]; 543 544 return is_from ? addr->out_addr : addr->in_addr; 545 } 546 547 /* 548 * Common DMAC Interface 549 */ 550 551 /* 552 * DMA read/write register offset 553 * 554 * RSND_xxx_I_N for Audio DMAC input 555 * RSND_xxx_O_N for Audio DMAC output 556 * RSND_xxx_I_P for Audio DMAC peri peri input 557 * RSND_xxx_O_P for Audio DMAC peri peri output 558 * 559 * ex) R-Car H2 case 560 * mod / DMAC in / DMAC out / DMAC PP in / DMAC pp out 561 * SSI : 0xec541000 / 0xec241008 / 0xec24100c 562 * SSIU: 0xec541000 / 0xec100000 / 0xec100000 / 0xec400000 / 0xec400000 563 * SCU : 0xec500000 / 0xec000000 / 0xec004000 / 0xec300000 / 0xec304000 564 * CMD : 0xec500000 / / 0xec008000 0xec308000 565 */ 566 #define RDMA_SSI_I_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0x8) 567 #define RDMA_SSI_O_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0xc) 568 569 #define RDMA_SSIU_I_N(addr, i, j) (addr ##_reg - 0x00441000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400) - (0x4000 * ((i) / 9) * ((j) / 4))) 570 #define RDMA_SSIU_O_N(addr, i, j) RDMA_SSIU_I_N(addr, i, j) 571 572 #define RDMA_SSIU_I_P(addr, i, j) (addr ##_reg - 0x00141000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400) - (0x4000 * ((i) / 9) * ((j) / 4))) 573 #define RDMA_SSIU_O_P(addr, i, j) RDMA_SSIU_I_P(addr, i, j) 574 575 #define RDMA_SRC_I_N(addr, i) (addr ##_reg - 0x00500000 + (0x400 * i)) 576 #define RDMA_SRC_O_N(addr, i) (addr ##_reg - 0x004fc000 + (0x400 * i)) 577 578 #define RDMA_SRC_I_P(addr, i) (addr ##_reg - 0x00200000 + (0x400 * i)) 579 #define RDMA_SRC_O_P(addr, i) (addr ##_reg - 0x001fc000 + (0x400 * i)) 580 581 #define RDMA_CMD_O_N(addr, i) (addr ##_reg - 0x004f8000 + (0x400 * i)) 582 #define RDMA_CMD_O_P(addr, i) (addr ##_reg - 0x001f8000 + (0x400 * i)) 583 584 static dma_addr_t 585 rsnd_gen2_dma_addr(struct rsnd_dai_stream *io, 586 struct rsnd_mod *mod, 587 int is_play, int is_from) 588 { 589 struct rsnd_priv *priv = rsnd_io_to_priv(io); 590 struct device *dev = rsnd_priv_to_dev(priv); 591 phys_addr_t ssi_reg = rsnd_gen_get_phy_addr(priv, RSND_BASE_SSI); 592 phys_addr_t src_reg = rsnd_gen_get_phy_addr(priv, RSND_BASE_SCU); 593 int id = rsnd_mod_id(mod); 594 int busif = rsnd_mod_id_sub(rsnd_io_to_mod_ssiu(io)); 595 const struct rsnd_dma_addr_map map = { 596 .src = { 597 .capture = { 598 { 0, 0 }, 599 { RDMA_SRC_O_N(src, id), RDMA_SRC_I_P(src, id) }, 600 { RDMA_CMD_O_N(src, id), RDMA_SRC_I_P(src, id) }, 601 }, 602 .playback = { 603 { 0, 0 }, 604 { RDMA_SRC_O_P(src, id), RDMA_SRC_I_N(src, id) }, 605 { RDMA_CMD_O_P(src, id), RDMA_SRC_I_N(src, id) }, 606 }, 607 }, 608 .ssi = { 609 .capture = { 610 { RDMA_SSI_O_N(ssi, id), 0 }, 611 { RDMA_SSIU_O_P(ssi, id, busif), 0 }, 612 { RDMA_SSIU_O_P(ssi, id, busif), 0 }, 613 }, 614 .playback = { 615 { 0, RDMA_SSI_I_N(ssi, id) }, 616 { 0, RDMA_SSIU_I_P(ssi, id, busif) }, 617 { 0, RDMA_SSIU_I_P(ssi, id, busif) }, 618 }, 619 }, 620 .ssiu = { 621 .capture = { 622 { RDMA_SSIU_O_N(ssi, id, busif), 0 }, 623 { RDMA_SSIU_O_P(ssi, id, busif), 0 }, 624 { RDMA_SSIU_O_P(ssi, id, busif), 0 }, 625 }, 626 .playback = { 627 { 0, RDMA_SSIU_I_N(ssi, id, busif) }, 628 { 0, RDMA_SSIU_I_P(ssi, id, busif) }, 629 { 0, RDMA_SSIU_I_P(ssi, id, busif) }, 630 }, 631 }, 632 }; 633 634 /* 635 * FIXME 636 * 637 * We can't support SSI9-4/5/6/7, because its address is 638 * out of calculation rule 639 */ 640 if ((id == 9) && (busif >= 4)) 641 dev_err(dev, "This driver doesn't support SSI%d-%d, so far", 642 id, busif); 643 644 return rsnd_dma_addr_lookup(io, mod, priv, &map, is_play, is_from); 645 } 646 647 /* 648 * ex) G3E case 649 * mod / DMAC in / DMAC out / DMAC PP in / DMAC pp out 650 * SSI : 0x13C31000 / 0x13C40000 / 0x13C40000 651 * SSIU: 0x13C31000 / 0x13C40000 / 0x13C40000 / 0xEC400000 / 0xEC400000 652 * SCU : 0x13C00000 / 0x13C10000 / 0x13C14000 / 0xEC300000 / 0xEC304000 653 * CMD : 0x13C00000 / / 0x13C18000 0xEC308000 654 */ 655 656 /* RZ/G3E DMA address macros */ 657 #define RDMA_SSI_I_N_G3E(addr, i) (addr ##_reg + 0x0000F000 + (0x1000 * (i))) 658 #define RDMA_SSI_O_N_G3E(addr, i) (addr ##_reg + 0x0000F000 + (0x1000 * (i))) 659 660 #define RDMA_SSIU_I_N_G3E(addr, i, j) (addr ##_reg + 0x0000F000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400) - (0x4000 * ((i) / 9) * ((j) / 4))) 661 #define RDMA_SSIU_O_N_G3E(addr, i, j) RDMA_SSIU_I_N_G3E(addr, i, j) 662 663 #define RDMA_SSIU_I_P_G3E(addr, i, j) (addr ##_reg + 0xD87CF000 + (0x1000 * (i)) + (((j) / 4) * 0xA000) + (((j) % 4) * 0x400) - (0x4000 * ((i) / 9) * ((j) / 4))) 664 #define RDMA_SSIU_O_P_G3E(addr, i, j) RDMA_SSIU_I_P_G3E(addr, i, j) 665 666 #define RDMA_SRC_I_N_G3E(addr, i) (addr ##_reg + 0x00010000 + (0x400 * (i))) 667 #define RDMA_SRC_O_N_G3E(addr, i) (addr ##_reg + 0x00014000 + (0x400 * (i))) 668 669 #define RDMA_SRC_I_P_G3E(addr, i) (addr ##_reg + 0xD8700000 + (0x400 * (i))) 670 #define RDMA_SRC_O_P_G3E(addr, i) (addr ##_reg + 0xD8704000 + (0x400 * (i))) 671 672 #define RDMA_CMD_O_N_G3E(addr, i) (addr ##_reg + 0x00018000 + (0x400 * (i))) 673 #define RDMA_CMD_O_P_G3E(addr, i) (addr ##_reg + 0xD8708000 + (0x400 * (i))) 674 675 static dma_addr_t 676 rsnd_rzg3e_dma_addr(struct rsnd_dai_stream *io, 677 struct rsnd_mod *mod, int is_play, int is_from) 678 { 679 struct rsnd_priv *priv = rsnd_io_to_priv(io); 680 phys_addr_t ssi_reg = rsnd_gen_get_phy_addr(priv, RSND_BASE_SSI); 681 phys_addr_t src_reg = rsnd_gen_get_phy_addr(priv, RSND_BASE_SCU); 682 int id = rsnd_mod_id(mod); 683 int busif = rsnd_mod_id_sub(rsnd_io_to_mod_ssiu(io)); 684 const struct rsnd_dma_addr_map map = { 685 .src = { 686 .capture = { 687 { 0, 0 }, 688 { RDMA_SRC_O_N_G3E(src, id), RDMA_SRC_I_P_G3E(src, id) }, 689 { RDMA_CMD_O_N_G3E(src, id), RDMA_SRC_I_P_G3E(src, id) }, 690 }, 691 .playback = { 692 { 0, 0 }, 693 { RDMA_SRC_O_P_G3E(src, id), RDMA_SRC_I_N_G3E(src, id) }, 694 { RDMA_CMD_O_P_G3E(src, id), RDMA_SRC_I_N_G3E(src, id) }, 695 }, 696 }, 697 .ssi = { 698 .capture = { 699 { RDMA_SSI_O_N_G3E(ssi, id), 0 }, 700 { RDMA_SSIU_O_P_G3E(ssi, id, busif), 0 }, 701 { RDMA_SSIU_O_P_G3E(ssi, id, busif), 0 }, 702 }, 703 .playback = { 704 { 0, RDMA_SSI_I_N_G3E(ssi, id) }, 705 { 0, RDMA_SSIU_I_P_G3E(ssi, id, busif) }, 706 { 0, RDMA_SSIU_I_P_G3E(ssi, id, busif) }, 707 }, 708 }, 709 .ssiu = { 710 .capture = { 711 { RDMA_SSIU_O_N_G3E(ssi, id, busif), 0 }, 712 { RDMA_SSIU_O_P_G3E(ssi, id, busif), 0 }, 713 { RDMA_SSIU_O_P_G3E(ssi, id, busif), 0 }, 714 }, 715 .playback = { 716 { 0, RDMA_SSIU_I_N_G3E(ssi, id, busif) }, 717 { 0, RDMA_SSIU_I_P_G3E(ssi, id, busif) }, 718 { 0, RDMA_SSIU_I_P_G3E(ssi, id, busif) }, 719 }, 720 }, 721 }; 722 723 return rsnd_dma_addr_lookup(io, mod, priv, &map, is_play, is_from); 724 } 725 726 /* 727 * Gen4 DMA read/write register offset 728 * 729 * ex) R-Car V4H case 730 * mod / SYS-DMAC in / SYS-DMAC out 731 * SSI_SDMC: 0xec400000 / 0xec400000 / 0xec400000 732 */ 733 #define RDMA_SSI_SDMC(addr, i) (addr + (0x8000 * i)) 734 static dma_addr_t 735 rsnd_gen4_dma_addr(struct rsnd_dai_stream *io, struct rsnd_mod *mod, 736 int is_play, int is_from) 737 { 738 struct rsnd_priv *priv = rsnd_io_to_priv(io); 739 phys_addr_t addr = rsnd_gen_get_phy_addr(priv, RSND_BASE_SDMC); 740 int id = rsnd_mod_id(mod); 741 int busif = rsnd_mod_id_sub(mod); 742 743 /* 744 * SSI0 only is supported 745 */ 746 if (id != 0) { 747 struct device *dev = rsnd_priv_to_dev(priv); 748 749 dev_err(dev, "This driver doesn't support non SSI0"); 750 return -EINVAL; 751 } 752 753 return RDMA_SSI_SDMC(addr, busif); 754 } 755 756 static dma_addr_t rsnd_dma_addr(struct rsnd_dai_stream *io, 757 struct rsnd_mod *mod, 758 int is_play, int is_from) 759 { 760 struct rsnd_priv *priv = rsnd_io_to_priv(io); 761 762 if (!mod) 763 return 0; 764 765 /* 766 * gen1 uses default DMA addr 767 */ 768 if (rsnd_is_gen1(priv)) 769 return 0; 770 else if (rsnd_is_gen4(priv)) 771 return rsnd_gen4_dma_addr(io, mod, is_play, is_from); 772 else if (rsnd_is_rzg3e(priv)) 773 return rsnd_rzg3e_dma_addr(io, mod, is_play, is_from); 774 else 775 return rsnd_gen2_dma_addr(io, mod, is_play, is_from); 776 } 777 778 #define MOD_MAX (RSND_MOD_MAX + 1) /* +Memory */ 779 static void rsnd_dma_of_path(struct rsnd_mod *this, 780 struct rsnd_dai_stream *io, 781 int is_play, 782 struct rsnd_mod **mod_from, 783 struct rsnd_mod **mod_to) 784 { 785 struct rsnd_mod *ssi; 786 struct rsnd_mod *src = rsnd_io_to_mod_src(io); 787 struct rsnd_mod *ctu = rsnd_io_to_mod_ctu(io); 788 struct rsnd_mod *mix = rsnd_io_to_mod_mix(io); 789 struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io); 790 struct rsnd_mod *mod[MOD_MAX]; 791 struct rsnd_mod *mod_start, *mod_end; 792 struct rsnd_priv *priv = rsnd_mod_to_priv(this); 793 struct device *dev = rsnd_priv_to_dev(priv); 794 int nr, i, idx; 795 796 /* 797 * It should use "rcar_sound,ssiu" (R-Car) or "ssiu" (RZ/G3E) on DT. 798 * We need to keep compatibility for old version. 799 * 800 * If it has "rcar_sound.ssiu" or "ssiu", it will be used. 801 * If not, "rcar_sound.ssi" or "ssi" will be used. 802 * see 803 * rsnd_ssiu_dma_req() 804 * rsnd_ssi_dma_req() 805 */ 806 if (rsnd_ssiu_of_node(priv)) { 807 struct rsnd_mod *ssiu = rsnd_io_to_mod_ssiu(io); 808 809 /* use SSIU */ 810 ssi = ssiu; 811 if (this == rsnd_io_to_mod_ssi(io)) 812 this = ssiu; 813 } else { 814 /* keep compatible, use SSI */ 815 ssi = rsnd_io_to_mod_ssi(io); 816 } 817 818 if (!ssi) 819 return; 820 821 nr = 0; 822 for (i = 0; i < MOD_MAX; i++) { 823 mod[i] = NULL; 824 nr += !!rsnd_io_to_mod(io, i); 825 } 826 827 /* 828 * [S] -*-> [E] 829 * [S] -*-> SRC -o-> [E] 830 * [S] -*-> SRC -> DVC -o-> [E] 831 * [S] -*-> SRC -> CTU -> MIX -> DVC -o-> [E] 832 * 833 * playback [S] = mem 834 * [E] = SSI 835 * 836 * capture [S] = SSI 837 * [E] = mem 838 * 839 * -*-> Audio DMAC 840 * -o-> Audio DMAC peri peri 841 */ 842 mod_start = (is_play) ? NULL : ssi; 843 mod_end = (is_play) ? ssi : NULL; 844 845 idx = 0; 846 mod[idx++] = mod_start; 847 for (i = 1; i < nr; i++) { 848 if (src) { 849 mod[idx++] = src; 850 src = NULL; 851 } else if (ctu) { 852 mod[idx++] = ctu; 853 ctu = NULL; 854 } else if (mix) { 855 mod[idx++] = mix; 856 mix = NULL; 857 } else if (dvc) { 858 mod[idx++] = dvc; 859 dvc = NULL; 860 } 861 } 862 mod[idx] = mod_end; 863 864 /* 865 * | SSI | SRC | 866 * -------------+-----+-----+ 867 * is_play | o | * | 868 * !is_play | * | o | 869 */ 870 if ((this == ssi) == (is_play)) { 871 *mod_from = mod[idx - 1]; 872 *mod_to = mod[idx]; 873 } else { 874 *mod_from = mod[0]; 875 *mod_to = mod[1]; 876 } 877 878 dev_dbg(dev, "module connection (this is %s)\n", rsnd_mod_name(this)); 879 for (i = 0; i <= idx; i++) { 880 dev_dbg(dev, " %s%s\n", 881 rsnd_mod_name(mod[i] ? mod[i] : &mem), 882 (mod[i] == *mod_from) ? " from" : 883 (mod[i] == *mod_to) ? " to" : ""); 884 } 885 } 886 887 static int rsnd_dma_alloc(struct rsnd_dai_stream *io, struct rsnd_mod *mod, 888 struct rsnd_mod **dma_mod) 889 { 890 struct rsnd_mod *mod_from = NULL; 891 struct rsnd_mod *mod_to = NULL; 892 struct rsnd_priv *priv = rsnd_io_to_priv(io); 893 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 894 struct device *dev = rsnd_priv_to_dev(priv); 895 struct rsnd_dma *dma; 896 struct rsnd_mod_ops *ops; 897 enum rsnd_mod_type type; 898 int (*attach)(struct rsnd_dai_stream *io, struct rsnd_dma *dma, 899 struct rsnd_mod *mod_from, struct rsnd_mod *mod_to); 900 int is_play = rsnd_io_is_play(io); 901 int ret, dma_id; 902 903 /* 904 * DMA failed. try to PIO mode 905 * see 906 * rsnd_ssi_fallback() 907 * rsnd_rdai_continuance_probe() 908 */ 909 if (!dmac) 910 return -EAGAIN; 911 912 rsnd_dma_of_path(mod, io, is_play, &mod_from, &mod_to); 913 914 /* for Gen2 or later */ 915 if (mod_from && mod_to) { 916 ops = &rsnd_dmapp_ops; 917 attach = rsnd_dmapp_attach; 918 dma_id = dmac->dmapp_num; 919 type = RSND_MOD_AUDMAPP; 920 } else { 921 ops = &rsnd_dmaen_ops; 922 attach = rsnd_dmaen_attach; 923 dma_id = dmac->dmaen_num; 924 type = RSND_MOD_AUDMA; 925 } 926 927 /* for Gen1, overwrite */ 928 if (rsnd_is_gen1(priv)) { 929 ops = &rsnd_dmaen_ops; 930 attach = rsnd_dmaen_attach; 931 dma_id = dmac->dmaen_num; 932 type = RSND_MOD_AUDMA; 933 } 934 935 dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL); 936 if (!dma) 937 return -ENOMEM; 938 939 *dma_mod = rsnd_mod_get(dma); 940 941 ret = rsnd_mod_init(priv, *dma_mod, ops, NULL, NULL, 942 type, dma_id); 943 if (ret < 0) 944 return ret; 945 946 dev_dbg(dev, "%s %s -> %s\n", 947 rsnd_mod_name(*dma_mod), 948 rsnd_mod_name(mod_from ? mod_from : &mem), 949 rsnd_mod_name(mod_to ? mod_to : &mem)); 950 951 ret = attach(io, dma, mod_from, mod_to); 952 if (ret < 0) 953 return ret; 954 955 dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1); 956 dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0); 957 dma->mod_from = mod_from; 958 dma->mod_to = mod_to; 959 960 return 0; 961 } 962 963 int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod, 964 struct rsnd_mod **dma_mod) 965 { 966 if (!(*dma_mod)) { 967 int ret = rsnd_dma_alloc(io, mod, dma_mod); 968 969 if (ret < 0) 970 return ret; 971 } 972 973 return rsnd_dai_connect(*dma_mod, io, (*dma_mod)->type); 974 } 975 976 int rsnd_dma_probe(struct rsnd_priv *priv) 977 { 978 struct platform_device *pdev = rsnd_priv_to_pdev(priv); 979 struct device *dev = rsnd_priv_to_dev(priv); 980 struct rsnd_dma_ctrl *dmac; 981 struct resource *res; 982 983 /* 984 * for Gen1 985 */ 986 if (rsnd_is_gen1(priv)) 987 return 0; 988 989 /* 990 * for Gen2 or later 991 */ 992 dmac = devm_kzalloc(dev, sizeof(*dmac), GFP_KERNEL); 993 if (!dmac) { 994 dev_err(dev, "dma allocate failed\n"); 995 return 0; /* it will be PIO mode */ 996 } 997 998 /* for Gen4 doesn't have DMA-pp */ 999 if (rsnd_is_gen4(priv)) 1000 goto audmapp_end; 1001 1002 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "audmapp"); 1003 if (!res) { 1004 dev_err(dev, "lack of audmapp in DT\n"); 1005 return 0; /* it will be PIO mode */ 1006 } 1007 1008 /* 1009 * Audio DMAC peri-peri clock and reset for RZ/G3E. 1010 * These use optional APIs, so they gracefully return NULL 1011 * (no error) on platforms whose DT does not provide them. 1012 * 1013 * Enable the clock first so the block sees a stable clock on 1014 * the way out of reset, then deassert the reset line. 1015 */ 1016 dmac->audmapp_clk = devm_clk_get_optional_enabled(dev, "audmapp"); 1017 if (IS_ERR(dmac->audmapp_clk)) 1018 return dev_err_probe(dev, PTR_ERR(dmac->audmapp_clk), 1019 "failed to get audmapp clock\n"); 1020 1021 dmac->audmapp_rstc = 1022 devm_reset_control_get_optional_exclusive_deasserted(dev, "audmapp"); 1023 if (IS_ERR(dmac->audmapp_rstc)) 1024 return dev_err_probe(dev, PTR_ERR(dmac->audmapp_rstc), 1025 "failed to get audmapp reset\n"); 1026 1027 dmac->dmapp_num = 0; 1028 dmac->ppres = res->start; 1029 dmac->ppbase = devm_ioremap_resource(dev, res); 1030 if (IS_ERR(dmac->ppbase)) 1031 return PTR_ERR(dmac->ppbase); 1032 audmapp_end: 1033 priv->dma = dmac; 1034 1035 /* dummy mem mod for debug */ 1036 return rsnd_mod_init(NULL, &mem, &mem_ops, NULL, NULL, 0, 0); 1037 } 1038 1039 void rsnd_dma_suspend(struct rsnd_priv *priv) 1040 { 1041 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 1042 1043 if (dmac) { 1044 /* Mirror probe (which enables clk before deasserting reset) */ 1045 rsnd_suspend_clk_reset(NULL, dmac->audmapp_rstc); 1046 clk_disable_unprepare(dmac->audmapp_clk); 1047 } 1048 } 1049 1050 void rsnd_dma_resume(struct rsnd_priv *priv) 1051 { 1052 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); 1053 1054 if (dmac) { 1055 /* Clock must be stable before reset is deasserted */ 1056 clk_prepare_enable(dmac->audmapp_clk); 1057 rsnd_resume_clk_reset(NULL, dmac->audmapp_rstc); 1058 } 1059 } 1060