1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * vgic_irq.c - Test userspace injection of IRQs 4 * 5 * This test validates the injection of IRQs from userspace using various 6 * methods (e.g., KVM_IRQ_LINE) and modes (e.g., EOI). The guest "asks" the 7 * host to inject a specific intid via a GUEST_SYNC call, and then checks that 8 * it received it. 9 */ 10 #include <asm/kvm.h> 11 #include <asm/kvm_para.h> 12 #include <sys/eventfd.h> 13 #include <linux/sizes.h> 14 15 #include "processor.h" 16 #include "test_util.h" 17 #include "kvm_util.h" 18 #include "gic.h" 19 #include "gic_v3.h" 20 #include "vgic.h" 21 22 /* 23 * Stores the user specified args; it's passed to the guest and to every test 24 * function. 25 */ 26 struct test_args { 27 u32 nr_irqs; /* number of KVM supported IRQs. */ 28 bool eoi_split; /* 1 is eoir+dir, 0 is eoir only */ 29 bool level_sensitive; /* 1 is level, 0 is edge */ 30 int kvm_max_routes; /* output of KVM_CAP_IRQ_ROUTING */ 31 bool kvm_supports_irqfd; /* output of KVM_CAP_IRQFD */ 32 u32 shared_data; 33 }; 34 35 /* 36 * KVM implements 32 priority levels: 37 * 0x00 (highest priority) - 0xF8 (lowest priority), in steps of 8 38 * 39 * Note that these macros will still be correct in the case that KVM implements 40 * more priority levels. Also note that 32 is the minimum for GICv3 and GICv2. 41 */ 42 #define KVM_NUM_PRIOS 32 43 #define KVM_PRIO_SHIFT 3 /* steps of 8 = 1 << 3 */ 44 #define KVM_PRIO_STEPS (1 << KVM_PRIO_SHIFT) /* 8 */ 45 #define LOWEST_PRIO (KVM_NUM_PRIOS - 1) 46 #define CPU_PRIO_MASK (LOWEST_PRIO << KVM_PRIO_SHIFT) /* 0xf8 */ 47 #define IRQ_DEFAULT_PRIO (LOWEST_PRIO - 1) 48 #define IRQ_DEFAULT_PRIO_REG (IRQ_DEFAULT_PRIO << KVM_PRIO_SHIFT) /* 0xf0 */ 49 50 /* 51 * The kvm_inject_* utilities are used by the guest to ask the host to inject 52 * interrupts (e.g., using the KVM_IRQ_LINE ioctl). 53 */ 54 55 typedef enum { 56 KVM_INJECT_EDGE_IRQ_LINE = 1, 57 KVM_SET_IRQ_LINE, 58 KVM_SET_IRQ_LINE_HIGH, 59 KVM_SET_LEVEL_INFO_HIGH, 60 KVM_INJECT_IRQFD, 61 KVM_WRITE_ISPENDR, 62 KVM_WRITE_ISACTIVER, 63 } kvm_inject_cmd; 64 65 struct kvm_inject_args { 66 kvm_inject_cmd cmd; 67 u32 first_intid; 68 u32 num; 69 int level; 70 bool expect_failure; 71 }; 72 73 /* Used on the guest side to perform the hypercall. */ 74 static void kvm_inject_call(kvm_inject_cmd cmd, u32 first_intid, 75 u32 num, int level, bool expect_failure); 76 77 /* Used on the host side to get the hypercall info. */ 78 static void kvm_inject_get_call(struct kvm_vm *vm, struct ucall *uc, 79 struct kvm_inject_args *args); 80 81 #define _KVM_INJECT_MULTI(cmd, intid, num, expect_failure) \ 82 kvm_inject_call(cmd, intid, num, -1 /* not used */, expect_failure) 83 84 #define KVM_INJECT_MULTI(cmd, intid, num) \ 85 _KVM_INJECT_MULTI(cmd, intid, num, false) 86 87 #define _KVM_INJECT(cmd, intid, expect_failure) \ 88 _KVM_INJECT_MULTI(cmd, intid, 1, expect_failure) 89 90 #define KVM_INJECT(cmd, intid) \ 91 _KVM_INJECT_MULTI(cmd, intid, 1, false) 92 93 #define KVM_ACTIVATE(cmd, intid) \ 94 kvm_inject_call(cmd, intid, 1, 1, false); 95 96 struct kvm_inject_desc { 97 kvm_inject_cmd cmd; 98 /* can inject PPIs, PPIs, and/or SPIs. */ 99 bool sgi, ppi, spi; 100 }; 101 102 static struct kvm_inject_desc inject_edge_fns[] = { 103 /* sgi ppi spi */ 104 { KVM_INJECT_EDGE_IRQ_LINE, false, false, true }, 105 { KVM_INJECT_IRQFD, false, false, true }, 106 { KVM_WRITE_ISPENDR, true, false, true }, 107 { 0, }, 108 }; 109 110 static struct kvm_inject_desc inject_level_fns[] = { 111 /* sgi ppi spi */ 112 { KVM_SET_IRQ_LINE_HIGH, false, true, true }, 113 { KVM_SET_LEVEL_INFO_HIGH, false, true, true }, 114 { KVM_INJECT_IRQFD, false, false, true }, 115 { KVM_WRITE_ISPENDR, false, true, true }, 116 { 0, }, 117 }; 118 119 static struct kvm_inject_desc set_active_fns[] = { 120 /* sgi ppi spi */ 121 { KVM_WRITE_ISACTIVER, true, true, true }, 122 { 0, }, 123 }; 124 125 #define for_each_inject_fn(t, f) \ 126 for ((f) = (t); (f)->cmd; (f)++) 127 128 #define for_each_supported_inject_fn(args, t, f) \ 129 for_each_inject_fn(t, f) \ 130 if ((args)->kvm_supports_irqfd || (f)->cmd != KVM_INJECT_IRQFD) 131 132 #define for_each_supported_activate_fn(args, t, f) \ 133 for_each_supported_inject_fn((args), (t), (f)) 134 135 /* Shared between the guest main thread and the IRQ handlers. */ 136 volatile u64 irq_handled; 137 volatile u32 irqnr_received[MAX_SPI + 1]; 138 139 static void reset_stats(void) 140 { 141 int i; 142 143 irq_handled = 0; 144 for (i = 0; i <= MAX_SPI; i++) 145 irqnr_received[i] = 0; 146 } 147 148 static u64 gic_read_ap1r0(void) 149 { 150 u64 reg = read_sysreg_s(SYS_ICC_AP1R0_EL1); 151 152 dsb(sy); 153 return reg; 154 } 155 156 static void gic_write_ap1r0(u64 val) 157 { 158 write_sysreg_s(val, SYS_ICC_AP1R0_EL1); 159 isb(); 160 } 161 162 static void guest_set_irq_line(u32 intid, u32 level); 163 164 static void guest_irq_generic_handler(bool eoi_split, bool level_sensitive) 165 { 166 u32 intid = gic_get_and_ack_irq(); 167 168 if (intid == IAR_SPURIOUS) 169 return; 170 171 GUEST_ASSERT(gic_irq_get_active(intid)); 172 173 if (!level_sensitive) 174 GUEST_ASSERT(!gic_irq_get_pending(intid)); 175 176 if (level_sensitive) 177 guest_set_irq_line(intid, 0); 178 179 GUEST_ASSERT(intid < MAX_SPI); 180 irqnr_received[intid] += 1; 181 irq_handled += 1; 182 183 gic_set_eoi(intid); 184 GUEST_ASSERT_EQ(gic_read_ap1r0(), 0); 185 if (eoi_split) 186 gic_set_dir(intid); 187 188 GUEST_ASSERT(!gic_irq_get_active(intid)); 189 GUEST_ASSERT(!gic_irq_get_pending(intid)); 190 } 191 192 static void kvm_inject_call(kvm_inject_cmd cmd, u32 first_intid, 193 u32 num, int level, bool expect_failure) 194 { 195 struct kvm_inject_args args = { 196 .cmd = cmd, 197 .first_intid = first_intid, 198 .num = num, 199 .level = level, 200 .expect_failure = expect_failure, 201 }; 202 GUEST_SYNC(&args); 203 } 204 205 #define GUEST_ASSERT_IAR_EMPTY() \ 206 do { \ 207 u32 _intid; \ 208 _intid = gic_get_and_ack_irq(); \ 209 GUEST_ASSERT(_intid == IAR_SPURIOUS); \ 210 } while (0) 211 212 #define CAT_HELPER(a, b) a ## b 213 #define CAT(a, b) CAT_HELPER(a, b) 214 #define PREFIX guest_irq_handler_ 215 #define GUEST_IRQ_HANDLER_NAME(split, lev) CAT(PREFIX, CAT(split, lev)) 216 #define GENERATE_GUEST_IRQ_HANDLER(split, lev) \ 217 static void CAT(PREFIX, CAT(split, lev))(struct ex_regs *regs) \ 218 { \ 219 guest_irq_generic_handler(split, lev); \ 220 } 221 222 GENERATE_GUEST_IRQ_HANDLER(0, 0); 223 GENERATE_GUEST_IRQ_HANDLER(0, 1); 224 GENERATE_GUEST_IRQ_HANDLER(1, 0); 225 GENERATE_GUEST_IRQ_HANDLER(1, 1); 226 227 static void (*guest_irq_handlers[2][2])(struct ex_regs *) = { 228 {GUEST_IRQ_HANDLER_NAME(0, 0), GUEST_IRQ_HANDLER_NAME(0, 1),}, 229 {GUEST_IRQ_HANDLER_NAME(1, 0), GUEST_IRQ_HANDLER_NAME(1, 1),}, 230 }; 231 232 static void reset_priorities(struct test_args *args) 233 { 234 int i; 235 236 for (i = 0; i < args->nr_irqs; i++) 237 gic_set_priority(i, IRQ_DEFAULT_PRIO_REG); 238 } 239 240 static void guest_set_irq_line(u32 intid, u32 level) 241 { 242 kvm_inject_call(KVM_SET_IRQ_LINE, intid, 1, level, false); 243 } 244 245 static void test_inject_fail(struct test_args *args, 246 u32 intid, kvm_inject_cmd cmd) 247 { 248 reset_stats(); 249 250 _KVM_INJECT(cmd, intid, true); 251 /* no IRQ to handle on entry */ 252 253 GUEST_ASSERT_EQ(irq_handled, 0); 254 GUEST_ASSERT_IAR_EMPTY(); 255 } 256 257 static void guest_inject(struct test_args *args, 258 u32 first_intid, u32 num, 259 kvm_inject_cmd cmd) 260 { 261 u32 i; 262 263 reset_stats(); 264 265 /* Cycle over all priorities to make things more interesting. */ 266 for (i = first_intid; i < num + first_intid; i++) 267 gic_set_priority(i, (i % (KVM_NUM_PRIOS - 1)) << 3); 268 269 asm volatile("msr daifset, #2" : : : "memory"); 270 KVM_INJECT_MULTI(cmd, first_intid, num); 271 272 while (irq_handled < num) { 273 wfi(); 274 local_irq_enable(); 275 isb(); /* handle IRQ */ 276 local_irq_disable(); 277 } 278 local_irq_enable(); 279 280 GUEST_ASSERT_EQ(irq_handled, num); 281 for (i = first_intid; i < num + first_intid; i++) 282 GUEST_ASSERT_EQ(irqnr_received[i], 1); 283 GUEST_ASSERT_IAR_EMPTY(); 284 285 reset_priorities(args); 286 } 287 288 /* 289 * Restore the active state of multiple concurrent IRQs (given by 290 * concurrent_irqs). This does what a live-migration would do on the 291 * destination side assuming there are some active IRQs that were not 292 * deactivated yet. 293 */ 294 static void guest_restore_active(struct test_args *args, 295 u32 first_intid, u32 num, 296 kvm_inject_cmd cmd) 297 { 298 u32 prio, intid, ap1r; 299 int i; 300 301 /* 302 * Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs 303 * in descending order, so intid+1 can preempt intid. 304 */ 305 for (i = 0, prio = (num - 1) * 8; i < num; i++, prio -= 8) { 306 GUEST_ASSERT(prio >= 0); 307 intid = i + first_intid; 308 gic_set_priority(intid, prio); 309 } 310 311 /* 312 * In a real migration, KVM would restore all GIC state before running 313 * guest code. 314 */ 315 for (i = 0; i < num; i++) { 316 intid = i + first_intid; 317 KVM_ACTIVATE(cmd, intid); 318 ap1r = gic_read_ap1r0(); 319 ap1r |= 1U << i; 320 gic_write_ap1r0(ap1r); 321 } 322 323 /* This is where the "migration" would occur. */ 324 325 /* finish handling the IRQs starting with the highest priority one. */ 326 for (i = 0; i < num; i++) { 327 intid = num - i - 1 + first_intid; 328 gic_set_eoi(intid); 329 if (args->eoi_split) 330 gic_set_dir(intid); 331 } 332 333 for (i = 0; i < num; i++) 334 GUEST_ASSERT(!gic_irq_get_active(i + first_intid)); 335 GUEST_ASSERT_EQ(gic_read_ap1r0(), 0); 336 GUEST_ASSERT_IAR_EMPTY(); 337 } 338 339 /* 340 * Polls the IAR until it's not a spurious interrupt. 341 * 342 * This function should only be used in test_inject_preemption (with IRQs 343 * masked). 344 */ 345 static u32 wait_for_and_activate_irq(void) 346 { 347 u32 intid; 348 349 do { 350 asm volatile("wfi" : : : "memory"); 351 intid = gic_get_and_ack_irq(); 352 } while (intid == IAR_SPURIOUS); 353 354 return intid; 355 } 356 357 /* 358 * Inject multiple concurrent IRQs (num IRQs starting at first_intid) and 359 * handle them without handling the actual exceptions. This is done by masking 360 * interrupts for the whole test. 361 */ 362 static void test_inject_preemption(struct test_args *args, 363 u32 first_intid, int num, 364 const unsigned long *exclude, 365 kvm_inject_cmd cmd) 366 { 367 u32 intid, prio, step = KVM_PRIO_STEPS; 368 int i; 369 370 /* Set the priorities of the first (KVM_NUM_PRIOS - 1) IRQs 371 * in descending order, so intid+1 can preempt intid. 372 */ 373 for (i = 0, prio = (num - 1) * step; i < num; i++, prio -= step) { 374 GUEST_ASSERT(prio >= 0); 375 intid = i + first_intid; 376 gic_set_priority(intid, prio); 377 } 378 379 local_irq_disable(); 380 381 for (i = 0; i < num; i++) { 382 u32 tmp; 383 intid = i + first_intid; 384 385 if (exclude && test_bit(i, exclude)) 386 continue; 387 388 KVM_INJECT(cmd, intid); 389 /* Each successive IRQ will preempt the previous one. */ 390 tmp = wait_for_and_activate_irq(); 391 GUEST_ASSERT_EQ(tmp, intid); 392 if (args->level_sensitive) 393 guest_set_irq_line(intid, 0); 394 } 395 396 /* finish handling the IRQs starting with the highest priority one. */ 397 for (i = 0; i < num; i++) { 398 intid = num - i - 1 + first_intid; 399 400 if (exclude && test_bit(intid - first_intid, exclude)) 401 continue; 402 403 gic_set_eoi(intid); 404 } 405 406 if (args->eoi_split) { 407 for (i = 0; i < num; i++) { 408 intid = i + first_intid; 409 410 if (exclude && test_bit(i, exclude)) 411 continue; 412 413 if (args->eoi_split) 414 gic_set_dir(intid); 415 } 416 } 417 418 local_irq_enable(); 419 420 for (i = 0; i < num; i++) { 421 if (exclude && test_bit(i, exclude)) 422 continue; 423 424 GUEST_ASSERT(!gic_irq_get_active(i + first_intid)); 425 } 426 GUEST_ASSERT_EQ(gic_read_ap1r0(), 0); 427 GUEST_ASSERT_IAR_EMPTY(); 428 429 reset_priorities(args); 430 } 431 432 static void test_injection(struct test_args *args, struct kvm_inject_desc *f) 433 { 434 u32 nr_irqs = args->nr_irqs; 435 436 if (f->sgi) { 437 guest_inject(args, MIN_SGI, 1, f->cmd); 438 guest_inject(args, 0, 16, f->cmd); 439 } 440 441 if (f->ppi) 442 guest_inject(args, MIN_PPI, 1, f->cmd); 443 444 if (f->spi) { 445 guest_inject(args, MIN_SPI, 1, f->cmd); 446 guest_inject(args, nr_irqs - 1, 1, f->cmd); 447 guest_inject(args, MIN_SPI, nr_irqs - MIN_SPI, f->cmd); 448 } 449 } 450 451 static void test_injection_failure(struct test_args *args, 452 struct kvm_inject_desc *f) 453 { 454 u32 bad_intid[] = { args->nr_irqs, 1020, 1024, 1120, 5120, ~0U, }; 455 int i; 456 457 for (i = 0; i < ARRAY_SIZE(bad_intid); i++) 458 test_inject_fail(args, bad_intid[i], f->cmd); 459 } 460 461 static void test_preemption(struct test_args *args, struct kvm_inject_desc *f) 462 { 463 /* Timer PPIs cannot be injected from userspace */ 464 static const unsigned long ppi_exclude = (BIT(27 - MIN_PPI) | 465 BIT(30 - MIN_PPI) | 466 BIT(28 - MIN_PPI) | 467 BIT(26 - MIN_PPI)); 468 469 if (f->sgi) 470 test_inject_preemption(args, MIN_SGI, 16, NULL, f->cmd); 471 472 if (f->ppi) 473 test_inject_preemption(args, MIN_PPI, 16, &ppi_exclude, f->cmd); 474 475 if (f->spi) 476 test_inject_preemption(args, MIN_SPI, 31, NULL, f->cmd); 477 } 478 479 static void test_restore_active(struct test_args *args, struct kvm_inject_desc *f) 480 { 481 if (f->sgi) 482 guest_restore_active(args, MIN_SGI, 16, f->cmd); 483 484 if (f->ppi) 485 guest_restore_active(args, MIN_PPI, 16, f->cmd); 486 487 if (f->spi) 488 guest_restore_active(args, MIN_SPI, 31, f->cmd); 489 } 490 491 static void guest_code(struct test_args *args) 492 { 493 u32 i, nr_irqs = args->nr_irqs; 494 bool level_sensitive = args->level_sensitive; 495 struct kvm_inject_desc *f, *inject_fns; 496 497 gic_init(GIC_V3, 1); 498 499 for (i = MIN_SPI; i < nr_irqs; i++) 500 gic_irq_set_config(i, !level_sensitive); 501 502 for (i = 0; i < nr_irqs; i++) 503 gic_irq_enable(i); 504 505 gic_set_eoi_split(args->eoi_split); 506 507 reset_priorities(args); 508 gic_set_priority_mask(CPU_PRIO_MASK); 509 510 inject_fns = level_sensitive ? inject_level_fns 511 : inject_edge_fns; 512 513 local_irq_enable(); 514 515 /* Start the tests. */ 516 for_each_supported_inject_fn(args, inject_fns, f) { 517 test_injection(args, f); 518 test_preemption(args, f); 519 test_injection_failure(args, f); 520 } 521 522 /* 523 * Restore the active state of IRQs. This would happen when live 524 * migrating IRQs in the middle of being handled. 525 */ 526 for_each_supported_activate_fn(args, set_active_fns, f) 527 test_restore_active(args, f); 528 529 GUEST_DONE(); 530 } 531 532 static void kvm_irq_line_check(struct kvm_vm *vm, u32 intid, int level, 533 struct test_args *test_args, bool expect_failure) 534 { 535 int ret; 536 537 if (!expect_failure) { 538 kvm_arm_irq_line(vm, intid, level); 539 } else { 540 /* The interface doesn't allow larger intid's. */ 541 if (intid > KVM_ARM_IRQ_NUM_MASK) 542 return; 543 544 ret = _kvm_arm_irq_line(vm, intid, level); 545 TEST_ASSERT(ret != 0 && errno == EINVAL, 546 "Bad intid %i did not cause KVM_IRQ_LINE " 547 "error: rc: %i errno: %i", intid, ret, errno); 548 } 549 } 550 551 void kvm_irq_set_level_info_check(int gic_fd, u32 intid, int level, 552 bool expect_failure) 553 { 554 if (!expect_failure) { 555 kvm_irq_set_level_info(gic_fd, intid, level); 556 } else { 557 int ret = _kvm_irq_set_level_info(gic_fd, intid, level); 558 /* 559 * The kernel silently fails for invalid SPIs and SGIs (which 560 * are not level-sensitive). It only checks for intid to not 561 * spill over 1U << 10 (the max reserved SPI). Also, callers 562 * are supposed to mask the intid with 0x3ff (1023). 563 */ 564 if (intid > VGIC_MAX_RESERVED) 565 TEST_ASSERT(ret != 0 && errno == EINVAL, 566 "Bad intid %i did not cause VGIC_GRP_LEVEL_INFO " 567 "error: rc: %i errno: %i", intid, ret, errno); 568 else 569 TEST_ASSERT(!ret, "KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO " 570 "for intid %i failed, rc: %i errno: %i", 571 intid, ret, errno); 572 } 573 } 574 575 static void kvm_set_gsi_routing_irqchip_check(struct kvm_vm *vm, 576 u32 intid, u32 num, 577 u32 kvm_max_routes, 578 bool expect_failure) 579 { 580 struct kvm_irq_routing *routing; 581 int ret; 582 u64 i; 583 584 assert(num <= kvm_max_routes && kvm_max_routes <= KVM_MAX_IRQ_ROUTES); 585 586 routing = kvm_gsi_routing_create(); 587 for (i = intid; i < (u64)intid + num; i++) 588 kvm_gsi_routing_irqchip_add(routing, i - MIN_SPI, i - MIN_SPI); 589 590 if (!expect_failure) { 591 kvm_gsi_routing_write(vm, routing); 592 } else { 593 ret = _kvm_gsi_routing_write(vm, routing); 594 /* The kernel only checks e->irqchip.pin >= KVM_IRQCHIP_NUM_PINS */ 595 if (((u64)intid + num - 1 - MIN_SPI) >= KVM_IRQCHIP_NUM_PINS) 596 TEST_ASSERT(ret != 0 && errno == EINVAL, 597 "Bad intid %u did not cause KVM_SET_GSI_ROUTING " 598 "error: rc: %i errno: %i", intid, ret, errno); 599 else 600 TEST_ASSERT(ret == 0, "KVM_SET_GSI_ROUTING " 601 "for intid %i failed, rc: %i errno: %i", 602 intid, ret, errno); 603 } 604 } 605 606 static void kvm_irq_write_ispendr_check(int gic_fd, u32 intid, 607 struct kvm_vcpu *vcpu, 608 bool expect_failure) 609 { 610 /* 611 * Ignore this when expecting failure as invalid intids will lead to 612 * either trying to inject SGIs when we configured the test to be 613 * level_sensitive (or the reverse), or inject large intids which 614 * will lead to writing above the ISPENDR register space (and we 615 * don't want to do that either). 616 */ 617 if (!expect_failure) 618 kvm_irq_write_ispendr(gic_fd, intid, vcpu); 619 } 620 621 static void kvm_routing_and_irqfd_check(struct kvm_vm *vm, 622 u32 intid, u32 num, u32 kvm_max_routes, 623 bool expect_failure) 624 { 625 int fd[MAX_SPI]; 626 u64 val; 627 int ret, f; 628 u64 i; 629 630 /* 631 * There is no way to try injecting an SGI or PPI as the interface 632 * starts counting from the first SPI (above the private ones), so just 633 * exit. 634 */ 635 if (INTID_IS_SGI(intid) || INTID_IS_PPI(intid)) 636 return; 637 638 kvm_set_gsi_routing_irqchip_check(vm, intid, num, 639 kvm_max_routes, expect_failure); 640 641 /* 642 * If expect_failure, then just to inject anyway. These 643 * will silently fail. And in any case, the guest will check 644 * that no actual interrupt was injected for those cases. 645 */ 646 647 for (f = 0, i = intid; i < (u64)intid + num; i++, f++) 648 fd[f] = kvm_new_eventfd(); 649 650 for (f = 0, i = intid; i < (u64)intid + num; i++, f++) { 651 assert(i <= (u64)UINT_MAX); 652 kvm_assign_irqfd(vm, i - MIN_SPI, fd[f]); 653 } 654 655 for (f = 0, i = intid; i < (u64)intid + num; i++, f++) { 656 val = 1; 657 ret = write(fd[f], &val, sizeof(u64)); 658 TEST_ASSERT(ret == sizeof(u64), 659 __KVM_SYSCALL_ERROR("write()", ret)); 660 } 661 662 for (f = 0, i = intid; i < (u64)intid + num; i++, f++) 663 kvm_close(fd[f]); 664 } 665 666 /* handles the valid case: intid=0xffffffff num=1 */ 667 #define for_each_intid(first, num, tmp, i) \ 668 for ((tmp) = (i) = (first); \ 669 (tmp) < (u64)(first) + (u64)(num); \ 670 (tmp)++, (i)++) 671 672 static void run_guest_cmd(struct kvm_vcpu *vcpu, int gic_fd, 673 struct kvm_inject_args *inject_args, 674 struct test_args *test_args) 675 { 676 kvm_inject_cmd cmd = inject_args->cmd; 677 u32 intid = inject_args->first_intid; 678 u32 num = inject_args->num; 679 int level = inject_args->level; 680 bool expect_failure = inject_args->expect_failure; 681 struct kvm_vm *vm = vcpu->vm; 682 u64 tmp; 683 u32 i; 684 685 /* handles the valid case: intid=0xffffffff num=1 */ 686 assert(intid < UINT_MAX - num || num == 1); 687 688 switch (cmd) { 689 case KVM_INJECT_EDGE_IRQ_LINE: 690 for_each_intid(intid, num, tmp, i) 691 kvm_irq_line_check(vm, i, 1, test_args, 692 expect_failure); 693 for_each_intid(intid, num, tmp, i) 694 kvm_irq_line_check(vm, i, 0, test_args, 695 expect_failure); 696 break; 697 case KVM_SET_IRQ_LINE: 698 for_each_intid(intid, num, tmp, i) 699 kvm_irq_line_check(vm, i, level, test_args, 700 expect_failure); 701 break; 702 case KVM_SET_IRQ_LINE_HIGH: 703 for_each_intid(intid, num, tmp, i) 704 kvm_irq_line_check(vm, i, 1, test_args, 705 expect_failure); 706 break; 707 case KVM_SET_LEVEL_INFO_HIGH: 708 for_each_intid(intid, num, tmp, i) 709 kvm_irq_set_level_info_check(gic_fd, i, 1, 710 expect_failure); 711 break; 712 case KVM_INJECT_IRQFD: 713 kvm_routing_and_irqfd_check(vm, intid, num, 714 test_args->kvm_max_routes, 715 expect_failure); 716 break; 717 case KVM_WRITE_ISPENDR: 718 for (i = intid; i < intid + num; i++) 719 kvm_irq_write_ispendr_check(gic_fd, i, vcpu, 720 expect_failure); 721 break; 722 case KVM_WRITE_ISACTIVER: 723 for (i = intid; i < intid + num; i++) 724 kvm_irq_write_isactiver(gic_fd, i, vcpu); 725 break; 726 default: 727 break; 728 } 729 } 730 731 static void kvm_inject_get_call(struct kvm_vm *vm, struct ucall *uc, 732 struct kvm_inject_args *args) 733 { 734 struct kvm_inject_args *kvm_args_hva; 735 gva_t kvm_args_gva; 736 737 kvm_args_gva = uc->args[1]; 738 kvm_args_hva = (struct kvm_inject_args *)addr_gva2hva(vm, kvm_args_gva); 739 memcpy(args, kvm_args_hva, sizeof(struct kvm_inject_args)); 740 } 741 742 static void print_args(struct test_args *args) 743 { 744 printf("nr-irqs=%d level-sensitive=%d eoi-split=%d\n", 745 args->nr_irqs, args->level_sensitive, 746 args->eoi_split); 747 } 748 749 static void test_vgic(u32 nr_irqs, bool level_sensitive, bool eoi_split) 750 { 751 struct ucall uc; 752 int gic_fd; 753 struct kvm_vcpu *vcpu; 754 struct kvm_vm *vm; 755 struct kvm_inject_args inject_args; 756 gva_t args_gva; 757 758 struct test_args args = { 759 .nr_irqs = nr_irqs, 760 .level_sensitive = level_sensitive, 761 .eoi_split = eoi_split, 762 .kvm_max_routes = kvm_check_cap(KVM_CAP_IRQ_ROUTING), 763 .kvm_supports_irqfd = kvm_check_cap(KVM_CAP_IRQFD), 764 }; 765 766 print_args(&args); 767 768 vm = vm_create_with_one_vcpu(&vcpu, guest_code); 769 770 vm_init_descriptor_tables(vm); 771 vcpu_init_descriptor_tables(vcpu); 772 773 /* Setup the guest args page (so it gets the args). */ 774 args_gva = vm_alloc_page(vm); 775 memcpy(addr_gva2hva(vm, args_gva), &args, sizeof(args)); 776 vcpu_args_set(vcpu, 1, args_gva); 777 778 gic_fd = vgic_v3_setup(vm, 1, nr_irqs); 779 780 vm_install_exception_handler(vm, VECTOR_IRQ_CURRENT, 781 guest_irq_handlers[args.eoi_split][args.level_sensitive]); 782 783 while (1) { 784 vcpu_run(vcpu); 785 786 switch (get_ucall(vcpu, &uc)) { 787 case UCALL_SYNC: 788 kvm_inject_get_call(vm, &uc, &inject_args); 789 run_guest_cmd(vcpu, gic_fd, &inject_args, &args); 790 break; 791 case UCALL_ABORT: 792 REPORT_GUEST_ASSERT(uc); 793 break; 794 case UCALL_DONE: 795 goto done; 796 default: 797 TEST_FAIL("Unknown ucall %lu", uc.cmd); 798 } 799 } 800 801 done: 802 close(gic_fd); 803 kvm_vm_free(vm); 804 } 805 806 static void guest_code_asym_dir(struct test_args *args, int cpuid) 807 { 808 gic_init(GIC_V3, 2); 809 810 gic_set_eoi_split(1); 811 gic_set_priority_mask(CPU_PRIO_MASK); 812 813 if (cpuid == 0) { 814 u32 intid; 815 816 local_irq_disable(); 817 818 gic_set_priority(MIN_PPI, IRQ_DEFAULT_PRIO); 819 gic_irq_enable(MIN_SPI); 820 gic_irq_set_pending(MIN_SPI); 821 822 intid = wait_for_and_activate_irq(); 823 GUEST_ASSERT_EQ(intid, MIN_SPI); 824 825 gic_set_eoi(intid); 826 isb(); 827 828 WRITE_ONCE(args->shared_data, MIN_SPI); 829 dsb(ishst); 830 831 do { 832 dsb(ishld); 833 } while (READ_ONCE(args->shared_data) == MIN_SPI); 834 GUEST_ASSERT(!gic_irq_get_active(MIN_SPI)); 835 } else { 836 do { 837 dsb(ishld); 838 } while (READ_ONCE(args->shared_data) != MIN_SPI); 839 840 gic_set_dir(MIN_SPI); 841 isb(); 842 843 WRITE_ONCE(args->shared_data, 0); 844 dsb(ishst); 845 } 846 847 GUEST_DONE(); 848 } 849 850 static void guest_code_group_en(struct test_args *args, int cpuid) 851 { 852 u32 intid; 853 854 gic_init(GIC_V3, 2); 855 856 gic_set_eoi_split(0); 857 gic_set_priority_mask(CPU_PRIO_MASK); 858 /* SGI0 is G0, which is disabled */ 859 gic_irq_set_group(0, 0); 860 861 /* Configure all SGIs with decreasing priority */ 862 for (intid = 0; intid < MIN_PPI; intid++) { 863 gic_set_priority(intid, (intid + 1) * 8); 864 gic_irq_enable(intid); 865 gic_irq_set_pending(intid); 866 } 867 868 /* Ack and EOI all G1 interrupts */ 869 for (int i = 1; i < MIN_PPI; i++) { 870 intid = wait_for_and_activate_irq(); 871 872 GUEST_ASSERT(intid < MIN_PPI); 873 gic_set_eoi(intid); 874 isb(); 875 } 876 877 /* 878 * Check that SGI0 is still pending, inactive, and that we cannot 879 * ack anything. 880 */ 881 GUEST_ASSERT(gic_irq_get_pending(0)); 882 GUEST_ASSERT(!gic_irq_get_active(0)); 883 GUEST_ASSERT_IAR_EMPTY(); 884 GUEST_ASSERT(read_sysreg_s(SYS_ICC_IAR0_EL1) == IAR_SPURIOUS); 885 886 /* Open the G0 gates, and verify we can ack SGI0 */ 887 write_sysreg_s(1, SYS_ICC_IGRPEN0_EL1); 888 isb(); 889 890 do { 891 intid = read_sysreg_s(SYS_ICC_IAR0_EL1); 892 } while (intid == IAR_SPURIOUS); 893 894 GUEST_ASSERT(intid == 0); 895 GUEST_DONE(); 896 } 897 898 static void guest_code_timer_spi(struct test_args *args, int cpuid) 899 { 900 u32 intid; 901 u64 val; 902 903 gic_init(GIC_V3, 2); 904 905 gic_set_eoi_split(1); 906 gic_set_priority_mask(CPU_PRIO_MASK); 907 908 /* Add a pending SPI so that KVM starts trapping DIR */ 909 gic_set_priority(MIN_SPI + cpuid, IRQ_DEFAULT_PRIO); 910 gic_irq_set_pending(MIN_SPI + cpuid); 911 912 /* Configure the timer with a higher priority, make it pending */ 913 gic_set_priority(27, IRQ_DEFAULT_PRIO - 8); 914 915 isb(); 916 val = read_sysreg(cntvct_el0); 917 write_sysreg(val, cntv_cval_el0); 918 write_sysreg(1, cntv_ctl_el0); 919 isb(); 920 921 GUEST_ASSERT(gic_irq_get_pending(27)); 922 923 /* Enable both interrupts */ 924 gic_irq_enable(MIN_SPI + cpuid); 925 gic_irq_enable(27); 926 927 /* The timer must fire */ 928 intid = wait_for_and_activate_irq(); 929 GUEST_ASSERT(intid == 27); 930 931 /* Check that we can deassert it */ 932 write_sysreg(0, cntv_ctl_el0); 933 isb(); 934 935 GUEST_ASSERT(!gic_irq_get_pending(27)); 936 937 /* 938 * Priority drop, deactivation -- we expect that the host 939 * deactivation will have been effective 940 */ 941 gic_set_eoi(27); 942 gic_set_dir(27); 943 944 GUEST_ASSERT(!gic_irq_get_active(27)); 945 946 /* Do it one more time */ 947 isb(); 948 val = read_sysreg(cntvct_el0); 949 write_sysreg(val, cntv_cval_el0); 950 write_sysreg(1, cntv_ctl_el0); 951 isb(); 952 953 GUEST_ASSERT(gic_irq_get_pending(27)); 954 955 /* The timer must fire again */ 956 intid = wait_for_and_activate_irq(); 957 GUEST_ASSERT(intid == 27); 958 959 GUEST_DONE(); 960 } 961 962 static void *test_vcpu_run(void *arg) 963 { 964 struct kvm_vcpu *vcpu = arg; 965 struct ucall uc; 966 967 while (1) { 968 vcpu_run(vcpu); 969 970 switch (get_ucall(vcpu, &uc)) { 971 case UCALL_ABORT: 972 REPORT_GUEST_ASSERT(uc); 973 break; 974 case UCALL_DONE: 975 return NULL; 976 default: 977 TEST_FAIL("Unknown ucall %lu", uc.cmd); 978 } 979 } 980 981 return NULL; 982 } 983 984 static void test_vgic_two_cpus(void *gcode) 985 { 986 pthread_t thr[2]; 987 struct kvm_vcpu *vcpus[2]; 988 struct test_args args = {}; 989 struct kvm_vm *vm; 990 gva_t args_gva; 991 int gic_fd, ret; 992 993 vm = vm_create_with_vcpus(2, gcode, vcpus); 994 995 vm_init_descriptor_tables(vm); 996 vcpu_init_descriptor_tables(vcpus[0]); 997 vcpu_init_descriptor_tables(vcpus[1]); 998 999 /* Setup the guest args page (so it gets the args). */ 1000 args_gva = vm_alloc_page(vm); 1001 memcpy(addr_gva2hva(vm, args_gva), &args, sizeof(args)); 1002 vcpu_args_set(vcpus[0], 2, args_gva, 0); 1003 vcpu_args_set(vcpus[1], 2, args_gva, 1); 1004 1005 gic_fd = vgic_v3_setup(vm, 2, 64); 1006 1007 ret = pthread_create(&thr[0], NULL, test_vcpu_run, vcpus[0]); 1008 if (ret) 1009 TEST_FAIL("Can't create thread for vcpu 0 (%d)\n", ret); 1010 ret = pthread_create(&thr[1], NULL, test_vcpu_run, vcpus[1]); 1011 if (ret) 1012 TEST_FAIL("Can't create thread for vcpu 1 (%d)\n", ret); 1013 1014 pthread_join(thr[0], NULL); 1015 pthread_join(thr[1], NULL); 1016 1017 close(gic_fd); 1018 kvm_vm_free(vm); 1019 } 1020 1021 static void help(const char *name) 1022 { 1023 printf( 1024 "\n" 1025 "usage: %s [-n num_irqs] [-e eoi_split] [-l level_sensitive]\n", name); 1026 printf(" -n: specify number of IRQs to setup the vgic with. " 1027 "It has to be a multiple of 32 and between 64 and 1024.\n"); 1028 printf(" -e: if 1 then EOI is split into a write to DIR on top " 1029 "of writing EOI.\n"); 1030 printf(" -l: specify whether the IRQs are level-sensitive (1) or not (0)."); 1031 puts(""); 1032 exit(1); 1033 } 1034 1035 int main(int argc, char **argv) 1036 { 1037 u32 nr_irqs = 64; 1038 bool default_args = true; 1039 bool level_sensitive = false; 1040 int opt; 1041 bool eoi_split = false; 1042 1043 TEST_REQUIRE(kvm_supports_vgic_v3()); 1044 test_disable_default_vgic(); 1045 1046 while ((opt = getopt(argc, argv, "hn:e:l:")) != -1) { 1047 switch (opt) { 1048 case 'n': 1049 nr_irqs = atoi_non_negative("Number of IRQs", optarg); 1050 if (nr_irqs > 1024 || nr_irqs % 32) 1051 help(argv[0]); 1052 break; 1053 case 'e': 1054 eoi_split = (bool)atoi_paranoid(optarg); 1055 default_args = false; 1056 break; 1057 case 'l': 1058 level_sensitive = (bool)atoi_paranoid(optarg); 1059 default_args = false; 1060 break; 1061 case 'h': 1062 default: 1063 help(argv[0]); 1064 break; 1065 } 1066 } 1067 1068 /* 1069 * If the user just specified nr_irqs and/or gic_version, then run all 1070 * combinations. 1071 */ 1072 if (default_args) { 1073 test_vgic(nr_irqs, false /* level */, false /* eoi_split */); 1074 test_vgic(nr_irqs, false /* level */, true /* eoi_split */); 1075 test_vgic(nr_irqs, true /* level */, false /* eoi_split */); 1076 test_vgic(nr_irqs, true /* level */, true /* eoi_split */); 1077 test_vgic_two_cpus(guest_code_asym_dir); 1078 test_vgic_two_cpus(guest_code_group_en); 1079 test_vgic_two_cpus(guest_code_timer_spi); 1080 } else { 1081 test_vgic(nr_irqs, level_sensitive, eoi_split); 1082 } 1083 1084 return 0; 1085 } 1086