1 /* SPDX-License-Identifier: MIT
2 *
3 * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
4 */
5 #include "priv.h"
6
7 #include <nvhw/drf.h>
8 #include <nvhw/ref/gb100/dev_hshub_base.h>
9
10 static void
gb100_fb_sysmem_flush_page_init(struct nvkm_fb * fb)11 gb100_fb_sysmem_flush_page_init(struct nvkm_fb *fb)
12 {
13 const u32 addr_hi = upper_32_bits(fb->sysmem.flush_page_addr);
14 const u32 addr_lo = lower_32_bits(fb->sysmem.flush_page_addr);
15 const u32 hshub = DRF_LO(NV_PFB_HSHUB0);
16 struct nvkm_device *device = fb->subdev.device;
17
18 // Ensure that the address is within hardware limits
19 WARN_ON(fb->sysmem.flush_page_addr > DMA_BIT_MASK(52));
20
21 nvkm_wr32(device, hshub + NV_PFB_HSHUB_PCIE_FLUSH_SYSMEM_ADDR_HI, addr_hi);
22 nvkm_wr32(device, hshub + NV_PFB_HSHUB_PCIE_FLUSH_SYSMEM_ADDR_LO, addr_lo);
23 nvkm_wr32(device, hshub + NV_PFB_HSHUB_EG_PCIE_FLUSH_SYSMEM_ADDR_HI, addr_hi);
24 nvkm_wr32(device, hshub + NV_PFB_HSHUB_EG_PCIE_FLUSH_SYSMEM_ADDR_LO, addr_lo);
25 }
26
27 static const struct nvkm_fb_func
28 gb100_fb = {
29 .sysmem.flush_page_init = gb100_fb_sysmem_flush_page_init,
30 .vidmem.size = ga102_fb_vidmem_size,
31 };
32
33 int
gb100_fb_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_fb ** pfb)34 gb100_fb_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_fb **pfb)
35 {
36 return r535_fb_new(&gb100_fb, device, type, inst, pfb);
37 }
38