1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 27 #ifndef __DAL_DPP_H__ 28 #define __DAL_DPP_H__ 29 30 /** 31 * DOC: overview 32 * 33 * The DPP (Display Pipe and Plane) block is the unified display data 34 * processing engine in DCN for processing graphic or video data on per DPP 35 * rectangle base. This rectangle can be a part of SLS (Single Large Surface), 36 * or a layer to be blended with other DPP, or a rectangle associated with a 37 * display tile. 38 * 39 * It provides various functions including: 40 * - graphic color keyer 41 * - graphic cursor compositing 42 * - graphic or video image source to destination scaling 43 * - image sharping 44 * - video format conversion from 4:2:0 or 4:2:2 to 4:4:4 45 * - Color Space Conversion 46 * - Host LUT gamma adjustment 47 * - Color Gamut Remap 48 * - brightness and contrast adjustment. 49 * 50 * DPP pipe consists of Converter and Cursor (CNVC), Scaler (DSCL), Color 51 * Management (CM), Output Buffer (OBUF) and Digital Bypass (DPB) module 52 * connected in a video/graphics pipeline. 53 */ 54 55 #include "transform.h" 56 #include "cursor_reg_cache.h" 57 58 union defer_reg_writes { 59 struct { 60 bool disable_blnd_lut:1; 61 bool disable_3dlut:1; 62 bool disable_shaper:1; 63 bool disable_gamcor:1; 64 bool disable_dscl:1; 65 } bits; 66 uint32_t raw; 67 }; 68 69 struct dpp { 70 const struct dpp_funcs *funcs; 71 struct dc_context *ctx; 72 /** 73 * @inst: 74 * 75 * inst stands for "instance," and it is an id number that references a 76 * specific DPP. 77 */ 78 int inst; 79 struct dpp_caps *caps; 80 struct pwl_params regamma_params; 81 struct pwl_params degamma_params; 82 struct dpp_cursor_attributes cur_attr; 83 union defer_reg_writes deferred_reg_writes; 84 85 struct pwl_params shaper_params; 86 bool cm_bypass_mode; 87 88 struct cursor_position_cache_dpp pos; 89 struct cursor_attribute_cache_dpp att; 90 }; 91 92 struct dpp_input_csc_matrix { 93 enum dc_color_space color_space; 94 uint16_t regval[12]; 95 }; 96 97 static const struct dpp_input_csc_matrix __maybe_unused dpp_input_csc_matrix[] = { 98 { COLOR_SPACE_SRGB, 99 { 0x2000, 0, 0, 0, 100 0, 0x2000, 0, 0, 101 0, 0, 0x2000, 0 } }, 102 { COLOR_SPACE_SRGB_LIMITED, 103 { 0x2000, 0, 0, 0, 104 0, 0x2000, 0, 0, 105 0, 0, 0x2000, 0 } }, 106 { COLOR_SPACE_YCBCR601, 107 { 0x2cdd, 0x2000, 0, 0xe991, 108 0xe926, 0x2000, 0xf4fd, 0x10ef, 109 0, 0x2000, 0x38b4, 0xe3a6 } }, 110 { COLOR_SPACE_YCBCR601_LIMITED, 111 { 0x3353, 0x2568, 0, 0xe400, 112 0xe5dc, 0x2568, 0xf367, 0x1108, 113 0, 0x2568, 0x40de, 0xdd3a } }, 114 { COLOR_SPACE_YCBCR709, 115 { 0x3265, 0x2000, 0, 0xe6ce, 116 0xf105, 0x2000, 0xfa01, 0xa7d, 117 0, 0x2000, 0x3b61, 0xe24f } }, 118 { COLOR_SPACE_YCBCR709_LIMITED, 119 { 0x39a6, 0x2568, 0, 0xe0d6, 120 0xeedd, 0x2568, 0xf925, 0x9a8, 121 0, 0x2568, 0x43ee, 0xdbb2 } }, 122 { COLOR_SPACE_2020_YCBCR, 123 { 0x2F30, 0x2000, 0, 0xE869, 124 0xEDB7, 0x2000, 0xFABC, 0xBC6, 125 0, 0x2000, 0x3C34, 0xE1E6 } }, 126 { COLOR_SPACE_2020_RGB_LIMITEDRANGE, 127 { 0x35E0, 0x255F, 0, 0xE2B3, 128 0xEB20, 0x255F, 0xF9FD, 0xB1E, 129 0, 0x255F, 0x44BD, 0xDB43 } } 130 }; 131 132 struct dpp_grph_csc_adjustment { 133 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE]; 134 enum graphics_gamut_adjust_type gamut_adjust_type; 135 }; 136 137 struct cnv_color_keyer_params { 138 int color_keyer_en; 139 int color_keyer_mode; 140 int color_keyer_alpha_low; 141 int color_keyer_alpha_high; 142 int color_keyer_red_low; 143 int color_keyer_red_high; 144 int color_keyer_green_low; 145 int color_keyer_green_high; 146 int color_keyer_blue_low; 147 int color_keyer_blue_high; 148 }; 149 150 /** 151 * struct cnv_alpha_2bit_lut - Set the 8bit alpha values based on the 2 bit alpha 152 */ 153 struct cnv_alpha_2bit_lut { 154 /** 155 * @lut0: ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0. Default: 0b00000000 156 */ 157 int lut0; 158 159 /** 160 * @lut1: ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1. Default: 0b01010101 161 */ 162 int lut1; 163 164 /** 165 * @lut2: ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2. Default: 0b10101010 166 */ 167 int lut2; 168 169 /** 170 * @lut3: ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3. Default: 0b11111111 171 */ 172 int lut3; 173 }; 174 175 struct dcn_dpp_state { 176 uint32_t is_enabled; 177 uint32_t igam_lut_mode; 178 uint32_t igam_input_format; 179 uint32_t dgam_lut_mode; 180 uint32_t rgam_lut_mode; 181 // gamut_remap data for dcn10_get_cm_states() 182 uint32_t gamut_remap_mode; 183 uint32_t gamut_remap_c11_c12; 184 uint32_t gamut_remap_c13_c14; 185 uint32_t gamut_remap_c21_c22; 186 uint32_t gamut_remap_c23_c24; 187 uint32_t gamut_remap_c31_c32; 188 uint32_t gamut_remap_c33_c34; 189 // gamut_remap data for dcn*_log_color_state() 190 struct dpp_grph_csc_adjustment gamut_remap; 191 uint32_t shaper_lut_mode; 192 uint32_t lut3d_mode; 193 uint32_t lut3d_bit_depth; 194 uint32_t lut3d_size; 195 uint32_t blnd_lut_mode; 196 uint32_t pre_dgam_mode; 197 uint32_t pre_dgam_select; 198 uint32_t gamcor_mode; 199 }; 200 201 struct CM_bias_params { 202 uint32_t cm_bias_cr_r; 203 uint32_t cm_bias_y_g; 204 uint32_t cm_bias_cb_b; 205 uint32_t cm_bias_format; 206 }; 207 208 struct dpp_funcs { 209 bool (*dpp_program_gamcor_lut)( 210 struct dpp *dpp_base, const struct pwl_params *params); 211 212 void (*dpp_set_pre_degam)(struct dpp *dpp_base, 213 enum dc_transfer_func_predefined tr); 214 215 void (*dpp_program_cm_dealpha)(struct dpp *dpp_base, 216 uint32_t enable, uint32_t additive_blending); 217 218 void (*dpp_program_cm_bias)( 219 struct dpp *dpp_base, 220 struct CM_bias_params *bias_params); 221 222 void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s); 223 224 void (*dpp_reset)(struct dpp *dpp); 225 226 void (*dpp_set_scaler)(struct dpp *dpp, 227 const struct scaler_data *scl_data); 228 229 void (*dpp_set_pixel_storage_depth)( 230 struct dpp *dpp, 231 enum lb_pixel_depth depth, 232 const struct bit_depth_reduction_params *bit_depth_params); 233 234 bool (*dpp_get_optimal_number_of_taps)( 235 struct dpp *dpp, 236 struct scaler_data *scl_data, 237 const struct scaling_taps *in_taps); 238 239 void (*dpp_set_gamut_remap)( 240 struct dpp *dpp, 241 const struct dpp_grph_csc_adjustment *adjust); 242 243 void (*dpp_set_csc_default)( 244 struct dpp *dpp, 245 enum dc_color_space colorspace); 246 247 void (*dpp_set_csc_adjustment)( 248 struct dpp *dpp, 249 const uint16_t *regval); 250 251 void (*dpp_power_on_regamma_lut)( 252 struct dpp *dpp, 253 bool power_on); 254 255 void (*dpp_program_regamma_lut)( 256 struct dpp *dpp, 257 const struct pwl_result_data *rgb, 258 uint32_t num); 259 260 void (*dpp_configure_regamma_lut)( 261 struct dpp *dpp, 262 bool is_ram_a); 263 264 void (*dpp_program_regamma_lutb_settings)( 265 struct dpp *dpp, 266 const struct pwl_params *params); 267 268 void (*dpp_program_regamma_luta_settings)( 269 struct dpp *dpp, 270 const struct pwl_params *params); 271 272 void (*dpp_program_regamma_pwl)( 273 struct dpp *dpp, 274 const struct pwl_params *params, 275 enum opp_regamma mode); 276 277 void (*dpp_program_bias_and_scale)( 278 struct dpp *dpp, 279 struct dc_bias_and_scale *params); 280 281 void (*dpp_set_degamma)( 282 struct dpp *dpp_base, 283 enum ipp_degamma_mode mode); 284 285 void (*dpp_program_input_lut)( 286 struct dpp *dpp_base, 287 const struct dc_gamma *gamma); 288 289 void (*dpp_program_degamma_pwl)(struct dpp *dpp_base, 290 const struct pwl_params *params); 291 292 void (*dpp_setup)( 293 struct dpp *dpp_base, 294 enum surface_pixel_format format, 295 enum expansion_mode mode, 296 struct dc_csc_transform input_csc_color_matrix, 297 enum dc_color_space input_color_space, 298 struct cnv_alpha_2bit_lut *alpha_2bit_lut); 299 300 void (*dpp_full_bypass)(struct dpp *dpp_base); 301 302 void (*set_cursor_attributes)( 303 struct dpp *dpp_base, 304 struct dc_cursor_attributes *cursor_attributes); 305 306 void (*set_cursor_position)( 307 struct dpp *dpp_base, 308 const struct dc_cursor_position *pos, 309 const struct dc_cursor_mi_param *param, 310 uint32_t width, 311 uint32_t height 312 ); 313 314 void (*dpp_set_hdr_multiplier)( 315 struct dpp *dpp_base, 316 uint32_t multiplier); 317 318 void (*set_optional_cursor_attributes)( 319 struct dpp *dpp_base, 320 struct dpp_cursor_attributes *attr); 321 322 void (*dpp_dppclk_control)( 323 struct dpp *dpp_base, 324 bool dppclk_div, 325 bool enable); 326 327 void (*dpp_deferred_update)( 328 struct dpp *dpp); 329 bool (*dpp_program_blnd_lut)( 330 struct dpp *dpp, 331 const struct pwl_params *params); 332 bool (*dpp_program_shaper_lut)( 333 struct dpp *dpp, 334 const struct pwl_params *params); 335 bool (*dpp_program_3dlut)( 336 struct dpp *dpp, 337 const struct tetrahedral_params *params); 338 void (*dpp_cnv_set_alpha_keyer)( 339 struct dpp *dpp_base, 340 struct cnv_color_keyer_params *color_keyer); 341 342 void (*dpp_get_gamut_remap)(struct dpp *dpp_base, 343 struct dpp_grph_csc_adjustment *adjust); 344 void (*set_cursor_matrix)( 345 struct dpp *dpp_base, 346 enum dc_color_space color_space, 347 struct dc_csc_transform cursor_csc_color_matrix); 348 }; 349 350 351 352 #endif 353