xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga100.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1 /*
2  * Copyright 2022 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "priv.h"
23 
24 static const struct nvkm_falcon_func
25 ga100_gsp_flcn = {
26 	.disable = gm200_flcn_disable,
27 	.enable = gm200_flcn_enable,
28 	.addr2 = 0x1000,
29 	.riscv_irqmask = 0x2b4,
30 	.reset_eng = gp102_flcn_reset_eng,
31 	.reset_wait_mem_scrubbing = gm200_flcn_reset_wait_mem_scrubbing,
32 	.bind_inst = gm200_flcn_bind_inst,
33 	.bind_stat = gm200_flcn_bind_stat,
34 	.bind_intr = true,
35 	.imem_pio = &gm200_flcn_imem_pio,
36 	.dmem_pio = &gm200_flcn_dmem_pio,
37 	.riscv_active = tu102_flcn_riscv_active,
38 	.intr_retrigger = ga100_flcn_intr_retrigger,
39 };
40 
41 static const struct nvkm_gsp_func
42 ga100_gsp_r535_113_01 = {
43 	.flcn = &ga100_gsp_flcn,
44 	.fwsec = &tu102_gsp_fwsec,
45 
46 	.sig_section = ".fwsignature_ga100",
47 
48 	.wpr_heap.base_size = 8 << 20,
49 	.wpr_heap.min_size = 64 << 20,
50 
51 	.booter.ctor = tu102_gsp_booter_ctor,
52 
53 	.dtor = r535_gsp_dtor,
54 	.oneinit = tu102_gsp_oneinit,
55 	.init = r535_gsp_init,
56 	.fini = r535_gsp_fini,
57 	.reset = tu102_gsp_reset,
58 
59 	.rm = &r535_gsp_rm,
60 };
61 
62 static struct nvkm_gsp_fwif
63 ga100_gsps[] = {
64 	{  0,  r535_gsp_load, &ga100_gsp_r535_113_01, "535.113.01" },
65 	{ -1, gv100_gsp_nofw, &gv100_gsp },
66 	{}
67 };
68 
69 int
ga100_gsp_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_gsp ** pgsp)70 ga100_gsp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
71 	      struct nvkm_gsp **pgsp)
72 {
73 	return nvkm_gsp_new_(ga100_gsps, device, type, inst, pgsp);
74 }
75