1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __LINUX_GPIO_NOMADIK_H 3 #define __LINUX_GPIO_NOMADIK_H 4 5 struct fwnode_handle; 6 7 /* Package definitions */ 8 #define PINCTRL_NMK_STN8815 0 9 #define PINCTRL_NMK_DB8500 1 10 11 #define GPIO_BLOCK_SHIFT 5 12 #define NMK_GPIO_PER_CHIP BIT(GPIO_BLOCK_SHIFT) 13 #define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP) 14 15 /* Register in the logic block */ 16 #define NMK_GPIO_DAT 0x00 17 #define NMK_GPIO_DATS 0x04 18 #define NMK_GPIO_DATC 0x08 19 #define NMK_GPIO_PDIS 0x0c 20 #define NMK_GPIO_DIR 0x10 21 #define NMK_GPIO_DIRS 0x14 22 #define NMK_GPIO_DIRC 0x18 23 #define NMK_GPIO_SLPC 0x1c 24 #define NMK_GPIO_AFSLA 0x20 25 #define NMK_GPIO_AFSLB 0x24 26 #define NMK_GPIO_LOWEMI 0x28 27 28 #define NMK_GPIO_RIMSC 0x40 29 #define NMK_GPIO_FIMSC 0x44 30 #define NMK_GPIO_IS 0x48 31 #define NMK_GPIO_IC 0x4c 32 #define NMK_GPIO_RWIMSC 0x50 33 #define NMK_GPIO_FWIMSC 0x54 34 #define NMK_GPIO_WKS 0x58 35 36 /* Pull up/down values */ 37 enum nmk_gpio_pull { 38 NMK_GPIO_PULL_NONE, 39 NMK_GPIO_PULL_UP, 40 NMK_GPIO_PULL_DOWN, 41 }; 42 43 /* Sleep mode */ 44 enum nmk_gpio_slpm { 45 NMK_GPIO_SLPM_INPUT, 46 NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT, 47 NMK_GPIO_SLPM_NOCHANGE, 48 NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE, 49 }; 50 51 struct nmk_gpio_chip { 52 struct gpio_chip chip; 53 void __iomem *addr; 54 struct clk *clk; 55 unsigned int bank; 56 void (*set_ioforce)(bool enable); 57 spinlock_t lock; 58 bool sleepmode; 59 bool is_mobileye_soc; 60 /* Keep track of configured edges */ 61 u32 edge_rising; 62 u32 edge_falling; 63 u32 real_wake; 64 u32 rwimsc; 65 u32 fwimsc; 66 u32 rimsc; 67 u32 fimsc; 68 u32 pull_up; 69 u32 lowemi; 70 }; 71 72 /* Alternate functions: function C is set in hw by setting both A and B */ 73 #define NMK_GPIO_ALT_GPIO 0 74 #define NMK_GPIO_ALT_A 1 75 #define NMK_GPIO_ALT_B 2 76 #define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B) 77 78 #define NMK_GPIO_ALT_CX_SHIFT 2 79 #define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) 80 #define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) 81 #define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) 82 #define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C) 83 84 #define PRCM_GPIOCR_ALTCX(pin_num,\ 85 altc1_used, altc1_ri, altc1_cb,\ 86 altc2_used, altc2_ri, altc2_cb,\ 87 altc3_used, altc3_ri, altc3_cb,\ 88 altc4_used, altc4_ri, altc4_cb)\ 89 {\ 90 .pin = pin_num,\ 91 .altcx[PRCM_IDX_GPIOCR_ALTC1] = {\ 92 .used = altc1_used,\ 93 .reg_index = altc1_ri,\ 94 .control_bit = altc1_cb\ 95 },\ 96 .altcx[PRCM_IDX_GPIOCR_ALTC2] = {\ 97 .used = altc2_used,\ 98 .reg_index = altc2_ri,\ 99 .control_bit = altc2_cb\ 100 },\ 101 .altcx[PRCM_IDX_GPIOCR_ALTC3] = {\ 102 .used = altc3_used,\ 103 .reg_index = altc3_ri,\ 104 .control_bit = altc3_cb\ 105 },\ 106 .altcx[PRCM_IDX_GPIOCR_ALTC4] = {\ 107 .used = altc4_used,\ 108 .reg_index = altc4_ri,\ 109 .control_bit = altc4_cb\ 110 },\ 111 } 112 113 /** 114 * enum prcm_gpiocr_reg_index - Used to reference a PRCM GPIOCR register address. 115 */ 116 enum prcm_gpiocr_reg_index { 117 PRCM_IDX_GPIOCR1, 118 PRCM_IDX_GPIOCR2, 119 PRCM_IDX_GPIOCR3 120 }; 121 /** 122 * enum prcm_gpiocr_altcx_index - Used to reference an Other alternate-C function. 123 */ 124 enum prcm_gpiocr_altcx_index { 125 PRCM_IDX_GPIOCR_ALTC1, 126 PRCM_IDX_GPIOCR_ALTC2, 127 PRCM_IDX_GPIOCR_ALTC3, 128 PRCM_IDX_GPIOCR_ALTC4, 129 PRCM_IDX_GPIOCR_ALTC_MAX, 130 }; 131 132 /** 133 * struct prcm_gpiocr_altcx - Other alternate-C function 134 * @used: other alternate-C function availability 135 * @reg_index: PRCM GPIOCR register index used to control the function 136 * @control_bit: PRCM GPIOCR bit used to control the function 137 */ 138 struct prcm_gpiocr_altcx { 139 bool used:1; 140 u8 reg_index:2; 141 u8 control_bit:5; 142 } __packed; 143 144 /** 145 * struct prcm_gpiocr_altcx_pin_desc - Other alternate-C pin 146 * @pin: The pin number 147 * @altcx: array of other alternate-C[1-4] functions 148 */ 149 struct prcm_gpiocr_altcx_pin_desc { 150 unsigned short pin; 151 struct prcm_gpiocr_altcx altcx[PRCM_IDX_GPIOCR_ALTC_MAX]; 152 }; 153 154 /** 155 * struct nmk_function - Nomadik pinctrl mux function 156 * @name: The name of the function, exported to pinctrl core. 157 * @groups: An array of pin groups that may select this function. 158 * @ngroups: The number of entries in @groups. 159 */ 160 struct nmk_function { 161 const char *name; 162 const char * const *groups; 163 unsigned int ngroups; 164 }; 165 166 /** 167 * struct nmk_pingroup - describes a Nomadik pin group 168 * @grp: Generic data of the pin group (name and pins) 169 * @altsetting: the altsetting to apply to all pins in this group to 170 * configure them to be used by a function 171 */ 172 struct nmk_pingroup { 173 struct pingroup grp; 174 int altsetting; 175 }; 176 177 #define NMK_PIN_GROUP(a, b) \ 178 { \ 179 .grp = PINCTRL_PINGROUP(#a, a##_pins, ARRAY_SIZE(a##_pins)), \ 180 .altsetting = b, \ 181 } 182 183 /** 184 * struct nmk_pinctrl_soc_data - Nomadik pin controller per-SoC configuration 185 * @pins: An array describing all pins the pin controller affects. 186 * All pins which are also GPIOs must be listed first within the 187 * array, and be numbered identically to the GPIO controller's 188 * numbering. 189 * @npins: The number of entries in @pins. 190 * @functions: The functions supported on this SoC. 191 * @nfunctions: The number of entries in @functions. 192 * @groups: An array describing all pin groups the pin SoC supports. 193 * @ngroups: The number of entries in @groups. 194 * @altcx_pins: The pins that support Other alternate-C function on this SoC 195 * @npins_altcx: The number of Other alternate-C pins 196 * @prcm_gpiocr_registers: The array of PRCM GPIOCR registers on this SoC 197 */ 198 struct nmk_pinctrl_soc_data { 199 const struct pinctrl_pin_desc *pins; 200 unsigned int npins; 201 const struct nmk_function *functions; 202 unsigned int nfunctions; 203 const struct nmk_pingroup *groups; 204 unsigned int ngroups; 205 const struct prcm_gpiocr_altcx_pin_desc *altcx_pins; 206 unsigned int npins_altcx; 207 const u16 *prcm_gpiocr_registers; 208 }; 209 210 #ifdef CONFIG_PINCTRL_STN8815 211 212 void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc); 213 214 #else 215 216 static inline void 217 nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc) 218 { 219 } 220 221 #endif 222 223 #ifdef CONFIG_PINCTRL_DB8500 224 225 void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc); 226 227 #else 228 229 static inline void 230 nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc) 231 { 232 } 233 234 #endif 235 236 struct platform_device; 237 238 #ifdef CONFIG_DEBUG_FS 239 240 /* 241 * Symbols declared in gpio-nomadik used by pinctrl-nomadik. If pinctrl-nomadik 242 * is enabled, then gpio-nomadik is enabled as well; the reverse if not always 243 * true. 244 */ 245 void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev, 246 struct gpio_chip *chip, unsigned int offset); 247 248 #else 249 250 static inline void nmk_gpio_dbg_show_one(struct seq_file *s, 251 struct pinctrl_dev *pctldev, 252 struct gpio_chip *chip, 253 unsigned int offset) 254 { 255 } 256 257 #endif 258 259 void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip, 260 unsigned int offset, int val); 261 void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset, 262 enum nmk_gpio_slpm mode); 263 struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode, 264 struct platform_device *pdev); 265 266 /* Symbols declared in pinctrl-nomadik used by gpio-nomadik. */ 267 #ifdef CONFIG_PINCTRL_NOMADIK 268 extern struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS]; 269 extern spinlock_t nmk_gpio_slpm_lock; 270 int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, 271 int gpio); 272 #endif 273 274 #endif /* __LINUX_GPIO_NOMADIK_H */ 275