1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Faraday FTMAC100 10/100 Ethernet
4 *
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
7 */
8
9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10
11 #include <linux/dma-mapping.h>
12 #include <linux/etherdevice.h>
13 #include <linux/ethtool.h>
14 #include <linux/if_ether.h>
15 #include <linux/if_vlan.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/mii.h>
20 #include <linux/module.h>
21 #include <linux/netdevice.h>
22 #include <linux/platform_device.h>
23
24 #include "ftmac100.h"
25
26 #define DRV_NAME "ftmac100"
27
28 #define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
29 #define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
30
31 #define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
32 #define MAX_PKT_SIZE RX_BUF_SIZE /* multi-segment not supported */
33
34 #if MAX_PKT_SIZE > 0x7ff
35 #error invalid MAX_PKT_SIZE
36 #endif
37
38 #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
39 #error invalid RX_BUF_SIZE
40 #endif
41
42 /******************************************************************************
43 * private data
44 *****************************************************************************/
45 struct ftmac100_descs {
46 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
47 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
48 };
49
50 struct ftmac100 {
51 struct resource *res;
52 void __iomem *base;
53 int irq;
54
55 struct ftmac100_descs *descs;
56 dma_addr_t descs_dma_addr;
57
58 unsigned int rx_pointer;
59 unsigned int tx_clean_pointer;
60 unsigned int tx_pointer;
61 unsigned int tx_pending;
62
63 spinlock_t tx_lock;
64
65 struct net_device *netdev;
66 struct device *dev;
67 struct napi_struct napi;
68
69 struct mii_if_info mii;
70 };
71
72 static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
73 struct ftmac100_rxdes *rxdes, gfp_t gfp);
74
75 /******************************************************************************
76 * internal functions (hardware register access)
77 *****************************************************************************/
78 #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
79 FTMAC100_INT_NORXBUF | \
80 FTMAC100_INT_XPKT_OK | \
81 FTMAC100_INT_XPKT_LOST | \
82 FTMAC100_INT_RPKT_LOST | \
83 FTMAC100_INT_AHB_ERR | \
84 FTMAC100_INT_PHYSTS_CHG)
85
86 #define INT_MASK_ALL_DISABLED 0
87
ftmac100_enable_all_int(struct ftmac100 * priv)88 static void ftmac100_enable_all_int(struct ftmac100 *priv)
89 {
90 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
91 }
92
ftmac100_disable_all_int(struct ftmac100 * priv)93 static void ftmac100_disable_all_int(struct ftmac100 *priv)
94 {
95 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
96 }
97
ftmac100_set_rx_ring_base(struct ftmac100 * priv,dma_addr_t addr)98 static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
99 {
100 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
101 }
102
ftmac100_set_tx_ring_base(struct ftmac100 * priv,dma_addr_t addr)103 static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
104 {
105 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
106 }
107
ftmac100_txdma_start_polling(struct ftmac100 * priv)108 static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
109 {
110 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
111 }
112
ftmac100_reset(struct ftmac100 * priv)113 static int ftmac100_reset(struct ftmac100 *priv)
114 {
115 struct net_device *netdev = priv->netdev;
116 int i;
117
118 /* NOTE: reset clears all registers */
119 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
120
121 for (i = 0; i < 5; i++) {
122 unsigned int maccr;
123
124 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
125 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
126 /*
127 * FTMAC100_MACCR_SW_RST cleared does not indicate
128 * that hardware reset completed (what the f*ck).
129 * We still need to wait for a while.
130 */
131 udelay(500);
132 return 0;
133 }
134
135 udelay(1000);
136 }
137
138 netdev_err(netdev, "software reset failed\n");
139 return -EIO;
140 }
141
ftmac100_set_mac(struct ftmac100 * priv,const unsigned char * mac)142 static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
143 {
144 unsigned int maddr = mac[0] << 8 | mac[1];
145 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
146
147 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
148 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
149 }
150
ftmac100_setup_mc_ht(struct ftmac100 * priv)151 static void ftmac100_setup_mc_ht(struct ftmac100 *priv)
152 {
153 struct netdev_hw_addr *ha;
154 u64 maht = 0; /* Multicast Address Hash Table */
155
156 netdev_for_each_mc_addr(ha, priv->netdev) {
157 u32 hash = ether_crc(ETH_ALEN, ha->addr) >> 26;
158
159 maht |= BIT_ULL(hash);
160 }
161
162 iowrite32(lower_32_bits(maht), priv->base + FTMAC100_OFFSET_MAHT0);
163 iowrite32(upper_32_bits(maht), priv->base + FTMAC100_OFFSET_MAHT1);
164 }
165
ftmac100_set_rx_bits(struct ftmac100 * priv,unsigned int * maccr)166 static void ftmac100_set_rx_bits(struct ftmac100 *priv, unsigned int *maccr)
167 {
168 struct net_device *netdev = priv->netdev;
169
170 /* Clear all */
171 *maccr &= ~(FTMAC100_MACCR_RCV_ALL | FTMAC100_MACCR_RX_MULTIPKT |
172 FTMAC100_MACCR_HT_MULTI_EN);
173
174 /* Set the requested bits */
175 if (netdev->flags & IFF_PROMISC)
176 *maccr |= FTMAC100_MACCR_RCV_ALL;
177 if (netdev->flags & IFF_ALLMULTI)
178 *maccr |= FTMAC100_MACCR_RX_MULTIPKT;
179 else if (netdev_mc_count(netdev)) {
180 *maccr |= FTMAC100_MACCR_HT_MULTI_EN;
181 ftmac100_setup_mc_ht(priv);
182 }
183 }
184
185 #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
186 FTMAC100_MACCR_RCV_EN | \
187 FTMAC100_MACCR_XDMA_EN | \
188 FTMAC100_MACCR_RDMA_EN | \
189 FTMAC100_MACCR_CRC_APD | \
190 FTMAC100_MACCR_FULLDUP | \
191 FTMAC100_MACCR_RX_RUNT | \
192 FTMAC100_MACCR_RX_BROADPKT)
193
ftmac100_start_hw(struct ftmac100 * priv)194 static int ftmac100_start_hw(struct ftmac100 *priv)
195 {
196 struct net_device *netdev = priv->netdev;
197 unsigned int maccr = MACCR_ENABLE_ALL;
198
199 if (ftmac100_reset(priv))
200 return -EIO;
201
202 /* setup ring buffer base registers */
203 ftmac100_set_rx_ring_base(priv,
204 priv->descs_dma_addr +
205 offsetof(struct ftmac100_descs, rxdes));
206 ftmac100_set_tx_ring_base(priv,
207 priv->descs_dma_addr +
208 offsetof(struct ftmac100_descs, txdes));
209
210 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
211
212 ftmac100_set_mac(priv, netdev->dev_addr);
213
214 /* See ftmac100_change_mtu() */
215 if (netdev->mtu > ETH_DATA_LEN)
216 maccr |= FTMAC100_MACCR_RX_FTL;
217
218 ftmac100_set_rx_bits(priv, &maccr);
219
220 iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
221 return 0;
222 }
223
ftmac100_stop_hw(struct ftmac100 * priv)224 static void ftmac100_stop_hw(struct ftmac100 *priv)
225 {
226 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
227 }
228
229 /******************************************************************************
230 * internal functions (receive descriptor)
231 *****************************************************************************/
ftmac100_rxdes_first_segment(struct ftmac100_rxdes * rxdes)232 static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
233 {
234 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
235 }
236
ftmac100_rxdes_last_segment(struct ftmac100_rxdes * rxdes)237 static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
238 {
239 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
240 }
241
ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes * rxdes)242 static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
243 {
244 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
245 }
246
ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes * rxdes)247 static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
248 {
249 /* clear status bits */
250 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
251 }
252
ftmac100_rxdes_rx_error(struct ftmac100_rxdes * rxdes)253 static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
254 {
255 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
256 }
257
ftmac100_rxdes_crc_error(struct ftmac100_rxdes * rxdes)258 static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
259 {
260 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
261 }
262
ftmac100_rxdes_runt(struct ftmac100_rxdes * rxdes)263 static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
264 {
265 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
266 }
267
ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes * rxdes)268 static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
269 {
270 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
271 }
272
ftmac100_rxdes_frame_length(struct ftmac100_rxdes * rxdes)273 static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
274 {
275 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
276 }
277
ftmac100_rxdes_multicast(struct ftmac100_rxdes * rxdes)278 static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
279 {
280 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
281 }
282
ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes * rxdes,unsigned int size)283 static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
284 unsigned int size)
285 {
286 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
287 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
288 }
289
ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes * rxdes)290 static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
291 {
292 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
293 }
294
ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes * rxdes,dma_addr_t addr)295 static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
296 dma_addr_t addr)
297 {
298 rxdes->rxdes2 = cpu_to_le32(addr);
299 }
300
ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes * rxdes)301 static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
302 {
303 return le32_to_cpu(rxdes->rxdes2);
304 }
305
306 /*
307 * rxdes3 is not used by hardware. We use it to keep track of page.
308 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
309 */
ftmac100_rxdes_set_page(struct ftmac100_rxdes * rxdes,struct page * page)310 static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
311 {
312 rxdes->rxdes3 = (unsigned int)page;
313 }
314
ftmac100_rxdes_get_page(struct ftmac100_rxdes * rxdes)315 static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
316 {
317 return (struct page *)rxdes->rxdes3;
318 }
319
320 /******************************************************************************
321 * internal functions (receive)
322 *****************************************************************************/
ftmac100_next_rx_pointer(int pointer)323 static int ftmac100_next_rx_pointer(int pointer)
324 {
325 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
326 }
327
ftmac100_rx_pointer_advance(struct ftmac100 * priv)328 static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
329 {
330 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
331 }
332
ftmac100_current_rxdes(struct ftmac100 * priv)333 static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
334 {
335 return &priv->descs->rxdes[priv->rx_pointer];
336 }
337
338 static struct ftmac100_rxdes *
ftmac100_rx_locate_first_segment(struct ftmac100 * priv)339 ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
340 {
341 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
342
343 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
344 if (ftmac100_rxdes_first_segment(rxdes))
345 return rxdes;
346
347 ftmac100_rxdes_set_dma_own(rxdes);
348 ftmac100_rx_pointer_advance(priv);
349 rxdes = ftmac100_current_rxdes(priv);
350 }
351
352 return NULL;
353 }
354
ftmac100_rx_packet_error(struct ftmac100 * priv,struct ftmac100_rxdes * rxdes)355 static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
356 struct ftmac100_rxdes *rxdes)
357 {
358 struct net_device *netdev = priv->netdev;
359 bool error = false;
360
361 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
362 if (net_ratelimit())
363 netdev_info(netdev, "rx err\n");
364
365 netdev->stats.rx_errors++;
366 error = true;
367 }
368
369 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
370 if (net_ratelimit())
371 netdev_info(netdev, "rx crc err\n");
372
373 netdev->stats.rx_crc_errors++;
374 error = true;
375 }
376
377 if (unlikely(ftmac100_rxdes_runt(rxdes))) {
378 if (net_ratelimit())
379 netdev_info(netdev, "rx runt\n");
380
381 netdev->stats.rx_length_errors++;
382 error = true;
383 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
384 if (net_ratelimit())
385 netdev_info(netdev, "rx odd nibble\n");
386
387 netdev->stats.rx_length_errors++;
388 error = true;
389 }
390 /*
391 * FTMAC100_RXDES0_FTL is not an error, it just indicates that the
392 * frame is longer than 1518 octets. Receiving these is possible when
393 * we told the hardware not to drop them, via FTMAC100_MACCR_RX_FTL.
394 */
395
396 return error;
397 }
398
ftmac100_rx_drop_packet(struct ftmac100 * priv)399 static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
400 {
401 struct net_device *netdev = priv->netdev;
402 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
403 bool done = false;
404
405 if (net_ratelimit())
406 netdev_dbg(netdev, "drop packet %p\n", rxdes);
407
408 do {
409 if (ftmac100_rxdes_last_segment(rxdes))
410 done = true;
411
412 ftmac100_rxdes_set_dma_own(rxdes);
413 ftmac100_rx_pointer_advance(priv);
414 rxdes = ftmac100_current_rxdes(priv);
415 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
416
417 netdev->stats.rx_dropped++;
418 }
419
ftmac100_rx_packet(struct ftmac100 * priv,int * processed)420 static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
421 {
422 struct net_device *netdev = priv->netdev;
423 struct ftmac100_rxdes *rxdes;
424 struct sk_buff *skb;
425 struct page *page;
426 dma_addr_t map;
427 int length;
428 bool ret;
429
430 rxdes = ftmac100_rx_locate_first_segment(priv);
431 if (!rxdes)
432 return false;
433
434 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
435 ftmac100_rx_drop_packet(priv);
436 return true;
437 }
438
439 /* We don't support multi-segment packets for now, so drop them. */
440 ret = ftmac100_rxdes_last_segment(rxdes);
441 if (unlikely(!ret)) {
442 netdev->stats.rx_length_errors++;
443 ftmac100_rx_drop_packet(priv);
444 return true;
445 }
446
447 /* start processing */
448 skb = netdev_alloc_skb_ip_align(netdev, 128);
449 if (unlikely(!skb)) {
450 if (net_ratelimit())
451 netdev_err(netdev, "rx skb alloc failed\n");
452
453 ftmac100_rx_drop_packet(priv);
454 return true;
455 }
456
457 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
458 netdev->stats.multicast++;
459
460 map = ftmac100_rxdes_get_dma_addr(rxdes);
461 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
462
463 length = ftmac100_rxdes_frame_length(rxdes);
464 page = ftmac100_rxdes_get_page(rxdes);
465 skb_fill_page_desc(skb, 0, page, 0, length);
466 skb->len += length;
467 skb->data_len += length;
468
469 if (length > 128) {
470 skb->truesize += PAGE_SIZE;
471 /* We pull the minimum amount into linear part */
472 __pskb_pull_tail(skb, ETH_HLEN);
473 } else {
474 /* Small frames are copied into linear part to free one page */
475 __pskb_pull_tail(skb, length);
476 }
477 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
478
479 ftmac100_rx_pointer_advance(priv);
480
481 skb->protocol = eth_type_trans(skb, netdev);
482
483 netdev->stats.rx_packets++;
484 netdev->stats.rx_bytes += skb->len;
485
486 /* push packet to protocol stack */
487 netif_receive_skb(skb);
488
489 (*processed)++;
490 return true;
491 }
492
493 /******************************************************************************
494 * internal functions (transmit descriptor)
495 *****************************************************************************/
ftmac100_txdes_reset(struct ftmac100_txdes * txdes)496 static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
497 {
498 /* clear all except end of ring bit */
499 txdes->txdes0 = 0;
500 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
501 txdes->txdes2 = 0;
502 txdes->txdes3 = 0;
503 }
504
ftmac100_txdes_owned_by_dma(struct ftmac100_txdes * txdes)505 static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
506 {
507 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
508 }
509
ftmac100_txdes_set_dma_own(struct ftmac100_txdes * txdes)510 static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
511 {
512 /*
513 * Make sure dma own bit will not be set before any other
514 * descriptor fields.
515 */
516 wmb();
517 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
518 }
519
ftmac100_txdes_excessive_collision(struct ftmac100_txdes * txdes)520 static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
521 {
522 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
523 }
524
ftmac100_txdes_late_collision(struct ftmac100_txdes * txdes)525 static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
526 {
527 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
528 }
529
ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes * txdes)530 static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
531 {
532 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
533 }
534
ftmac100_txdes_set_first_segment(struct ftmac100_txdes * txdes)535 static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
536 {
537 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
538 }
539
ftmac100_txdes_set_last_segment(struct ftmac100_txdes * txdes)540 static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
541 {
542 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
543 }
544
ftmac100_txdes_set_txint(struct ftmac100_txdes * txdes)545 static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
546 {
547 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
548 }
549
ftmac100_txdes_set_buffer_size(struct ftmac100_txdes * txdes,unsigned int len)550 static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
551 unsigned int len)
552 {
553 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
554 }
555
ftmac100_txdes_set_dma_addr(struct ftmac100_txdes * txdes,dma_addr_t addr)556 static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
557 dma_addr_t addr)
558 {
559 txdes->txdes2 = cpu_to_le32(addr);
560 }
561
ftmac100_txdes_get_dma_addr(struct ftmac100_txdes * txdes)562 static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
563 {
564 return le32_to_cpu(txdes->txdes2);
565 }
566
567 /*
568 * txdes3 is not used by hardware. We use it to keep track of socket buffer.
569 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
570 */
ftmac100_txdes_set_skb(struct ftmac100_txdes * txdes,struct sk_buff * skb)571 static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
572 {
573 txdes->txdes3 = (unsigned int)skb;
574 }
575
ftmac100_txdes_get_skb(struct ftmac100_txdes * txdes)576 static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
577 {
578 return (struct sk_buff *)txdes->txdes3;
579 }
580
581 /******************************************************************************
582 * internal functions (transmit)
583 *****************************************************************************/
ftmac100_next_tx_pointer(int pointer)584 static int ftmac100_next_tx_pointer(int pointer)
585 {
586 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
587 }
588
ftmac100_tx_pointer_advance(struct ftmac100 * priv)589 static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
590 {
591 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
592 }
593
ftmac100_tx_clean_pointer_advance(struct ftmac100 * priv)594 static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
595 {
596 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
597 }
598
ftmac100_current_txdes(struct ftmac100 * priv)599 static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
600 {
601 return &priv->descs->txdes[priv->tx_pointer];
602 }
603
ftmac100_current_clean_txdes(struct ftmac100 * priv)604 static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
605 {
606 return &priv->descs->txdes[priv->tx_clean_pointer];
607 }
608
ftmac100_tx_complete_packet(struct ftmac100 * priv)609 static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
610 {
611 struct net_device *netdev = priv->netdev;
612 struct ftmac100_txdes *txdes;
613 struct sk_buff *skb;
614 dma_addr_t map;
615
616 if (priv->tx_pending == 0)
617 return false;
618
619 txdes = ftmac100_current_clean_txdes(priv);
620
621 if (ftmac100_txdes_owned_by_dma(txdes))
622 return false;
623
624 skb = ftmac100_txdes_get_skb(txdes);
625 map = ftmac100_txdes_get_dma_addr(txdes);
626
627 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
628 ftmac100_txdes_late_collision(txdes))) {
629 /*
630 * packet transmitted to ethernet lost due to late collision
631 * or excessive collision
632 */
633 netdev->stats.tx_aborted_errors++;
634 } else {
635 netdev->stats.tx_packets++;
636 netdev->stats.tx_bytes += skb->len;
637 }
638
639 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
640 dev_kfree_skb(skb);
641
642 ftmac100_txdes_reset(txdes);
643
644 ftmac100_tx_clean_pointer_advance(priv);
645
646 spin_lock(&priv->tx_lock);
647 priv->tx_pending--;
648 spin_unlock(&priv->tx_lock);
649 netif_wake_queue(netdev);
650
651 return true;
652 }
653
ftmac100_tx_complete(struct ftmac100 * priv)654 static void ftmac100_tx_complete(struct ftmac100 *priv)
655 {
656 while (ftmac100_tx_complete_packet(priv))
657 ;
658 }
659
ftmac100_xmit(struct ftmac100 * priv,struct sk_buff * skb,dma_addr_t map)660 static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
661 dma_addr_t map)
662 {
663 struct net_device *netdev = priv->netdev;
664 struct ftmac100_txdes *txdes;
665 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
666
667 txdes = ftmac100_current_txdes(priv);
668 ftmac100_tx_pointer_advance(priv);
669
670 /* setup TX descriptor */
671 ftmac100_txdes_set_skb(txdes, skb);
672 ftmac100_txdes_set_dma_addr(txdes, map);
673
674 ftmac100_txdes_set_first_segment(txdes);
675 ftmac100_txdes_set_last_segment(txdes);
676 ftmac100_txdes_set_txint(txdes);
677 ftmac100_txdes_set_buffer_size(txdes, len);
678
679 spin_lock(&priv->tx_lock);
680 priv->tx_pending++;
681 if (priv->tx_pending == TX_QUEUE_ENTRIES)
682 netif_stop_queue(netdev);
683
684 /* start transmit */
685 ftmac100_txdes_set_dma_own(txdes);
686 spin_unlock(&priv->tx_lock);
687
688 ftmac100_txdma_start_polling(priv);
689 return NETDEV_TX_OK;
690 }
691
692 /******************************************************************************
693 * internal functions (buffer)
694 *****************************************************************************/
ftmac100_alloc_rx_page(struct ftmac100 * priv,struct ftmac100_rxdes * rxdes,gfp_t gfp)695 static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
696 struct ftmac100_rxdes *rxdes, gfp_t gfp)
697 {
698 struct net_device *netdev = priv->netdev;
699 struct page *page;
700 dma_addr_t map;
701
702 page = alloc_page(gfp);
703 if (!page) {
704 if (net_ratelimit())
705 netdev_err(netdev, "failed to allocate rx page\n");
706 return -ENOMEM;
707 }
708
709 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
710 if (unlikely(dma_mapping_error(priv->dev, map))) {
711 if (net_ratelimit())
712 netdev_err(netdev, "failed to map rx page\n");
713 __free_page(page);
714 return -ENOMEM;
715 }
716
717 ftmac100_rxdes_set_page(rxdes, page);
718 ftmac100_rxdes_set_dma_addr(rxdes, map);
719 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
720 ftmac100_rxdes_set_dma_own(rxdes);
721 return 0;
722 }
723
ftmac100_free_buffers(struct ftmac100 * priv)724 static void ftmac100_free_buffers(struct ftmac100 *priv)
725 {
726 int i;
727
728 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
729 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
730 struct page *page = ftmac100_rxdes_get_page(rxdes);
731 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
732
733 if (!page)
734 continue;
735
736 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
737 __free_page(page);
738 }
739
740 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
741 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
742 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
743 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
744
745 if (!skb)
746 continue;
747
748 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
749 dev_kfree_skb(skb);
750 }
751
752 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
753 priv->descs, priv->descs_dma_addr);
754 }
755
ftmac100_alloc_buffers(struct ftmac100 * priv)756 static int ftmac100_alloc_buffers(struct ftmac100 *priv)
757 {
758 int i;
759
760 priv->descs = dma_alloc_coherent(priv->dev,
761 sizeof(struct ftmac100_descs),
762 &priv->descs_dma_addr, GFP_KERNEL);
763 if (!priv->descs)
764 return -ENOMEM;
765
766 /* initialize RX ring */
767 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
768
769 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
770 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
771
772 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
773 goto err;
774 }
775
776 /* initialize TX ring */
777 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
778 return 0;
779
780 err:
781 ftmac100_free_buffers(priv);
782 return -ENOMEM;
783 }
784
785 /******************************************************************************
786 * struct mii_if_info functions
787 *****************************************************************************/
ftmac100_mdio_read(struct net_device * netdev,int phy_id,int reg)788 static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
789 {
790 struct ftmac100 *priv = netdev_priv(netdev);
791 unsigned int phycr;
792 int i;
793
794 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
795 FTMAC100_PHYCR_REGAD(reg) |
796 FTMAC100_PHYCR_MIIRD;
797
798 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
799
800 for (i = 0; i < 10; i++) {
801 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
802
803 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
804 return phycr & FTMAC100_PHYCR_MIIRDATA;
805
806 udelay(100);
807 }
808
809 netdev_err(netdev, "mdio read timed out\n");
810 return 0;
811 }
812
ftmac100_mdio_write(struct net_device * netdev,int phy_id,int reg,int data)813 static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
814 int data)
815 {
816 struct ftmac100 *priv = netdev_priv(netdev);
817 unsigned int phycr;
818 int i;
819
820 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
821 FTMAC100_PHYCR_REGAD(reg) |
822 FTMAC100_PHYCR_MIIWR;
823
824 data = FTMAC100_PHYWDATA_MIIWDATA(data);
825
826 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
827 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
828
829 for (i = 0; i < 10; i++) {
830 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
831
832 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
833 return;
834
835 udelay(100);
836 }
837
838 netdev_err(netdev, "mdio write timed out\n");
839 }
840
841 /******************************************************************************
842 * struct ethtool_ops functions
843 *****************************************************************************/
ftmac100_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)844 static void ftmac100_get_drvinfo(struct net_device *netdev,
845 struct ethtool_drvinfo *info)
846 {
847 strscpy(info->driver, DRV_NAME, sizeof(info->driver));
848 strscpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
849 }
850
ftmac100_get_link_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)851 static int ftmac100_get_link_ksettings(struct net_device *netdev,
852 struct ethtool_link_ksettings *cmd)
853 {
854 struct ftmac100 *priv = netdev_priv(netdev);
855
856 mii_ethtool_get_link_ksettings(&priv->mii, cmd);
857
858 return 0;
859 }
860
ftmac100_set_link_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)861 static int ftmac100_set_link_ksettings(struct net_device *netdev,
862 const struct ethtool_link_ksettings *cmd)
863 {
864 struct ftmac100 *priv = netdev_priv(netdev);
865 return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
866 }
867
ftmac100_nway_reset(struct net_device * netdev)868 static int ftmac100_nway_reset(struct net_device *netdev)
869 {
870 struct ftmac100 *priv = netdev_priv(netdev);
871 return mii_nway_restart(&priv->mii);
872 }
873
ftmac100_get_link(struct net_device * netdev)874 static u32 ftmac100_get_link(struct net_device *netdev)
875 {
876 struct ftmac100 *priv = netdev_priv(netdev);
877 return mii_link_ok(&priv->mii);
878 }
879
880 static const struct ethtool_ops ftmac100_ethtool_ops = {
881 .get_drvinfo = ftmac100_get_drvinfo,
882 .nway_reset = ftmac100_nway_reset,
883 .get_link = ftmac100_get_link,
884 .get_link_ksettings = ftmac100_get_link_ksettings,
885 .set_link_ksettings = ftmac100_set_link_ksettings,
886 };
887
888 /******************************************************************************
889 * interrupt handler
890 *****************************************************************************/
ftmac100_interrupt(int irq,void * dev_id)891 static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
892 {
893 struct net_device *netdev = dev_id;
894 struct ftmac100 *priv = netdev_priv(netdev);
895
896 /* Disable interrupts for polling */
897 ftmac100_disable_all_int(priv);
898 if (likely(netif_running(netdev)))
899 napi_schedule(&priv->napi);
900
901 return IRQ_HANDLED;
902 }
903
904 /******************************************************************************
905 * struct napi_struct functions
906 *****************************************************************************/
ftmac100_poll(struct napi_struct * napi,int budget)907 static int ftmac100_poll(struct napi_struct *napi, int budget)
908 {
909 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
910 struct net_device *netdev = priv->netdev;
911 unsigned int status;
912 bool completed = true;
913 int rx = 0;
914
915 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
916
917 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
918 /*
919 * FTMAC100_INT_RPKT_FINISH:
920 * RX DMA has received packets into RX buffer successfully
921 *
922 * FTMAC100_INT_NORXBUF:
923 * RX buffer unavailable
924 */
925 bool retry;
926
927 do {
928 retry = ftmac100_rx_packet(priv, &rx);
929 } while (retry && rx < budget);
930
931 if (retry && rx == budget)
932 completed = false;
933 }
934
935 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
936 /*
937 * FTMAC100_INT_XPKT_OK:
938 * packet transmitted to ethernet successfully
939 *
940 * FTMAC100_INT_XPKT_LOST:
941 * packet transmitted to ethernet lost due to late
942 * collision or excessive collision
943 */
944 ftmac100_tx_complete(priv);
945 }
946
947 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
948 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
949 if (net_ratelimit())
950 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
951 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
952 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
953 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
954 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
955
956 if (status & FTMAC100_INT_NORXBUF) {
957 /* RX buffer unavailable */
958 netdev->stats.rx_over_errors++;
959 }
960
961 if (status & FTMAC100_INT_RPKT_LOST) {
962 /* received packet lost due to RX FIFO full */
963 netdev->stats.rx_fifo_errors++;
964 }
965
966 if (status & FTMAC100_INT_PHYSTS_CHG) {
967 /* PHY link status change */
968 mii_check_link(&priv->mii);
969 }
970 }
971
972 if (completed) {
973 /* stop polling */
974 napi_complete(napi);
975 ftmac100_enable_all_int(priv);
976 }
977
978 return rx;
979 }
980
981 /******************************************************************************
982 * struct net_device_ops functions
983 *****************************************************************************/
ftmac100_open(struct net_device * netdev)984 static int ftmac100_open(struct net_device *netdev)
985 {
986 struct ftmac100 *priv = netdev_priv(netdev);
987 int err;
988
989 err = ftmac100_alloc_buffers(priv);
990 if (err) {
991 netdev_err(netdev, "failed to allocate buffers\n");
992 goto err_alloc;
993 }
994
995 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
996 if (err) {
997 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
998 goto err_irq;
999 }
1000
1001 priv->rx_pointer = 0;
1002 priv->tx_clean_pointer = 0;
1003 priv->tx_pointer = 0;
1004 priv->tx_pending = 0;
1005
1006 err = ftmac100_start_hw(priv);
1007 if (err)
1008 goto err_hw;
1009
1010 napi_enable(&priv->napi);
1011 netif_start_queue(netdev);
1012
1013 ftmac100_enable_all_int(priv);
1014
1015 return 0;
1016
1017 err_hw:
1018 free_irq(priv->irq, netdev);
1019 err_irq:
1020 ftmac100_free_buffers(priv);
1021 err_alloc:
1022 return err;
1023 }
1024
ftmac100_stop(struct net_device * netdev)1025 static int ftmac100_stop(struct net_device *netdev)
1026 {
1027 struct ftmac100 *priv = netdev_priv(netdev);
1028
1029 ftmac100_disable_all_int(priv);
1030 netif_stop_queue(netdev);
1031 napi_disable(&priv->napi);
1032 ftmac100_stop_hw(priv);
1033 free_irq(priv->irq, netdev);
1034 ftmac100_free_buffers(priv);
1035
1036 return 0;
1037 }
1038
1039 static netdev_tx_t
ftmac100_hard_start_xmit(struct sk_buff * skb,struct net_device * netdev)1040 ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1041 {
1042 struct ftmac100 *priv = netdev_priv(netdev);
1043 dma_addr_t map;
1044
1045 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1046 if (net_ratelimit())
1047 netdev_dbg(netdev, "tx packet too big\n");
1048
1049 netdev->stats.tx_dropped++;
1050 dev_kfree_skb(skb);
1051 return NETDEV_TX_OK;
1052 }
1053
1054 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1055 if (unlikely(dma_mapping_error(priv->dev, map))) {
1056 /* drop packet */
1057 if (net_ratelimit())
1058 netdev_err(netdev, "map socket buffer failed\n");
1059
1060 netdev->stats.tx_dropped++;
1061 dev_kfree_skb(skb);
1062 return NETDEV_TX_OK;
1063 }
1064
1065 return ftmac100_xmit(priv, skb, map);
1066 }
1067
1068 /* optional */
ftmac100_do_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)1069 static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1070 {
1071 struct ftmac100 *priv = netdev_priv(netdev);
1072 struct mii_ioctl_data *data = if_mii(ifr);
1073
1074 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1075 }
1076
ftmac100_change_mtu(struct net_device * netdev,int mtu)1077 static int ftmac100_change_mtu(struct net_device *netdev, int mtu)
1078 {
1079 struct ftmac100 *priv = netdev_priv(netdev);
1080 unsigned int maccr;
1081
1082 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
1083 if (mtu > ETH_DATA_LEN) {
1084 /* process long packets in the driver */
1085 maccr |= FTMAC100_MACCR_RX_FTL;
1086 } else {
1087 /* Let the controller drop incoming packets greater
1088 * than 1518 (that is 1500 + 14 Ethernet + 4 FCS).
1089 */
1090 maccr &= ~FTMAC100_MACCR_RX_FTL;
1091 }
1092 iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
1093
1094 WRITE_ONCE(netdev->mtu, mtu);
1095
1096 return 0;
1097 }
1098
ftmac100_set_rx_mode(struct net_device * netdev)1099 static void ftmac100_set_rx_mode(struct net_device *netdev)
1100 {
1101 struct ftmac100 *priv = netdev_priv(netdev);
1102 unsigned int maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
1103
1104 ftmac100_set_rx_bits(priv, &maccr);
1105 iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
1106 }
1107
1108 static const struct net_device_ops ftmac100_netdev_ops = {
1109 .ndo_open = ftmac100_open,
1110 .ndo_stop = ftmac100_stop,
1111 .ndo_start_xmit = ftmac100_hard_start_xmit,
1112 .ndo_set_mac_address = eth_mac_addr,
1113 .ndo_validate_addr = eth_validate_addr,
1114 .ndo_eth_ioctl = ftmac100_do_ioctl,
1115 .ndo_change_mtu = ftmac100_change_mtu,
1116 .ndo_set_rx_mode = ftmac100_set_rx_mode,
1117 };
1118
1119 /******************************************************************************
1120 * struct platform_driver functions
1121 *****************************************************************************/
ftmac100_probe(struct platform_device * pdev)1122 static int ftmac100_probe(struct platform_device *pdev)
1123 {
1124 struct resource *res;
1125 int irq;
1126 struct net_device *netdev;
1127 struct ftmac100 *priv;
1128 int err;
1129
1130 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1131 if (!res)
1132 return -ENXIO;
1133
1134 irq = platform_get_irq(pdev, 0);
1135 if (irq < 0)
1136 return irq;
1137
1138 /* setup net_device */
1139 netdev = alloc_etherdev(sizeof(*priv));
1140 if (!netdev) {
1141 err = -ENOMEM;
1142 goto err_alloc_etherdev;
1143 }
1144
1145 SET_NETDEV_DEV(netdev, &pdev->dev);
1146 netdev->ethtool_ops = &ftmac100_ethtool_ops;
1147 netdev->netdev_ops = &ftmac100_netdev_ops;
1148 netdev->max_mtu = MAX_PKT_SIZE - VLAN_ETH_HLEN;
1149
1150 err = platform_get_ethdev_address(&pdev->dev, netdev);
1151 if (err == -EPROBE_DEFER)
1152 goto defer_get_mac;
1153
1154 platform_set_drvdata(pdev, netdev);
1155
1156 /* setup private data */
1157 priv = netdev_priv(netdev);
1158 priv->netdev = netdev;
1159 priv->dev = &pdev->dev;
1160
1161 spin_lock_init(&priv->tx_lock);
1162
1163 /* initialize NAPI */
1164 netif_napi_add(netdev, &priv->napi, ftmac100_poll);
1165
1166 /* map io memory */
1167 priv->res = request_mem_region(res->start, resource_size(res),
1168 dev_name(&pdev->dev));
1169 if (!priv->res) {
1170 dev_err(&pdev->dev, "Could not reserve memory region\n");
1171 err = -ENOMEM;
1172 goto err_req_mem;
1173 }
1174
1175 priv->base = ioremap(res->start, resource_size(res));
1176 if (!priv->base) {
1177 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1178 err = -EIO;
1179 goto err_ioremap;
1180 }
1181
1182 priv->irq = irq;
1183
1184 /* initialize struct mii_if_info */
1185 priv->mii.phy_id = 0;
1186 priv->mii.phy_id_mask = 0x1f;
1187 priv->mii.reg_num_mask = 0x1f;
1188 priv->mii.dev = netdev;
1189 priv->mii.mdio_read = ftmac100_mdio_read;
1190 priv->mii.mdio_write = ftmac100_mdio_write;
1191
1192 /* register network device */
1193 err = register_netdev(netdev);
1194 if (err) {
1195 dev_err(&pdev->dev, "Failed to register netdev\n");
1196 goto err_register_netdev;
1197 }
1198
1199 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1200
1201 if (!is_valid_ether_addr(netdev->dev_addr)) {
1202 eth_hw_addr_random(netdev);
1203 netdev_info(netdev, "generated random MAC address %pM\n",
1204 netdev->dev_addr);
1205 }
1206
1207 return 0;
1208
1209 err_register_netdev:
1210 iounmap(priv->base);
1211 err_ioremap:
1212 release_resource(priv->res);
1213 err_req_mem:
1214 netif_napi_del(&priv->napi);
1215 defer_get_mac:
1216 free_netdev(netdev);
1217 err_alloc_etherdev:
1218 return err;
1219 }
1220
ftmac100_remove(struct platform_device * pdev)1221 static void ftmac100_remove(struct platform_device *pdev)
1222 {
1223 struct net_device *netdev;
1224 struct ftmac100 *priv;
1225
1226 netdev = platform_get_drvdata(pdev);
1227 priv = netdev_priv(netdev);
1228
1229 unregister_netdev(netdev);
1230
1231 iounmap(priv->base);
1232 release_resource(priv->res);
1233
1234 netif_napi_del(&priv->napi);
1235 free_netdev(netdev);
1236 }
1237
1238 static const struct of_device_id ftmac100_of_ids[] = {
1239 { .compatible = "andestech,atmac100" },
1240 { }
1241 };
1242
1243 static struct platform_driver ftmac100_driver = {
1244 .probe = ftmac100_probe,
1245 .remove = ftmac100_remove,
1246 .driver = {
1247 .name = DRV_NAME,
1248 .of_match_table = ftmac100_of_ids
1249 },
1250 };
1251
1252 /******************************************************************************
1253 * initialization / finalization
1254 *****************************************************************************/
1255 module_platform_driver(ftmac100_driver);
1256
1257 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1258 MODULE_DESCRIPTION("FTMAC100 driver");
1259 MODULE_LICENSE("GPL");
1260 MODULE_DEVICE_TABLE(of, ftmac100_of_ids);
1261