1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/acpi.h> 7 #include <linux/bitfield.h> 8 #include <linux/build_bug.h> 9 #include <linux/cpu_pm.h> 10 #include <linux/kernel.h> 11 #include <linux/init.h> 12 #include <linux/types.h> 13 #include <linux/device.h> 14 #include <linux/io.h> 15 #include <linux/err.h> 16 #include <linux/export.h> 17 #include <linux/slab.h> 18 #include <linux/stringhash.h> 19 #include <linux/mutex.h> 20 #include <linux/clk.h> 21 #include <linux/coresight.h> 22 #include <linux/property.h> 23 #include <linux/delay.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/panic_notifier.h> 26 27 #include "coresight-etm-perf.h" 28 #include "coresight-priv.h" 29 #include "coresight-syscfg.h" 30 #include "coresight-trace-id.h" 31 32 /* 33 * Mutex used to lock all sysfs enable and disable actions and loading and 34 * unloading devices by the Coresight core. 35 */ 36 DEFINE_MUTEX(coresight_mutex); 37 static DEFINE_PER_CPU(struct coresight_device *, csdev_sink); 38 39 static DEFINE_RAW_SPINLOCK(coresight_dev_lock); 40 static DEFINE_PER_CPU(struct coresight_device *, csdev_source); 41 static DEFINE_PER_CPU(bool, percpu_pm_failed); 42 43 /** 44 * struct coresight_node - elements of a path, from source to sink 45 * @csdev: Address of an element. 46 * @link: hook to the list. 47 */ 48 struct coresight_node { 49 struct coresight_device *csdev; 50 struct list_head link; 51 }; 52 53 /* 54 * When losing synchronisation a new barrier packet needs to be inserted at the 55 * beginning of the data collected in a buffer. That way the decoder knows that 56 * it needs to look for another sync sequence. 57 */ 58 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; 59 EXPORT_SYMBOL_GPL(coresight_barrier_pkt); 60 61 /* List maintains the device index */ 62 static LIST_HEAD(coresight_dev_idx_list); 63 64 static const struct cti_assoc_op *cti_assoc_ops; 65 66 static struct coresight_node * 67 coresight_path_first_node(struct coresight_path *path) 68 { 69 if (list_empty(&path->path_list)) 70 return NULL; 71 72 return list_first_entry(&path->path_list, struct coresight_node, link); 73 } 74 75 static struct coresight_node * 76 coresight_path_last_node(struct coresight_path *path) 77 { 78 if (list_empty(&path->path_list)) 79 return NULL; 80 81 return list_last_entry(&path->path_list, struct coresight_node, link); 82 } 83 84 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) 85 { 86 cti_assoc_ops = cti_op; 87 } 88 EXPORT_SYMBOL_GPL(coresight_set_cti_ops); 89 90 void coresight_remove_cti_ops(void) 91 { 92 cti_assoc_ops = NULL; 93 } 94 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); 95 96 void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev) 97 { 98 per_cpu(csdev_sink, cpu) = csdev; 99 } 100 EXPORT_SYMBOL_GPL(coresight_set_percpu_sink); 101 102 struct coresight_device *coresight_get_percpu_sink(int cpu) 103 { 104 return per_cpu(csdev_sink, cpu); 105 } 106 EXPORT_SYMBOL_GPL(coresight_get_percpu_sink); 107 108 static void coresight_set_percpu_source(struct coresight_device *csdev) 109 { 110 if (!csdev || !coresight_is_percpu_source(csdev)) 111 return; 112 113 guard(raw_spinlock_irqsave)(&coresight_dev_lock); 114 115 /* Expect no device to be set yet */ 116 WARN_ON(per_cpu(csdev_source, csdev->cpu)); 117 per_cpu(csdev_source, csdev->cpu) = csdev; 118 } 119 120 static void coresight_clear_percpu_source(struct coresight_device *csdev) 121 { 122 if (!csdev || !coresight_is_percpu_source(csdev)) 123 return; 124 125 /* Clear percpu_pm_failed */ 126 per_cpu(percpu_pm_failed, csdev->cpu) = false; 127 128 guard(raw_spinlock_irqsave)(&coresight_dev_lock); 129 130 /* The per-CPU pointer should contain the same csdev */ 131 WARN_ON(per_cpu(csdev_source, csdev->cpu) != csdev); 132 per_cpu(csdev_source, csdev->cpu) = NULL; 133 } 134 135 struct coresight_device *coresight_get_percpu_source_ref(int cpu) 136 { 137 struct coresight_device *csdev; 138 139 if (WARN_ON(cpu < 0)) 140 return NULL; 141 142 guard(raw_spinlock_irqsave)(&coresight_dev_lock); 143 144 csdev = per_cpu(csdev_source, cpu); 145 if (!csdev) 146 return NULL; 147 148 /* 149 * Holding a reference to the csdev->dev ensures that the 150 * coresight_device is live for the caller. The path building 151 * logic can safely either build a path to the sink or fail 152 * if the device is being unregistered (if there was a race). 153 * The caller can skip the "source" device, if no path could 154 * be built. 155 */ 156 get_device(&csdev->dev); 157 158 return csdev; 159 } 160 161 void coresight_put_percpu_source_ref(struct coresight_device *csdev) 162 { 163 if (!csdev || !coresight_is_percpu_source(csdev)) 164 return; 165 166 guard(raw_spinlock_irqsave)(&coresight_dev_lock); 167 168 /* 169 * TODO: coresight_device_release() is invoked to release resources when 170 * the device's refcount reaches zero. It then calls free_percpu(), 171 * which acquires pcpu_lock — a sleepable lock when PREEMPT_RT is 172 * enabled. Since the raw spinlock coresight_dev_lock is held, this can 173 * lead to a potential "scheduling while atomic" issue. 174 */ 175 put_device(&csdev->dev); 176 } 177 178 struct coresight_device *coresight_get_source(struct coresight_path *path) 179 { 180 struct coresight_device *csdev; 181 struct coresight_node *nd; 182 183 if (!path) 184 return NULL; 185 186 nd = coresight_path_first_node(path); 187 if (!nd) 188 return NULL; 189 190 csdev = nd->csdev; 191 if (!coresight_is_device_source(csdev)) 192 return NULL; 193 194 return csdev; 195 } 196 197 /** 198 * coresight_blocks_source - checks whether the connection matches the source 199 * of path if connection is bound to specific source. 200 * @src: The source device of the trace path 201 * @conn: The connection of one outport 202 * 203 * Return false if the connection doesn't have a source binded or source of the 204 * path matches the source binds to connection. 205 */ 206 static bool coresight_blocks_source(struct coresight_device *src, 207 struct coresight_connection *conn) 208 { 209 return conn->filter_src_fwnode && (conn->filter_src_dev != src); 210 } 211 212 static struct coresight_connection * 213 coresight_find_out_connection(struct coresight_device *csdev, 214 struct coresight_device *out_dev, 215 struct coresight_device *trace_src) 216 { 217 int i; 218 struct coresight_connection *conn; 219 220 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 221 conn = csdev->pdata->out_conns[i]; 222 if (coresight_blocks_source(trace_src, conn)) 223 continue; 224 if (conn->dest_dev == out_dev) 225 return conn; 226 } 227 228 dev_err(&csdev->dev, 229 "couldn't find output connection, csdev: %s, out_dev: %s\n", 230 dev_name(&csdev->dev), dev_name(&out_dev->dev)); 231 232 return ERR_PTR(-ENODEV); 233 } 234 235 static u32 coresight_read_claim_tags_unlocked(struct coresight_device *csdev) 236 { 237 return FIELD_GET(CORESIGHT_CLAIM_MASK, 238 csdev_access_relaxed_read32(&csdev->access, CORESIGHT_CLAIMCLR)); 239 } 240 241 static void coresight_set_self_claim_tag_unlocked(struct coresight_device *csdev) 242 { 243 csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, 244 CORESIGHT_CLAIMSET); 245 isb(); 246 } 247 248 void coresight_clear_self_claim_tag(struct csdev_access *csa) 249 { 250 if (csa->io_mem) 251 CS_UNLOCK(csa->base); 252 coresight_clear_self_claim_tag_unlocked(csa); 253 if (csa->io_mem) 254 CS_LOCK(csa->base); 255 } 256 EXPORT_SYMBOL_GPL(coresight_clear_self_claim_tag); 257 258 void coresight_clear_self_claim_tag_unlocked(struct csdev_access *csa) 259 { 260 csdev_access_relaxed_write32(csa, CORESIGHT_CLAIM_SELF_HOSTED, 261 CORESIGHT_CLAIMCLR); 262 isb(); 263 } 264 EXPORT_SYMBOL_GPL(coresight_clear_self_claim_tag_unlocked); 265 266 /* 267 * coresight_claim_device_unlocked : Claim the device for self-hosted usage 268 * to prevent an external tool from touching this device. As per PSCI 269 * standards, section "Preserving the execution context" => "Debug and Trace 270 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and 271 * DBGCLAIM[0] is reserved for external tools. 272 * 273 * Called with CS_UNLOCKed for the component. 274 * Returns : 0 on success 275 */ 276 int coresight_claim_device_unlocked(struct coresight_device *csdev) 277 { 278 int tag; 279 struct csdev_access *csa; 280 281 if (WARN_ON(!csdev)) 282 return -EINVAL; 283 284 csa = &csdev->access; 285 tag = coresight_read_claim_tags_unlocked(csdev); 286 287 switch (tag) { 288 case CORESIGHT_CLAIM_FREE: 289 coresight_set_self_claim_tag_unlocked(csdev); 290 if (coresight_read_claim_tags_unlocked(csdev) == CORESIGHT_CLAIM_SELF_HOSTED) 291 return 0; 292 293 /* There was a race setting the tag, clean up and fail */ 294 coresight_clear_self_claim_tag_unlocked(csa); 295 dev_dbg(&csdev->dev, "Busy: Couldn't set self claim tag"); 296 return -EBUSY; 297 298 case CORESIGHT_CLAIM_EXTERNAL: 299 /* External debug is an expected state, so log and report BUSY */ 300 dev_dbg(&csdev->dev, "Busy: Claimed by external debugger"); 301 return -EBUSY; 302 303 default: 304 case CORESIGHT_CLAIM_SELF_HOSTED: 305 case CORESIGHT_CLAIM_INVALID: 306 /* 307 * Warn here because we clear a lingering self hosted tag 308 * on probe, so other tag combinations are impossible. 309 */ 310 dev_err_once(&csdev->dev, "Invalid claim tag state: %x", tag); 311 return -EBUSY; 312 } 313 } 314 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); 315 316 int coresight_claim_device(struct coresight_device *csdev) 317 { 318 int rc; 319 320 if (WARN_ON(!csdev)) 321 return -EINVAL; 322 323 CS_UNLOCK(csdev->access.base); 324 rc = coresight_claim_device_unlocked(csdev); 325 CS_LOCK(csdev->access.base); 326 327 return rc; 328 } 329 EXPORT_SYMBOL_GPL(coresight_claim_device); 330 331 /* 332 * coresight_disclaim_device_unlocked : Clear the claim tag for the device. 333 * Called with CS_UNLOCKed for the component. 334 */ 335 void coresight_disclaim_device_unlocked(struct coresight_device *csdev) 336 { 337 338 if (WARN_ON(!csdev)) 339 return; 340 341 if (coresight_read_claim_tags_unlocked(csdev) == CORESIGHT_CLAIM_SELF_HOSTED) 342 coresight_clear_self_claim_tag_unlocked(&csdev->access); 343 else 344 /* 345 * The external agent may have not honoured our claim 346 * and has manipulated it. Or something else has seriously 347 * gone wrong in our driver. 348 */ 349 dev_WARN_ONCE(&csdev->dev, 1, "External agent took claim tag"); 350 } 351 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); 352 353 void coresight_disclaim_device(struct coresight_device *csdev) 354 { 355 if (WARN_ON(!csdev)) 356 return; 357 358 CS_UNLOCK(csdev->access.base); 359 coresight_disclaim_device_unlocked(csdev); 360 CS_LOCK(csdev->access.base); 361 } 362 EXPORT_SYMBOL_GPL(coresight_disclaim_device); 363 364 /* 365 * Add a helper as an output device. This function takes the @coresight_mutex 366 * because it's assumed that it's called from the helper device, outside of the 367 * core code where the mutex would already be held. Don't add new calls to this 368 * from inside the core code, instead try to add the new helper to the DT and 369 * ACPI where it will be picked up and linked automatically. 370 */ 371 void coresight_add_helper(struct coresight_device *csdev, 372 struct coresight_device *helper) 373 { 374 int i; 375 struct coresight_connection conn = {}; 376 struct coresight_connection *new_conn; 377 378 mutex_lock(&coresight_mutex); 379 conn.dest_fwnode = fwnode_handle_get(dev_fwnode(&helper->dev)); 380 conn.dest_dev = helper; 381 conn.dest_port = conn.src_port = -1; 382 conn.src_dev = csdev; 383 384 /* 385 * Check for duplicates because this is called every time a helper 386 * device is re-loaded. Existing connections will get re-linked 387 * automatically. 388 */ 389 for (i = 0; i < csdev->pdata->nr_outconns; ++i) 390 if (csdev->pdata->out_conns[i]->dest_fwnode == conn.dest_fwnode) 391 goto unlock; 392 393 new_conn = coresight_add_out_conn(csdev->dev.parent, csdev->pdata, 394 &conn); 395 if (!IS_ERR(new_conn)) 396 coresight_add_in_conn(new_conn); 397 398 unlock: 399 mutex_unlock(&coresight_mutex); 400 } 401 EXPORT_SYMBOL_GPL(coresight_add_helper); 402 403 static int coresight_enable_sink(struct coresight_device *csdev, 404 enum cs_mode mode, 405 struct coresight_path *path) 406 { 407 return sink_ops(csdev)->enable(csdev, mode, path); 408 } 409 410 static void coresight_disable_sink(struct coresight_device *csdev) 411 { 412 sink_ops(csdev)->disable(csdev); 413 } 414 415 static int coresight_enable_link(struct coresight_device *csdev, 416 struct coresight_device *parent, 417 struct coresight_device *child, 418 struct coresight_device *source) 419 { 420 int link_subtype; 421 struct coresight_connection *inconn, *outconn; 422 423 if (!parent || !child) 424 return -EINVAL; 425 426 inconn = coresight_find_out_connection(parent, csdev, source); 427 outconn = coresight_find_out_connection(csdev, child, source); 428 link_subtype = csdev->subtype.link_subtype; 429 430 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && IS_ERR(inconn)) 431 return PTR_ERR(inconn); 432 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && IS_ERR(outconn)) 433 return PTR_ERR(outconn); 434 435 return link_ops(csdev)->enable(csdev, inconn, outconn); 436 } 437 438 static void coresight_disable_link(struct coresight_device *csdev, 439 struct coresight_device *parent, 440 struct coresight_device *child, 441 struct coresight_device *source) 442 { 443 struct coresight_connection *inconn, *outconn; 444 445 if (!parent || !child) 446 return; 447 448 inconn = coresight_find_out_connection(parent, csdev, source); 449 outconn = coresight_find_out_connection(csdev, child, source); 450 451 link_ops(csdev)->disable(csdev, inconn, outconn); 452 } 453 454 static bool coresight_is_helper(struct coresight_device *csdev) 455 { 456 return csdev->type == CORESIGHT_DEV_TYPE_HELPER; 457 } 458 459 static int coresight_enable_helper(struct coresight_device *csdev, 460 enum cs_mode mode, 461 struct coresight_path *path) 462 { 463 return helper_ops(csdev)->enable(csdev, mode, path); 464 } 465 466 static void coresight_disable_helper(struct coresight_device *csdev, 467 struct coresight_path *path) 468 { 469 helper_ops(csdev)->disable(csdev, path); 470 } 471 472 static void coresight_disable_helpers(struct coresight_device *csdev, 473 struct coresight_path *path) 474 { 475 int i; 476 struct coresight_device *helper; 477 478 for (i = 0; i < csdev->pdata->nr_outconns; ++i) { 479 helper = csdev->pdata->out_conns[i]->dest_dev; 480 if (helper && coresight_is_helper(helper)) 481 coresight_disable_helper(helper, path); 482 } 483 } 484 485 /* 486 * coresight_enable_source() and coresight_disable_source() only enable and 487 * disable the source, but do nothing for the associated helpers, which are 488 * controlled as part of the path. 489 */ 490 int coresight_enable_source(struct coresight_device *csdev, 491 struct perf_event *event, enum cs_mode mode, 492 struct coresight_path *path) 493 { 494 int ret; 495 496 if (!coresight_is_device_source(csdev)) 497 return -EINVAL; 498 499 ret = source_ops(csdev)->enable(csdev, event, mode, path); 500 if (ret) 501 return ret; 502 503 /* 504 * Update the path pointer until after the source is enabled to avoid 505 * races where multiple paths attempt to enable the same source. 506 * 507 * Do not set the path pointer here for per-CPU sources; set it locally 508 * on the CPU instead. Otherwise, there is a window where the path is 509 * enabled but the pointer is not yet set, causing CPU PM notifiers to 510 * miss PM operations due to reading a NULL pointer. 511 */ 512 if (!coresight_is_percpu_source(csdev)) 513 csdev->path = path; 514 515 return 0; 516 } 517 518 void coresight_disable_source(struct coresight_device *csdev, void *data) 519 { 520 if (!coresight_is_device_source(csdev)) 521 return; 522 523 if (!coresight_is_percpu_source(csdev)) 524 csdev->path = NULL; 525 526 source_ops(csdev)->disable(csdev, data); 527 } 528 EXPORT_SYMBOL_GPL(coresight_disable_source); 529 530 void coresight_pause_source(struct coresight_device *csdev) 531 { 532 if (!coresight_is_percpu_source(csdev)) 533 return; 534 535 if (source_ops(csdev)->pause_perf) 536 source_ops(csdev)->pause_perf(csdev); 537 } 538 EXPORT_SYMBOL_GPL(coresight_pause_source); 539 540 int coresight_resume_source(struct coresight_device *csdev) 541 { 542 if (!coresight_is_percpu_source(csdev)) 543 return -EOPNOTSUPP; 544 545 if (!source_ops(csdev)->resume_perf) 546 return -EOPNOTSUPP; 547 548 return source_ops(csdev)->resume_perf(csdev); 549 } 550 EXPORT_SYMBOL_GPL(coresight_resume_source); 551 552 /* 553 * Callers must fetch nodes from the path and pass @from and @to to the path 554 * enable/disable functions. Walk the path from @from to locate @to. If @to 555 * is found, it indicates @from and @to are in order. Otherwise, they are out 556 * of order. 557 */ 558 static bool coresight_path_nodes_in_order(struct coresight_path *path, 559 struct coresight_node *from, 560 struct coresight_node *to) 561 { 562 struct coresight_node *nd; 563 564 if (WARN_ON_ONCE(!from || !to)) 565 return false; 566 567 nd = from; 568 list_for_each_entry_from(nd, &path->path_list, link) { 569 if (nd == to) 570 return true; 571 } 572 573 return false; 574 } 575 576 static void coresight_disable_path_from_to(struct coresight_path *path, 577 struct coresight_node *from, 578 struct coresight_node *to) 579 { 580 u32 type; 581 struct coresight_device *csdev, *parent, *child; 582 struct coresight_node *nd; 583 584 if (!coresight_path_nodes_in_order(path, from, to)) 585 return; 586 587 nd = from; 588 list_for_each_entry_from(nd, &path->path_list, link) { 589 csdev = nd->csdev; 590 type = csdev->type; 591 592 /* 593 * ETF devices are tricky... They can be a link or a sink, 594 * depending on how they are configured. If an ETF has been 595 * selected as a sink it will be configured as a sink, otherwise 596 * go ahead with the link configuration. 597 */ 598 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 599 type = (csdev == coresight_get_sink(path)) ? 600 CORESIGHT_DEV_TYPE_SINK : 601 CORESIGHT_DEV_TYPE_LINK; 602 603 switch (type) { 604 case CORESIGHT_DEV_TYPE_SINK: 605 coresight_disable_sink(csdev); 606 break; 607 case CORESIGHT_DEV_TYPE_SOURCE: 608 break; 609 case CORESIGHT_DEV_TYPE_LINK: 610 parent = list_prev_entry(nd, link)->csdev; 611 child = list_next_entry(nd, link)->csdev; 612 coresight_disable_link(csdev, parent, child, 613 coresight_get_source(path)); 614 break; 615 default: 616 break; 617 } 618 619 /* Disable all helpers adjacent along the path last */ 620 coresight_disable_helpers(csdev, path); 621 622 /* Iterate up to and including @to */ 623 if (nd == to) 624 break; 625 } 626 } 627 628 void coresight_disable_path(struct coresight_path *path) 629 { 630 coresight_disable_path_from_to(path, 631 coresight_path_first_node(path), 632 coresight_path_last_node(path)); 633 } 634 EXPORT_SYMBOL_GPL(coresight_disable_path); 635 636 static int coresight_enable_helpers(struct coresight_device *csdev, 637 enum cs_mode mode, 638 struct coresight_path *path) 639 { 640 int i, ret = 0; 641 struct coresight_device *helper; 642 643 for (i = 0; i < csdev->pdata->nr_outconns; ++i) { 644 helper = csdev->pdata->out_conns[i]->dest_dev; 645 if (!helper || !coresight_is_helper(helper)) 646 continue; 647 648 ret = coresight_enable_helper(helper, mode, path); 649 if (ret) 650 goto err; 651 } 652 653 return 0; 654 655 err: 656 while (i--) { 657 helper = csdev->pdata->out_conns[i]->dest_dev; 658 if (helper && coresight_is_helper(helper)) 659 coresight_disable_helper(helper, path); 660 } 661 662 return ret; 663 } 664 665 static int coresight_enable_path_from_to(struct coresight_path *path, 666 enum cs_mode mode, 667 struct coresight_node *from, 668 struct coresight_node *to) 669 { 670 int ret = 0; 671 u32 type; 672 struct coresight_node *nd; 673 struct coresight_device *csdev, *parent, *child; 674 675 if (!coresight_path_nodes_in_order(path, from, to)) 676 return -EINVAL; 677 678 nd = to; 679 list_for_each_entry_from_reverse(nd, &path->path_list, link) { 680 csdev = nd->csdev; 681 type = csdev->type; 682 683 /* Enable all helpers adjacent to the path first */ 684 ret = coresight_enable_helpers(csdev, mode, path); 685 if (ret) 686 goto err_disable_path; 687 /* 688 * ETF devices are tricky... They can be a link or a sink, 689 * depending on how they are configured. If an ETF has been 690 * selected as a sink it will be configured as a sink, otherwise 691 * go ahead with the link configuration. 692 */ 693 if (type == CORESIGHT_DEV_TYPE_LINKSINK) 694 type = (csdev == coresight_get_sink(path)) ? 695 CORESIGHT_DEV_TYPE_SINK : 696 CORESIGHT_DEV_TYPE_LINK; 697 698 switch (type) { 699 case CORESIGHT_DEV_TYPE_SINK: 700 ret = coresight_enable_sink(csdev, mode, path); 701 /* 702 * Sink is the first component turned on. If we 703 * failed to enable the sink, there are no components 704 * that need disabling. Disabling the path here 705 * would mean we could disrupt an existing session. 706 */ 707 if (ret) { 708 coresight_disable_helpers(csdev, path); 709 goto out; 710 } 711 break; 712 case CORESIGHT_DEV_TYPE_SOURCE: 713 /* sources are enabled from either sysFS or Perf */ 714 break; 715 case CORESIGHT_DEV_TYPE_LINK: 716 parent = list_prev_entry(nd, link)->csdev; 717 child = list_next_entry(nd, link)->csdev; 718 ret = coresight_enable_link(csdev, parent, child, 719 coresight_get_source(path)); 720 if (ret) 721 goto err_disable_helpers; 722 break; 723 default: 724 ret = -EINVAL; 725 goto err_disable_helpers; 726 } 727 728 /* Iterate down to and including @from */ 729 if (nd == from) 730 break; 731 } 732 733 out: 734 return ret; 735 err_disable_helpers: 736 coresight_disable_helpers(csdev, path); 737 err_disable_path: 738 /* No device is actually enabled */ 739 if (nd == to) 740 goto out; 741 742 /* Fetch the previous node, the last successfully enabled one */ 743 nd = list_next_entry(nd, link); 744 coresight_disable_path_from_to(path, nd, to); 745 goto out; 746 } 747 748 int coresight_enable_path(struct coresight_path *path, enum cs_mode mode) 749 { 750 return coresight_enable_path_from_to(path, mode, 751 coresight_path_first_node(path), 752 coresight_path_last_node(path)); 753 } 754 755 struct coresight_device *coresight_get_sink(struct coresight_path *path) 756 { 757 struct coresight_device *csdev; 758 struct coresight_node *nd; 759 760 if (!path) 761 return NULL; 762 763 nd = coresight_path_last_node(path); 764 if (!nd) 765 return NULL; 766 767 csdev = nd->csdev; 768 if (csdev->type != CORESIGHT_DEV_TYPE_SINK && 769 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK) 770 return NULL; 771 772 return csdev; 773 } 774 EXPORT_SYMBOL_GPL(coresight_get_sink); 775 776 u32 coresight_get_sink_id(struct coresight_device *csdev) 777 { 778 if (!csdev->ea) 779 return 0; 780 781 /* 782 * See function etm_perf_add_symlink_sink() to know where 783 * this comes from. 784 */ 785 return (u32) (unsigned long) csdev->ea->var; 786 } 787 788 static int coresight_sink_by_id(struct device *dev, const void *data) 789 { 790 struct coresight_device *csdev = to_coresight_device(dev); 791 792 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 793 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 794 if (coresight_get_sink_id(csdev) == *(u32 *)data) 795 return 1; 796 } 797 798 return 0; 799 } 800 801 /** 802 * coresight_get_sink_by_id - returns the sink that matches the id 803 * @id: Id of the sink to match 804 * 805 * The name of a sink is unique, whether it is found on the AMBA bus or 806 * otherwise. As such the hash of that name can easily be used to identify 807 * a sink. 808 */ 809 struct coresight_device *coresight_get_sink_by_id(u32 id) 810 { 811 struct device *dev = NULL; 812 813 dev = bus_find_device(&coresight_bustype, NULL, &id, 814 coresight_sink_by_id); 815 816 return dev ? to_coresight_device(dev) : NULL; 817 } 818 819 /** 820 * coresight_get_ref- Helper function to increase reference count to module 821 * and device. 822 * 823 * @csdev: The coresight device to get a reference on. 824 * 825 * Return true in successful case and power up the device. 826 * Return false when failed to get reference of module. 827 */ 828 static bool coresight_get_ref(struct coresight_device *csdev) 829 { 830 struct device *dev = &csdev->dev; 831 struct device *parent = csdev->dev.parent; 832 struct device_driver *drv; 833 834 /* Make sure csdev can't go away */ 835 get_device(dev); 836 837 /* Make sure parent device can't go away */ 838 get_device(parent); 839 840 /* Make sure the driver can't be removed */ 841 drv = parent->driver; 842 if (!drv || !try_module_get(drv->owner)) 843 goto err_module; 844 845 /* Make sure the device is powered on */ 846 pm_runtime_get_sync(parent); 847 return true; 848 849 err_module: 850 put_device(parent); 851 put_device(dev); 852 return false; 853 } 854 855 /** 856 * coresight_put_ref- Helper function to decrease reference count to module 857 * and device. Power off the device. 858 * 859 * @csdev: The coresight device to decrement a reference from. 860 */ 861 static void coresight_put_ref(struct coresight_device *csdev) 862 { 863 struct device *dev = &csdev->dev; 864 struct device *parent = csdev->dev.parent; 865 struct device_driver *drv = parent->driver; 866 867 pm_runtime_put(parent); 868 if (drv) 869 module_put(drv->owner); 870 put_device(parent); 871 put_device(dev); 872 } 873 874 /* 875 * coresight_grab_device - Power up this device and any of the helper 876 * devices connected to it for trace operation. Since the helper devices 877 * don't appear on the trace path, they should be handled along with the 878 * master device. 879 */ 880 static int coresight_grab_device(struct coresight_device *csdev) 881 { 882 int i; 883 884 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 885 struct coresight_device *child; 886 887 child = csdev->pdata->out_conns[i]->dest_dev; 888 if (child && coresight_is_helper(child)) 889 if (!coresight_get_ref(child)) 890 goto err; 891 } 892 if (coresight_get_ref(csdev)) 893 return 0; 894 err: 895 for (i--; i >= 0; i--) { 896 struct coresight_device *child; 897 898 child = csdev->pdata->out_conns[i]->dest_dev; 899 if (child && coresight_is_helper(child)) 900 coresight_put_ref(child); 901 } 902 return -ENODEV; 903 } 904 905 /* 906 * coresight_drop_device - Release this device and any of the helper 907 * devices connected to it. 908 */ 909 static void coresight_drop_device(struct coresight_device *csdev) 910 { 911 int i; 912 913 coresight_put_ref(csdev); 914 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 915 struct coresight_device *child; 916 917 child = csdev->pdata->out_conns[i]->dest_dev; 918 if (child && coresight_is_helper(child)) 919 coresight_put_ref(child); 920 } 921 } 922 923 /* 924 * coresight device will read their existing or alloc a trace ID, if their trace_id 925 * callback is set. 926 * 927 * Return 0 if the trace_id callback is not set. 928 * Return the result of the trace_id callback if it is set. The return value 929 * will be the trace_id if successful, and an error number if it fails. 930 */ 931 static int coresight_get_trace_id(struct coresight_device *csdev, 932 enum cs_mode mode, 933 struct coresight_device *sink) 934 { 935 if (coresight_ops(csdev)->trace_id) 936 return coresight_ops(csdev)->trace_id(csdev, mode, sink); 937 938 return 0; 939 } 940 941 /* 942 * Call this after creating the path and before enabling it. This leaves 943 * the trace ID set on the path, or it remains 0 if it couldn't be assigned. 944 */ 945 int coresight_path_assign_trace_id(struct coresight_path *path, 946 enum cs_mode mode) 947 { 948 struct coresight_device *sink = coresight_get_sink(path); 949 struct coresight_node *nd; 950 int trace_id; 951 952 list_for_each_entry(nd, &path->path_list, link) { 953 /* Assign a trace ID to the path for the first device that wants to do it */ 954 trace_id = coresight_get_trace_id(nd->csdev, mode, sink); 955 956 /* 0 means the device has no ID assignment, so keep searching */ 957 if (trace_id == 0) 958 continue; 959 960 if (!IS_VALID_CS_TRACE_ID(trace_id)) 961 return -EINVAL; 962 963 path->trace_id = trace_id; 964 return 0; 965 } 966 967 return -EINVAL; 968 } 969 970 /** 971 * _coresight_build_path - recursively build a path from a @csdev to a sink. 972 * @csdev: The device to start from. 973 * @source: The trace source device of the path. 974 * @sink: The final sink we want in this path. 975 * @path: The list to add devices to. 976 * 977 * The tree of Coresight device is traversed until @sink is found. 978 * From there the sink is added to the list along with all the devices that led 979 * to that point - the end result is a list from source to sink. In that list 980 * the source is the first device and the sink the last one. 981 */ 982 static int _coresight_build_path(struct coresight_device *csdev, 983 struct coresight_device *source, 984 struct coresight_device *sink, 985 struct coresight_path *path) 986 { 987 int i, ret; 988 bool found = false; 989 struct coresight_node *node; 990 991 /* The sink has been found. Enqueue the element */ 992 if (csdev == sink) 993 goto out; 994 995 if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) && 996 sink == per_cpu(csdev_sink, csdev->cpu)) { 997 if (_coresight_build_path(sink, source, sink, path) == 0) { 998 found = true; 999 goto out; 1000 } 1001 } 1002 1003 /* Not a sink - recursively explore each port found on this element */ 1004 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 1005 struct coresight_device *child_dev; 1006 1007 child_dev = csdev->pdata->out_conns[i]->dest_dev; 1008 1009 if (coresight_blocks_source(source, csdev->pdata->out_conns[i])) 1010 continue; 1011 1012 if (child_dev && 1013 _coresight_build_path(child_dev, source, sink, path) == 0) { 1014 found = true; 1015 break; 1016 } 1017 } 1018 1019 if (!found) 1020 return -ENODEV; 1021 1022 out: 1023 /* 1024 * A path from this element to a sink has been found. The elements 1025 * leading to the sink are already enqueued, all that is left to do 1026 * is tell the PM runtime core we need this element and add a node 1027 * for it. 1028 */ 1029 ret = coresight_grab_device(csdev); 1030 if (ret) 1031 return ret; 1032 1033 node = kzalloc_obj(struct coresight_node); 1034 if (!node) 1035 return -ENOMEM; 1036 1037 node->csdev = csdev; 1038 list_add(&node->link, &path->path_list); 1039 1040 return 0; 1041 } 1042 1043 struct coresight_path *coresight_build_path(struct coresight_device *source, 1044 struct coresight_device *sink) 1045 { 1046 struct coresight_path *path; 1047 int rc; 1048 1049 if (!sink) 1050 return ERR_PTR(-EINVAL); 1051 1052 path = kzalloc_obj(struct coresight_path); 1053 if (!path) 1054 return ERR_PTR(-ENOMEM); 1055 1056 INIT_LIST_HEAD(&path->path_list); 1057 1058 rc = _coresight_build_path(source, source, sink, path); 1059 if (rc) { 1060 kfree(path); 1061 return ERR_PTR(rc); 1062 } 1063 1064 return path; 1065 } 1066 1067 /** 1068 * coresight_release_path - release a previously built path. 1069 * @path: the path to release. 1070 * 1071 * Go through all the elements of a path and 1) removed it from the list and 1072 * 2) free the memory allocated for each node. 1073 */ 1074 void coresight_release_path(struct coresight_path *path) 1075 { 1076 struct coresight_device *csdev; 1077 struct coresight_node *nd, *next; 1078 1079 list_for_each_entry_safe(nd, next, &path->path_list, link) { 1080 csdev = nd->csdev; 1081 1082 coresight_drop_device(csdev); 1083 list_del(&nd->link); 1084 kfree(nd); 1085 } 1086 1087 kfree(path); 1088 } 1089 1090 /* return true if the device is a suitable type for a default sink */ 1091 static bool coresight_is_def_sink_type(struct coresight_device *csdev) 1092 { 1093 /* sink & correct subtype */ 1094 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1095 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) && 1096 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER)) 1097 return true; 1098 return false; 1099 } 1100 1101 /** 1102 * coresight_select_best_sink - return the best sink for use as default from 1103 * the two provided. 1104 * 1105 * @sink: current best sink. 1106 * @depth: search depth where current sink was found. 1107 * @new_sink: new sink for comparison with current sink. 1108 * @new_depth: search depth where new sink was found. 1109 * 1110 * Sinks prioritised according to coresight_dev_subtype_sink, with only 1111 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used. 1112 * 1113 * Where two sinks of equal priority are found, the sink closest to the 1114 * source is used (smallest search depth). 1115 * 1116 * return @new_sink & update @depth if better than @sink, else return @sink. 1117 */ 1118 static struct coresight_device * 1119 coresight_select_best_sink(struct coresight_device *sink, int *depth, 1120 struct coresight_device *new_sink, int new_depth) 1121 { 1122 bool update = false; 1123 1124 if (!sink) { 1125 /* first found at this level */ 1126 update = true; 1127 } else if (new_sink->subtype.sink_subtype > 1128 sink->subtype.sink_subtype) { 1129 /* found better sink */ 1130 update = true; 1131 } else if ((new_sink->subtype.sink_subtype == 1132 sink->subtype.sink_subtype) && 1133 (*depth > new_depth)) { 1134 /* found same but closer sink */ 1135 update = true; 1136 } 1137 1138 if (update) 1139 *depth = new_depth; 1140 return update ? new_sink : sink; 1141 } 1142 1143 /** 1144 * coresight_find_sink - recursive function to walk trace connections from 1145 * source to find a suitable default sink. 1146 * 1147 * @csdev: source / current device to check. 1148 * @depth: [in] search depth of calling dev, [out] depth of found sink. 1149 * 1150 * This will walk the connection path from a source (ETM) till a suitable 1151 * sink is encountered and return that sink to the original caller. 1152 * 1153 * If current device is a plain sink return that & depth, otherwise recursively 1154 * call child connections looking for a sink. Select best possible using 1155 * coresight_select_best_sink. 1156 * 1157 * return best sink found, or NULL if not found at this node or child nodes. 1158 */ 1159 static struct coresight_device * 1160 coresight_find_sink(struct coresight_device *csdev, int *depth) 1161 { 1162 int i, curr_depth = *depth + 1, found_depth = 0; 1163 struct coresight_device *found_sink = NULL; 1164 1165 if (coresight_is_def_sink_type(csdev)) { 1166 found_depth = curr_depth; 1167 found_sink = csdev; 1168 if (csdev->type == CORESIGHT_DEV_TYPE_SINK) 1169 goto return_def_sink; 1170 /* look past LINKSINK for something better */ 1171 } 1172 1173 /* 1174 * Not a sink we want - or possible child sink may be better. 1175 * recursively explore each port found on this element. 1176 */ 1177 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 1178 struct coresight_device *child_dev, *sink = NULL; 1179 int child_depth = curr_depth; 1180 1181 child_dev = csdev->pdata->out_conns[i]->dest_dev; 1182 if (child_dev) 1183 sink = coresight_find_sink(child_dev, &child_depth); 1184 1185 if (sink) 1186 found_sink = coresight_select_best_sink(found_sink, 1187 &found_depth, 1188 sink, 1189 child_depth); 1190 } 1191 1192 return_def_sink: 1193 /* return found sink and depth */ 1194 if (found_sink) 1195 *depth = found_depth; 1196 return found_sink; 1197 } 1198 1199 /** 1200 * coresight_find_default_sink: Find a sink suitable for use as a 1201 * default sink. 1202 * 1203 * @csdev: starting source to find a connected sink. 1204 * 1205 * Walks connections graph looking for a suitable sink to enable for the 1206 * supplied source. Uses CoreSight device subtypes and distance from source 1207 * to select the best sink. 1208 * 1209 * If a sink is found, then the default sink for this device is set and 1210 * will be automatically used in future. 1211 * 1212 * Used in cases where the CoreSight user (perf / sysfs) has not selected a 1213 * sink. 1214 */ 1215 struct coresight_device * 1216 coresight_find_default_sink(struct coresight_device *csdev) 1217 { 1218 int depth = 0; 1219 1220 /* look for a default sink if we have not found for this device */ 1221 if (!csdev->def_sink) { 1222 if (coresight_is_percpu_source(csdev)) 1223 csdev->def_sink = per_cpu(csdev_sink, csdev->cpu); 1224 if (!csdev->def_sink) 1225 csdev->def_sink = coresight_find_sink(csdev, &depth); 1226 } 1227 return csdev->def_sink; 1228 } 1229 EXPORT_SYMBOL_GPL(coresight_find_default_sink); 1230 1231 static int coresight_remove_sink_ref(struct device *dev, void *data) 1232 { 1233 struct coresight_device *sink = data; 1234 struct coresight_device *source = to_coresight_device(dev); 1235 1236 if (source->def_sink == sink) 1237 source->def_sink = NULL; 1238 return 0; 1239 } 1240 1241 /** 1242 * coresight_clear_default_sink: Remove all default sink references to the 1243 * supplied sink. 1244 * 1245 * If supplied device is a sink, then check all the bus devices and clear 1246 * out all the references to this sink from the coresight_device def_sink 1247 * parameter. 1248 * 1249 * @csdev: coresight sink - remove references to this from all sources. 1250 */ 1251 static void coresight_clear_default_sink(struct coresight_device *csdev) 1252 { 1253 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) || 1254 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) { 1255 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1256 coresight_remove_sink_ref); 1257 } 1258 } 1259 1260 static void coresight_device_release(struct device *dev) 1261 { 1262 struct coresight_device *csdev = to_coresight_device(dev); 1263 1264 fwnode_handle_put(csdev->dev.fwnode); 1265 free_percpu(csdev->perf_sink_id_map.cpu_map); 1266 kfree(csdev); 1267 } 1268 1269 static int coresight_orphan_match(struct device *dev, void *data) 1270 { 1271 int i, ret = 0; 1272 bool still_orphan = false; 1273 struct coresight_device *dst_csdev = data; 1274 struct coresight_device *src_csdev = to_coresight_device(dev); 1275 struct coresight_connection *conn; 1276 bool fixup_self = (src_csdev == dst_csdev); 1277 1278 /* Move on to another component if no connection is orphan */ 1279 if (!src_csdev->orphan) 1280 return 0; 1281 /* 1282 * Circle through all the connections of that component. If we find 1283 * an orphan connection whose name matches @dst_csdev, link it. 1284 */ 1285 for (i = 0; i < src_csdev->pdata->nr_outconns; i++) { 1286 conn = src_csdev->pdata->out_conns[i]; 1287 1288 /* Fix filter source device before skip the port */ 1289 if (conn->filter_src_fwnode && !conn->filter_src_dev) { 1290 if (dst_csdev && 1291 (conn->filter_src_fwnode == dst_csdev->dev.fwnode) && 1292 !WARN_ON_ONCE(!coresight_is_device_source(dst_csdev))) 1293 conn->filter_src_dev = dst_csdev; 1294 else 1295 still_orphan = true; 1296 } 1297 1298 /* Skip the port if it's already connected. */ 1299 if (conn->dest_dev) 1300 continue; 1301 1302 /* 1303 * If we are at the "new" device, which triggered this search, 1304 * we must find the remote device from the fwnode in the 1305 * connection. 1306 */ 1307 if (fixup_self) 1308 dst_csdev = coresight_find_csdev_by_fwnode( 1309 conn->dest_fwnode); 1310 1311 /* Does it match this newly added device? */ 1312 if (dst_csdev && conn->dest_fwnode == dst_csdev->dev.fwnode) { 1313 ret = coresight_make_links(src_csdev, conn, dst_csdev); 1314 if (ret) 1315 return ret; 1316 1317 /* 1318 * Install the device connection. This also indicates that 1319 * the links are operational on both ends. 1320 */ 1321 conn->dest_dev = dst_csdev; 1322 conn->src_dev = src_csdev; 1323 1324 ret = coresight_add_in_conn(conn); 1325 if (ret) 1326 return ret; 1327 } else { 1328 /* This component still has an orphan */ 1329 still_orphan = true; 1330 } 1331 } 1332 1333 src_csdev->orphan = still_orphan; 1334 1335 /* 1336 * Returning '0' in case we didn't encounter any error, 1337 * ensures that all known component on the bus will be checked. 1338 */ 1339 return 0; 1340 } 1341 1342 static int coresight_fixup_orphan_conns(struct coresight_device *csdev) 1343 { 1344 return bus_for_each_dev(&coresight_bustype, NULL, 1345 csdev, coresight_orphan_match); 1346 } 1347 1348 static int coresight_clear_filter_source(struct device *dev, void *data) 1349 { 1350 int i; 1351 struct coresight_device *source = data; 1352 struct coresight_device *csdev = to_coresight_device(dev); 1353 1354 for (i = 0; i < csdev->pdata->nr_outconns; ++i) { 1355 if (csdev->pdata->out_conns[i]->filter_src_dev == source) 1356 csdev->pdata->out_conns[i]->filter_src_dev = NULL; 1357 } 1358 return 0; 1359 } 1360 1361 static void coresight_remove_conns(struct coresight_device *csdev) 1362 { 1363 int i, j; 1364 struct coresight_connection *conn; 1365 1366 if (coresight_is_device_source(csdev)) 1367 bus_for_each_dev(&coresight_bustype, NULL, csdev, 1368 coresight_clear_filter_source); 1369 1370 for (i = 0; i < csdev->pdata->nr_outconns; i++) { 1371 conn = csdev->pdata->out_conns[i]; 1372 if (conn->filter_src_fwnode) { 1373 conn->filter_src_dev = NULL; 1374 fwnode_handle_put(conn->filter_src_fwnode); 1375 } 1376 1377 if (!conn->dest_dev) 1378 continue; 1379 1380 /* Remove sysfs links for the output connection */ 1381 coresight_remove_links(csdev, conn); 1382 1383 /* 1384 * Remove the input connection references from the destination 1385 * device for each output connection. 1386 */ 1387 for (j = 0; j < conn->dest_dev->pdata->nr_inconns; ++j) 1388 if (conn->dest_dev->pdata->in_conns[j] == conn) { 1389 conn->dest_dev->pdata->in_conns[j] = NULL; 1390 break; 1391 } 1392 } 1393 1394 /* 1395 * For all input connections, remove references to this device. 1396 * Connection objects are shared so modifying this device's input 1397 * connections affects the other device's output connection. 1398 */ 1399 for (i = 0; i < csdev->pdata->nr_inconns; ++i) { 1400 conn = csdev->pdata->in_conns[i]; 1401 /* Input conns array is sparse */ 1402 if (!conn) 1403 continue; 1404 1405 conn->src_dev->orphan = true; 1406 coresight_remove_links(conn->src_dev, conn); 1407 conn->dest_dev = NULL; 1408 } 1409 1410 coresight_remove_conns_sysfs_group(csdev); 1411 } 1412 1413 /** 1414 * coresight_timeout_action - loop until a bit has changed to a specific register 1415 * state, with a callback after every trial. 1416 * @csa: coresight device access for the device 1417 * @offset: Offset of the register from the base of the device. 1418 * @position: the position of the bit of interest. 1419 * @value: the value the bit should have. 1420 * @cb: Call back after each trial. 1421 * 1422 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if 1423 * TIMEOUT_US has elapsed, which ever happens first. 1424 */ 1425 int coresight_timeout_action(struct csdev_access *csa, u32 offset, 1426 int position, int value, 1427 coresight_timeout_cb_t cb) 1428 { 1429 int i; 1430 u32 val; 1431 1432 for (i = TIMEOUT_US; i > 0; i--) { 1433 val = csdev_access_read32(csa, offset); 1434 /* waiting on the bit to go from 0 to 1 */ 1435 if (value) { 1436 if (val & BIT(position)) 1437 return 0; 1438 /* waiting on the bit to go from 1 to 0 */ 1439 } else { 1440 if (!(val & BIT(position))) 1441 return 0; 1442 } 1443 if (cb) 1444 cb(csa, offset, position, value); 1445 /* 1446 * Delay is arbitrary - the specification doesn't say how long 1447 * we are expected to wait. Extra check required to make sure 1448 * we don't wait needlessly on the last iteration. 1449 */ 1450 if (i - 1) 1451 udelay(1); 1452 } 1453 1454 return -EAGAIN; 1455 } 1456 EXPORT_SYMBOL_GPL(coresight_timeout_action); 1457 1458 int coresight_timeout(struct csdev_access *csa, u32 offset, 1459 int position, int value) 1460 { 1461 return coresight_timeout_action(csa, offset, position, value, NULL); 1462 } 1463 EXPORT_SYMBOL_GPL(coresight_timeout); 1464 1465 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset) 1466 { 1467 return csdev_access_relaxed_read32(&csdev->access, offset); 1468 } 1469 1470 u32 coresight_read32(struct coresight_device *csdev, u32 offset) 1471 { 1472 return csdev_access_read32(&csdev->access, offset); 1473 } 1474 1475 void coresight_relaxed_write32(struct coresight_device *csdev, 1476 u32 val, u32 offset) 1477 { 1478 csdev_access_relaxed_write32(&csdev->access, val, offset); 1479 } 1480 1481 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset) 1482 { 1483 csdev_access_write32(&csdev->access, val, offset); 1484 } 1485 1486 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset) 1487 { 1488 return csdev_access_relaxed_read64(&csdev->access, offset); 1489 } 1490 1491 u64 coresight_read64(struct coresight_device *csdev, u32 offset) 1492 { 1493 return csdev_access_read64(&csdev->access, offset); 1494 } 1495 1496 void coresight_relaxed_write64(struct coresight_device *csdev, 1497 u64 val, u32 offset) 1498 { 1499 csdev_access_relaxed_write64(&csdev->access, val, offset); 1500 } 1501 1502 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset) 1503 { 1504 csdev_access_write64(&csdev->access, val, offset); 1505 } 1506 1507 /* 1508 * coresight_release_platform_data: Release references to the devices connected 1509 * to the output port of this device. 1510 */ 1511 void coresight_release_platform_data(struct device *dev, 1512 struct coresight_platform_data *pdata) 1513 { 1514 int i; 1515 struct coresight_connection **conns = pdata->out_conns; 1516 1517 for (i = 0; i < pdata->nr_outconns; i++) { 1518 /* 1519 * Drop the refcount and clear the handle as this device 1520 * is going away 1521 */ 1522 fwnode_handle_put(conns[i]->dest_fwnode); 1523 conns[i]->dest_fwnode = NULL; 1524 devm_kfree(dev, conns[i]); 1525 } 1526 devm_kfree(dev, pdata->out_conns); 1527 devm_kfree(dev, pdata->in_conns); 1528 devm_kfree(dev, pdata); 1529 } 1530 1531 static struct coresight_device * 1532 coresight_init_device(struct coresight_desc *desc) 1533 { 1534 struct coresight_device *csdev; 1535 1536 csdev = kzalloc_obj(*csdev); 1537 if (!csdev) 1538 return ERR_PTR(-ENOMEM); 1539 1540 csdev->pdata = desc->pdata; 1541 csdev->type = desc->type; 1542 csdev->subtype = desc->subtype; 1543 csdev->ops = desc->ops; 1544 csdev->access = desc->access; 1545 csdev->orphan = true; 1546 1547 if (desc->flags & CORESIGHT_DESC_CPU_BOUND) { 1548 csdev->cpu = desc->cpu; 1549 } else { 1550 /* A per-CPU source or sink must set CPU_BOUND flag */ 1551 if (coresight_is_percpu_source(csdev) || 1552 coresight_is_percpu_sink(csdev)) { 1553 kfree(csdev); 1554 return ERR_PTR(-EINVAL); 1555 } 1556 1557 csdev->cpu = -1; 1558 } 1559 1560 csdev->dev.type = &coresight_dev_type[desc->type]; 1561 csdev->dev.groups = desc->groups; 1562 csdev->dev.parent = desc->dev; 1563 csdev->dev.release = coresight_device_release; 1564 csdev->dev.bus = &coresight_bustype; 1565 1566 return csdev; 1567 } 1568 1569 struct coresight_device *coresight_register(struct coresight_desc *desc) 1570 { 1571 int ret; 1572 struct coresight_device *csdev; 1573 bool registered = false; 1574 1575 csdev = coresight_init_device(desc); 1576 if (IS_ERR(csdev)) { 1577 ret = PTR_ERR(csdev); 1578 goto err_out; 1579 } 1580 1581 if (csdev->type == CORESIGHT_DEV_TYPE_SINK || 1582 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) { 1583 raw_spin_lock_init(&csdev->perf_sink_id_map.lock); 1584 csdev->perf_sink_id_map.cpu_map = alloc_percpu(atomic_t); 1585 if (!csdev->perf_sink_id_map.cpu_map) { 1586 kfree(csdev); 1587 ret = -ENOMEM; 1588 goto err_out; 1589 } 1590 } 1591 1592 /* 1593 * Hold the reference to our parent device. This will be 1594 * dropped only in coresight_device_release(). 1595 */ 1596 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev)); 1597 dev_set_name(&csdev->dev, "%s", desc->name); 1598 1599 /* 1600 * Make sure the device registration and the connection fixup 1601 * are synchronised, so that we don't see uninitialised devices 1602 * on the coresight bus while trying to resolve the connections. 1603 */ 1604 mutex_lock(&coresight_mutex); 1605 1606 ret = device_register(&csdev->dev); 1607 if (ret) { 1608 put_device(&csdev->dev); 1609 /* 1610 * All resources are free'd explicitly via 1611 * coresight_device_release(), triggered from put_device(). 1612 */ 1613 goto out_unlock; 1614 } 1615 1616 /* Device is now registered */ 1617 registered = true; 1618 1619 ret = etm_perf_add_symlink_sink(csdev); 1620 if (ret && ret != -EOPNOTSUPP) 1621 goto out_unlock; 1622 1623 ret = coresight_create_conns_sysfs_group(csdev); 1624 if (ret) 1625 goto out_unlock; 1626 1627 ret = coresight_fixup_orphan_conns(csdev); 1628 if (ret) 1629 goto out_unlock; 1630 1631 coresight_set_percpu_source(csdev); 1632 mutex_unlock(&coresight_mutex); 1633 1634 if (cti_assoc_ops && cti_assoc_ops->add) 1635 cti_assoc_ops->add(csdev); 1636 1637 return csdev; 1638 1639 out_unlock: 1640 mutex_unlock(&coresight_mutex); 1641 1642 /* Unregister the device if needed */ 1643 if (registered) { 1644 coresight_unregister(csdev); 1645 return ERR_PTR(ret); 1646 } 1647 1648 err_out: 1649 coresight_release_platform_data(desc->dev, desc->pdata); 1650 return ERR_PTR(ret); 1651 } 1652 EXPORT_SYMBOL_GPL(coresight_register); 1653 1654 void coresight_unregister(struct coresight_device *csdev) 1655 { 1656 /* Remove references of that device in the topology */ 1657 if (cti_assoc_ops && cti_assoc_ops->remove) 1658 cti_assoc_ops->remove(csdev); 1659 1660 mutex_lock(&coresight_mutex); 1661 coresight_clear_percpu_source(csdev); 1662 etm_perf_del_symlink_sink(csdev); 1663 coresight_remove_conns(csdev); 1664 coresight_clear_default_sink(csdev); 1665 coresight_release_platform_data(csdev->dev.parent, csdev->pdata); 1666 device_unregister(&csdev->dev); 1667 mutex_unlock(&coresight_mutex); 1668 } 1669 EXPORT_SYMBOL_GPL(coresight_unregister); 1670 1671 static struct coresight_dev_list * 1672 coresight_allocate_device_list(const char *prefix) 1673 { 1674 struct coresight_dev_list *list; 1675 1676 /* Check if have already allocated */ 1677 list_for_each_entry(list, &coresight_dev_idx_list, node) { 1678 if (!strcmp(list->pfx, prefix)) 1679 return list; 1680 } 1681 1682 list = kzalloc(sizeof(*list), GFP_KERNEL); 1683 if (!list) 1684 return NULL; 1685 1686 list->pfx = kstrdup(prefix, GFP_KERNEL); 1687 if (!list->pfx) { 1688 kfree(list); 1689 return NULL; 1690 } 1691 1692 list_add(&list->node, &coresight_dev_idx_list); 1693 return list; 1694 } 1695 1696 static int coresight_allocate_device_idx(struct coresight_dev_list *list, 1697 struct device *dev) 1698 { 1699 struct fwnode_handle **fwnode_list; 1700 struct fwnode_handle *fwnode = dev_fwnode(dev); 1701 int idx; 1702 1703 for (idx = 0; idx < list->nr_idx; idx++) 1704 if (list->fwnode_list[idx] == fwnode) 1705 return idx; 1706 1707 /* Make space for the new entry */ 1708 idx = list->nr_idx; 1709 fwnode_list = krealloc_array(list->fwnode_list, 1710 idx + 1, sizeof(*list->fwnode_list), 1711 GFP_KERNEL); 1712 if (!fwnode_list) 1713 return -ENOMEM; 1714 1715 fwnode_list[idx] = fwnode; 1716 list->fwnode_list = fwnode_list; 1717 list->nr_idx = idx + 1; 1718 1719 return idx; 1720 } 1721 1722 static bool coresight_compare_type(enum coresight_dev_type type_a, 1723 union coresight_dev_subtype subtype_a, 1724 enum coresight_dev_type type_b, 1725 union coresight_dev_subtype subtype_b) 1726 { 1727 if (type_a != type_b) 1728 return false; 1729 1730 switch (type_a) { 1731 case CORESIGHT_DEV_TYPE_SINK: 1732 return subtype_a.sink_subtype == subtype_b.sink_subtype; 1733 case CORESIGHT_DEV_TYPE_LINK: 1734 return subtype_a.link_subtype == subtype_b.link_subtype; 1735 case CORESIGHT_DEV_TYPE_LINKSINK: 1736 return subtype_a.link_subtype == subtype_b.link_subtype && 1737 subtype_a.sink_subtype == subtype_b.sink_subtype; 1738 case CORESIGHT_DEV_TYPE_SOURCE: 1739 return subtype_a.source_subtype == subtype_b.source_subtype; 1740 case CORESIGHT_DEV_TYPE_HELPER: 1741 return subtype_a.helper_subtype == subtype_b.helper_subtype; 1742 default: 1743 return false; 1744 } 1745 } 1746 1747 struct coresight_device * 1748 coresight_find_input_type(struct coresight_platform_data *pdata, 1749 enum coresight_dev_type type, 1750 union coresight_dev_subtype subtype) 1751 { 1752 int i; 1753 struct coresight_connection *conn; 1754 1755 for (i = 0; i < pdata->nr_inconns; ++i) { 1756 conn = pdata->in_conns[i]; 1757 if (conn && 1758 coresight_compare_type(type, subtype, conn->src_dev->type, 1759 conn->src_dev->subtype)) 1760 return conn->src_dev; 1761 } 1762 return NULL; 1763 } 1764 EXPORT_SYMBOL_GPL(coresight_find_input_type); 1765 1766 struct coresight_device * 1767 coresight_find_output_type(struct coresight_platform_data *pdata, 1768 enum coresight_dev_type type, 1769 union coresight_dev_subtype subtype) 1770 { 1771 int i; 1772 struct coresight_connection *conn; 1773 1774 for (i = 0; i < pdata->nr_outconns; ++i) { 1775 conn = pdata->out_conns[i]; 1776 if (conn->dest_dev && 1777 coresight_compare_type(type, subtype, conn->dest_dev->type, 1778 conn->dest_dev->subtype)) 1779 return conn->dest_dev; 1780 } 1781 return NULL; 1782 } 1783 EXPORT_SYMBOL_GPL(coresight_find_output_type); 1784 1785 bool coresight_loses_context_with_cpu(struct device *dev) 1786 { 1787 return fwnode_property_present(dev_fwnode(dev), 1788 "arm,coresight-loses-context-with-cpu"); 1789 } 1790 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); 1791 1792 /* 1793 * coresight_alloc_device_name - Get an index for a given device in the list 1794 * specific to a driver (presented by the prefix string). An index is allocated 1795 * for a device and is tracked with the fwnode_handle to prevent allocating 1796 * duplicate indices for the same device (e.g, if we defer probing of 1797 * a device due to dependencies), in case the index is requested again. 1798 */ 1799 char *coresight_alloc_device_name(const char *prefix, struct device *dev) 1800 { 1801 struct coresight_dev_list *list; 1802 char *name = NULL; 1803 int idx; 1804 1805 mutex_lock(&coresight_mutex); 1806 1807 list = coresight_allocate_device_list(prefix); 1808 if (!list) 1809 goto done; 1810 1811 idx = coresight_allocate_device_idx(list, dev); 1812 1813 /* 1814 * If index allocation fails, the device list is not released here; 1815 * it is instead freed later by coresight_release_device_list() when 1816 * the coresight_core module is unloaded. 1817 */ 1818 if (idx < 0) 1819 goto done; 1820 1821 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", list->pfx, idx); 1822 done: 1823 mutex_unlock(&coresight_mutex); 1824 return name; 1825 } 1826 EXPORT_SYMBOL_GPL(coresight_alloc_device_name); 1827 1828 static void coresight_release_device_list(void) 1829 { 1830 struct coresight_dev_list *list, *next; 1831 int i; 1832 1833 /* 1834 * Here is no need to take coresight_mutex; this is during core module 1835 * unloading, no race condition with other modules. 1836 */ 1837 1838 list_for_each_entry_safe(list, next, &coresight_dev_idx_list, node) { 1839 for (i = 0; i < list->nr_idx; i++) 1840 list->fwnode_list[i] = NULL; 1841 list->nr_idx = 0; 1842 list_del(&list->node); 1843 1844 kfree(list->pfx); 1845 kfree(list->fwnode_list); 1846 kfree(list); 1847 } 1848 } 1849 1850 static struct coresight_path *coresight_cpu_get_active_path(enum cs_mode mode) 1851 { 1852 struct coresight_device *source; 1853 bool is_active = false; 1854 1855 source = coresight_get_percpu_source_ref(smp_processor_id()); 1856 if (!source) 1857 return NULL; 1858 1859 if (coresight_get_mode(source) & mode) 1860 is_active = true; 1861 1862 coresight_put_percpu_source_ref(source); 1863 1864 /* 1865 * It is expected to run in atomic context or with the CPU lock held for 1866 * sysfs mode, so it cannot be preempted to disable the path. Here 1867 * returns the active path pointer without concern that its state may 1868 * change. Since the build path has taken a reference on the component, 1869 * the path can be safely used by the caller. 1870 */ 1871 return is_active ? source->path : NULL; 1872 } 1873 1874 /* Return: 1 if PM is required, 0 if skip, or a negative error */ 1875 static int coresight_pm_is_needed(struct coresight_path *path) 1876 { 1877 struct coresight_device *source, *sink; 1878 1879 if (this_cpu_read(percpu_pm_failed)) 1880 return -EIO; 1881 1882 if (!path) 1883 return 0; 1884 1885 source = coresight_get_source(path); 1886 sink = coresight_get_sink(path); 1887 if (!source || !sink) 1888 return 0; 1889 1890 /* pm_save_disable() and pm_restore_enable() must be paired */ 1891 if (coresight_ops(source)->pm_save_disable && 1892 coresight_ops(source)->pm_restore_enable) 1893 return 1; 1894 1895 /* 1896 * It is not permitted that the source has no callbacks while the sink 1897 * does, as the sink cannot be disabled without disabling the source, 1898 * which may lead to lockups. Fix this by enabling self-hosted PM 1899 * mode for ETM (see etm4_probe()). 1900 */ 1901 if (coresight_ops(sink)->pm_save_disable && 1902 coresight_ops(sink)->pm_restore_enable) { 1903 pr_warn_once("coresight PM failed: source has no PM callbacks; " 1904 "cannot safely control sink\n"); 1905 return -EINVAL; 1906 } 1907 1908 return 0; 1909 } 1910 1911 static int coresight_pm_device_save(struct coresight_device *csdev) 1912 { 1913 if (!csdev || !coresight_ops(csdev)->pm_save_disable) 1914 return 0; 1915 1916 return coresight_ops(csdev)->pm_save_disable(csdev); 1917 } 1918 1919 static void coresight_pm_device_restore(struct coresight_device *csdev) 1920 { 1921 if (!csdev || !coresight_ops(csdev)->pm_restore_enable) 1922 return; 1923 1924 coresight_ops(csdev)->pm_restore_enable(csdev); 1925 } 1926 1927 static int coresight_pm_save(struct coresight_path *path) 1928 { 1929 struct coresight_device *source = coresight_get_source(path); 1930 struct coresight_node *from, *to; 1931 int ret; 1932 1933 ret = coresight_pm_device_save(source); 1934 if (ret) 1935 return ret; 1936 1937 from = coresight_path_first_node(path); 1938 /* Disable up to the node before sink */ 1939 to = list_prev_entry(coresight_path_last_node(path), link); 1940 coresight_disable_path_from_to(path, from, to); 1941 1942 /* 1943 * Save the sink. Most sinks do not implement a save callback to avoid 1944 * latency from memory copying. We assume the sink's save and restore 1945 * always succeed. 1946 */ 1947 coresight_pm_device_save(coresight_get_sink(path)); 1948 return 0; 1949 } 1950 1951 static void coresight_pm_restore(struct coresight_path *path) 1952 { 1953 struct coresight_device *source = coresight_get_source(path); 1954 struct coresight_device *sink = coresight_get_sink(path); 1955 struct coresight_node *from, *to; 1956 int ret; 1957 1958 coresight_pm_device_restore(sink); 1959 1960 from = coresight_path_first_node(path); 1961 /* Enable up to the node before sink */ 1962 to = list_prev_entry(coresight_path_last_node(path), link); 1963 ret = coresight_enable_path_from_to(path, coresight_get_mode(source), 1964 from, to); 1965 if (ret) 1966 goto path_failed; 1967 1968 coresight_pm_device_restore(source); 1969 return; 1970 1971 path_failed: 1972 coresight_pm_device_save(sink); 1973 1974 pr_err("Failed in coresight PM restore on CPU%d: %d\n", 1975 smp_processor_id(), ret); 1976 1977 /* 1978 * Once PM fails on a CPU, set percpu_pm_failed and leave it set until 1979 * reboot. This prevents repeated partial transitions during idle 1980 * entry and exit. 1981 */ 1982 this_cpu_write(percpu_pm_failed, true); 1983 } 1984 1985 static int coresight_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, 1986 void *v) 1987 { 1988 struct coresight_path *path = 1989 coresight_cpu_get_active_path(CS_MODE_SYSFS | CS_MODE_PERF); 1990 int ret; 1991 1992 ret = coresight_pm_is_needed(path); 1993 if (ret <= 0) 1994 return ret ? NOTIFY_BAD : NOTIFY_DONE; 1995 1996 switch (cmd) { 1997 case CPU_PM_ENTER: 1998 if (coresight_pm_save(path)) 1999 return NOTIFY_BAD; 2000 break; 2001 case CPU_PM_EXIT: 2002 case CPU_PM_ENTER_FAILED: 2003 coresight_pm_restore(path); 2004 break; 2005 default: 2006 return NOTIFY_DONE; 2007 } 2008 2009 return NOTIFY_OK; 2010 } 2011 2012 static struct notifier_block coresight_cpu_pm_nb = { 2013 .notifier_call = coresight_cpu_pm_notify, 2014 }; 2015 2016 static int coresight_dying_cpu(unsigned int cpu) 2017 { 2018 struct coresight_path *path; 2019 2020 /* 2021 * The perf event layer will disable PMU events in the CPU 2022 * hotplug. Here only handles SYSFS case. 2023 */ 2024 path = coresight_cpu_get_active_path(CS_MODE_SYSFS); 2025 if (!path) 2026 return 0; 2027 2028 coresight_disable_sysfs(coresight_get_source(path)); 2029 return 0; 2030 } 2031 2032 static int __init coresight_pm_setup(void) 2033 { 2034 int ret; 2035 2036 ret = cpu_pm_register_notifier(&coresight_cpu_pm_nb); 2037 if (ret) 2038 return ret; 2039 2040 ret = cpuhp_setup_state_nocalls(CPUHP_AP_ARM_CORESIGHT_ONLINE, 2041 "arm/coresight-core:dying", 2042 NULL, coresight_dying_cpu); 2043 if (ret) 2044 cpu_pm_unregister_notifier(&coresight_cpu_pm_nb); 2045 2046 return ret; 2047 } 2048 2049 static void coresight_pm_cleanup(void) 2050 { 2051 cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_ONLINE); 2052 cpu_pm_unregister_notifier(&coresight_cpu_pm_nb); 2053 } 2054 2055 const struct bus_type coresight_bustype = { 2056 .name = "coresight", 2057 }; 2058 2059 static int coresight_panic_sync(struct device *dev, void *data) 2060 { 2061 int mode; 2062 struct coresight_device *csdev; 2063 2064 /* Run through panic sync handlers for all enabled devices */ 2065 csdev = container_of(dev, struct coresight_device, dev); 2066 mode = coresight_get_mode(csdev); 2067 2068 if ((mode == CS_MODE_SYSFS) || (mode == CS_MODE_PERF)) { 2069 if (panic_ops(csdev)) 2070 panic_ops(csdev)->sync(csdev); 2071 } 2072 2073 return 0; 2074 } 2075 2076 static int coresight_panic_cb(struct notifier_block *self, 2077 unsigned long v, void *p) 2078 { 2079 bus_for_each_dev(&coresight_bustype, NULL, NULL, 2080 coresight_panic_sync); 2081 2082 return 0; 2083 } 2084 2085 static struct notifier_block coresight_notifier = { 2086 .notifier_call = coresight_panic_cb, 2087 }; 2088 2089 static int __init coresight_init(void) 2090 { 2091 int ret; 2092 2093 ret = bus_register(&coresight_bustype); 2094 if (ret) 2095 return ret; 2096 2097 ret = etm_perf_init(); 2098 if (ret) 2099 goto exit_bus_unregister; 2100 2101 /* Register function to be called for panic */ 2102 ret = atomic_notifier_chain_register(&panic_notifier_list, 2103 &coresight_notifier); 2104 if (ret) 2105 goto exit_perf; 2106 2107 /* initialise the coresight syscfg API */ 2108 ret = cscfg_init(); 2109 if (ret) 2110 goto exit_notifier; 2111 2112 ret = coresight_pm_setup(); 2113 if (!ret) 2114 return 0; 2115 2116 cscfg_exit(); 2117 exit_notifier: 2118 atomic_notifier_chain_unregister(&panic_notifier_list, 2119 &coresight_notifier); 2120 exit_perf: 2121 etm_perf_exit(); 2122 exit_bus_unregister: 2123 bus_unregister(&coresight_bustype); 2124 return ret; 2125 } 2126 2127 static void __exit coresight_exit(void) 2128 { 2129 coresight_pm_cleanup(); 2130 cscfg_exit(); 2131 atomic_notifier_chain_unregister(&panic_notifier_list, 2132 &coresight_notifier); 2133 etm_perf_exit(); 2134 bus_unregister(&coresight_bustype); 2135 coresight_release_device_list(); 2136 } 2137 2138 module_init(coresight_init); 2139 module_exit(coresight_exit); 2140 2141 int coresight_init_driver_with_owner(const char *drv, struct amba_driver *amba_drv, 2142 struct platform_driver *pdev_drv, struct module *owner, 2143 const char *mod_name) 2144 { 2145 int ret; 2146 2147 ret = __amba_driver_register(amba_drv, owner); 2148 if (ret) { 2149 pr_err("%s: error registering AMBA driver\n", drv); 2150 return ret; 2151 } 2152 2153 ret = __platform_driver_register(pdev_drv, owner, mod_name); 2154 if (!ret) 2155 return 0; 2156 2157 pr_err("%s: error registering platform driver\n", drv); 2158 amba_driver_unregister(amba_drv); 2159 return ret; 2160 } 2161 EXPORT_SYMBOL_GPL(coresight_init_driver_with_owner); 2162 2163 void coresight_remove_driver(struct amba_driver *amba_drv, 2164 struct platform_driver *pdev_drv) 2165 { 2166 amba_driver_unregister(amba_drv); 2167 platform_driver_unregister(pdev_drv); 2168 } 2169 EXPORT_SYMBOL_GPL(coresight_remove_driver); 2170 2171 int coresight_etm_get_trace_id(struct coresight_device *csdev, enum cs_mode mode, 2172 struct coresight_device *sink) 2173 { 2174 int cpu, trace_id; 2175 2176 if (csdev->type != CORESIGHT_DEV_TYPE_SOURCE) 2177 return -EINVAL; 2178 2179 cpu = csdev->cpu; 2180 switch (mode) { 2181 case CS_MODE_SYSFS: 2182 trace_id = coresight_trace_id_get_cpu_id(cpu); 2183 break; 2184 case CS_MODE_PERF: 2185 if (WARN_ON(!sink)) 2186 return -EINVAL; 2187 2188 trace_id = coresight_trace_id_get_cpu_id_map(cpu, &sink->perf_sink_id_map); 2189 break; 2190 default: 2191 trace_id = -EINVAL; 2192 break; 2193 } 2194 2195 if (!IS_VALID_CS_TRACE_ID(trace_id)) 2196 dev_err(&csdev->dev, 2197 "Failed to allocate trace ID on CPU%d\n", cpu); 2198 2199 return trace_id; 2200 } 2201 EXPORT_SYMBOL_GPL(coresight_etm_get_trace_id); 2202 2203 /* 2204 * Attempt to find and enable programming clock (pclk) and trace clock (atclk) 2205 * for the given device. 2206 * 2207 * For ACPI devices, clocks are controlled by firmware, so bail out early in 2208 * this case. Also, skip enabling pclk if the clock is managed by the AMBA 2209 * bus driver instead. 2210 * 2211 * atclk is an optional clock, it will be only enabled when it is existed. 2212 * Otherwise, a NULL pointer will be returned to caller. 2213 * 2214 * Returns: '0' on Success; Error code otherwise. 2215 */ 2216 int coresight_get_enable_clocks(struct device *dev, struct clk **pclk, 2217 struct clk **atclk) 2218 { 2219 WARN_ON(!pclk); 2220 2221 if (has_acpi_companion(dev)) 2222 return 0; 2223 2224 if (!dev_is_amba(dev)) { 2225 /* 2226 * "apb_pclk" is the default clock name for an Arm Primecell 2227 * peripheral, while "apb" is used only by the CTCU driver. 2228 * 2229 * For easier maintenance, CoreSight drivers should use 2230 * "apb_pclk" as the programming clock name. 2231 */ 2232 *pclk = devm_clk_get_optional_enabled(dev, "apb_pclk"); 2233 if (!*pclk) 2234 *pclk = devm_clk_get_optional_enabled(dev, "apb"); 2235 if (IS_ERR(*pclk)) 2236 return PTR_ERR(*pclk); 2237 } 2238 2239 /* Initialization of atclk is skipped if it is a NULL pointer. */ 2240 if (atclk) { 2241 *atclk = devm_clk_get_optional_enabled(dev, "atclk"); 2242 if (IS_ERR(*atclk)) 2243 return PTR_ERR(*atclk); 2244 } 2245 2246 return 0; 2247 } 2248 EXPORT_SYMBOL_GPL(coresight_get_enable_clocks); 2249 2250 MODULE_LICENSE("GPL v2"); 2251 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); 2252 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); 2253 MODULE_DESCRIPTION("Arm CoreSight tracer driver"); 2254