1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright 2008 Cisco Systems, Inc. All rights reserved.
4 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 */
6 #include <linux/errno.h>
7 #include <linux/types.h>
8 #include <linux/pci.h>
9 #include "wq_enet_desc.h"
10 #include "rq_enet_desc.h"
11 #include "cq_enet_desc.h"
12 #include "vnic_resource.h"
13 #include "vnic_dev.h"
14 #include "vnic_wq.h"
15 #include "vnic_rq.h"
16 #include "vnic_cq.h"
17 #include "vnic_intr.h"
18 #include "vnic_stats.h"
19 #include "vnic_nic.h"
20 #include "fnic.h"
21
fnic_get_vnic_config(struct fnic * fnic)22 int fnic_get_vnic_config(struct fnic *fnic)
23 {
24 struct vnic_fc_config *c = &fnic->config;
25 int err;
26
27 #define GET_CONFIG(m) \
28 do { \
29 err = vnic_dev_spec(fnic->vdev, \
30 offsetof(struct vnic_fc_config, m), \
31 sizeof(c->m), &c->m); \
32 if (err) { \
33 dev_err(&fnic->pdev->dev, "Error getting %s, %d\n", #m, err); \
34 return err; \
35 } \
36 } while (0);
37
38 GET_CONFIG(node_wwn);
39 GET_CONFIG(port_wwn);
40 GET_CONFIG(wq_enet_desc_count);
41 GET_CONFIG(wq_copy_desc_count);
42 GET_CONFIG(rq_desc_count);
43 GET_CONFIG(maxdatafieldsize);
44 GET_CONFIG(ed_tov);
45 GET_CONFIG(ra_tov);
46 GET_CONFIG(intr_timer);
47 GET_CONFIG(intr_timer_type);
48 GET_CONFIG(flags);
49 GET_CONFIG(flogi_retries);
50 GET_CONFIG(flogi_timeout);
51 GET_CONFIG(plogi_retries);
52 GET_CONFIG(plogi_timeout);
53 GET_CONFIG(io_throttle_count);
54 GET_CONFIG(link_down_timeout);
55 GET_CONFIG(port_down_timeout);
56 GET_CONFIG(port_down_io_retries);
57 GET_CONFIG(luns_per_tgt);
58 GET_CONFIG(intr_mode);
59 GET_CONFIG(wq_copy_count);
60
61 if ((c->flags & (VFCF_FC_INITIATOR)) == 0) {
62 dev_info(&fnic->pdev->dev, "vNIC role not defined (def role: FC Init)\n");
63 c->flags |= VFCF_FC_INITIATOR;
64 }
65
66 c->wq_enet_desc_count =
67 min_t(u32, VNIC_FNIC_WQ_DESCS_MAX,
68 max_t(u32, VNIC_FNIC_WQ_DESCS_MIN,
69 c->wq_enet_desc_count));
70 c->wq_enet_desc_count = ALIGN(c->wq_enet_desc_count, 16);
71
72 c->wq_copy_desc_count =
73 min_t(u32, VNIC_FNIC_WQ_COPY_DESCS_MAX,
74 max_t(u32, VNIC_FNIC_WQ_COPY_DESCS_MIN,
75 c->wq_copy_desc_count));
76 c->wq_copy_desc_count = ALIGN(c->wq_copy_desc_count, 16);
77
78 c->rq_desc_count =
79 min_t(u32, VNIC_FNIC_RQ_DESCS_MAX,
80 max_t(u32, VNIC_FNIC_RQ_DESCS_MIN,
81 c->rq_desc_count));
82 c->rq_desc_count = ALIGN(c->rq_desc_count, 16);
83
84 c->maxdatafieldsize =
85 min_t(u16, VNIC_FNIC_MAXDATAFIELDSIZE_MAX,
86 max_t(u16, VNIC_FNIC_MAXDATAFIELDSIZE_MIN,
87 c->maxdatafieldsize));
88 c->ed_tov =
89 min_t(u32, VNIC_FNIC_EDTOV_MAX,
90 max_t(u32, VNIC_FNIC_EDTOV_MIN,
91 c->ed_tov));
92
93 c->ra_tov =
94 min_t(u32, VNIC_FNIC_RATOV_MAX,
95 max_t(u32, VNIC_FNIC_RATOV_MIN,
96 c->ra_tov));
97
98 c->flogi_retries =
99 min_t(u32, VNIC_FNIC_FLOGI_RETRIES_MAX, c->flogi_retries);
100
101 c->flogi_timeout =
102 min_t(u32, VNIC_FNIC_FLOGI_TIMEOUT_MAX,
103 max_t(u32, VNIC_FNIC_FLOGI_TIMEOUT_MIN,
104 c->flogi_timeout));
105
106 c->plogi_retries =
107 min_t(u32, VNIC_FNIC_PLOGI_RETRIES_MAX, c->plogi_retries);
108
109 c->plogi_timeout =
110 min_t(u32, VNIC_FNIC_PLOGI_TIMEOUT_MAX,
111 max_t(u32, VNIC_FNIC_PLOGI_TIMEOUT_MIN,
112 c->plogi_timeout));
113
114 c->io_throttle_count =
115 min_t(u32, VNIC_FNIC_IO_THROTTLE_COUNT_MAX,
116 max_t(u32, VNIC_FNIC_IO_THROTTLE_COUNT_MIN,
117 c->io_throttle_count));
118
119 c->link_down_timeout =
120 min_t(u32, VNIC_FNIC_LINK_DOWN_TIMEOUT_MAX,
121 c->link_down_timeout);
122
123 c->port_down_timeout =
124 min_t(u32, VNIC_FNIC_PORT_DOWN_TIMEOUT_MAX,
125 c->port_down_timeout);
126
127 c->port_down_io_retries =
128 min_t(u32, VNIC_FNIC_PORT_DOWN_IO_RETRIES_MAX,
129 c->port_down_io_retries);
130
131 c->luns_per_tgt =
132 min_t(u32, VNIC_FNIC_LUNS_PER_TARGET_MAX,
133 max_t(u32, VNIC_FNIC_LUNS_PER_TARGET_MIN,
134 c->luns_per_tgt));
135
136 c->intr_timer = min_t(u16, VNIC_INTR_TIMER_MAX, c->intr_timer);
137 c->intr_timer_type = c->intr_timer_type;
138
139 /* for older firmware, GET_CONFIG will not return anything */
140 if (c->wq_copy_count == 0)
141 c->wq_copy_count = 1;
142
143 c->wq_copy_count = min_t(u16, FNIC_WQ_COPY_MAX, c->wq_copy_count);
144
145 dev_info(&fnic->pdev->dev, "fNIC MAC addr %p wq/wq_copy/rq %d/%d/%d\n",
146 fnic->data_src_addr,
147 c->wq_enet_desc_count, c->wq_copy_desc_count,
148 c->rq_desc_count);
149 dev_info(&fnic->pdev->dev, "fNIC node wwn 0x%llx port wwn 0x%llx\n",
150 c->node_wwn, c->port_wwn);
151 dev_info(&fnic->pdev->dev, "fNIC ed_tov %d ra_tov %d\n",
152 c->ed_tov, c->ra_tov);
153 dev_info(&fnic->pdev->dev, "fNIC mtu %d intr timer %d\n",
154 c->maxdatafieldsize, c->intr_timer);
155 dev_info(&fnic->pdev->dev, "fNIC flags 0x%x luns per tgt %d\n",
156 c->flags, c->luns_per_tgt);
157 dev_info(&fnic->pdev->dev, "fNIC flogi_retries %d flogi timeout %d\n",
158 c->flogi_retries, c->flogi_timeout);
159 dev_info(&fnic->pdev->dev, "fNIC plogi retries %d plogi timeout %d\n",
160 c->plogi_retries, c->plogi_timeout);
161 dev_info(&fnic->pdev->dev, "fNIC io throttle count %d link dn timeout %d\n",
162 c->io_throttle_count, c->link_down_timeout);
163 dev_info(&fnic->pdev->dev, "fNIC port dn io retries %d port dn timeout %d\n",
164 c->port_down_io_retries, c->port_down_timeout);
165 dev_info(&fnic->pdev->dev, "fNIC wq_copy_count: %d\n", c->wq_copy_count);
166 dev_info(&fnic->pdev->dev, "fNIC intr mode: %d\n", c->intr_mode);
167
168 return 0;
169 }
170
fnic_set_nic_config(struct fnic * fnic,u8 rss_default_cpu,u8 rss_hash_type,u8 rss_hash_bits,u8 rss_base_cpu,u8 rss_enable,u8 tso_ipid_split_en,u8 ig_vlan_strip_en)171 int fnic_set_nic_config(struct fnic *fnic, u8 rss_default_cpu,
172 u8 rss_hash_type,
173 u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable,
174 u8 tso_ipid_split_en, u8 ig_vlan_strip_en)
175 {
176 u64 a0, a1;
177 u32 nic_cfg;
178 int wait = 1000;
179
180 vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
181 rss_hash_type, rss_hash_bits, rss_base_cpu,
182 rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
183
184 a0 = nic_cfg;
185 a1 = 0;
186
187 return vnic_dev_cmd(fnic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
188 }
189
fnic_get_res_counts(struct fnic * fnic)190 void fnic_get_res_counts(struct fnic *fnic)
191 {
192 fnic->wq_count = vnic_dev_get_res_count(fnic->vdev, RES_TYPE_WQ);
193 fnic->raw_wq_count = 1;
194 fnic->wq_copy_count = fnic->config.wq_copy_count;
195 fnic->rq_count = vnic_dev_get_res_count(fnic->vdev, RES_TYPE_RQ);
196 fnic->cq_count = vnic_dev_get_res_count(fnic->vdev, RES_TYPE_CQ);
197 fnic->intr_count = vnic_dev_get_res_count(fnic->vdev,
198 RES_TYPE_INTR_CTRL);
199
200 dev_info(&fnic->pdev->dev, "vNIC fw resources wq_count: %d\n", fnic->wq_count);
201 dev_info(&fnic->pdev->dev, "vNIC fw resources raw_wq_count: %d\n", fnic->raw_wq_count);
202 dev_info(&fnic->pdev->dev, "vNIC fw resources wq_copy_count: %d\n", fnic->wq_copy_count);
203 dev_info(&fnic->pdev->dev, "vNIC fw resources rq_count: %d\n", fnic->rq_count);
204 dev_info(&fnic->pdev->dev, "vNIC fw resources cq_count: %d\n", fnic->cq_count);
205 dev_info(&fnic->pdev->dev, "vNIC fw resources intr_count: %d\n", fnic->intr_count);
206 }
207
fnic_free_vnic_resources(struct fnic * fnic)208 void fnic_free_vnic_resources(struct fnic *fnic)
209 {
210 unsigned int i;
211
212 for (i = 0; i < fnic->raw_wq_count; i++)
213 vnic_wq_free(&fnic->wq[i]);
214
215 for (i = 0; i < fnic->wq_copy_count; i++)
216 vnic_wq_copy_free(&fnic->hw_copy_wq[i]);
217
218 for (i = 0; i < fnic->rq_count; i++)
219 vnic_rq_free(&fnic->rq[i]);
220
221 for (i = 0; i < fnic->cq_count; i++)
222 vnic_cq_free(&fnic->cq[i]);
223
224 for (i = 0; i < fnic->intr_count; i++)
225 vnic_intr_free(&fnic->intr[i]);
226 }
227
fnic_alloc_vnic_resources(struct fnic * fnic)228 int fnic_alloc_vnic_resources(struct fnic *fnic)
229 {
230 enum vnic_dev_intr_mode intr_mode;
231 unsigned int mask_on_assertion;
232 unsigned int interrupt_offset;
233 unsigned int error_interrupt_enable;
234 unsigned int error_interrupt_offset;
235 unsigned int i, cq_index;
236 unsigned int wq_copy_cq_desc_count;
237 int err;
238
239 intr_mode = vnic_dev_get_intr_mode(fnic->vdev);
240
241 dev_info(&fnic->pdev->dev, "vNIC interrupt mode: %s\n",
242 intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
243 intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
244 intr_mode == VNIC_DEV_INTR_MODE_MSIX ?
245 "MSI-X" : "unknown");
246
247 dev_info(&fnic->pdev->dev, "res avail: wq %d cp_wq %d raw_wq %d rq %d",
248 fnic->wq_count, fnic->wq_copy_count,
249 fnic->raw_wq_count, fnic->rq_count);
250
251 dev_info(&fnic->pdev->dev, "res avail: cq %d intr %d cpy-wq desc count %d\n",
252 fnic->cq_count, fnic->intr_count,
253 fnic->config.wq_copy_desc_count);
254
255 /* Allocate Raw WQ used for FCS frames */
256 for (i = 0; i < fnic->raw_wq_count; i++) {
257 err = vnic_wq_alloc(fnic->vdev, &fnic->wq[i], i,
258 fnic->config.wq_enet_desc_count,
259 sizeof(struct wq_enet_desc));
260 if (err)
261 goto err_out_cleanup;
262 }
263
264 /* Allocate Copy WQs used for SCSI IOs */
265 for (i = 0; i < fnic->wq_copy_count; i++) {
266 err = vnic_wq_copy_alloc(fnic->vdev, &fnic->hw_copy_wq[i],
267 (fnic->raw_wq_count + i),
268 fnic->config.wq_copy_desc_count,
269 sizeof(struct fcpio_host_req));
270 if (err)
271 goto err_out_cleanup;
272 }
273
274 /* RQ for receiving FCS frames */
275 for (i = 0; i < fnic->rq_count; i++) {
276 err = vnic_rq_alloc(fnic->vdev, &fnic->rq[i], i,
277 fnic->config.rq_desc_count,
278 sizeof(struct rq_enet_desc));
279 if (err)
280 goto err_out_cleanup;
281 }
282
283 /* CQ for each RQ */
284 for (i = 0; i < fnic->rq_count; i++) {
285 cq_index = i;
286 err = vnic_cq_alloc(fnic->vdev,
287 &fnic->cq[cq_index], cq_index,
288 fnic->config.rq_desc_count,
289 sizeof(struct cq_enet_rq_desc));
290 if (err)
291 goto err_out_cleanup;
292 }
293
294 /* CQ for each WQ */
295 for (i = 0; i < fnic->raw_wq_count; i++) {
296 cq_index = fnic->rq_count + i;
297 err = vnic_cq_alloc(fnic->vdev, &fnic->cq[cq_index], cq_index,
298 fnic->config.wq_enet_desc_count,
299 sizeof(struct cq_enet_wq_desc));
300 if (err)
301 goto err_out_cleanup;
302 }
303
304 /* CQ for each COPY WQ */
305 wq_copy_cq_desc_count = (fnic->config.wq_copy_desc_count * 3);
306 for (i = 0; i < fnic->wq_copy_count; i++) {
307 cq_index = fnic->raw_wq_count + fnic->rq_count + i;
308 err = vnic_cq_alloc(fnic->vdev, &fnic->cq[cq_index],
309 cq_index,
310 wq_copy_cq_desc_count,
311 sizeof(struct fcpio_fw_req));
312 if (err)
313 goto err_out_cleanup;
314 }
315
316 for (i = 0; i < fnic->intr_count; i++) {
317 err = vnic_intr_alloc(fnic->vdev, &fnic->intr[i], i);
318 if (err)
319 goto err_out_cleanup;
320 }
321
322 fnic->legacy_pba = vnic_dev_get_res(fnic->vdev,
323 RES_TYPE_INTR_PBA_LEGACY, 0);
324
325 if (!fnic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
326 dev_err(&fnic->pdev->dev, "Failed to hook legacy pba resource\n");
327 err = -ENODEV;
328 goto err_out_cleanup;
329 }
330
331 /*
332 * Init RQ/WQ resources.
333 *
334 * RQ[0 to n-1] point to CQ[0 to n-1]
335 * WQ[0 to m-1] point to CQ[n to n+m-1]
336 * WQ_COPY[0 to k-1] points to CQ[n+m to n+m+k-1]
337 *
338 * Note for copy wq we always initialize with cq_index = 0
339 *
340 * Error interrupt is not enabled for MSI.
341 */
342
343 switch (intr_mode) {
344 case VNIC_DEV_INTR_MODE_INTX:
345 case VNIC_DEV_INTR_MODE_MSIX:
346 error_interrupt_enable = 1;
347 error_interrupt_offset = fnic->err_intr_offset;
348 break;
349 default:
350 error_interrupt_enable = 0;
351 error_interrupt_offset = 0;
352 break;
353 }
354
355 for (i = 0; i < fnic->rq_count; i++) {
356 cq_index = i;
357 vnic_rq_init(&fnic->rq[i],
358 cq_index,
359 error_interrupt_enable,
360 error_interrupt_offset);
361 }
362
363 for (i = 0; i < fnic->raw_wq_count; i++) {
364 cq_index = i + fnic->rq_count;
365 vnic_wq_init(&fnic->wq[i],
366 cq_index,
367 error_interrupt_enable,
368 error_interrupt_offset);
369 }
370
371 for (i = 0; i < fnic->wq_copy_count; i++) {
372 vnic_wq_copy_init(&fnic->hw_copy_wq[i],
373 0 /* cq_index 0 - always */,
374 error_interrupt_enable,
375 error_interrupt_offset);
376 }
377
378 for (i = 0; i < fnic->cq_count; i++) {
379
380 switch (intr_mode) {
381 case VNIC_DEV_INTR_MODE_MSIX:
382 interrupt_offset = i;
383 break;
384 default:
385 interrupt_offset = 0;
386 break;
387 }
388
389 vnic_cq_init(&fnic->cq[i],
390 0 /* flow_control_enable */,
391 1 /* color_enable */,
392 0 /* cq_head */,
393 0 /* cq_tail */,
394 1 /* cq_tail_color */,
395 1 /* interrupt_enable */,
396 1 /* cq_entry_enable */,
397 0 /* cq_message_enable */,
398 interrupt_offset,
399 0 /* cq_message_addr */);
400 }
401
402 /*
403 * Init INTR resources
404 *
405 * mask_on_assertion is not used for INTx due to the level-
406 * triggered nature of INTx
407 */
408
409 switch (intr_mode) {
410 case VNIC_DEV_INTR_MODE_MSI:
411 case VNIC_DEV_INTR_MODE_MSIX:
412 mask_on_assertion = 1;
413 break;
414 default:
415 mask_on_assertion = 0;
416 break;
417 }
418
419 for (i = 0; i < fnic->intr_count; i++) {
420 vnic_intr_init(&fnic->intr[i],
421 fnic->config.intr_timer,
422 fnic->config.intr_timer_type,
423 mask_on_assertion);
424 }
425
426 /* init the stats memory by making the first call here */
427 err = vnic_dev_stats_dump(fnic->vdev, &fnic->stats);
428 if (err) {
429 dev_err(&fnic->pdev->dev, "vnic_dev_stats_dump failed - x%x\n", err);
430 goto err_out_cleanup;
431 }
432
433 /* Clear LIF stats */
434 vnic_dev_stats_clear(fnic->vdev);
435
436 return 0;
437
438 err_out_cleanup:
439 fnic_free_vnic_resources(fnic);
440
441 return err;
442 }
443