xref: /linux/sound/soc/codecs/pcm3168a.c (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * PCM3168A codec driver
4  *
5  * Copyright (C) 2015 Imagination Technologies Ltd.
6  *
7  * Author: Damien Horsley <Damien.Horsley@imgtec.com>
8  */
9 
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/module.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/regulator/consumer.h>
16 
17 #include <sound/pcm_params.h>
18 #include <sound/soc.h>
19 #include <sound/tlv.h>
20 
21 #include "pcm3168a.h"
22 
23 #define PCM3168A_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
24 			 SNDRV_PCM_FMTBIT_S24_3LE | \
25 			 SNDRV_PCM_FMTBIT_S24_LE)
26 
27 #define PCM3168A_FMT_I2S		0x0
28 #define PCM3168A_FMT_LEFT_J		0x1
29 #define PCM3168A_FMT_RIGHT_J		0x2
30 #define PCM3168A_FMT_RIGHT_J_16		0x3
31 #define PCM3168A_FMT_DSP_A		0x4
32 #define PCM3168A_FMT_DSP_B		0x5
33 #define PCM3168A_FMT_I2S_TDM		0x6
34 #define PCM3168A_FMT_LEFT_J_TDM		0x7
35 
36 static const char *const pcm3168a_supply_names[] = {
37 	"VDD1",
38 	"VDD2",
39 	"VCCAD1",
40 	"VCCAD2",
41 	"VCCDA1",
42 	"VCCDA2"
43 };
44 
45 #define PCM3168A_DAI_DAC		0
46 #define PCM3168A_DAI_ADC		1
47 
48 /* ADC/DAC side parameters */
49 struct pcm3168a_io_params {
50 	bool provider_mode;
51 	unsigned int format;
52 	int tdm_slots;
53 	u32 tdm_mask;
54 	int slot_width;
55 };
56 
57 struct pcm3168a_priv {
58 	struct regulator_bulk_data supplies[ARRAY_SIZE(pcm3168a_supply_names)];
59 	struct regmap *regmap;
60 	struct clk *scki;
61 	struct gpio_desc *gpio_rst;
62 	unsigned long sysclk;
63 
64 	struct pcm3168a_io_params io_params[2];
65 	struct snd_soc_dai_driver dai_drv[2];
66 };
67 
68 static const char *const pcm3168a_roll_off[] = { "Sharp", "Slow" };
69 
70 static SOC_ENUM_SINGLE_DECL(pcm3168a_d1_roll_off, PCM3168A_DAC_OP_FLT,
71 		PCM3168A_DAC_FLT_SHIFT, pcm3168a_roll_off);
72 static SOC_ENUM_SINGLE_DECL(pcm3168a_d2_roll_off, PCM3168A_DAC_OP_FLT,
73 		PCM3168A_DAC_FLT_SHIFT + 1, pcm3168a_roll_off);
74 static SOC_ENUM_SINGLE_DECL(pcm3168a_d3_roll_off, PCM3168A_DAC_OP_FLT,
75 		PCM3168A_DAC_FLT_SHIFT + 2, pcm3168a_roll_off);
76 static SOC_ENUM_SINGLE_DECL(pcm3168a_d4_roll_off, PCM3168A_DAC_OP_FLT,
77 		PCM3168A_DAC_FLT_SHIFT + 3, pcm3168a_roll_off);
78 
79 static const char *const pcm3168a_volume_type[] = {
80 		"Individual", "Master + Individual" };
81 
82 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_volume_type, PCM3168A_DAC_ATT_DEMP_ZF,
83 		PCM3168A_DAC_ATMDDA_SHIFT, pcm3168a_volume_type);
84 
85 static const char *const pcm3168a_att_speed_mult[] = { "2048", "4096" };
86 
87 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_att_mult, PCM3168A_DAC_ATT_DEMP_ZF,
88 		PCM3168A_DAC_ATSPDA_SHIFT, pcm3168a_att_speed_mult);
89 
90 static const char *const pcm3168a_demp[] = {
91 		"Disabled", "48khz", "44.1khz", "32khz" };
92 
93 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_demp, PCM3168A_DAC_ATT_DEMP_ZF,
94 		PCM3168A_DAC_DEMP_SHIFT, pcm3168a_demp);
95 
96 static const char *const pcm3168a_zf_func[] = {
97 		"DAC 1/2/3/4 AND", "DAC 1/2/3/4 OR", "DAC 1/2/3 AND",
98 		"DAC 1/2/3 OR", "DAC 4 AND", "DAC 4 OR" };
99 
100 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_zf_func, PCM3168A_DAC_ATT_DEMP_ZF,
101 		PCM3168A_DAC_AZRO_SHIFT, pcm3168a_zf_func);
102 
103 static const char *const pcm3168a_pol[] = { "Active High", "Active Low" };
104 
105 static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_zf_pol, PCM3168A_DAC_ATT_DEMP_ZF,
106 		PCM3168A_DAC_ATSPDA_SHIFT, pcm3168a_pol);
107 
108 static const char *const pcm3168a_con[] = { "Differential", "Single-Ended" };
109 
110 static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc1_con, PCM3168A_ADC_SEAD,
111 				0, 1, pcm3168a_con);
112 static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc2_con, PCM3168A_ADC_SEAD,
113 				2, 3, pcm3168a_con);
114 static SOC_ENUM_DOUBLE_DECL(pcm3168a_adc3_con, PCM3168A_ADC_SEAD,
115 				4, 5, pcm3168a_con);
116 
117 static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_volume_type, PCM3168A_ADC_ATT_OVF,
118 		PCM3168A_ADC_ATMDAD_SHIFT, pcm3168a_volume_type);
119 
120 static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_att_mult, PCM3168A_ADC_ATT_OVF,
121 		PCM3168A_ADC_ATSPAD_SHIFT, pcm3168a_att_speed_mult);
122 
123 static SOC_ENUM_SINGLE_DECL(pcm3168a_adc_ov_pol, PCM3168A_ADC_ATT_OVF,
124 		PCM3168A_ADC_OVFP_SHIFT, pcm3168a_pol);
125 
126 /* -100db to 0db, register values 0-54 cause mute */
127 static const DECLARE_TLV_DB_SCALE(pcm3168a_dac_tlv, -10050, 50, 1);
128 
129 /* -100db to 20db, register values 0-14 cause mute */
130 static const DECLARE_TLV_DB_SCALE(pcm3168a_adc_tlv, -10050, 50, 1);
131 
132 static const struct snd_kcontrol_new pcm3168a_snd_controls[] = {
133 	SOC_SINGLE("DAC Power-Save Switch", PCM3168A_DAC_PWR_MST_FMT,
134 			PCM3168A_DAC_PSMDA_SHIFT, 1, 1),
135 	SOC_ENUM("DAC1 Digital Filter roll-off", pcm3168a_d1_roll_off),
136 	SOC_ENUM("DAC2 Digital Filter roll-off", pcm3168a_d2_roll_off),
137 	SOC_ENUM("DAC3 Digital Filter roll-off", pcm3168a_d3_roll_off),
138 	SOC_ENUM("DAC4 Digital Filter roll-off", pcm3168a_d4_roll_off),
139 	SOC_DOUBLE("DAC1 Invert Switch", PCM3168A_DAC_INV, 0, 1, 1, 0),
140 	SOC_DOUBLE("DAC2 Invert Switch", PCM3168A_DAC_INV, 2, 3, 1, 0),
141 	SOC_DOUBLE("DAC3 Invert Switch", PCM3168A_DAC_INV, 4, 5, 1, 0),
142 	SOC_DOUBLE("DAC4 Invert Switch", PCM3168A_DAC_INV, 6, 7, 1, 0),
143 	SOC_ENUM("DAC Volume Control Type", pcm3168a_dac_volume_type),
144 	SOC_ENUM("DAC Volume Rate Multiplier", pcm3168a_dac_att_mult),
145 	SOC_ENUM("DAC De-Emphasis", pcm3168a_dac_demp),
146 	SOC_ENUM("DAC Zero Flag Function", pcm3168a_dac_zf_func),
147 	SOC_ENUM("DAC Zero Flag Polarity", pcm3168a_dac_zf_pol),
148 	SOC_SINGLE_RANGE_TLV("Master Playback Volume",
149 			PCM3168A_DAC_VOL_MASTER, 0, 54, 255, 0,
150 			pcm3168a_dac_tlv),
151 	SOC_DOUBLE_R_RANGE_TLV("DAC1 Playback Volume",
152 			PCM3168A_DAC_VOL_CHAN_START,
153 			PCM3168A_DAC_VOL_CHAN_START + 1,
154 			0, 54, 255, 0, pcm3168a_dac_tlv),
155 	SOC_DOUBLE_R_RANGE_TLV("DAC2 Playback Volume",
156 			PCM3168A_DAC_VOL_CHAN_START + 2,
157 			PCM3168A_DAC_VOL_CHAN_START + 3,
158 			0, 54, 255, 0, pcm3168a_dac_tlv),
159 	SOC_DOUBLE_R_RANGE_TLV("DAC3 Playback Volume",
160 			PCM3168A_DAC_VOL_CHAN_START + 4,
161 			PCM3168A_DAC_VOL_CHAN_START + 5,
162 			0, 54, 255, 0, pcm3168a_dac_tlv),
163 	SOC_DOUBLE_R_RANGE_TLV("DAC4 Playback Volume",
164 			PCM3168A_DAC_VOL_CHAN_START + 6,
165 			PCM3168A_DAC_VOL_CHAN_START + 7,
166 			0, 54, 255, 0, pcm3168a_dac_tlv),
167 	SOC_SINGLE("ADC1 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB,
168 			PCM3168A_ADC_BYP_SHIFT, 1, 1),
169 	SOC_SINGLE("ADC2 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB,
170 			PCM3168A_ADC_BYP_SHIFT + 1, 1, 1),
171 	SOC_SINGLE("ADC3 High-Pass Filter Switch", PCM3168A_ADC_PWR_HPFB,
172 			PCM3168A_ADC_BYP_SHIFT + 2, 1, 1),
173 	SOC_ENUM("ADC1 Connection Type", pcm3168a_adc1_con),
174 	SOC_ENUM("ADC2 Connection Type", pcm3168a_adc2_con),
175 	SOC_ENUM("ADC3 Connection Type", pcm3168a_adc3_con),
176 	SOC_DOUBLE("ADC1 Invert Switch", PCM3168A_ADC_INV, 0, 1, 1, 0),
177 	SOC_DOUBLE("ADC2 Invert Switch", PCM3168A_ADC_INV, 2, 3, 1, 0),
178 	SOC_DOUBLE("ADC3 Invert Switch", PCM3168A_ADC_INV, 4, 5, 1, 0),
179 	SOC_DOUBLE("ADC1 Mute Switch", PCM3168A_ADC_MUTE, 0, 1, 1, 0),
180 	SOC_DOUBLE("ADC2 Mute Switch", PCM3168A_ADC_MUTE, 2, 3, 1, 0),
181 	SOC_DOUBLE("ADC3 Mute Switch", PCM3168A_ADC_MUTE, 4, 5, 1, 0),
182 	SOC_ENUM("ADC Volume Control Type", pcm3168a_adc_volume_type),
183 	SOC_ENUM("ADC Volume Rate Multiplier", pcm3168a_adc_att_mult),
184 	SOC_ENUM("ADC Overflow Flag Polarity", pcm3168a_adc_ov_pol),
185 	SOC_SINGLE_RANGE_TLV("Master Capture Volume",
186 			PCM3168A_ADC_VOL_MASTER, 0, 14, 255, 0,
187 			pcm3168a_adc_tlv),
188 	SOC_DOUBLE_R_RANGE_TLV("ADC1 Capture Volume",
189 			PCM3168A_ADC_VOL_CHAN_START,
190 			PCM3168A_ADC_VOL_CHAN_START + 1,
191 			0, 14, 255, 0, pcm3168a_adc_tlv),
192 	SOC_DOUBLE_R_RANGE_TLV("ADC2 Capture Volume",
193 			PCM3168A_ADC_VOL_CHAN_START + 2,
194 			PCM3168A_ADC_VOL_CHAN_START + 3,
195 			0, 14, 255, 0, pcm3168a_adc_tlv),
196 	SOC_DOUBLE_R_RANGE_TLV("ADC3 Capture Volume",
197 			PCM3168A_ADC_VOL_CHAN_START + 4,
198 			PCM3168A_ADC_VOL_CHAN_START + 5,
199 			0, 14, 255, 0, pcm3168a_adc_tlv)
200 };
201 
202 static const struct snd_soc_dapm_widget pcm3168a_dapm_widgets[] = {
203 	SND_SOC_DAPM_DAC("DAC1", "Playback", PCM3168A_DAC_OP_FLT,
204 			PCM3168A_DAC_OPEDA_SHIFT, 1),
205 	SND_SOC_DAPM_DAC("DAC2", "Playback", PCM3168A_DAC_OP_FLT,
206 			PCM3168A_DAC_OPEDA_SHIFT + 1, 1),
207 	SND_SOC_DAPM_DAC("DAC3", "Playback", PCM3168A_DAC_OP_FLT,
208 			PCM3168A_DAC_OPEDA_SHIFT + 2, 1),
209 	SND_SOC_DAPM_DAC("DAC4", "Playback", PCM3168A_DAC_OP_FLT,
210 			PCM3168A_DAC_OPEDA_SHIFT + 3, 1),
211 
212 	SND_SOC_DAPM_OUTPUT("AOUT1L"),
213 	SND_SOC_DAPM_OUTPUT("AOUT1R"),
214 	SND_SOC_DAPM_OUTPUT("AOUT2L"),
215 	SND_SOC_DAPM_OUTPUT("AOUT2R"),
216 	SND_SOC_DAPM_OUTPUT("AOUT3L"),
217 	SND_SOC_DAPM_OUTPUT("AOUT3R"),
218 	SND_SOC_DAPM_OUTPUT("AOUT4L"),
219 	SND_SOC_DAPM_OUTPUT("AOUT4R"),
220 
221 	SND_SOC_DAPM_ADC("ADC1", "Capture", PCM3168A_ADC_PWR_HPFB,
222 			PCM3168A_ADC_PSVAD_SHIFT, 1),
223 	SND_SOC_DAPM_ADC("ADC2", "Capture", PCM3168A_ADC_PWR_HPFB,
224 			PCM3168A_ADC_PSVAD_SHIFT + 1, 1),
225 	SND_SOC_DAPM_ADC("ADC3", "Capture", PCM3168A_ADC_PWR_HPFB,
226 			PCM3168A_ADC_PSVAD_SHIFT + 2, 1),
227 
228 	SND_SOC_DAPM_INPUT("AIN1L"),
229 	SND_SOC_DAPM_INPUT("AIN1R"),
230 	SND_SOC_DAPM_INPUT("AIN2L"),
231 	SND_SOC_DAPM_INPUT("AIN2R"),
232 	SND_SOC_DAPM_INPUT("AIN3L"),
233 	SND_SOC_DAPM_INPUT("AIN3R")
234 };
235 
236 static const struct snd_soc_dapm_route pcm3168a_dapm_routes[] = {
237 	/* Playback */
238 	{ "AOUT1L", NULL, "DAC1" },
239 	{ "AOUT1R", NULL, "DAC1" },
240 
241 	{ "AOUT2L", NULL, "DAC2" },
242 	{ "AOUT2R", NULL, "DAC2" },
243 
244 	{ "AOUT3L", NULL, "DAC3" },
245 	{ "AOUT3R", NULL, "DAC3" },
246 
247 	{ "AOUT4L", NULL, "DAC4" },
248 	{ "AOUT4R", NULL, "DAC4" },
249 
250 	/* Capture */
251 	{ "ADC1", NULL, "AIN1L" },
252 	{ "ADC1", NULL, "AIN1R" },
253 
254 	{ "ADC2", NULL, "AIN2L" },
255 	{ "ADC2", NULL, "AIN2R" },
256 
257 	{ "ADC3", NULL, "AIN3L" },
258 	{ "ADC3", NULL, "AIN3R" }
259 };
260 
261 static unsigned int pcm3168a_scki_ratios[] = {
262 	768,
263 	512,
264 	384,
265 	256,
266 	192,
267 	128
268 };
269 
270 #define PCM3168A_NUM_SCKI_RATIOS_DAC	ARRAY_SIZE(pcm3168a_scki_ratios)
271 #define PCM3168A_NUM_SCKI_RATIOS_ADC	(ARRAY_SIZE(pcm3168a_scki_ratios) - 2)
272 
273 #define PCM3168A_MAX_SYSCLK		36864000
274 
pcm3168a_reset(struct pcm3168a_priv * pcm3168a)275 static int pcm3168a_reset(struct pcm3168a_priv *pcm3168a)
276 {
277 	int ret;
278 
279 	ret = regmap_write(pcm3168a->regmap, PCM3168A_RST_SMODE, 0);
280 	if (ret)
281 		return ret;
282 
283 	/* Internal reset is de-asserted after 3846 SCKI cycles */
284 	msleep(DIV_ROUND_UP(3846 * 1000, pcm3168a->sysclk));
285 
286 	return regmap_write(pcm3168a->regmap, PCM3168A_RST_SMODE,
287 			PCM3168A_MRST_MASK | PCM3168A_SRST_MASK);
288 }
289 
pcm3168a_mute(struct snd_soc_dai * dai,int mute,int direction)290 static int pcm3168a_mute(struct snd_soc_dai *dai, int mute, int direction)
291 {
292 	struct snd_soc_component *component = dai->component;
293 	struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
294 
295 	regmap_write(pcm3168a->regmap, PCM3168A_DAC_MUTE, mute ? 0xff : 0);
296 
297 	return 0;
298 }
299 
pcm3168a_set_dai_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)300 static int pcm3168a_set_dai_sysclk(struct snd_soc_dai *dai,
301 				  int clk_id, unsigned int freq, int dir)
302 {
303 	struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(dai->component);
304 	int ret;
305 
306 	/*
307 	 * Some sound card sets 0 Hz as reset,
308 	 * but it is impossible to set. Ignore it here
309 	 */
310 	if (freq == 0)
311 		return 0;
312 
313 	if (freq > PCM3168A_MAX_SYSCLK)
314 		return -EINVAL;
315 
316 	ret = clk_set_rate(pcm3168a->scki, freq);
317 	if (ret)
318 		return ret;
319 
320 	pcm3168a->sysclk = freq;
321 
322 	return 0;
323 }
324 
pcm3168a_update_fixup_pcm_stream(struct snd_soc_dai * dai)325 static void pcm3168a_update_fixup_pcm_stream(struct snd_soc_dai *dai)
326 {
327 	struct snd_soc_component *component = dai->component;
328 	struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
329 	struct pcm3168a_io_params *io_params = &pcm3168a->io_params[dai->id];
330 	u64 formats = SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE;
331 	unsigned int channel_max = dai->id == PCM3168A_DAI_DAC ? 8 : 6;
332 
333 	if (io_params->format == SND_SOC_DAIFMT_RIGHT_J) {
334 		/* S16_LE is only supported in RIGHT_J mode */
335 		formats |= SNDRV_PCM_FMTBIT_S16_LE;
336 
337 		/*
338 		 * If multi DIN/DOUT is not selected, RIGHT_J can only support
339 		 * two channels (no TDM support)
340 		 */
341 		if (io_params->tdm_slots != 2)
342 			channel_max = 2;
343 	}
344 
345 	if (dai->id == PCM3168A_DAI_DAC) {
346 		dai->driver->playback.channels_max = channel_max;
347 		dai->driver->playback.formats = formats;
348 	} else {
349 		dai->driver->capture.channels_max = channel_max;
350 		dai->driver->capture.formats = formats;
351 	}
352 }
353 
pcm3168a_set_dai_fmt(struct snd_soc_dai * dai,unsigned int format)354 static int pcm3168a_set_dai_fmt(struct snd_soc_dai *dai, unsigned int format)
355 {
356 	struct snd_soc_component *component = dai->component;
357 	struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
358 	struct pcm3168a_io_params *io_params = &pcm3168a->io_params[dai->id];
359 	bool provider_mode;
360 
361 	switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
362 	case SND_SOC_DAIFMT_LEFT_J:
363 	case SND_SOC_DAIFMT_I2S:
364 	case SND_SOC_DAIFMT_RIGHT_J:
365 	case SND_SOC_DAIFMT_DSP_A:
366 	case SND_SOC_DAIFMT_DSP_B:
367 		break;
368 	default:
369 		dev_err(component->dev, "unsupported dai format\n");
370 		return -EINVAL;
371 	}
372 
373 	switch (format & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
374 	case SND_SOC_DAIFMT_CBC_CFC:
375 		provider_mode = false;
376 		break;
377 	case SND_SOC_DAIFMT_CBP_CFP:
378 		provider_mode = true;
379 		break;
380 	default:
381 		dev_err(component->dev, "unsupported provider mode\n");
382 		return -EINVAL;
383 	}
384 
385 	switch (format & SND_SOC_DAIFMT_INV_MASK) {
386 	case SND_SOC_DAIFMT_NB_NF:
387 		break;
388 	default:
389 		return -EINVAL;
390 	}
391 
392 	io_params->provider_mode = provider_mode;
393 	io_params->format = format & SND_SOC_DAIFMT_FORMAT_MASK;
394 
395 	pcm3168a_update_fixup_pcm_stream(dai);
396 
397 	return 0;
398 }
399 
pcm3168a_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)400 static int pcm3168a_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
401 				 unsigned int rx_mask, int slots,
402 				 int slot_width)
403 {
404 	struct snd_soc_component *component = dai->component;
405 	struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
406 	struct pcm3168a_io_params *io_params = &pcm3168a->io_params[dai->id];
407 
408 	if (tx_mask >= (1<<slots) || rx_mask >= (1<<slots)) {
409 		dev_err(component->dev,
410 			"Bad tdm mask tx: 0x%08x rx: 0x%08x slots %d\n",
411 			tx_mask, rx_mask, slots);
412 		return -EINVAL;
413 	}
414 
415 	if (slot_width &&
416 	    (slot_width != 16 && slot_width != 24 && slot_width != 32 )) {
417 		dev_err(component->dev, "Unsupported slot_width %d\n",
418 			slot_width);
419 		return -EINVAL;
420 	}
421 
422 	io_params->tdm_slots = slots;
423 	io_params->slot_width = slot_width;
424 	/* Ignore the not relevant mask for the DAI/direction */
425 	if (dai->id == PCM3168A_DAI_DAC)
426 		io_params->tdm_mask = tx_mask;
427 	else
428 		io_params->tdm_mask = rx_mask;
429 
430 	pcm3168a_update_fixup_pcm_stream(dai);
431 
432 	return 0;
433 }
434 
pcm3168a_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)435 static int pcm3168a_hw_params(struct snd_pcm_substream *substream,
436 			     struct snd_pcm_hw_params *params,
437 			     struct snd_soc_dai *dai)
438 {
439 	struct snd_soc_component *component = dai->component;
440 	struct pcm3168a_priv *pcm3168a = snd_soc_component_get_drvdata(component);
441 	struct pcm3168a_io_params *io_params = &pcm3168a->io_params[dai->id];
442 	bool provider_mode, tdm_mode;
443 	unsigned int format;
444 	unsigned int reg, mask, ms, ms_shift, fmt, fmt_shift, ratio, tdm_slots;
445 	int i, num_scki_ratios, slot_width;
446 
447 	if (dai->id == PCM3168A_DAI_DAC) {
448 		num_scki_ratios = PCM3168A_NUM_SCKI_RATIOS_DAC;
449 		reg = PCM3168A_DAC_PWR_MST_FMT;
450 		mask = PCM3168A_DAC_MSDA_MASK | PCM3168A_DAC_FMT_MASK;
451 		ms_shift = PCM3168A_DAC_MSDA_SHIFT;
452 		fmt_shift = PCM3168A_DAC_FMT_SHIFT;
453 	} else {
454 		num_scki_ratios = PCM3168A_NUM_SCKI_RATIOS_ADC;
455 		reg = PCM3168A_ADC_MST_FMT;
456 		mask = PCM3168A_ADC_MSAD_MASK | PCM3168A_ADC_FMTAD_MASK;
457 		ms_shift = PCM3168A_ADC_MSAD_SHIFT;
458 		fmt_shift = PCM3168A_ADC_FMTAD_SHIFT;
459 	}
460 
461 	provider_mode = io_params->provider_mode;
462 
463 	if (provider_mode) {
464 		ratio = pcm3168a->sysclk / params_rate(params);
465 
466 		for (i = 0; i < num_scki_ratios; i++) {
467 			if (pcm3168a_scki_ratios[i] == ratio)
468 				break;
469 		}
470 
471 		if (i == num_scki_ratios) {
472 			dev_err(component->dev, "unsupported sysclk ratio\n");
473 			return -EINVAL;
474 		}
475 
476 		ms = (i + 1);
477 	} else {
478 		ms = 0;
479 	}
480 
481 	format = io_params->format;
482 
483 	if (io_params->slot_width)
484 		slot_width = io_params->slot_width;
485 	else
486 		slot_width = params_width(params);
487 
488 	switch (slot_width) {
489 	case 16:
490 		if (provider_mode || (format != SND_SOC_DAIFMT_RIGHT_J)) {
491 			dev_err(component->dev, "16-bit slots are supported only for consumer mode using right justified\n");
492 			return -EINVAL;
493 		}
494 		break;
495 	case 24:
496 		if (provider_mode || (format == SND_SOC_DAIFMT_DSP_A) ||
497 		    		     (format == SND_SOC_DAIFMT_DSP_B)) {
498 			dev_err(component->dev, "24-bit slots not supported in provider mode, or consumer mode using DSP\n");
499 			return -EINVAL;
500 		}
501 		break;
502 	case 32:
503 		break;
504 	default:
505 		dev_err(component->dev, "unsupported frame size: %d\n", slot_width);
506 		return -EINVAL;
507 	}
508 
509 	if (io_params->tdm_slots)
510 		tdm_slots = io_params->tdm_slots;
511 	else
512 		tdm_slots = params_channels(params);
513 
514 	/*
515 	 * Switch the codec to TDM mode when more than 2 TDM slots are needed
516 	 * for the stream.
517 	 * If pcm3168a->tdm_slots is not set or set to more than 2 (8/6 usually)
518 	 * then DIN1/DOUT1 is used in TDM mode.
519 	 * If pcm3168a->tdm_slots is set to 2 then DIN1/2/3/4 and DOUT1/2/3 is
520 	 * used in normal mode, no need to switch to TDM modes.
521 	 */
522 	tdm_mode = (tdm_slots > 2);
523 
524 	if (tdm_mode) {
525 		switch (format) {
526 		case SND_SOC_DAIFMT_I2S:
527 		case SND_SOC_DAIFMT_DSP_A:
528 		case SND_SOC_DAIFMT_LEFT_J:
529 		case SND_SOC_DAIFMT_DSP_B:
530 			break;
531 		default:
532 			dev_err(component->dev,
533 				"TDM is supported under DSP/I2S/Left_J only\n");
534 			return -EINVAL;
535 		}
536 	}
537 
538 	switch (format) {
539 	case SND_SOC_DAIFMT_I2S:
540 		fmt = tdm_mode ? PCM3168A_FMT_I2S_TDM : PCM3168A_FMT_I2S;
541 		break;
542 	case SND_SOC_DAIFMT_LEFT_J:
543 		fmt = tdm_mode ? PCM3168A_FMT_LEFT_J_TDM : PCM3168A_FMT_LEFT_J;
544 		break;
545 	case SND_SOC_DAIFMT_RIGHT_J:
546 		fmt = (slot_width == 16) ? PCM3168A_FMT_RIGHT_J_16 :
547 					   PCM3168A_FMT_RIGHT_J;
548 		break;
549 	case SND_SOC_DAIFMT_DSP_A:
550 		fmt = tdm_mode ? PCM3168A_FMT_I2S_TDM : PCM3168A_FMT_DSP_A;
551 		break;
552 	case SND_SOC_DAIFMT_DSP_B:
553 		fmt = tdm_mode ? PCM3168A_FMT_LEFT_J_TDM : PCM3168A_FMT_DSP_B;
554 		break;
555 	default:
556 		return -EINVAL;
557 	}
558 
559 	regmap_update_bits(pcm3168a->regmap, reg, mask,
560 			(ms << ms_shift) | (fmt << fmt_shift));
561 
562 	return 0;
563 }
564 
565 static const u64 pcm3168a_dai_formats[] = {
566 	/*
567 	 * Select below from Sound Card, not here
568 	 *	SND_SOC_DAIFMT_CBC_CFC
569 	 *	SND_SOC_DAIFMT_CBP_CFP
570 	 */
571 
572 	/*
573 	 * First Priority
574 	 */
575 	SND_SOC_POSSIBLE_DAIFMT_I2S	|
576 	SND_SOC_POSSIBLE_DAIFMT_LEFT_J,
577 	/*
578 	 * Second Priority
579 	 *
580 	 * These have picky limitation.
581 	 * see
582 	 *	pcm3168a_hw_params()
583 	 */
584 	SND_SOC_POSSIBLE_DAIFMT_RIGHT_J	|
585 	SND_SOC_POSSIBLE_DAIFMT_DSP_A	|
586 	SND_SOC_POSSIBLE_DAIFMT_DSP_B,
587 };
588 
589 static const struct snd_soc_dai_ops pcm3168a_dai_ops = {
590 	.set_fmt	= pcm3168a_set_dai_fmt,
591 	.set_sysclk	= pcm3168a_set_dai_sysclk,
592 	.hw_params	= pcm3168a_hw_params,
593 	.mute_stream	= pcm3168a_mute,
594 	.set_tdm_slot	= pcm3168a_set_tdm_slot,
595 	.no_capture_mute = 1,
596 	.auto_selectable_formats	= pcm3168a_dai_formats,
597 	.num_auto_selectable_formats	= ARRAY_SIZE(pcm3168a_dai_formats),
598 };
599 
600 static struct snd_soc_dai_driver pcm3168a_dais[] = {
601 	{
602 		.name = "pcm3168a-dac",
603 		.id = PCM3168A_DAI_DAC,
604 		.playback = {
605 			.stream_name = "Playback",
606 			.channels_min = 1,
607 			.channels_max = 8,
608 			.rates = SNDRV_PCM_RATE_8000_192000,
609 			.formats = PCM3168A_FORMATS
610 		},
611 		.ops = &pcm3168a_dai_ops
612 	},
613 	{
614 		.name = "pcm3168a-adc",
615 		.id = PCM3168A_DAI_ADC,
616 		.capture = {
617 			.stream_name = "Capture",
618 			.channels_min = 1,
619 			.channels_max = 6,
620 			.rates = SNDRV_PCM_RATE_8000_96000,
621 			.formats = PCM3168A_FORMATS
622 		},
623 		.ops = &pcm3168a_dai_ops
624 	},
625 };
626 
627 static const struct reg_default pcm3168a_reg_default[] = {
628 	{ PCM3168A_RST_SMODE, PCM3168A_MRST_MASK | PCM3168A_SRST_MASK },
629 	{ PCM3168A_DAC_PWR_MST_FMT, 0x00 },
630 	{ PCM3168A_DAC_OP_FLT, 0x00 },
631 	{ PCM3168A_DAC_INV, 0x00 },
632 	{ PCM3168A_DAC_MUTE, 0x00 },
633 	{ PCM3168A_DAC_ZERO, 0x00 },
634 	{ PCM3168A_DAC_ATT_DEMP_ZF, 0x00 },
635 	{ PCM3168A_DAC_VOL_MASTER, 0xff },
636 	{ PCM3168A_DAC_VOL_CHAN_START, 0xff },
637 	{ PCM3168A_DAC_VOL_CHAN_START + 1, 0xff },
638 	{ PCM3168A_DAC_VOL_CHAN_START + 2, 0xff },
639 	{ PCM3168A_DAC_VOL_CHAN_START + 3, 0xff },
640 	{ PCM3168A_DAC_VOL_CHAN_START + 4, 0xff },
641 	{ PCM3168A_DAC_VOL_CHAN_START + 5, 0xff },
642 	{ PCM3168A_DAC_VOL_CHAN_START + 6, 0xff },
643 	{ PCM3168A_DAC_VOL_CHAN_START + 7, 0xff },
644 	{ PCM3168A_ADC_SMODE, 0x00 },
645 	{ PCM3168A_ADC_MST_FMT, 0x00 },
646 	{ PCM3168A_ADC_PWR_HPFB, 0x00 },
647 	{ PCM3168A_ADC_SEAD, 0x00 },
648 	{ PCM3168A_ADC_INV, 0x00 },
649 	{ PCM3168A_ADC_MUTE, 0x00 },
650 	{ PCM3168A_ADC_OV, 0x00 },
651 	{ PCM3168A_ADC_ATT_OVF, 0x00 },
652 	{ PCM3168A_ADC_VOL_MASTER, 0xd3 },
653 	{ PCM3168A_ADC_VOL_CHAN_START, 0xd3 },
654 	{ PCM3168A_ADC_VOL_CHAN_START + 1, 0xd3 },
655 	{ PCM3168A_ADC_VOL_CHAN_START + 2, 0xd3 },
656 	{ PCM3168A_ADC_VOL_CHAN_START + 3, 0xd3 },
657 	{ PCM3168A_ADC_VOL_CHAN_START + 4, 0xd3 },
658 	{ PCM3168A_ADC_VOL_CHAN_START + 5, 0xd3 }
659 };
660 
pcm3168a_readable_register(struct device * dev,unsigned int reg)661 static bool pcm3168a_readable_register(struct device *dev, unsigned int reg)
662 {
663 	if (reg >= PCM3168A_RST_SMODE)
664 		return true;
665 	else
666 		return false;
667 }
668 
pcm3168a_volatile_register(struct device * dev,unsigned int reg)669 static bool pcm3168a_volatile_register(struct device *dev, unsigned int reg)
670 {
671 	switch (reg) {
672 	case PCM3168A_RST_SMODE:
673 	case PCM3168A_DAC_ZERO:
674 	case PCM3168A_ADC_OV:
675 		return true;
676 	default:
677 		return false;
678 	}
679 }
680 
pcm3168a_writeable_register(struct device * dev,unsigned int reg)681 static bool pcm3168a_writeable_register(struct device *dev, unsigned int reg)
682 {
683 	if (reg < PCM3168A_RST_SMODE)
684 		return false;
685 
686 	switch (reg) {
687 	case PCM3168A_DAC_ZERO:
688 	case PCM3168A_ADC_OV:
689 		return false;
690 	default:
691 		return true;
692 	}
693 }
694 
695 const struct regmap_config pcm3168a_regmap = {
696 	.reg_bits = 8,
697 	.val_bits = 8,
698 
699 	.max_register = PCM3168A_ADC_VOL_CHAN_START + 5,
700 	.reg_defaults = pcm3168a_reg_default,
701 	.num_reg_defaults = ARRAY_SIZE(pcm3168a_reg_default),
702 	.readable_reg = pcm3168a_readable_register,
703 	.volatile_reg = pcm3168a_volatile_register,
704 	.writeable_reg = pcm3168a_writeable_register,
705 	.cache_type = REGCACHE_FLAT
706 };
707 EXPORT_SYMBOL_GPL(pcm3168a_regmap);
708 
709 static const struct snd_soc_component_driver pcm3168a_driver = {
710 	.controls		= pcm3168a_snd_controls,
711 	.num_controls		= ARRAY_SIZE(pcm3168a_snd_controls),
712 	.dapm_widgets		= pcm3168a_dapm_widgets,
713 	.num_dapm_widgets	= ARRAY_SIZE(pcm3168a_dapm_widgets),
714 	.dapm_routes		= pcm3168a_dapm_routes,
715 	.num_dapm_routes	= ARRAY_SIZE(pcm3168a_dapm_routes),
716 	.use_pmdown_time	= 1,
717 	.endianness		= 1,
718 };
719 
pcm3168a_probe(struct device * dev,struct regmap * regmap)720 int pcm3168a_probe(struct device *dev, struct regmap *regmap)
721 {
722 	struct pcm3168a_priv *pcm3168a;
723 	int ret, i;
724 
725 	pcm3168a = devm_kzalloc(dev, sizeof(*pcm3168a), GFP_KERNEL);
726 	if (pcm3168a == NULL)
727 		return -ENOMEM;
728 
729 	dev_set_drvdata(dev, pcm3168a);
730 
731 	/*
732 	 * Request the reset (connected to RST pin) gpio line as non exclusive
733 	 * as the same reset line might be connected to multiple pcm3168a codec
734 	 *
735 	 * The RST is low active, we want the GPIO line to be high initially, so
736 	 * request the initial level to LOW which in practice means DEASSERTED:
737 	 * The deasserted level of GPIO_ACTIVE_LOW is HIGH.
738 	 */
739 	pcm3168a->gpio_rst = devm_gpiod_get_optional(dev, "reset",
740 						GPIOD_OUT_LOW |
741 						GPIOD_FLAGS_BIT_NONEXCLUSIVE);
742 	if (IS_ERR(pcm3168a->gpio_rst))
743 		return dev_err_probe(dev, PTR_ERR(pcm3168a->gpio_rst),
744 				     "failed to acquire RST gpio\n");
745 
746 	pcm3168a->scki = devm_clk_get(dev, "scki");
747 	if (IS_ERR(pcm3168a->scki))
748 		return dev_err_probe(dev, PTR_ERR(pcm3168a->scki),
749 				     "failed to acquire clock 'scki'\n");
750 
751 	ret = clk_prepare_enable(pcm3168a->scki);
752 	if (ret) {
753 		dev_err(dev, "Failed to enable mclk: %d\n", ret);
754 		return ret;
755 	}
756 
757 	pcm3168a->sysclk = clk_get_rate(pcm3168a->scki);
758 
759 	for (i = 0; i < ARRAY_SIZE(pcm3168a->supplies); i++)
760 		pcm3168a->supplies[i].supply = pcm3168a_supply_names[i];
761 
762 	ret = devm_regulator_bulk_get(dev,
763 			ARRAY_SIZE(pcm3168a->supplies), pcm3168a->supplies);
764 	if (ret) {
765 		dev_err_probe(dev, ret, "failed to request supplies\n");
766 		goto err_clk;
767 	}
768 
769 	ret = regulator_bulk_enable(ARRAY_SIZE(pcm3168a->supplies),
770 				    pcm3168a->supplies);
771 	if (ret) {
772 		dev_err(dev, "failed to enable supplies: %d\n", ret);
773 		goto err_clk;
774 	}
775 
776 	pcm3168a->regmap = regmap;
777 	if (IS_ERR(pcm3168a->regmap)) {
778 		ret = PTR_ERR(pcm3168a->regmap);
779 		dev_err(dev, "failed to allocate regmap: %d\n", ret);
780 		goto err_regulator;
781 	}
782 
783 	if (pcm3168a->gpio_rst) {
784 		/*
785 		 * The device is taken out from reset via GPIO line, wait for
786 		 * 3846 SCKI clock cycles for the internal reset de-assertion
787 		 */
788 		msleep(DIV_ROUND_UP(3846 * 1000, pcm3168a->sysclk));
789 	} else {
790 		ret = pcm3168a_reset(pcm3168a);
791 		if (ret) {
792 			dev_err(dev, "Failed to reset device: %d\n", ret);
793 			goto err_regulator;
794 		}
795 	}
796 
797 	pm_runtime_set_active(dev);
798 	pm_runtime_enable(dev);
799 	pm_runtime_idle(dev);
800 
801 	memcpy(pcm3168a->dai_drv, pcm3168a_dais, sizeof(pcm3168a->dai_drv));
802 	ret = devm_snd_soc_register_component(dev, &pcm3168a_driver,
803 					      pcm3168a->dai_drv,
804 					      ARRAY_SIZE(pcm3168a->dai_drv));
805 	if (ret) {
806 		dev_err(dev, "failed to register component: %d\n", ret);
807 		goto err_regulator;
808 	}
809 
810 	return 0;
811 
812 err_regulator:
813 	regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies),
814 			pcm3168a->supplies);
815 err_clk:
816 	clk_disable_unprepare(pcm3168a->scki);
817 
818 	return ret;
819 }
820 EXPORT_SYMBOL_GPL(pcm3168a_probe);
821 
pcm3168a_disable(struct device * dev)822 static void pcm3168a_disable(struct device *dev)
823 {
824 	struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev);
825 
826 	regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies),
827 			       pcm3168a->supplies);
828 	clk_disable_unprepare(pcm3168a->scki);
829 }
830 
pcm3168a_remove(struct device * dev)831 void pcm3168a_remove(struct device *dev)
832 {
833 	struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev);
834 
835 	/*
836 	 * The RST is low active, we want the GPIO line to be low when the
837 	 * driver is removed, so set level to 1 which in practice means
838 	 * ASSERTED:
839 	 * The asserted level of GPIO_ACTIVE_LOW is LOW.
840 	 */
841 	gpiod_set_value_cansleep(pcm3168a->gpio_rst, 1);
842 	pm_runtime_disable(dev);
843 #ifndef CONFIG_PM
844 	pcm3168a_disable(dev);
845 #endif
846 }
847 EXPORT_SYMBOL_GPL(pcm3168a_remove);
848 
849 #ifdef CONFIG_PM
pcm3168a_rt_resume(struct device * dev)850 static int pcm3168a_rt_resume(struct device *dev)
851 {
852 	struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev);
853 	int ret;
854 
855 	ret = clk_prepare_enable(pcm3168a->scki);
856 	if (ret) {
857 		dev_err(dev, "Failed to enable mclk: %d\n", ret);
858 		return ret;
859 	}
860 
861 	ret = regulator_bulk_enable(ARRAY_SIZE(pcm3168a->supplies),
862 				    pcm3168a->supplies);
863 	if (ret) {
864 		dev_err(dev, "Failed to enable supplies: %d\n", ret);
865 		goto err_clk;
866 	}
867 
868 	ret = pcm3168a_reset(pcm3168a);
869 	if (ret) {
870 		dev_err(dev, "Failed to reset device: %d\n", ret);
871 		goto err_regulator;
872 	}
873 
874 	regcache_cache_only(pcm3168a->regmap, false);
875 
876 	regcache_mark_dirty(pcm3168a->regmap);
877 
878 	ret = regcache_sync(pcm3168a->regmap);
879 	if (ret) {
880 		dev_err(dev, "Failed to sync regmap: %d\n", ret);
881 		goto err_regulator;
882 	}
883 
884 	return 0;
885 
886 err_regulator:
887 	regulator_bulk_disable(ARRAY_SIZE(pcm3168a->supplies),
888 			       pcm3168a->supplies);
889 err_clk:
890 	clk_disable_unprepare(pcm3168a->scki);
891 
892 	return ret;
893 }
894 
pcm3168a_rt_suspend(struct device * dev)895 static int pcm3168a_rt_suspend(struct device *dev)
896 {
897 	struct pcm3168a_priv *pcm3168a = dev_get_drvdata(dev);
898 
899 	regcache_cache_only(pcm3168a->regmap, true);
900 
901 	pcm3168a_disable(dev);
902 
903 	return 0;
904 }
905 #endif
906 
907 const struct dev_pm_ops pcm3168a_pm_ops = {
908 	SET_RUNTIME_PM_OPS(pcm3168a_rt_suspend, pcm3168a_rt_resume, NULL)
909 };
910 EXPORT_SYMBOL_GPL(pcm3168a_pm_ops);
911 
912 MODULE_DESCRIPTION("PCM3168A codec driver");
913 MODULE_AUTHOR("Damien Horsley <Damien.Horsley@imgtec.com>");
914 MODULE_LICENSE("GPL v2");
915