1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019, 2025-2026 NXP */
3
4 #include <linux/timer.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/skbuff.h>
10 #include <linux/ethtool.h>
11 #include <linux/fsl/ntmp.h>
12 #include <linux/if_vlan.h>
13 #include <linux/phylink.h>
14 #include <linux/dim.h>
15 #include <net/xdp.h>
16
17 #include "enetc_hw.h"
18 #include "enetc4_hw.h"
19 #include "enetc_mailbox.h"
20
21 #define ENETC_MAC_MAXFRM_SIZE 9600
22 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
23 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
24
25 #define ENETC_CBD_DATA_MEM_ALIGN 64
26
27 #define ENETC_MADDR_HASH_TBL_SZ 64
28
29 enum enetc_mac_addr_type {UC, MC, MADDR_TYPE};
30
31 struct enetc_mac_filter {
32 union {
33 char mac_addr[ETH_ALEN];
34 DECLARE_BITMAP(mac_hash_table, ENETC_MADDR_HASH_TBL_SZ);
35 };
36 int mac_addr_cnt;
37 };
38
39 struct enetc_tx_swbd {
40 union {
41 struct sk_buff *skb;
42 struct xdp_frame *xdp_frame;
43 };
44 dma_addr_t dma;
45 struct page *page; /* valid only if is_xdp_tx */
46 u16 page_offset; /* valid only if is_xdp_tx */
47 u16 len;
48 enum dma_data_direction dir;
49 u8 is_dma_page:1;
50 u8 check_wb:1;
51 u8 do_twostep_tstamp:1;
52 u8 is_eof:1;
53 u8 is_xdp_tx:1;
54 u8 is_xdp_redirect:1;
55 u8 qbv_en:1;
56 };
57
58 struct enetc_skb_cb {
59 u8 flag;
60 bool udp;
61 u16 correction_off;
62 u16 origin_tstamp_off;
63 };
64
65 #define ENETC_SKB_CB(skb) ((struct enetc_skb_cb *)((skb)->cb))
66
67 struct enetc_lso_t {
68 bool ipv6;
69 bool tcp;
70 u8 l3_hdr_len;
71 u8 hdr_len; /* LSO header length */
72 u8 l3_start;
73 u16 lso_seg_size;
74 int total_len; /* total data length, not include LSO header */
75 };
76
77 #define ENETC_LSO_MAX_DATA_LEN SZ_256K
78
79 #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE
80 #define ENETC_RXB_TRUESIZE (PAGE_SIZE >> 1)
81 #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */
82 #define ENETC_RXB_DMA_SIZE \
83 min(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD, 0xffff)
84 #define ENETC_RXB_DMA_SIZE_XDP \
85 min(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM, 0xffff)
86
87 struct enetc_rx_swbd {
88 dma_addr_t dma;
89 struct page *page;
90 u16 page_offset;
91 enum dma_data_direction dir;
92 u16 len;
93 };
94
95 /* ENETC overhead: optional extension BD + 1 BD gap */
96 #define ENETC_TXBDS_NEEDED(val) ((val) + 2)
97 /* For LS1028A, max # of chained Tx BDs is 15, including head and
98 * extension BD.
99 */
100 #define ENETC_MAX_SKB_FRAGS 13
101 /* For ENETC v4 and later versions, max # of chained Tx BDs is 63,
102 * including head and extension BD, but the range of MAX_SKB_FRAGS
103 * is 17 ~ 45, so set ENETC4_MAX_SKB_FRAGS to MAX_SKB_FRAGS.
104 */
105 #define ENETC4_MAX_SKB_FRAGS MAX_SKB_FRAGS
106 #define ENETC_TXBDS_MAX_NEEDED(x) ENETC_TXBDS_NEEDED((x) + 1)
107
108 struct enetc_ring_stats {
109 unsigned long packets;
110 unsigned long bytes;
111 unsigned long rx_alloc_errs;
112 unsigned long xdp_drops;
113 unsigned long xdp_tx;
114 unsigned long xdp_tx_drops;
115 unsigned long xdp_redirect;
116 unsigned long xdp_redirect_failures;
117 unsigned long recycles;
118 unsigned long recycle_failures;
119 unsigned long win_drop;
120 };
121
122 struct enetc_xdp_data {
123 struct xdp_rxq_info rxq;
124 struct bpf_prog *prog;
125 int xdp_tx_in_flight;
126 };
127
128 #define ENETC_RX_RING_DEFAULT_SIZE 2048
129 #define ENETC_TX_RING_DEFAULT_SIZE 2048
130 #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2)
131
132 struct enetc_bdr_resource {
133 /* Input arguments saved for teardown */
134 struct device *dev; /* for DMA mapping */
135 size_t bd_count;
136 size_t bd_size;
137
138 /* Resource proper */
139 void *bd_base; /* points to Rx or Tx BD ring */
140 dma_addr_t bd_dma_base;
141 union {
142 struct enetc_tx_swbd *tx_swbd;
143 struct enetc_rx_swbd *rx_swbd;
144 };
145 char *tso_headers;
146 dma_addr_t tso_headers_dma;
147 };
148
149 struct enetc_bdr {
150 struct device *dev; /* for DMA mapping */
151 struct net_device *ndev;
152 void *bd_base; /* points to Rx or Tx BD ring */
153 union {
154 void __iomem *tpir;
155 void __iomem *rcir;
156 };
157 u16 index;
158 u16 prio;
159 int bd_count; /* # of BDs */
160 int next_to_use;
161 int next_to_clean;
162 union {
163 struct enetc_tx_swbd *tx_swbd;
164 struct enetc_rx_swbd *rx_swbd;
165 };
166 union {
167 void __iomem *tcir; /* Tx */
168 int next_to_alloc; /* Rx */
169 };
170 void __iomem *idr; /* Interrupt Detect Register pointer */
171
172 int buffer_offset;
173 struct enetc_xdp_data xdp;
174
175 struct enetc_ring_stats stats;
176
177 dma_addr_t bd_dma_base;
178 u8 tsd_enable; /* Time specific departure */
179 bool ext_en; /* enable h/w descriptor extensions */
180
181 /* DMA buffer for TSO headers */
182 char *tso_headers;
183 dma_addr_t tso_headers_dma;
184 } ____cacheline_aligned_in_smp;
185
enetc_bdr_idx_inc(struct enetc_bdr * bdr,int * i)186 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
187 {
188 if (unlikely(++*i == bdr->bd_count))
189 *i = 0;
190 }
191
enetc_bd_unused(struct enetc_bdr * bdr)192 static inline int enetc_bd_unused(struct enetc_bdr *bdr)
193 {
194 if (bdr->next_to_clean > bdr->next_to_use)
195 return bdr->next_to_clean - bdr->next_to_use - 1;
196
197 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
198 }
199
enetc_swbd_unused(struct enetc_bdr * bdr)200 static inline int enetc_swbd_unused(struct enetc_bdr *bdr)
201 {
202 if (bdr->next_to_clean > bdr->next_to_alloc)
203 return bdr->next_to_clean - bdr->next_to_alloc - 1;
204
205 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;
206 }
207
208 /* Control BD ring */
209 #define ENETC_CBDR_DEFAULT_SIZE 64
210 struct enetc_cbdr {
211 void *bd_base; /* points to Rx or Tx BD ring */
212 void __iomem *pir;
213 void __iomem *cir;
214 void __iomem *mr; /* mode register */
215
216 int bd_count; /* # of BDs */
217 int next_to_use;
218 int next_to_clean;
219
220 dma_addr_t bd_dma_base;
221 struct device *dma_dev;
222 };
223
224 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
225
enetc_rxbd(struct enetc_bdr * rx_ring,int i)226 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
227 {
228 int hw_idx = i;
229
230 if (rx_ring->ext_en)
231 hw_idx = 2 * i;
232
233 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
234 }
235
enetc_rxbd_next(struct enetc_bdr * rx_ring,union enetc_rx_bd ** old_rxbd,int * old_index)236 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
237 union enetc_rx_bd **old_rxbd, int *old_index)
238 {
239 union enetc_rx_bd *new_rxbd = *old_rxbd;
240 int new_index = *old_index;
241
242 new_rxbd++;
243
244 if (rx_ring->ext_en)
245 new_rxbd++;
246
247 if (unlikely(++new_index == rx_ring->bd_count)) {
248 new_rxbd = rx_ring->bd_base;
249 new_index = 0;
250 }
251
252 *old_rxbd = new_rxbd;
253 *old_index = new_index;
254 }
255
enetc_rxbd_ext(union enetc_rx_bd * rxbd)256 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
257 {
258 return ++rxbd;
259 }
260
261 #define ENETC_REV1 0x1
262 #define ENETC_REV4 0x4
263
264 enum enetc_errata {
265 ENETC_ERR_VLAN_ISOL = BIT(0),
266 ENETC_ERR_UCMCSWP = BIT(1),
267 };
268
269 #define ENETC_SI_F_PSFP BIT(0)
270 #define ENETC_SI_F_QBV BIT(1)
271 #define ENETC_SI_F_QBU BIT(2)
272 #define ENETC_SI_F_LSO BIT(3)
273 #define ENETC_SI_F_PPM BIT(4) /* pseudo MAC */
274
275 struct enetc_drvdata {
276 u32 pmac_offset; /* Only valid for PSI which supports 802.1Qbu */
277 u8 tx_csum:1;
278 u8 max_frags;
279 u64 sysclk_freq;
280 const struct ethtool_ops *eth_ops;
281 };
282
283 struct enetc_platform_info {
284 u16 revision;
285 u16 dev_id;
286 const struct enetc_drvdata *data;
287 };
288
289 struct enetc_si;
290
291 /*
292 * This structure defines the some common hooks for ENETC PSI and VSI.
293 * In addition, since VSI only uses the struct enetc_si as its private
294 * driver data, so this structure also define some hooks specifically
295 * for VSI. For VSI-specific hooks, the format is ‘vf_*()’.
296 */
297 struct enetc_si_ops {
298 int (*get_rss_table)(struct enetc_si *si, u32 *table, int count);
299 int (*set_rss_table)(struct enetc_si *si, const u32 *table, int count);
300 int (*setup_cbdr)(struct enetc_si *si);
301 void (*teardown_cbdr)(struct enetc_si *si);
302 };
303
304 /* PCI IEP device data */
305 struct enetc_si {
306 struct pci_dev *pdev;
307 struct enetc_hw hw;
308 enum enetc_errata errata;
309
310 struct net_device *ndev; /* back ref. */
311
312 /* General-purpose lock serializing updates that must not race,
313 * e.g. read-modify-write of shared hardware registers and of
314 * selected priv->flags bits between the phylink link callbacks
315 * and the ring (re)configuration path.
316 */
317 spinlock_t gen_lock;
318
319 union {
320 struct enetc_cbdr cbd_ring; /* Only ENETC 1.0 */
321 struct ntmp_user ntmp_user; /* ENETC 4.1 and later */
322 };
323
324 int num_rx_rings; /* how many rings are available in the SI */
325 int num_tx_rings;
326 int num_fs_entries;
327 int num_rss; /* number of RSS buckets */
328 unsigned short pad;
329 u16 revision;
330 int hw_features;
331 const struct enetc_drvdata *drvdata;
332 const struct enetc_si_ops *ops;
333
334 struct dentry *debugfs_root;
335 struct enetc_msg_swbd msg; /* Only valid for VSI */
336 };
337
338 #define ENETC_SI_ALIGN 32
339
is_enetc_rev1(struct enetc_si * si)340 static inline bool is_enetc_rev1(struct enetc_si *si)
341 {
342 return si->pdev->revision == ENETC_REV1;
343 }
344
enetc_si_priv(const struct enetc_si * si)345 static inline void *enetc_si_priv(const struct enetc_si *si)
346 {
347 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
348 }
349
enetc_si_is_pf(struct enetc_si * si)350 static inline bool enetc_si_is_pf(struct enetc_si *si)
351 {
352 return !!(si->hw.port);
353 }
354
enetc_pf_to_port(struct pci_dev * pf_pdev)355 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)
356 {
357 switch (pf_pdev->devfn) {
358 case 0:
359 return 0;
360 case 1:
361 return 1;
362 case 2:
363 return 2;
364 case 6:
365 return 3;
366 default:
367 return -1;
368 }
369 }
370
enetc_is_pseudo_mac(struct enetc_si * si)371 static inline bool enetc_is_pseudo_mac(struct enetc_si *si)
372 {
373 return si->hw_features & ENETC_SI_F_PPM;
374 }
375
376 #define ENETC_MAX_NUM_TXQS 8
377 #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)
378
379 struct enetc_int_vector {
380 void __iomem *rbier;
381 void __iomem *tbier_base;
382 void __iomem *ricr1;
383 unsigned long tx_rings_map;
384 int count_tx_rings;
385 u32 rx_ictt;
386 u16 comp_cnt;
387 bool rx_dim_en, rx_napi_work;
388 struct napi_struct napi ____cacheline_aligned_in_smp;
389 struct dim rx_dim ____cacheline_aligned_in_smp;
390 char name[ENETC_INT_NAME_MAX];
391
392 struct enetc_bdr rx_ring;
393 struct enetc_bdr tx_ring[] __counted_by(count_tx_rings);
394 } ____cacheline_aligned_in_smp;
395
396 struct enetc_cls_rule {
397 struct ethtool_rx_flow_spec fs;
398 int used;
399 };
400
401 #define ENETC_MAX_BDR_INT 6 /* fixed to max # of available cpus */
402 struct psfp_cap {
403 u32 max_streamid;
404 u32 max_psfp_filter;
405 u32 max_psfp_gate;
406 u32 max_psfp_gatelist;
407 u32 max_psfp_meter;
408 };
409
410 #define ENETC_F_TX_TSTAMP_MASK 0xff
411 enum enetc_active_offloads {
412 /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */
413 ENETC_F_TX_TSTAMP = BIT(0),
414 ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1),
415
416 ENETC_F_RX_TSTAMP = BIT(8),
417 ENETC_F_QBV = BIT(9),
418 ENETC_F_QCI = BIT(10),
419 ENETC_F_QBU = BIT(11),
420 ENETC_F_TXCSUM = BIT(12),
421 ENETC_F_LSO = BIT(13),
422 };
423
424 enum enetc_flags_bit {
425 ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,
426 ENETC_TX_DOWN,
427 ENETC_RXBDR_CM,
428 };
429
430 /* interrupt coalescing modes */
431 enum enetc_ic_mode {
432 /* one interrupt per frame */
433 ENETC_IC_NONE = 0,
434 /* activated when int coalescing time is set to a non-0 value */
435 ENETC_IC_RX_MANUAL = BIT(0),
436 ENETC_IC_TX_MANUAL = BIT(1),
437 /* use dynamic interrupt moderation */
438 ENETC_IC_RX_ADAPTIVE = BIT(2),
439 };
440
441 #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
442 #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
443
444 struct enetc_ndev_priv {
445 struct net_device *ndev;
446 struct device *dev; /* dma-mapping device */
447 struct enetc_si *si;
448
449 int bdr_int_num; /* number of Rx/Tx ring interrupts */
450 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
451 u16 num_rx_rings, num_tx_rings;
452 u16 rx_bd_count, tx_bd_count;
453
454 u16 msg_enable;
455
456 u8 preemptible_tcs;
457 u8 max_frags; /* The maximum number of BDs for fragments */
458
459 enum enetc_active_offloads active_offloads;
460
461 u32 speed; /* store speed for compare update pspeed */
462
463 struct enetc_bdr **xdp_tx_ring;
464 struct enetc_bdr *tx_ring[16];
465 struct enetc_bdr *rx_ring[16];
466 const struct enetc_bdr_resource *tx_res;
467 const struct enetc_bdr_resource *rx_res;
468
469 struct enetc_cls_rule *cls_rules;
470
471 struct psfp_cap psfp_cap;
472
473 /* Minimum number of TX queues required by the network stack */
474 unsigned int min_num_stack_tx_queues;
475
476 struct phylink *phylink;
477 int ic_mode;
478 u32 tx_ictt;
479
480 struct bpf_prog *xdp_prog;
481
482 unsigned long flags;
483
484 struct work_struct tx_onestep_tstamp;
485 struct sk_buff_head tx_skbs;
486
487 /* Serialize access to MAC Merge state between ethtool requests
488 * and link state updates
489 */
490 struct mutex mm_lock;
491
492 struct clk *ref_clk; /* RGMII/RMII reference clock */
493 u64 sysclk_freq; /* NETC system clock frequency */
494 };
495
496 #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))
497
498 #define ENETC_CBDR_TIMEOUT 1000 /* usecs */
499
500 /* SI common */
501 u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg);
502 void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val);
503 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
504 void enetc_pci_remove(struct pci_dev *pdev);
505 int enetc_alloc_msix(struct enetc_ndev_priv *priv);
506 void enetc_free_msix(struct enetc_ndev_priv *priv);
507 void enetc_get_si_caps(struct enetc_si *si);
508 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
509 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
510 void enetc_free_si_resources(struct enetc_ndev_priv *priv);
511 int enetc_configure_si(struct enetc_ndev_priv *priv);
512 int enetc_get_driver_data(struct enetc_si *si);
513 void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,
514 const unsigned char *addr);
515 void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter);
516 void enetc_set_congestion_mode(struct enetc_ndev_priv *priv, bool enable);
517
518 int enetc_open(struct net_device *ndev);
519 int enetc_close(struct net_device *ndev);
520 void enetc_start(struct net_device *ndev);
521 void enetc_stop(struct net_device *ndev);
522 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
523 struct net_device_stats *enetc_get_stats(struct net_device *ndev);
524 void enetc_set_features(struct net_device *ndev, netdev_features_t features);
525 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
526 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);
527 void enetc_reset_tc_mqprio(struct net_device *ndev);
528 int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf);
529 int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
530 struct xdp_frame **frames, u32 flags);
531
532 int enetc_hwtstamp_get(struct net_device *ndev,
533 struct kernel_hwtstamp_config *config);
534 int enetc_hwtstamp_set(struct net_device *ndev,
535 struct kernel_hwtstamp_config *config,
536 struct netlink_ext_ack *extack);
537
538 /* ethtool */
539 extern const struct ethtool_ops enetc_pf_ethtool_ops;
540 extern const struct ethtool_ops enetc4_pf_ethtool_ops;
541 extern const struct ethtool_ops enetc_vf_ethtool_ops;
542 extern const struct ethtool_ops enetc4_ppm_ethtool_ops;
543
544 void enetc_set_ethtool_ops(struct net_device *ndev);
545 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link);
546 void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv);
547
548 /* control buffer descriptor ring (CBDR) */
549 int enetc_setup_cbdr(struct enetc_si *si);
550 void enetc_teardown_cbdr(struct enetc_si *si);
551 int enetc4_setup_cbdr(struct enetc_si *si);
552 void enetc4_teardown_cbdr(struct enetc_si *si);
553 int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
554 char *mac_addr, int si_map);
555 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
556 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
557 int index);
558 void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes);
559 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
560 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
561 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
562 int enetc4_get_rss_table(struct enetc_si *si, u32 *table, int count);
563 int enetc4_set_rss_table(struct enetc_si *si, const u32 *table, int count);
564
enetc_cbd_alloc_data_mem(struct enetc_si * si,struct enetc_cbd * cbd,int size,dma_addr_t * dma,void ** data_align)565 static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,
566 struct enetc_cbd *cbd,
567 int size, dma_addr_t *dma,
568 void **data_align)
569 {
570 struct enetc_cbdr *ring = &si->cbd_ring;
571 dma_addr_t dma_align;
572 void *data;
573
574 data = dma_alloc_coherent(ring->dma_dev,
575 size + ENETC_CBD_DATA_MEM_ALIGN,
576 dma, GFP_KERNEL);
577 if (!data) {
578 dev_err(ring->dma_dev, "CBD alloc data memory failed!\n");
579 return NULL;
580 }
581
582 dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN);
583 *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN);
584
585 cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align));
586 cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align));
587 cbd->length = cpu_to_le16(size);
588
589 return data;
590 }
591
enetc_cbd_free_data_mem(struct enetc_si * si,int size,void * data,dma_addr_t * dma)592 static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,
593 void *data, dma_addr_t *dma)
594 {
595 struct enetc_cbdr *ring = &si->cbd_ring;
596
597 dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN,
598 data, *dma);
599 }
600
601 void enetc_reset_ptcmsdur(struct enetc_hw *hw);
602 void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);
603
enetc_ptp_clock_is_enabled(struct enetc_si * si)604 static inline bool enetc_ptp_clock_is_enabled(struct enetc_si *si)
605 {
606 if (is_enetc_rev1(si))
607 return IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK);
608
609 return IS_ENABLED(CONFIG_PTP_NETC_V4_TIMER);
610 }
611
612 #ifdef CONFIG_FSL_ENETC_QOS
613 int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
614 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
615 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
616 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
617 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
618 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
619 void *cb_priv);
620 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
621 int enetc_psfp_init(struct enetc_ndev_priv *priv);
622 int enetc_psfp_clean(struct enetc_ndev_priv *priv);
623 int enetc_set_psfp(struct net_device *ndev, bool en);
624
enetc_get_max_cap(struct enetc_ndev_priv * priv)625 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
626 {
627 struct enetc_hw *hw = &priv->si->hw;
628 u32 reg;
629
630 reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
631 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
632 /* Port stream filter capability */
633 reg = enetc_port_rd(hw, ENETC_PSFCAPR);
634 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
635 /* Port stream gate capability */
636 reg = enetc_port_rd(hw, ENETC_PSGCAPR);
637 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
638 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
639 /* Port flow meter capability */
640 reg = enetc_port_rd(hw, ENETC_PFMCAPR);
641 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
642 }
643
enetc_psfp_enable(struct enetc_ndev_priv * priv)644 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
645 {
646 struct enetc_hw *hw = &priv->si->hw;
647 int err;
648
649 enetc_get_max_cap(priv);
650
651 err = enetc_psfp_init(priv);
652 if (err)
653 return err;
654
655 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
656 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
657 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
658
659 return 0;
660 }
661
enetc_psfp_disable(struct enetc_ndev_priv * priv)662 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
663 {
664 struct enetc_hw *hw = &priv->si->hw;
665 int err;
666
667 err = enetc_psfp_clean(priv);
668 if (err)
669 return err;
670
671 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
672 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
673 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
674
675 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
676
677 return 0;
678 }
679
680 #else
681 #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP
682 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
683 #define enetc_sched_speed_set(priv, speed) (void)0
684 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
685 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
686 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
687 #define enetc_setup_tc_block_cb NULL
688
689 #define enetc_get_max_cap(p) \
690 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
691
enetc_psfp_enable(struct enetc_ndev_priv * priv)692 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
693 {
694 return 0;
695 }
696
enetc_psfp_disable(struct enetc_ndev_priv * priv)697 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
698 {
699 return 0;
700 }
701
enetc_set_psfp(struct net_device * ndev,bool en)702 static inline int enetc_set_psfp(struct net_device *ndev, bool en)
703 {
704 return 0;
705 }
706 #endif
707