1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qed NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7 #include <linux/types.h>
8 #include <asm/byteorder.h>
9 #include <linux/dma-mapping.h>
10 #include <linux/if_vlan.h>
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
13 #include <linux/slab.h>
14 #include <linux/stddef.h>
15 #include <linux/workqueue.h>
16 #include <net/ipv6.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/errno.h>
20 #include <linux/etherdevice.h>
21 #include <linux/io.h>
22 #include <linux/list.h>
23 #include <linux/mutex.h>
24 #include <linux/spinlock.h>
25 #include <linux/string.h>
26 #include <linux/qed/qed_ll2_if.h>
27 #include "qed.h"
28 #include "qed_cxt.h"
29 #include "qed_dev_api.h"
30 #include "qed_hsi.h"
31 #include "qed_iro_hsi.h"
32 #include "qed_hw.h"
33 #include "qed_int.h"
34 #include "qed_ll2.h"
35 #include "qed_mcp.h"
36 #include "qed_ooo.h"
37 #include "qed_reg_addr.h"
38 #include "qed_sp.h"
39 #include "qed_rdma.h"
40
41 #define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registered)
42 #define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registered)
43
44 #define QED_LL2_TX_SIZE (256)
45 #define QED_LL2_RX_SIZE (4096)
46
47 #define QED_LL2_INVALID_STATS_ID 0xff
48
49 struct qed_cb_ll2_info {
50 int rx_cnt;
51 u32 rx_size;
52 u8 handle;
53
54 /* Lock protecting LL2 buffer lists in sleepless context */
55 spinlock_t lock;
56 struct list_head list;
57
58 const struct qed_ll2_cb_ops *cbs;
59 void *cb_cookie;
60 };
61
62 struct qed_ll2_buffer {
63 struct list_head list;
64 void *data;
65 dma_addr_t phys_addr;
66 };
67
qed_ll2_handle_to_stats_id(struct qed_hwfn * p_hwfn,u8 ll2_queue_type,u8 qid)68 static u8 qed_ll2_handle_to_stats_id(struct qed_hwfn *p_hwfn,
69 u8 ll2_queue_type, u8 qid)
70 {
71 u8 stats_id;
72
73 /* For legacy (RAM based) queues, the stats_id will be set as the
74 * queue_id. Otherwise (context based queue), it will be set to
75 * the "abs_pf_id" offset from the end of the RAM based queue IDs.
76 * If the final value exceeds the total counters amount, return
77 * INVALID value to indicate that the stats for this connection should
78 * be disabled.
79 */
80 if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
81 stats_id = qid;
82 else
83 stats_id = MAX_NUM_LL2_RX_RAM_QUEUES + p_hwfn->abs_pf_id;
84
85 if (stats_id < MAX_NUM_LL2_TX_STATS_COUNTERS)
86 return stats_id;
87 else
88 return QED_LL2_INVALID_STATS_ID;
89 }
90
qed_ll2b_complete_tx_packet(void * cxt,u8 connection_handle,void * cookie,dma_addr_t first_frag_addr,bool b_last_fragment,bool b_last_packet)91 static void qed_ll2b_complete_tx_packet(void *cxt,
92 u8 connection_handle,
93 void *cookie,
94 dma_addr_t first_frag_addr,
95 bool b_last_fragment,
96 bool b_last_packet)
97 {
98 struct qed_hwfn *p_hwfn = cxt;
99 struct qed_dev *cdev = p_hwfn->cdev;
100 struct sk_buff *skb = cookie;
101
102 /* All we need to do is release the mapping */
103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
104 skb_headlen(skb), DMA_TO_DEVICE);
105
106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
108 b_last_fragment);
109
110 dev_kfree_skb_any(skb);
111 }
112
qed_ll2_alloc_buffer(struct qed_dev * cdev,u8 ** data,dma_addr_t * phys_addr)113 static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
114 u8 **data, dma_addr_t *phys_addr)
115 {
116 size_t size = cdev->ll2->rx_size + NET_SKB_PAD +
117 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
118
119 *data = kmalloc(size, GFP_ATOMIC);
120 if (!(*data)) {
121 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
122 return -ENOMEM;
123 }
124
125 *phys_addr = dma_map_single(&cdev->pdev->dev,
126 ((*data) + NET_SKB_PAD),
127 cdev->ll2->rx_size, DMA_FROM_DEVICE);
128 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
129 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
130 kfree((*data));
131 return -ENOMEM;
132 }
133
134 return 0;
135 }
136
qed_ll2_dealloc_buffer(struct qed_dev * cdev,struct qed_ll2_buffer * buffer)137 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
138 struct qed_ll2_buffer *buffer)
139 {
140 spin_lock_bh(&cdev->ll2->lock);
141
142 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
143 cdev->ll2->rx_size, DMA_FROM_DEVICE);
144 kfree(buffer->data);
145 list_del(&buffer->list);
146
147 cdev->ll2->rx_cnt--;
148 if (!cdev->ll2->rx_cnt)
149 DP_INFO(cdev, "All LL2 entries were removed\n");
150
151 spin_unlock_bh(&cdev->ll2->lock);
152
153 return 0;
154 }
155
qed_ll2_kill_buffers(struct qed_dev * cdev)156 static void qed_ll2_kill_buffers(struct qed_dev *cdev)
157 {
158 struct qed_ll2_buffer *buffer, *tmp_buffer;
159
160 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
161 qed_ll2_dealloc_buffer(cdev, buffer);
162 }
163
qed_ll2b_complete_rx_packet(void * cxt,struct qed_ll2_comp_rx_data * data)164 static void qed_ll2b_complete_rx_packet(void *cxt,
165 struct qed_ll2_comp_rx_data *data)
166 {
167 struct qed_hwfn *p_hwfn = cxt;
168 struct qed_ll2_buffer *buffer = data->cookie;
169 struct qed_dev *cdev = p_hwfn->cdev;
170 dma_addr_t new_phys_addr;
171 struct sk_buff *skb;
172 bool reuse = false;
173 int rc = -EINVAL;
174 u8 *new_data;
175
176 DP_VERBOSE(p_hwfn,
177 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
178 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
179 (u64)data->rx_buf_addr,
180 data->u.placement_offset,
181 data->length.packet_length,
182 data->parse_flags,
183 data->vlan, data->opaque_data_0, data->opaque_data_1);
184
185 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
186 print_hex_dump(KERN_INFO, "",
187 DUMP_PREFIX_OFFSET, 16, 1,
188 buffer->data, data->length.packet_length, false);
189 }
190
191 /* Determine if data is valid */
192 if (data->length.packet_length < ETH_HLEN)
193 reuse = true;
194
195 /* Allocate a replacement for buffer; Reuse upon failure */
196 if (!reuse)
197 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
198 &new_phys_addr);
199
200 /* If need to reuse or there's no replacement buffer, repost this */
201 if (rc)
202 goto out_post;
203 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
204 cdev->ll2->rx_size, DMA_FROM_DEVICE);
205
206 skb = slab_build_skb(buffer->data);
207 if (!skb) {
208 DP_INFO(cdev, "Failed to build SKB\n");
209 kfree(buffer->data);
210 goto out_post1;
211 }
212
213 data->u.placement_offset += NET_SKB_PAD;
214 skb_reserve(skb, data->u.placement_offset);
215 skb_put(skb, data->length.packet_length);
216 skb_checksum_none_assert(skb);
217
218 /* Get parital ethernet information instead of eth_type_trans(),
219 * Since we don't have an associated net_device.
220 */
221 skb_reset_mac_header(skb);
222 skb->protocol = eth_hdr(skb)->h_proto;
223
224 /* Pass SKB onward */
225 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
226 if (data->vlan)
227 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
228 data->vlan);
229 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
230 data->opaque_data_0,
231 data->opaque_data_1);
232 } else {
233 DP_VERBOSE(p_hwfn, (NETIF_MSG_RX_STATUS | NETIF_MSG_PKTDATA |
234 QED_MSG_LL2 | QED_MSG_STORAGE),
235 "Dropping the packet\n");
236 kfree(buffer->data);
237 }
238
239 out_post1:
240 /* Update Buffer information and update FW producer */
241 buffer->data = new_data;
242 buffer->phys_addr = new_phys_addr;
243
244 out_post:
245 rc = qed_ll2_post_rx_buffer(p_hwfn, cdev->ll2->handle,
246 buffer->phys_addr, 0, buffer, 1);
247 if (rc)
248 qed_ll2_dealloc_buffer(cdev, buffer);
249 }
250
__qed_ll2_handle_sanity(struct qed_hwfn * p_hwfn,u8 connection_handle,bool b_lock,bool b_only_active)251 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
252 u8 connection_handle,
253 bool b_lock,
254 bool b_only_active)
255 {
256 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
257
258 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
259 return NULL;
260
261 if (!p_hwfn->p_ll2_info)
262 return NULL;
263
264 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
265
266 if (b_only_active) {
267 if (b_lock)
268 mutex_lock(&p_ll2_conn->mutex);
269 if (p_ll2_conn->b_active)
270 p_ret = p_ll2_conn;
271 if (b_lock)
272 mutex_unlock(&p_ll2_conn->mutex);
273 } else {
274 p_ret = p_ll2_conn;
275 }
276
277 return p_ret;
278 }
279
qed_ll2_handle_sanity(struct qed_hwfn * p_hwfn,u8 connection_handle)280 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
281 u8 connection_handle)
282 {
283 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
284 }
285
qed_ll2_handle_sanity_lock(struct qed_hwfn * p_hwfn,u8 connection_handle)286 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
287 u8 connection_handle)
288 {
289 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
290 }
291
qed_ll2_handle_sanity_inactive(struct qed_hwfn * p_hwfn,u8 connection_handle)292 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
293 *p_hwfn,
294 u8 connection_handle)
295 {
296 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
297 }
298
qed_ll2_txq_flush(struct qed_hwfn * p_hwfn,u8 connection_handle)299 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
300 {
301 bool b_last_packet = false, b_last_frag = false;
302 struct qed_ll2_tx_packet *p_pkt = NULL;
303 struct qed_ll2_info *p_ll2_conn;
304 struct qed_ll2_tx_queue *p_tx;
305 unsigned long flags = 0;
306 dma_addr_t tx_frag;
307
308 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
309 if (!p_ll2_conn)
310 return;
311
312 p_tx = &p_ll2_conn->tx_queue;
313
314 spin_lock_irqsave(&p_tx->lock, flags);
315 while (!list_empty(&p_tx->active_descq)) {
316 p_pkt = list_first_entry(&p_tx->active_descq,
317 struct qed_ll2_tx_packet, list_entry);
318 if (!p_pkt)
319 break;
320
321 list_del(&p_pkt->list_entry);
322 b_last_packet = list_empty(&p_tx->active_descq);
323 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
324 spin_unlock_irqrestore(&p_tx->lock, flags);
325 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
326 struct qed_ooo_buffer *p_buffer;
327
328 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
329 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
330 p_buffer);
331 } else {
332 p_tx->cur_completing_packet = *p_pkt;
333 p_tx->cur_completing_bd_idx = 1;
334 b_last_frag =
335 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
336 tx_frag = p_pkt->bds_set[0].tx_frag;
337 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
338 p_ll2_conn->my_id,
339 p_pkt->cookie,
340 tx_frag,
341 b_last_frag,
342 b_last_packet);
343 }
344 spin_lock_irqsave(&p_tx->lock, flags);
345 }
346 spin_unlock_irqrestore(&p_tx->lock, flags);
347 }
348
qed_ll2_txq_completion(struct qed_hwfn * p_hwfn,void * p_cookie)349 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
350 {
351 struct qed_ll2_info *p_ll2_conn = p_cookie;
352 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
353 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
354 struct qed_ll2_tx_packet *p_pkt;
355 bool b_last_frag = false;
356 unsigned long flags;
357 int rc = -EINVAL;
358
359 if (!p_ll2_conn)
360 return rc;
361
362 spin_lock_irqsave(&p_tx->lock, flags);
363 if (p_tx->b_completing_packet) {
364 rc = -EBUSY;
365 goto out;
366 }
367
368 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
369 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
370 while (num_bds) {
371 if (list_empty(&p_tx->active_descq))
372 goto out;
373
374 p_pkt = list_first_entry(&p_tx->active_descq,
375 struct qed_ll2_tx_packet, list_entry);
376 if (!p_pkt)
377 goto out;
378
379 p_tx->b_completing_packet = true;
380 p_tx->cur_completing_packet = *p_pkt;
381 num_bds_in_packet = p_pkt->bd_used;
382 list_del(&p_pkt->list_entry);
383
384 if (unlikely(num_bds < num_bds_in_packet)) {
385 DP_NOTICE(p_hwfn,
386 "Rest of BDs does not cover whole packet\n");
387 goto out;
388 }
389
390 num_bds -= num_bds_in_packet;
391 p_tx->bds_idx += num_bds_in_packet;
392 while (num_bds_in_packet--)
393 qed_chain_consume(&p_tx->txq_chain);
394
395 p_tx->cur_completing_bd_idx = 1;
396 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
397 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
398
399 spin_unlock_irqrestore(&p_tx->lock, flags);
400
401 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
402 p_ll2_conn->my_id,
403 p_pkt->cookie,
404 p_pkt->bds_set[0].tx_frag,
405 b_last_frag, !num_bds);
406
407 spin_lock_irqsave(&p_tx->lock, flags);
408 }
409
410 p_tx->b_completing_packet = false;
411 rc = 0;
412 out:
413 spin_unlock_irqrestore(&p_tx->lock, flags);
414 return rc;
415 }
416
qed_ll2_rxq_parse_gsi(struct qed_hwfn * p_hwfn,union core_rx_cqe_union * p_cqe,struct qed_ll2_comp_rx_data * data)417 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
418 union core_rx_cqe_union *p_cqe,
419 struct qed_ll2_comp_rx_data *data)
420 {
421 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
422 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
423 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
424 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
425 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
426 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
427 data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id);
428
429 data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp);
430 }
431
qed_ll2_rxq_parse_reg(struct qed_hwfn * p_hwfn,union core_rx_cqe_union * p_cqe,struct qed_ll2_comp_rx_data * data)432 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
433 union core_rx_cqe_union *p_cqe,
434 struct qed_ll2_comp_rx_data *data)
435 {
436 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
437 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
438 data->length.packet_length =
439 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
440 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
441 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
442 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
443 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
444 }
445
446 static int
qed_ll2_handle_slowpath(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn,union core_rx_cqe_union * p_cqe,unsigned long * p_lock_flags)447 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
448 struct qed_ll2_info *p_ll2_conn,
449 union core_rx_cqe_union *p_cqe,
450 unsigned long *p_lock_flags)
451 {
452 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
453 struct core_rx_slow_path_cqe *sp_cqe;
454
455 sp_cqe = &p_cqe->rx_cqe_sp;
456 if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
457 DP_NOTICE(p_hwfn,
458 "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
459 sp_cqe->ramrod_cmd_id);
460 return -EINVAL;
461 }
462
463 if (!p_ll2_conn->cbs.slowpath_cb) {
464 DP_NOTICE(p_hwfn,
465 "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
466 return -EINVAL;
467 }
468
469 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
470
471 p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
472 p_ll2_conn->my_id,
473 le32_to_cpu(sp_cqe->opaque_data.data[0]),
474 le32_to_cpu(sp_cqe->opaque_data.data[1]));
475
476 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
477
478 return 0;
479 }
480
481 static int
qed_ll2_rxq_handle_completion(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn,union core_rx_cqe_union * p_cqe,unsigned long * p_lock_flags,bool b_last_cqe)482 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
483 struct qed_ll2_info *p_ll2_conn,
484 union core_rx_cqe_union *p_cqe,
485 unsigned long *p_lock_flags, bool b_last_cqe)
486 {
487 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
488 struct qed_ll2_rx_packet *p_pkt = NULL;
489 struct qed_ll2_comp_rx_data data;
490
491 if (!list_empty(&p_rx->active_descq))
492 p_pkt = list_first_entry(&p_rx->active_descq,
493 struct qed_ll2_rx_packet, list_entry);
494 if (unlikely(!p_pkt)) {
495 DP_NOTICE(p_hwfn,
496 "[%d] LL2 Rx completion but active_descq is empty\n",
497 p_ll2_conn->input.conn_type);
498
499 return -EIO;
500 }
501 list_del(&p_pkt->list_entry);
502
503 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
504 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
505 else
506 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
507 if (unlikely(qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd))
508 DP_NOTICE(p_hwfn,
509 "Mismatch between active_descq and the LL2 Rx chain\n");
510
511 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
512
513 data.connection_handle = p_ll2_conn->my_id;
514 data.cookie = p_pkt->cookie;
515 data.rx_buf_addr = p_pkt->rx_buf_addr;
516 data.b_last_packet = b_last_cqe;
517
518 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
519 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
520
521 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
522
523 return 0;
524 }
525
qed_ll2_rxq_completion(struct qed_hwfn * p_hwfn,void * cookie)526 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
527 {
528 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
529 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
530 union core_rx_cqe_union *cqe = NULL;
531 u16 cq_new_idx = 0, cq_old_idx = 0;
532 unsigned long flags = 0;
533 int rc = 0;
534
535 if (!p_ll2_conn)
536 return rc;
537
538 spin_lock_irqsave(&p_rx->lock, flags);
539
540 if (!QED_LL2_RX_REGISTERED(p_ll2_conn)) {
541 spin_unlock_irqrestore(&p_rx->lock, flags);
542 return 0;
543 }
544
545 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
546 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
547
548 while (cq_new_idx != cq_old_idx) {
549 bool b_last_cqe = (cq_new_idx == cq_old_idx);
550
551 cqe =
552 (union core_rx_cqe_union *)
553 qed_chain_consume(&p_rx->rcq_chain);
554 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
555
556 DP_VERBOSE(p_hwfn,
557 QED_MSG_LL2,
558 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
559 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
560
561 switch (cqe->rx_cqe_sp.type) {
562 case CORE_RX_CQE_TYPE_SLOW_PATH:
563 rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
564 cqe, &flags);
565 break;
566 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
567 case CORE_RX_CQE_TYPE_REGULAR:
568 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
569 cqe, &flags,
570 b_last_cqe);
571 break;
572 default:
573 rc = -EIO;
574 }
575 }
576
577 spin_unlock_irqrestore(&p_rx->lock, flags);
578 return rc;
579 }
580
qed_ll2_rxq_flush(struct qed_hwfn * p_hwfn,u8 connection_handle)581 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
582 {
583 struct qed_ll2_info *p_ll2_conn = NULL;
584 struct qed_ll2_rx_packet *p_pkt = NULL;
585 struct qed_ll2_rx_queue *p_rx;
586 unsigned long flags = 0;
587
588 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
589 if (!p_ll2_conn)
590 return;
591
592 p_rx = &p_ll2_conn->rx_queue;
593
594 spin_lock_irqsave(&p_rx->lock, flags);
595 while (!list_empty(&p_rx->active_descq)) {
596 p_pkt = list_first_entry(&p_rx->active_descq,
597 struct qed_ll2_rx_packet, list_entry);
598 if (!p_pkt)
599 break;
600 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
601 spin_unlock_irqrestore(&p_rx->lock, flags);
602
603 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
604 struct qed_ooo_buffer *p_buffer;
605
606 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
607 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
608 p_buffer);
609 } else {
610 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
611 void *cookie = p_pkt->cookie;
612 bool b_last;
613
614 b_last = list_empty(&p_rx->active_descq);
615 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
616 p_ll2_conn->my_id,
617 cookie,
618 rx_buf_addr, b_last);
619 }
620 spin_lock_irqsave(&p_rx->lock, flags);
621 }
622 spin_unlock_irqrestore(&p_rx->lock, flags);
623 }
624
625 static bool
qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn * p_hwfn,struct core_rx_slow_path_cqe * p_cqe)626 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn,
627 struct core_rx_slow_path_cqe *p_cqe)
628 {
629 struct ooo_opaque *ooo_opq;
630 u32 cid;
631
632 if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH)
633 return false;
634
635 ooo_opq = (struct ooo_opaque *)&p_cqe->opaque_data;
636 if (ooo_opq->ooo_opcode != TCP_EVENT_DELETE_ISLES)
637 return false;
638
639 /* Need to make a flush */
640 cid = le32_to_cpu(ooo_opq->cid);
641 qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid);
642
643 return true;
644 }
645
qed_ll2_lb_rxq_handler(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)646 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
647 struct qed_ll2_info *p_ll2_conn)
648 {
649 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
650 u16 packet_length = 0, parse_flags = 0, vlan = 0;
651 struct qed_ll2_rx_packet *p_pkt = NULL;
652 union core_rx_cqe_union *cqe = NULL;
653 u16 cq_new_idx = 0, cq_old_idx = 0;
654 struct qed_ooo_buffer *p_buffer;
655 struct ooo_opaque *ooo_opq;
656 u8 placement_offset = 0;
657 u8 cqe_type;
658 u32 cid;
659
660 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
661 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
662 if (cq_new_idx == cq_old_idx)
663 return 0;
664
665 while (cq_new_idx != cq_old_idx) {
666 struct core_rx_fast_path_cqe *p_cqe_fp;
667
668 cqe = qed_chain_consume(&p_rx->rcq_chain);
669 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
670 cqe_type = cqe->rx_cqe_sp.type;
671
672 if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH)
673 if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn,
674 &cqe->rx_cqe_sp))
675 continue;
676
677 if (unlikely(cqe_type != CORE_RX_CQE_TYPE_REGULAR)) {
678 DP_NOTICE(p_hwfn,
679 "Got a non-regular LB LL2 completion [type 0x%02x]\n",
680 cqe_type);
681 return -EINVAL;
682 }
683 p_cqe_fp = &cqe->rx_cqe_fp;
684
685 placement_offset = p_cqe_fp->placement_offset;
686 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
687 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
688 vlan = le16_to_cpu(p_cqe_fp->vlan);
689 ooo_opq = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
690 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info, ooo_opq);
691 cid = le32_to_cpu(ooo_opq->cid);
692
693 /* Process delete isle first */
694 if (ooo_opq->drop_size)
695 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
696 ooo_opq->drop_isle,
697 ooo_opq->drop_size);
698
699 if (ooo_opq->ooo_opcode == TCP_EVENT_NOP)
700 continue;
701
702 /* Now process create/add/join isles */
703 if (unlikely(list_empty(&p_rx->active_descq))) {
704 DP_NOTICE(p_hwfn,
705 "LL2 OOO RX chain has no submitted buffers\n"
706 );
707 return -EIO;
708 }
709
710 p_pkt = list_first_entry(&p_rx->active_descq,
711 struct qed_ll2_rx_packet, list_entry);
712
713 if (likely(ooo_opq->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE ||
714 ooo_opq->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT ||
715 ooo_opq->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT ||
716 ooo_opq->ooo_opcode == TCP_EVENT_ADD_PEN ||
717 ooo_opq->ooo_opcode == TCP_EVENT_JOIN)) {
718 if (unlikely(!p_pkt)) {
719 DP_NOTICE(p_hwfn,
720 "LL2 OOO RX packet is not valid\n");
721 return -EIO;
722 }
723 list_del(&p_pkt->list_entry);
724 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
725 p_buffer->packet_length = packet_length;
726 p_buffer->parse_flags = parse_flags;
727 p_buffer->vlan = vlan;
728 p_buffer->placement_offset = placement_offset;
729 qed_chain_consume(&p_rx->rxq_chain);
730 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
731
732 switch (ooo_opq->ooo_opcode) {
733 case TCP_EVENT_ADD_NEW_ISLE:
734 qed_ooo_add_new_isle(p_hwfn,
735 p_hwfn->p_ooo_info,
736 cid,
737 ooo_opq->ooo_isle,
738 p_buffer);
739 break;
740 case TCP_EVENT_ADD_ISLE_RIGHT:
741 qed_ooo_add_new_buffer(p_hwfn,
742 p_hwfn->p_ooo_info,
743 cid,
744 ooo_opq->ooo_isle,
745 p_buffer,
746 QED_OOO_RIGHT_BUF);
747 break;
748 case TCP_EVENT_ADD_ISLE_LEFT:
749 qed_ooo_add_new_buffer(p_hwfn,
750 p_hwfn->p_ooo_info,
751 cid,
752 ooo_opq->ooo_isle,
753 p_buffer,
754 QED_OOO_LEFT_BUF);
755 break;
756 case TCP_EVENT_JOIN:
757 qed_ooo_add_new_buffer(p_hwfn,
758 p_hwfn->p_ooo_info,
759 cid,
760 ooo_opq->ooo_isle + 1,
761 p_buffer,
762 QED_OOO_LEFT_BUF);
763 qed_ooo_join_isles(p_hwfn,
764 p_hwfn->p_ooo_info,
765 cid, ooo_opq->ooo_isle);
766 break;
767 case TCP_EVENT_ADD_PEN:
768 qed_ooo_put_ready_buffer(p_hwfn,
769 p_hwfn->p_ooo_info,
770 p_buffer, true);
771 break;
772 }
773 } else {
774 DP_NOTICE(p_hwfn,
775 "Unexpected event (%d) TX OOO completion\n",
776 ooo_opq->ooo_opcode);
777 }
778 }
779
780 return 0;
781 }
782
783 static void
qed_ooo_submit_tx_buffers(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)784 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
785 struct qed_ll2_info *p_ll2_conn)
786 {
787 struct qed_ll2_tx_pkt_info tx_pkt;
788 struct qed_ooo_buffer *p_buffer;
789 u16 l4_hdr_offset_w;
790 dma_addr_t first_frag;
791 u8 bd_flags;
792 int rc;
793
794 /* Submit Tx buffers here */
795 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
796 p_hwfn->p_ooo_info))) {
797 l4_hdr_offset_w = 0;
798 bd_flags = 0;
799
800 first_frag = p_buffer->rx_buffer_phys_addr +
801 p_buffer->placement_offset;
802 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
803 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
804
805 memset(&tx_pkt, 0, sizeof(tx_pkt));
806 tx_pkt.num_of_bds = 1;
807 tx_pkt.vlan = p_buffer->vlan;
808 tx_pkt.bd_flags = bd_flags;
809 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
810 switch (p_ll2_conn->tx_dest) {
811 case CORE_TX_DEST_NW:
812 tx_pkt.tx_dest = QED_LL2_TX_DEST_NW;
813 break;
814 case CORE_TX_DEST_LB:
815 tx_pkt.tx_dest = QED_LL2_TX_DEST_LB;
816 break;
817 case CORE_TX_DEST_DROP:
818 default:
819 tx_pkt.tx_dest = QED_LL2_TX_DEST_DROP;
820 break;
821 }
822 tx_pkt.first_frag = first_frag;
823 tx_pkt.first_frag_len = p_buffer->packet_length;
824 tx_pkt.cookie = p_buffer;
825
826 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
827 &tx_pkt, true);
828 if (rc) {
829 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
830 p_buffer, false);
831 break;
832 }
833 }
834 }
835
836 static void
qed_ooo_submit_rx_buffers(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)837 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
838 struct qed_ll2_info *p_ll2_conn)
839 {
840 struct qed_ooo_buffer *p_buffer;
841 int rc;
842
843 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
844 p_hwfn->p_ooo_info))) {
845 rc = qed_ll2_post_rx_buffer(p_hwfn,
846 p_ll2_conn->my_id,
847 p_buffer->rx_buffer_phys_addr,
848 0, p_buffer, true);
849 if (rc) {
850 qed_ooo_put_free_buffer(p_hwfn,
851 p_hwfn->p_ooo_info, p_buffer);
852 break;
853 }
854 }
855 }
856
qed_ll2_lb_rxq_completion(struct qed_hwfn * p_hwfn,void * p_cookie)857 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
858 {
859 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
860 int rc;
861
862 if (!p_ll2_conn)
863 return 0;
864
865 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
866 return 0;
867
868 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
869 if (rc)
870 return rc;
871
872 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
873 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
874
875 return 0;
876 }
877
qed_ll2_lb_txq_completion(struct qed_hwfn * p_hwfn,void * p_cookie)878 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
879 {
880 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
881 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
882 struct qed_ll2_tx_packet *p_pkt = NULL;
883 struct qed_ooo_buffer *p_buffer;
884 bool b_dont_submit_rx = false;
885 u16 new_idx = 0, num_bds = 0;
886 int rc;
887
888 if (unlikely(!p_ll2_conn))
889 return 0;
890
891 if (unlikely(!QED_LL2_TX_REGISTERED(p_ll2_conn)))
892 return 0;
893
894 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
895 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
896
897 if (unlikely(!num_bds))
898 return 0;
899
900 while (num_bds) {
901 if (list_empty(&p_tx->active_descq))
902 return -EINVAL;
903
904 p_pkt = list_first_entry(&p_tx->active_descq,
905 struct qed_ll2_tx_packet, list_entry);
906 if (unlikely(!p_pkt))
907 return -EINVAL;
908
909 if (unlikely(p_pkt->bd_used != 1)) {
910 DP_NOTICE(p_hwfn,
911 "Unexpectedly many BDs(%d) in TX OOO completion\n",
912 p_pkt->bd_used);
913 return -EINVAL;
914 }
915
916 list_del(&p_pkt->list_entry);
917
918 num_bds--;
919 p_tx->bds_idx++;
920 qed_chain_consume(&p_tx->txq_chain);
921
922 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
923 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
924
925 if (b_dont_submit_rx) {
926 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
927 p_buffer);
928 continue;
929 }
930
931 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
932 p_buffer->rx_buffer_phys_addr, 0,
933 p_buffer, true);
934 if (rc != 0) {
935 qed_ooo_put_free_buffer(p_hwfn,
936 p_hwfn->p_ooo_info, p_buffer);
937 b_dont_submit_rx = true;
938 }
939 }
940
941 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
942
943 return 0;
944 }
945
qed_ll2_stop_ooo(struct qed_hwfn * p_hwfn)946 static void qed_ll2_stop_ooo(struct qed_hwfn *p_hwfn)
947 {
948 u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
949
950 DP_VERBOSE(p_hwfn, (QED_MSG_STORAGE | QED_MSG_LL2),
951 "Stopping LL2 OOO queue [%02x]\n", *handle);
952
953 qed_ll2_terminate_connection(p_hwfn, *handle);
954 qed_ll2_release_connection(p_hwfn, *handle);
955 *handle = QED_LL2_UNUSED_HANDLE;
956 }
957
qed_sp_ll2_rx_queue_start(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn,u8 action_on_error)958 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
959 struct qed_ll2_info *p_ll2_conn,
960 u8 action_on_error)
961 {
962 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
963 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
964 struct core_rx_start_ramrod_data *p_ramrod = NULL;
965 struct qed_spq_entry *p_ent = NULL;
966 struct qed_sp_init_data init_data;
967 u16 cqe_pbl_size;
968 int rc = 0;
969
970 /* Get SPQ entry */
971 memset(&init_data, 0, sizeof(init_data));
972 init_data.cid = p_ll2_conn->cid;
973 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
974 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
975
976 rc = qed_sp_init_request(p_hwfn, &p_ent,
977 CORE_RAMROD_RX_QUEUE_START,
978 PROTOCOLID_CORE, &init_data);
979 if (rc)
980 return rc;
981
982 p_ramrod = &p_ent->ramrod.core_rx_queue_start;
983 memset(p_ramrod, 0, sizeof(*p_ramrod));
984 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
985 p_ramrod->sb_index = p_rx->rx_sb_index;
986 p_ramrod->complete_event_flg = 1;
987
988 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
989 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
990 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
991 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
992 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
993 qed_chain_get_pbl_phys(&p_rx->rcq_chain));
994
995 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
996 p_ramrod->inner_vlan_stripping_en =
997 p_ll2_conn->input.rx_vlan_removal_en;
998
999 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1000 p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE)
1001 p_ramrod->report_outer_vlan = 1;
1002 p_ramrod->queue_id = p_ll2_conn->queue_id;
1003 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
1004
1005 if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) &&
1006 p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE &&
1007 conn_type != QED_LL2_TYPE_IWARP &&
1008 (!QED_IS_NVMETCP_PERSONALITY(p_hwfn))) {
1009 p_ramrod->mf_si_bcast_accept_all = 1;
1010 p_ramrod->mf_si_mcast_accept_all = 1;
1011 } else {
1012 p_ramrod->mf_si_bcast_accept_all = 0;
1013 p_ramrod->mf_si_mcast_accept_all = 0;
1014 }
1015
1016 p_ramrod->action_on_error.error_type = action_on_error;
1017 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1018 p_ramrod->zero_prod_flg = 1;
1019
1020 return qed_spq_post(p_hwfn, p_ent, NULL);
1021 }
1022
qed_sp_ll2_tx_queue_start(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1023 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
1024 struct qed_ll2_info *p_ll2_conn)
1025 {
1026 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
1027 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1028 struct core_tx_start_ramrod_data *p_ramrod = NULL;
1029 struct qed_spq_entry *p_ent = NULL;
1030 struct qed_sp_init_data init_data;
1031 u16 pq_id = 0, pbl_size;
1032 int rc = -EINVAL;
1033
1034 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
1035 return 0;
1036
1037 if (likely(p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO))
1038 p_ll2_conn->tx_stats_en = 0;
1039 else
1040 p_ll2_conn->tx_stats_en = 1;
1041
1042 /* Get SPQ entry */
1043 memset(&init_data, 0, sizeof(init_data));
1044 init_data.cid = p_ll2_conn->cid;
1045 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1046 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1047
1048 rc = qed_sp_init_request(p_hwfn, &p_ent,
1049 CORE_RAMROD_TX_QUEUE_START,
1050 PROTOCOLID_CORE, &init_data);
1051 if (rc)
1052 return rc;
1053
1054 p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1055
1056 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1057 p_ramrod->sb_index = p_tx->tx_sb_index;
1058 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
1059 p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1060 p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1061
1062 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1063 qed_chain_get_pbl_phys(&p_tx->txq_chain));
1064 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1065 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1066
1067 switch (p_ll2_conn->input.tx_tc) {
1068 case PURE_LB_TC:
1069 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1070 break;
1071 case PKT_LB_TC:
1072 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
1073 break;
1074 default:
1075 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1076 break;
1077 }
1078
1079 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1080
1081 switch (conn_type) {
1082 case QED_LL2_TYPE_FCOE:
1083 p_ramrod->conn_type = PROTOCOLID_FCOE;
1084 break;
1085 case QED_LL2_TYPE_TCP_ULP:
1086 p_ramrod->conn_type = PROTOCOLID_TCP_ULP;
1087 break;
1088 case QED_LL2_TYPE_ROCE:
1089 p_ramrod->conn_type = PROTOCOLID_ROCE;
1090 break;
1091 case QED_LL2_TYPE_IWARP:
1092 p_ramrod->conn_type = PROTOCOLID_IWARP;
1093 break;
1094 case QED_LL2_TYPE_OOO:
1095 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI ||
1096 p_hwfn->hw_info.personality == QED_PCI_NVMETCP)
1097 p_ramrod->conn_type = PROTOCOLID_TCP_ULP;
1098 else
1099 p_ramrod->conn_type = PROTOCOLID_IWARP;
1100 break;
1101 default:
1102 p_ramrod->conn_type = PROTOCOLID_ETH;
1103 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1104 }
1105
1106 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1107
1108 rc = qed_spq_post(p_hwfn, p_ent, NULL);
1109 if (rc)
1110 return rc;
1111
1112 rc = qed_db_recovery_add(p_hwfn->cdev, p_tx->doorbell_addr,
1113 &p_tx->db_msg, DB_REC_WIDTH_32B,
1114 DB_REC_KERNEL);
1115 return rc;
1116 }
1117
qed_sp_ll2_rx_queue_stop(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1118 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1119 struct qed_ll2_info *p_ll2_conn)
1120 {
1121 struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1122 struct qed_spq_entry *p_ent = NULL;
1123 struct qed_sp_init_data init_data;
1124 int rc = -EINVAL;
1125
1126 /* Get SPQ entry */
1127 memset(&init_data, 0, sizeof(init_data));
1128 init_data.cid = p_ll2_conn->cid;
1129 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1130 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1131
1132 rc = qed_sp_init_request(p_hwfn, &p_ent,
1133 CORE_RAMROD_RX_QUEUE_STOP,
1134 PROTOCOLID_CORE, &init_data);
1135 if (rc)
1136 return rc;
1137
1138 p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1139
1140 p_ramrod->complete_event_flg = 1;
1141 p_ramrod->queue_id = p_ll2_conn->queue_id;
1142
1143 return qed_spq_post(p_hwfn, p_ent, NULL);
1144 }
1145
qed_sp_ll2_tx_queue_stop(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1146 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1147 struct qed_ll2_info *p_ll2_conn)
1148 {
1149 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1150 struct qed_spq_entry *p_ent = NULL;
1151 struct qed_sp_init_data init_data;
1152 int rc = -EINVAL;
1153
1154 qed_db_recovery_del(p_hwfn->cdev, p_tx->doorbell_addr, &p_tx->db_msg);
1155
1156 /* Get SPQ entry */
1157 memset(&init_data, 0, sizeof(init_data));
1158 init_data.cid = p_ll2_conn->cid;
1159 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1160 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1161
1162 rc = qed_sp_init_request(p_hwfn, &p_ent,
1163 CORE_RAMROD_TX_QUEUE_STOP,
1164 PROTOCOLID_CORE, &init_data);
1165 if (rc)
1166 return rc;
1167
1168 return qed_spq_post(p_hwfn, p_ent, NULL);
1169 }
1170
1171 static int
qed_ll2_acquire_connection_rx(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_info)1172 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
1173 struct qed_ll2_info *p_ll2_info)
1174 {
1175 struct qed_chain_init_params params = {
1176 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1177 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1178 .num_elems = p_ll2_info->input.rx_num_desc,
1179 };
1180 struct qed_dev *cdev = p_hwfn->cdev;
1181 struct qed_ll2_rx_packet *p_descq;
1182 u32 capacity;
1183 int rc = 0;
1184
1185 if (!p_ll2_info->input.rx_num_desc)
1186 goto out;
1187
1188 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1189 params.elem_size = sizeof(struct core_rx_bd);
1190
1191 rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rxq_chain, ¶ms);
1192 if (rc) {
1193 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1194 goto out;
1195 }
1196
1197 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1198 p_descq = kzalloc_objs(struct qed_ll2_rx_packet, capacity);
1199 if (!p_descq) {
1200 rc = -ENOMEM;
1201 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1202 goto out;
1203 }
1204 p_ll2_info->rx_queue.descq_array = p_descq;
1205
1206 params.mode = QED_CHAIN_MODE_PBL;
1207 params.elem_size = sizeof(struct core_rx_fast_path_cqe);
1208
1209 rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rcq_chain, ¶ms);
1210 if (rc) {
1211 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1212 goto out;
1213 }
1214
1215 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1216 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
1217 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
1218
1219 out:
1220 return rc;
1221 }
1222
qed_ll2_acquire_connection_tx(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_info)1223 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
1224 struct qed_ll2_info *p_ll2_info)
1225 {
1226 struct qed_chain_init_params params = {
1227 .mode = QED_CHAIN_MODE_PBL,
1228 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1229 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1230 .num_elems = p_ll2_info->input.tx_num_desc,
1231 .elem_size = sizeof(struct core_tx_bd),
1232 };
1233 struct qed_ll2_tx_packet *p_descq;
1234 size_t desc_size;
1235 u32 capacity;
1236 int rc = 0;
1237
1238 if (!p_ll2_info->input.tx_num_desc)
1239 goto out;
1240
1241 rc = qed_chain_alloc(p_hwfn->cdev, &p_ll2_info->tx_queue.txq_chain,
1242 ¶ms);
1243 if (rc)
1244 goto out;
1245
1246 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1247 /* All bds_set elements are flexibily added. */
1248 desc_size = struct_size(p_descq, bds_set,
1249 p_ll2_info->input.tx_max_bds_per_packet);
1250
1251 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
1252 if (!p_descq) {
1253 rc = -ENOMEM;
1254 goto out;
1255 }
1256 p_ll2_info->tx_queue.descq_mem = p_descq;
1257
1258 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1259 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
1260 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
1261
1262 out:
1263 if (rc)
1264 DP_NOTICE(p_hwfn,
1265 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
1266 p_ll2_info->input.tx_num_desc);
1267 return rc;
1268 }
1269
1270 static int
qed_ll2_acquire_connection_ooo(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_info,u16 mtu)1271 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1272 struct qed_ll2_info *p_ll2_info, u16 mtu)
1273 {
1274 struct qed_ooo_buffer *p_buf = NULL;
1275 void *p_virt;
1276 u16 buf_idx;
1277 int rc = 0;
1278
1279 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
1280 return rc;
1281
1282 /* Correct number of requested OOO buffers if needed */
1283 if (!p_ll2_info->input.rx_num_ooo_buffers) {
1284 u16 num_desc = p_ll2_info->input.rx_num_desc;
1285
1286 if (!num_desc)
1287 return -EINVAL;
1288 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1289 }
1290
1291 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1292 buf_idx++) {
1293 p_buf = kzalloc_obj(*p_buf);
1294 if (!p_buf) {
1295 rc = -ENOMEM;
1296 goto out;
1297 }
1298
1299 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1300 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1301 ETH_CACHE_LINE_SIZE - 1) &
1302 ~(ETH_CACHE_LINE_SIZE - 1);
1303 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1304 p_buf->rx_buffer_size,
1305 &p_buf->rx_buffer_phys_addr,
1306 GFP_KERNEL);
1307 if (!p_virt) {
1308 kfree(p_buf);
1309 rc = -ENOMEM;
1310 goto out;
1311 }
1312
1313 p_buf->rx_buffer_virt_addr = p_virt;
1314 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1315 }
1316
1317 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1318 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1319 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1320
1321 out:
1322 return rc;
1323 }
1324
1325 static int
qed_ll2_set_cbs(struct qed_ll2_info * p_ll2_info,const struct qed_ll2_cbs * cbs)1326 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1327 {
1328 if (!cbs || (!cbs->rx_comp_cb ||
1329 !cbs->rx_release_cb ||
1330 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1331 return -EINVAL;
1332
1333 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1334 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1335 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1336 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1337 p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
1338 p_ll2_info->cbs.cookie = cbs->cookie;
1339
1340 return 0;
1341 }
1342
_qed_ll2_calc_allowed_conns(struct qed_hwfn * p_hwfn,struct qed_ll2_acquire_data * data,u8 * start_idx,u8 * last_idx)1343 static void _qed_ll2_calc_allowed_conns(struct qed_hwfn *p_hwfn,
1344 struct qed_ll2_acquire_data *data,
1345 u8 *start_idx, u8 *last_idx)
1346 {
1347 /* LL2 queues handles will be split as follows:
1348 * First will be the legacy queues, and then the ctx based.
1349 */
1350 if (data->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1351 *start_idx = QED_LL2_LEGACY_CONN_BASE_PF;
1352 *last_idx = *start_idx +
1353 QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF;
1354 } else {
1355 /* QED_LL2_RX_TYPE_CTX */
1356 *start_idx = QED_LL2_CTX_CONN_BASE_PF;
1357 *last_idx = *start_idx +
1358 QED_MAX_NUM_OF_CTX_LL2_CONNS_PF;
1359 }
1360 }
1361
1362 static enum core_error_handle
qed_ll2_get_error_choice(enum qed_ll2_error_handle err)1363 qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1364 {
1365 switch (err) {
1366 case QED_LL2_DROP_PACKET:
1367 return LL2_DROP_PACKET;
1368 case QED_LL2_DO_NOTHING:
1369 return LL2_DO_NOTHING;
1370 case QED_LL2_ASSERT:
1371 return LL2_ASSERT;
1372 default:
1373 return LL2_DO_NOTHING;
1374 }
1375 }
1376
qed_ll2_acquire_connection(void * cxt,struct qed_ll2_acquire_data * data)1377 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
1378 {
1379 struct qed_hwfn *p_hwfn = cxt;
1380 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1381 struct qed_ll2_info *p_ll2_info = NULL;
1382 u8 i, first_idx, last_idx, *p_tx_max;
1383 int rc;
1384
1385 if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
1386 return -EINVAL;
1387
1388 _qed_ll2_calc_allowed_conns(p_hwfn, data, &first_idx, &last_idx);
1389
1390 /* Find a free connection to be used */
1391 for (i = first_idx; i < last_idx; i++) {
1392 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1393 if (p_hwfn->p_ll2_info[i].b_active) {
1394 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1395 continue;
1396 }
1397
1398 p_hwfn->p_ll2_info[i].b_active = true;
1399 p_ll2_info = &p_hwfn->p_ll2_info[i];
1400 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1401 break;
1402 }
1403 if (!p_ll2_info)
1404 return -EBUSY;
1405
1406 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
1407
1408 switch (data->input.tx_dest) {
1409 case QED_LL2_TX_DEST_NW:
1410 p_ll2_info->tx_dest = CORE_TX_DEST_NW;
1411 break;
1412 case QED_LL2_TX_DEST_LB:
1413 p_ll2_info->tx_dest = CORE_TX_DEST_LB;
1414 break;
1415 case QED_LL2_TX_DEST_DROP:
1416 p_ll2_info->tx_dest = CORE_TX_DEST_DROP;
1417 break;
1418 default:
1419 return -EINVAL;
1420 }
1421
1422 if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1423 data->input.secondary_queue)
1424 p_ll2_info->main_func_queue = false;
1425 else
1426 p_ll2_info->main_func_queue = true;
1427
1428 /* Correct maximum number of Tx BDs */
1429 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1430 if (*p_tx_max == 0)
1431 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1432 else
1433 *p_tx_max = min_t(u8, *p_tx_max,
1434 CORE_LL2_TX_MAX_BDS_PER_PACKET);
1435
1436 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1437 if (rc) {
1438 DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1439 goto q_allocate_fail;
1440 }
1441
1442 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
1443 if (rc)
1444 goto q_allocate_fail;
1445
1446 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
1447 if (rc)
1448 goto q_allocate_fail;
1449
1450 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
1451 data->input.mtu);
1452 if (rc)
1453 goto q_allocate_fail;
1454
1455 /* Register callbacks for the Rx/Tx queues */
1456 if (data->input.conn_type == QED_LL2_TYPE_OOO) {
1457 comp_rx_cb = qed_ll2_lb_rxq_completion;
1458 comp_tx_cb = qed_ll2_lb_txq_completion;
1459 } else {
1460 comp_rx_cb = qed_ll2_rxq_completion;
1461 comp_tx_cb = qed_ll2_txq_completion;
1462 }
1463
1464 if (data->input.rx_num_desc) {
1465 qed_int_register_cb(p_hwfn, comp_rx_cb,
1466 &p_hwfn->p_ll2_info[i],
1467 &p_ll2_info->rx_queue.rx_sb_index,
1468 &p_ll2_info->rx_queue.p_fw_cons);
1469 p_ll2_info->rx_queue.b_cb_registered = true;
1470 }
1471
1472 if (data->input.tx_num_desc) {
1473 qed_int_register_cb(p_hwfn,
1474 comp_tx_cb,
1475 &p_hwfn->p_ll2_info[i],
1476 &p_ll2_info->tx_queue.tx_sb_index,
1477 &p_ll2_info->tx_queue.p_fw_cons);
1478 p_ll2_info->tx_queue.b_cb_registered = true;
1479 }
1480
1481 *data->p_connection_handle = i;
1482 return rc;
1483
1484 q_allocate_fail:
1485 qed_ll2_release_connection(p_hwfn, i);
1486 return -ENOMEM;
1487 }
1488
qed_ll2_establish_connection_rx(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1489 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1490 struct qed_ll2_info *p_ll2_conn)
1491 {
1492 enum qed_ll2_error_handle error_input;
1493 enum core_error_handle error_mode;
1494 u8 action_on_error = 0;
1495 int rc;
1496
1497 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1498 return 0;
1499
1500 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
1501 error_input = p_ll2_conn->input.ai_err_packet_too_big;
1502 error_mode = qed_ll2_get_error_choice(error_input);
1503 SET_FIELD(action_on_error,
1504 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1505 error_input = p_ll2_conn->input.ai_err_no_buf;
1506 error_mode = qed_ll2_get_error_choice(error_input);
1507 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
1508
1509 rc = qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1510 if (rc)
1511 return rc;
1512
1513 if (p_ll2_conn->rx_queue.ctx_based) {
1514 rc = qed_db_recovery_add(p_hwfn->cdev,
1515 p_ll2_conn->rx_queue.set_prod_addr,
1516 &p_ll2_conn->rx_queue.db_data,
1517 DB_REC_WIDTH_64B, DB_REC_KERNEL);
1518 }
1519
1520 return rc;
1521 }
1522
1523 static void
qed_ll2_establish_connection_ooo(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1524 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1525 struct qed_ll2_info *p_ll2_conn)
1526 {
1527 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
1528 return;
1529
1530 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1531 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1532 }
1533
qed_ll2_handle_to_queue_id(struct qed_hwfn * p_hwfn,u8 handle,u8 ll2_queue_type)1534 static inline u8 qed_ll2_handle_to_queue_id(struct qed_hwfn *p_hwfn,
1535 u8 handle,
1536 u8 ll2_queue_type)
1537 {
1538 u8 qid;
1539
1540 if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
1541 return p_hwfn->hw_info.resc_start[QED_LL2_RAM_QUEUE] + handle;
1542
1543 /* QED_LL2_RX_TYPE_CTX
1544 * FW distinguishes between the legacy queues (ram based) and the
1545 * ctx based queues by the queue_id.
1546 * The first MAX_NUM_LL2_RX_RAM_QUEUES queues are legacy
1547 * and the queue ids above that are ctx base.
1548 */
1549 qid = p_hwfn->hw_info.resc_start[QED_LL2_CTX_QUEUE] +
1550 MAX_NUM_LL2_RX_RAM_QUEUES;
1551
1552 /* See comment on the acquire connection for how the ll2
1553 * queues handles are divided.
1554 */
1555 qid += (handle - QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF);
1556
1557 return qid;
1558 }
1559
qed_ll2_establish_connection(void * cxt,u8 connection_handle)1560 int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
1561 {
1562 struct core_conn_context *p_cxt;
1563 struct qed_ll2_tx_packet *p_pkt;
1564 struct qed_ll2_info *p_ll2_conn;
1565 struct qed_hwfn *p_hwfn = cxt;
1566 struct qed_ll2_rx_queue *p_rx;
1567 struct qed_ll2_tx_queue *p_tx;
1568 struct qed_cxt_info cxt_info;
1569 struct qed_ptt *p_ptt;
1570 int rc = -EINVAL;
1571 u32 i, capacity;
1572 size_t desc_size;
1573 u8 qid, stats_id;
1574
1575 p_ptt = qed_ptt_acquire(p_hwfn);
1576 if (!p_ptt)
1577 return -EAGAIN;
1578
1579 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1580 if (!p_ll2_conn) {
1581 rc = -EINVAL;
1582 goto out;
1583 }
1584
1585 p_rx = &p_ll2_conn->rx_queue;
1586 p_tx = &p_ll2_conn->tx_queue;
1587
1588 qed_chain_reset(&p_rx->rxq_chain);
1589 qed_chain_reset(&p_rx->rcq_chain);
1590 INIT_LIST_HEAD(&p_rx->active_descq);
1591 INIT_LIST_HEAD(&p_rx->free_descq);
1592 INIT_LIST_HEAD(&p_rx->posting_descq);
1593 spin_lock_init(&p_rx->lock);
1594 capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1595 for (i = 0; i < capacity; i++)
1596 list_add_tail(&p_rx->descq_array[i].list_entry,
1597 &p_rx->free_descq);
1598 *p_rx->p_fw_cons = 0;
1599
1600 qed_chain_reset(&p_tx->txq_chain);
1601 INIT_LIST_HEAD(&p_tx->active_descq);
1602 INIT_LIST_HEAD(&p_tx->free_descq);
1603 INIT_LIST_HEAD(&p_tx->sending_descq);
1604 spin_lock_init(&p_tx->lock);
1605 capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1606 /* All bds_set elements are flexibily added. */
1607 desc_size = struct_size(p_pkt, bds_set,
1608 p_ll2_conn->input.tx_max_bds_per_packet);
1609
1610 for (i = 0; i < capacity; i++) {
1611 p_pkt = p_tx->descq_mem + desc_size * i;
1612 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1613 }
1614 p_tx->cur_completing_bd_idx = 0;
1615 p_tx->bds_idx = 0;
1616 p_tx->b_completing_packet = false;
1617 p_tx->cur_send_packet = NULL;
1618 p_tx->cur_send_frag_num = 0;
1619 p_tx->cur_completing_frag_num = 0;
1620 *p_tx->p_fw_cons = 0;
1621
1622 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1623 if (rc)
1624 goto out;
1625 cxt_info.iid = p_ll2_conn->cid;
1626 rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
1627 if (rc) {
1628 DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
1629 p_ll2_conn->cid);
1630 goto out;
1631 }
1632
1633 p_cxt = cxt_info.p_cxt;
1634
1635 memset(p_cxt, 0, sizeof(*p_cxt));
1636
1637 qid = qed_ll2_handle_to_queue_id(p_hwfn, connection_handle,
1638 p_ll2_conn->input.rx_conn_type);
1639 stats_id = qed_ll2_handle_to_stats_id(p_hwfn,
1640 p_ll2_conn->input.rx_conn_type,
1641 qid);
1642 p_ll2_conn->queue_id = qid;
1643 p_ll2_conn->tx_stats_id = stats_id;
1644
1645 /* If there is no valid stats id for this connection, disable stats */
1646 if (p_ll2_conn->tx_stats_id == QED_LL2_INVALID_STATS_ID) {
1647 p_ll2_conn->tx_stats_en = 0;
1648 DP_VERBOSE(p_hwfn,
1649 QED_MSG_LL2,
1650 "Disabling stats for queue %d - not enough counters\n",
1651 qid);
1652 }
1653
1654 DP_VERBOSE(p_hwfn,
1655 QED_MSG_LL2,
1656 "Establishing ll2 queue. PF %d ctx_based=%d abs qid=%d stats_id=%d\n",
1657 p_hwfn->rel_pf_id,
1658 p_ll2_conn->input.rx_conn_type, qid, stats_id);
1659
1660 if (p_ll2_conn->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1661 p_rx->set_prod_addr =
1662 (u8 __iomem *)p_hwfn->regview +
1663 GET_GTT_REG_ADDR(GTT_BAR0_MAP_REG_TSDM_RAM,
1664 TSTORM_LL2_RX_PRODS, qid);
1665 } else {
1666 /* QED_LL2_RX_TYPE_CTX - using doorbell */
1667 p_rx->ctx_based = 1;
1668
1669 p_rx->set_prod_addr = p_hwfn->doorbells +
1670 p_hwfn->dpi_start_offset +
1671 DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_LL2_PROD_UPDATE);
1672
1673 /* prepare db data */
1674 p_rx->db_data.icid = cpu_to_le16((u16)p_ll2_conn->cid);
1675 SET_FIELD(p_rx->db_data.params,
1676 CORE_PWM_PROD_UPDATE_DATA_AGG_CMD, DB_AGG_CMD_SET);
1677 SET_FIELD(p_rx->db_data.params,
1678 CORE_PWM_PROD_UPDATE_DATA_RESERVED1, 0);
1679 }
1680
1681 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1682 qed_db_addr(p_ll2_conn->cid,
1683 DQ_DEMS_LEGACY);
1684 /* prepare db data */
1685 SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1686 SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1687 SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1688 DQ_XCM_CORE_TX_BD_PROD_CMD);
1689 p_tx->db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1690
1691 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1692 if (rc)
1693 goto out;
1694
1695 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1696 if (rc)
1697 goto out;
1698
1699 if (!QED_IS_RDMA_PERSONALITY(p_hwfn) &&
1700 !QED_IS_NVMETCP_PERSONALITY(p_hwfn))
1701 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
1702
1703 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1704
1705 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
1706 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
1707 qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1708 QED_LLH_FILTER_ETHERTYPE,
1709 ETH_P_FCOE, 0);
1710 qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1711 QED_LLH_FILTER_ETHERTYPE,
1712 ETH_P_FIP, 0);
1713 }
1714
1715 out:
1716 qed_ptt_release(p_hwfn, p_ptt);
1717 return rc;
1718 }
1719
qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn * p_hwfn,struct qed_ll2_rx_queue * p_rx,struct qed_ll2_rx_packet * p_curp)1720 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1721 struct qed_ll2_rx_queue *p_rx,
1722 struct qed_ll2_rx_packet *p_curp)
1723 {
1724 struct qed_ll2_rx_packet *p_posting_packet = NULL;
1725 struct core_ll2_rx_prod rx_prod = { 0, 0 };
1726 bool b_notify_fw = false;
1727 u16 bd_prod, cq_prod;
1728
1729 /* This handles the flushing of already posted buffers */
1730 while (!list_empty(&p_rx->posting_descq)) {
1731 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1732 struct qed_ll2_rx_packet,
1733 list_entry);
1734 list_move_tail(&p_posting_packet->list_entry,
1735 &p_rx->active_descq);
1736 b_notify_fw = true;
1737 }
1738
1739 /* This handles the supplied packet [if there is one] */
1740 if (p_curp) {
1741 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1742 b_notify_fw = true;
1743 }
1744
1745 if (!b_notify_fw)
1746 return;
1747
1748 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1749 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1750 if (p_rx->ctx_based) {
1751 /* update producer by giving a doorbell */
1752 p_rx->db_data.prod.bd_prod = cpu_to_le16(bd_prod);
1753 p_rx->db_data.prod.cqe_prod = cpu_to_le16(cq_prod);
1754 /* Make sure chain element is updated before ringing the
1755 * doorbell
1756 */
1757 dma_wmb();
1758 DIRECT_REG_WR64(p_rx->set_prod_addr,
1759 *((u64 *)&p_rx->db_data));
1760 } else {
1761 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1762 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1763
1764 /* Make sure chain element is updated before ringing the
1765 * doorbell
1766 */
1767 dma_wmb();
1768
1769 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1770 }
1771 }
1772
qed_ll2_post_rx_buffer(void * cxt,u8 connection_handle,dma_addr_t addr,u16 buf_len,void * cookie,u8 notify_fw)1773 int qed_ll2_post_rx_buffer(void *cxt,
1774 u8 connection_handle,
1775 dma_addr_t addr,
1776 u16 buf_len, void *cookie, u8 notify_fw)
1777 {
1778 struct qed_hwfn *p_hwfn = cxt;
1779 struct core_rx_bd_with_buff_len *p_curb = NULL;
1780 struct qed_ll2_rx_packet *p_curp = NULL;
1781 struct qed_ll2_info *p_ll2_conn;
1782 struct qed_ll2_rx_queue *p_rx;
1783 unsigned long flags;
1784 void *p_data;
1785 int rc = 0;
1786
1787 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1788 if (!p_ll2_conn)
1789 return -EINVAL;
1790 p_rx = &p_ll2_conn->rx_queue;
1791 if (!p_rx->set_prod_addr)
1792 return -EIO;
1793
1794 spin_lock_irqsave(&p_rx->lock, flags);
1795 if (!list_empty(&p_rx->free_descq))
1796 p_curp = list_first_entry(&p_rx->free_descq,
1797 struct qed_ll2_rx_packet, list_entry);
1798 if (p_curp) {
1799 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1800 qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1801 p_data = qed_chain_produce(&p_rx->rxq_chain);
1802 p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1803 qed_chain_produce(&p_rx->rcq_chain);
1804 }
1805 }
1806
1807 /* If we're lacking entries, let's try to flush buffers to FW */
1808 if (!p_curp || !p_curb) {
1809 rc = -EBUSY;
1810 p_curp = NULL;
1811 goto out_notify;
1812 }
1813
1814 /* We have an Rx packet we can fill */
1815 DMA_REGPAIR_LE(p_curb->addr, addr);
1816 p_curb->buff_length = cpu_to_le16(buf_len);
1817 p_curp->rx_buf_addr = addr;
1818 p_curp->cookie = cookie;
1819 p_curp->rxq_bd = p_curb;
1820 p_curp->buf_length = buf_len;
1821 list_del(&p_curp->list_entry);
1822
1823 /* Check if we only want to enqueue this packet without informing FW */
1824 if (!notify_fw) {
1825 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1826 goto out;
1827 }
1828
1829 out_notify:
1830 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1831 out:
1832 spin_unlock_irqrestore(&p_rx->lock, flags);
1833 return rc;
1834 }
1835
qed_ll2_prepare_tx_packet_set(struct qed_hwfn * p_hwfn,struct qed_ll2_tx_queue * p_tx,struct qed_ll2_tx_packet * p_curp,struct qed_ll2_tx_pkt_info * pkt,u8 notify_fw)1836 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1837 struct qed_ll2_tx_queue *p_tx,
1838 struct qed_ll2_tx_packet *p_curp,
1839 struct qed_ll2_tx_pkt_info *pkt,
1840 u8 notify_fw)
1841 {
1842 list_del(&p_curp->list_entry);
1843 p_curp->cookie = pkt->cookie;
1844 p_curp->bd_used = pkt->num_of_bds;
1845 p_curp->notify_fw = notify_fw;
1846 p_tx->cur_send_packet = p_curp;
1847 p_tx->cur_send_frag_num = 0;
1848
1849 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1850 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
1851 p_tx->cur_send_frag_num++;
1852 }
1853
1854 static void
qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2,struct qed_ll2_tx_packet * p_curp,struct qed_ll2_tx_pkt_info * pkt)1855 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1856 struct qed_ll2_info *p_ll2,
1857 struct qed_ll2_tx_packet *p_curp,
1858 struct qed_ll2_tx_pkt_info *pkt)
1859 {
1860 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1861 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1862 struct core_tx_bd *start_bd = NULL;
1863 enum core_roce_flavor_type roce_flavor;
1864 enum core_tx_dest tx_dest;
1865 u16 bd_data = 0, frag_idx;
1866 u16 bitfield1;
1867
1868 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1869 : CORE_RROCE;
1870
1871 switch (pkt->tx_dest) {
1872 case QED_LL2_TX_DEST_NW:
1873 tx_dest = CORE_TX_DEST_NW;
1874 break;
1875 case QED_LL2_TX_DEST_LB:
1876 tx_dest = CORE_TX_DEST_LB;
1877 break;
1878 case QED_LL2_TX_DEST_DROP:
1879 tx_dest = CORE_TX_DEST_DROP;
1880 break;
1881 default:
1882 tx_dest = CORE_TX_DEST_LB;
1883 break;
1884 }
1885
1886 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1887 if (likely(QED_IS_IWARP_PERSONALITY(p_hwfn) &&
1888 p_ll2->input.conn_type == QED_LL2_TYPE_OOO)) {
1889 start_bd->nw_vlan_or_lb_echo =
1890 cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
1891 } else {
1892 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
1893 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1894 p_ll2->input.conn_type == QED_LL2_TYPE_FCOE)
1895 pkt->remove_stag = true;
1896 }
1897
1898 bitfield1 = le16_to_cpu(start_bd->bitfield1);
1899 SET_FIELD(bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, pkt->l4_hdr_offset_w);
1900 SET_FIELD(bitfield1, CORE_TX_BD_TX_DST, tx_dest);
1901 start_bd->bitfield1 = cpu_to_le16(bitfield1);
1902
1903 bd_data |= pkt->bd_flags;
1904 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
1905 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
1906 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1907 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1908 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1909 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
1910 SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION,
1911 !!(pkt->remove_stag));
1912
1913 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
1914 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1915 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
1916
1917 DP_VERBOSE(p_hwfn,
1918 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1919 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1920 p_ll2->queue_id,
1921 p_ll2->cid,
1922 p_ll2->input.conn_type,
1923 prod_idx,
1924 pkt->first_frag_len,
1925 pkt->num_of_bds,
1926 le32_to_cpu(start_bd->addr.hi),
1927 le32_to_cpu(start_bd->addr.lo));
1928
1929 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
1930 return;
1931
1932 /* Need to provide the packet with additional BDs for frags */
1933 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
1934 frag_idx < pkt->num_of_bds; frag_idx++) {
1935 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1936
1937 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1938 (*p_bd)->bd_data.as_bitfield = 0;
1939 (*p_bd)->bitfield1 = 0;
1940 p_curp->bds_set[frag_idx].tx_frag = 0;
1941 p_curp->bds_set[frag_idx].frag_len = 0;
1942 }
1943 }
1944
1945 /* This should be called while the Txq spinlock is being held */
qed_ll2_tx_packet_notify(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)1946 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1947 struct qed_ll2_info *p_ll2_conn)
1948 {
1949 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1950 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1951 struct qed_ll2_tx_packet *p_pkt = NULL;
1952 u16 bd_prod;
1953
1954 /* If there are missing BDs, don't do anything now */
1955 if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1956 p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1957 return;
1958
1959 /* Push the current packet to the list and clean after it */
1960 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1961 &p_ll2_conn->tx_queue.sending_descq);
1962 p_ll2_conn->tx_queue.cur_send_packet = NULL;
1963 p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1964
1965 /* Notify FW of packet only if requested to */
1966 if (!b_notify)
1967 return;
1968
1969 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1970
1971 while (!list_empty(&p_tx->sending_descq)) {
1972 p_pkt = list_first_entry(&p_tx->sending_descq,
1973 struct qed_ll2_tx_packet, list_entry);
1974 if (!p_pkt)
1975 break;
1976
1977 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
1978 }
1979
1980 p_tx->db_msg.spq_prod = cpu_to_le16(bd_prod);
1981
1982 /* Make sure the BDs data is updated before ringing the doorbell */
1983 wmb();
1984
1985 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&p_tx->db_msg));
1986
1987 DP_VERBOSE(p_hwfn,
1988 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1989 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1990 p_ll2_conn->queue_id,
1991 p_ll2_conn->cid,
1992 p_ll2_conn->input.conn_type, p_tx->db_msg.spq_prod);
1993 }
1994
qed_ll2_prepare_tx_packet(void * cxt,u8 connection_handle,struct qed_ll2_tx_pkt_info * pkt,bool notify_fw)1995 int qed_ll2_prepare_tx_packet(void *cxt,
1996 u8 connection_handle,
1997 struct qed_ll2_tx_pkt_info *pkt,
1998 bool notify_fw)
1999 {
2000 struct qed_hwfn *p_hwfn = cxt;
2001 struct qed_ll2_tx_packet *p_curp = NULL;
2002 struct qed_ll2_info *p_ll2_conn = NULL;
2003 struct qed_ll2_tx_queue *p_tx;
2004 struct qed_chain *p_tx_chain;
2005 unsigned long flags;
2006 int rc = 0;
2007
2008 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2009 if (unlikely(!p_ll2_conn))
2010 return -EINVAL;
2011 p_tx = &p_ll2_conn->tx_queue;
2012 p_tx_chain = &p_tx->txq_chain;
2013
2014 if (unlikely(pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet))
2015 return -EIO;
2016
2017 spin_lock_irqsave(&p_tx->lock, flags);
2018 if (unlikely(p_tx->cur_send_packet)) {
2019 rc = -EEXIST;
2020 goto out;
2021 }
2022
2023 /* Get entry, but only if we have tx elements for it */
2024 if (unlikely(!list_empty(&p_tx->free_descq)))
2025 p_curp = list_first_entry(&p_tx->free_descq,
2026 struct qed_ll2_tx_packet, list_entry);
2027 if (unlikely(p_curp &&
2028 qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds))
2029 p_curp = NULL;
2030
2031 if (unlikely(!p_curp)) {
2032 rc = -EBUSY;
2033 goto out;
2034 }
2035
2036 /* Prepare packet and BD, and perhaps send a doorbell to FW */
2037 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
2038
2039 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
2040
2041 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2042
2043 out:
2044 spin_unlock_irqrestore(&p_tx->lock, flags);
2045 return rc;
2046 }
2047
qed_ll2_set_fragment_of_tx_packet(void * cxt,u8 connection_handle,dma_addr_t addr,u16 nbytes)2048 int qed_ll2_set_fragment_of_tx_packet(void *cxt,
2049 u8 connection_handle,
2050 dma_addr_t addr, u16 nbytes)
2051 {
2052 struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
2053 struct qed_hwfn *p_hwfn = cxt;
2054 struct qed_ll2_info *p_ll2_conn = NULL;
2055 u16 cur_send_frag_num = 0;
2056 struct core_tx_bd *p_bd;
2057 unsigned long flags;
2058
2059 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2060 if (unlikely(!p_ll2_conn))
2061 return -EINVAL;
2062
2063 if (unlikely(!p_ll2_conn->tx_queue.cur_send_packet))
2064 return -EINVAL;
2065
2066 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
2067 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
2068
2069 if (unlikely(cur_send_frag_num >= p_cur_send_packet->bd_used))
2070 return -EINVAL;
2071
2072 /* Fill the BD information, and possibly notify FW */
2073 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
2074 DMA_REGPAIR_LE(p_bd->addr, addr);
2075 p_bd->nbytes = cpu_to_le16(nbytes);
2076 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
2077 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
2078
2079 p_ll2_conn->tx_queue.cur_send_frag_num++;
2080
2081 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
2082 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2083 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
2084
2085 return 0;
2086 }
2087
qed_ll2_terminate_connection(void * cxt,u8 connection_handle)2088 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
2089 {
2090 struct qed_hwfn *p_hwfn = cxt;
2091 struct qed_ll2_info *p_ll2_conn = NULL;
2092 int rc = -EINVAL;
2093 struct qed_ptt *p_ptt;
2094
2095 p_ptt = qed_ptt_acquire(p_hwfn);
2096 if (!p_ptt)
2097 return -EAGAIN;
2098
2099 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
2100 if (!p_ll2_conn) {
2101 rc = -EINVAL;
2102 goto out;
2103 }
2104
2105 /* Stop Tx & Rx of connection, if needed */
2106 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
2107 p_ll2_conn->tx_queue.b_cb_registered = false;
2108 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2109 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
2110 if (rc)
2111 goto out;
2112
2113 qed_ll2_txq_flush(p_hwfn, connection_handle);
2114 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
2115 }
2116
2117 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
2118 p_ll2_conn->rx_queue.b_cb_registered = false;
2119 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2120
2121 if (p_ll2_conn->rx_queue.ctx_based)
2122 qed_db_recovery_del(p_hwfn->cdev,
2123 p_ll2_conn->rx_queue.set_prod_addr,
2124 &p_ll2_conn->rx_queue.db_data);
2125
2126 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
2127 if (rc)
2128 goto out;
2129
2130 qed_ll2_rxq_flush(p_hwfn, connection_handle);
2131 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
2132 }
2133
2134 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
2135 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2136
2137 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
2138 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
2139 qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2140 QED_LLH_FILTER_ETHERTYPE,
2141 ETH_P_FCOE, 0);
2142 qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2143 QED_LLH_FILTER_ETHERTYPE,
2144 ETH_P_FIP, 0);
2145 }
2146
2147 out:
2148 qed_ptt_release(p_hwfn, p_ptt);
2149 return rc;
2150 }
2151
qed_ll2_release_connection_ooo(struct qed_hwfn * p_hwfn,struct qed_ll2_info * p_ll2_conn)2152 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
2153 struct qed_ll2_info *p_ll2_conn)
2154 {
2155 struct qed_ooo_buffer *p_buffer;
2156
2157 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
2158 return;
2159
2160 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2161 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
2162 p_hwfn->p_ooo_info))) {
2163 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
2164 p_buffer->rx_buffer_size,
2165 p_buffer->rx_buffer_virt_addr,
2166 p_buffer->rx_buffer_phys_addr);
2167 kfree(p_buffer);
2168 }
2169 }
2170
qed_ll2_release_connection(void * cxt,u8 connection_handle)2171 void qed_ll2_release_connection(void *cxt, u8 connection_handle)
2172 {
2173 struct qed_hwfn *p_hwfn = cxt;
2174 struct qed_ll2_info *p_ll2_conn = NULL;
2175
2176 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2177 if (!p_ll2_conn)
2178 return;
2179
2180 kfree(p_ll2_conn->tx_queue.descq_mem);
2181 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
2182
2183 kfree(p_ll2_conn->rx_queue.descq_array);
2184 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
2185 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
2186
2187 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
2188
2189 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
2190
2191 mutex_lock(&p_ll2_conn->mutex);
2192 p_ll2_conn->b_active = false;
2193 mutex_unlock(&p_ll2_conn->mutex);
2194 }
2195
qed_ll2_alloc(struct qed_hwfn * p_hwfn)2196 int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
2197 {
2198 struct qed_ll2_info *p_ll2_connections;
2199 u8 i;
2200
2201 /* Allocate LL2's set struct */
2202 p_ll2_connections = kzalloc_objs(struct qed_ll2_info,
2203 QED_MAX_NUM_OF_LL2_CONNECTIONS);
2204 if (!p_ll2_connections) {
2205 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
2206 return -ENOMEM;
2207 }
2208
2209 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2210 p_ll2_connections[i].my_id = i;
2211
2212 p_hwfn->p_ll2_info = p_ll2_connections;
2213 return 0;
2214 }
2215
qed_ll2_setup(struct qed_hwfn * p_hwfn)2216 void qed_ll2_setup(struct qed_hwfn *p_hwfn)
2217 {
2218 int i;
2219
2220 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2221 mutex_init(&p_hwfn->p_ll2_info[i].mutex);
2222 }
2223
qed_ll2_free(struct qed_hwfn * p_hwfn)2224 void qed_ll2_free(struct qed_hwfn *p_hwfn)
2225 {
2226 if (!p_hwfn->p_ll2_info)
2227 return;
2228
2229 kfree(p_hwfn->p_ll2_info);
2230 p_hwfn->p_ll2_info = NULL;
2231 }
2232
_qed_ll2_get_port_stats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_ll2_stats * p_stats)2233 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
2234 struct qed_ptt *p_ptt,
2235 struct qed_ll2_stats *p_stats)
2236 {
2237 struct core_ll2_port_stats port_stats;
2238
2239 memset(&port_stats, 0, sizeof(port_stats));
2240 qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
2241 BAR0_MAP_REG_TSDM_RAM +
2242 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
2243 sizeof(port_stats));
2244
2245 p_stats->gsi_invalid_hdr += HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
2246 p_stats->gsi_invalid_pkt_length +=
2247 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
2248 p_stats->gsi_unsupported_pkt_typ +=
2249 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
2250 p_stats->gsi_crcchksm_error +=
2251 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
2252 }
2253
_qed_ll2_get_tstats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_ll2_info * p_ll2_conn,struct qed_ll2_stats * p_stats)2254 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
2255 struct qed_ptt *p_ptt,
2256 struct qed_ll2_info *p_ll2_conn,
2257 struct qed_ll2_stats *p_stats)
2258 {
2259 struct core_ll2_tstorm_per_queue_stat tstats;
2260 u8 qid = p_ll2_conn->queue_id;
2261 u32 tstats_addr;
2262
2263 memset(&tstats, 0, sizeof(tstats));
2264 tstats_addr = BAR0_MAP_REG_TSDM_RAM +
2265 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
2266 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
2267
2268 p_stats->packet_too_big_discard +=
2269 HILO_64_REGPAIR(tstats.packet_too_big_discard);
2270 p_stats->no_buff_discard += HILO_64_REGPAIR(tstats.no_buff_discard);
2271 }
2272
_qed_ll2_get_ustats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_ll2_info * p_ll2_conn,struct qed_ll2_stats * p_stats)2273 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
2274 struct qed_ptt *p_ptt,
2275 struct qed_ll2_info *p_ll2_conn,
2276 struct qed_ll2_stats *p_stats)
2277 {
2278 struct core_ll2_ustorm_per_queue_stat ustats;
2279 u8 qid = p_ll2_conn->queue_id;
2280 u32 ustats_addr;
2281
2282 memset(&ustats, 0, sizeof(ustats));
2283 ustats_addr = BAR0_MAP_REG_USDM_RAM +
2284 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
2285 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2286
2287 p_stats->rcv_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2288 p_stats->rcv_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2289 p_stats->rcv_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2290 p_stats->rcv_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2291 p_stats->rcv_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2292 p_stats->rcv_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2293 }
2294
_qed_ll2_get_pstats(struct qed_hwfn * p_hwfn,struct qed_ptt * p_ptt,struct qed_ll2_info * p_ll2_conn,struct qed_ll2_stats * p_stats)2295 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2296 struct qed_ptt *p_ptt,
2297 struct qed_ll2_info *p_ll2_conn,
2298 struct qed_ll2_stats *p_stats)
2299 {
2300 struct core_ll2_pstorm_per_queue_stat pstats;
2301 u8 stats_id = p_ll2_conn->tx_stats_id;
2302 u32 pstats_addr;
2303
2304 memset(&pstats, 0, sizeof(pstats));
2305 pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2306 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2307 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2308
2309 p_stats->sent_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2310 p_stats->sent_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2311 p_stats->sent_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2312 p_stats->sent_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2313 p_stats->sent_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2314 p_stats->sent_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2315 }
2316
__qed_ll2_get_stats(void * cxt,u8 connection_handle,struct qed_ll2_stats * p_stats)2317 static int __qed_ll2_get_stats(void *cxt, u8 connection_handle,
2318 struct qed_ll2_stats *p_stats)
2319 {
2320 struct qed_hwfn *p_hwfn = cxt;
2321 struct qed_ll2_info *p_ll2_conn = NULL;
2322 struct qed_ptt *p_ptt;
2323
2324 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2325 !p_hwfn->p_ll2_info)
2326 return -EINVAL;
2327
2328 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2329
2330 p_ptt = qed_ptt_acquire(p_hwfn);
2331 if (!p_ptt) {
2332 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2333 return -EINVAL;
2334 }
2335
2336 if (p_ll2_conn->input.gsi_enable)
2337 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
2338
2339 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2340
2341 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2342
2343 if (p_ll2_conn->tx_stats_en)
2344 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2345
2346 qed_ptt_release(p_hwfn, p_ptt);
2347
2348 return 0;
2349 }
2350
qed_ll2_get_stats(void * cxt,u8 connection_handle,struct qed_ll2_stats * p_stats)2351 int qed_ll2_get_stats(void *cxt,
2352 u8 connection_handle, struct qed_ll2_stats *p_stats)
2353 {
2354 memset(p_stats, 0, sizeof(*p_stats));
2355 return __qed_ll2_get_stats(cxt, connection_handle, p_stats);
2356 }
2357
qed_ll2b_release_rx_packet(void * cxt,u8 connection_handle,void * cookie,dma_addr_t rx_buf_addr,bool b_last_packet)2358 static void qed_ll2b_release_rx_packet(void *cxt,
2359 u8 connection_handle,
2360 void *cookie,
2361 dma_addr_t rx_buf_addr,
2362 bool b_last_packet)
2363 {
2364 struct qed_hwfn *p_hwfn = cxt;
2365
2366 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2367 }
2368
qed_ll2_register_cb_ops(struct qed_dev * cdev,const struct qed_ll2_cb_ops * ops,void * cookie)2369 static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2370 const struct qed_ll2_cb_ops *ops,
2371 void *cookie)
2372 {
2373 cdev->ll2->cbs = ops;
2374 cdev->ll2->cb_cookie = cookie;
2375 }
2376
2377 static struct qed_ll2_cbs ll2_cbs = {
2378 .rx_comp_cb = &qed_ll2b_complete_rx_packet,
2379 .rx_release_cb = &qed_ll2b_release_rx_packet,
2380 .tx_comp_cb = &qed_ll2b_complete_tx_packet,
2381 .tx_release_cb = &qed_ll2b_complete_tx_packet,
2382 };
2383
qed_ll2_set_conn_data(struct qed_hwfn * p_hwfn,struct qed_ll2_acquire_data * data,struct qed_ll2_params * params,enum qed_ll2_conn_type conn_type,u8 * handle,bool lb)2384 static void qed_ll2_set_conn_data(struct qed_hwfn *p_hwfn,
2385 struct qed_ll2_acquire_data *data,
2386 struct qed_ll2_params *params,
2387 enum qed_ll2_conn_type conn_type,
2388 u8 *handle, bool lb)
2389 {
2390 memset(data, 0, sizeof(*data));
2391
2392 data->input.conn_type = conn_type;
2393 data->input.mtu = params->mtu;
2394 data->input.rx_num_desc = QED_LL2_RX_SIZE;
2395 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2396 data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2397 data->input.tx_num_desc = QED_LL2_TX_SIZE;
2398 data->p_connection_handle = handle;
2399 data->cbs = &ll2_cbs;
2400 ll2_cbs.cookie = p_hwfn;
2401
2402 if (lb) {
2403 data->input.tx_tc = PKT_LB_TC;
2404 data->input.tx_dest = QED_LL2_TX_DEST_LB;
2405 } else {
2406 data->input.tx_tc = 0;
2407 data->input.tx_dest = QED_LL2_TX_DEST_NW;
2408 }
2409 }
2410
qed_ll2_start_ooo(struct qed_hwfn * p_hwfn,struct qed_ll2_params * params)2411 static int qed_ll2_start_ooo(struct qed_hwfn *p_hwfn,
2412 struct qed_ll2_params *params)
2413 {
2414 u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2415 struct qed_ll2_acquire_data data;
2416 int rc;
2417
2418 qed_ll2_set_conn_data(p_hwfn, &data, params,
2419 QED_LL2_TYPE_OOO, handle, true);
2420
2421 rc = qed_ll2_acquire_connection(p_hwfn, &data);
2422 if (rc) {
2423 DP_INFO(p_hwfn, "Failed to acquire LL2 OOO connection\n");
2424 goto out;
2425 }
2426
2427 rc = qed_ll2_establish_connection(p_hwfn, *handle);
2428 if (rc) {
2429 DP_INFO(p_hwfn, "Failed to establish LL2 OOO connection\n");
2430 goto fail;
2431 }
2432
2433 return 0;
2434
2435 fail:
2436 qed_ll2_release_connection(p_hwfn, *handle);
2437 out:
2438 *handle = QED_LL2_UNUSED_HANDLE;
2439 return rc;
2440 }
2441
qed_ll2_is_storage_eng1(struct qed_dev * cdev)2442 static bool qed_ll2_is_storage_eng1(struct qed_dev *cdev)
2443 {
2444 return (QED_IS_FCOE_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2445 QED_IS_ISCSI_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2446 QED_IS_NVMETCP_PERSONALITY(QED_LEADING_HWFN(cdev))) &&
2447 (QED_AFFIN_HWFN(cdev) != QED_LEADING_HWFN(cdev));
2448 }
2449
__qed_ll2_stop(struct qed_hwfn * p_hwfn)2450 static int __qed_ll2_stop(struct qed_hwfn *p_hwfn)
2451 {
2452 struct qed_dev *cdev = p_hwfn->cdev;
2453 int rc;
2454
2455 rc = qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2456 if (rc)
2457 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2458
2459 qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2460
2461 return rc;
2462 }
2463
qed_ll2_stop(struct qed_dev * cdev)2464 static int qed_ll2_stop(struct qed_dev *cdev)
2465 {
2466 bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2467 struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2468 int rc = 0, rc2 = 0;
2469
2470 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2471 return 0;
2472 if (!QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2473 qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2474
2475 qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2476 eth_zero_addr(cdev->ll2_mac_address);
2477
2478 if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2479 qed_ll2_stop_ooo(p_hwfn);
2480
2481 /* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2482 if (b_is_storage_eng1) {
2483 rc2 = __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2484 if (rc2)
2485 DP_NOTICE(QED_LEADING_HWFN(cdev),
2486 "Failed to stop LL2 on engine 0\n");
2487 }
2488
2489 rc = __qed_ll2_stop(p_hwfn);
2490 if (rc)
2491 DP_NOTICE(p_hwfn, "Failed to stop LL2\n");
2492
2493 qed_ll2_kill_buffers(cdev);
2494
2495 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2496
2497 return rc | rc2;
2498 }
2499
__qed_ll2_start(struct qed_hwfn * p_hwfn,struct qed_ll2_params * params)2500 static int __qed_ll2_start(struct qed_hwfn *p_hwfn,
2501 struct qed_ll2_params *params)
2502 {
2503 struct qed_ll2_buffer *buffer, *tmp_buffer;
2504 struct qed_dev *cdev = p_hwfn->cdev;
2505 enum qed_ll2_conn_type conn_type;
2506 struct qed_ll2_acquire_data data;
2507 int rc, rx_cnt;
2508
2509 switch (p_hwfn->hw_info.personality) {
2510 case QED_PCI_FCOE:
2511 conn_type = QED_LL2_TYPE_FCOE;
2512 break;
2513 case QED_PCI_ISCSI:
2514 case QED_PCI_NVMETCP:
2515 conn_type = QED_LL2_TYPE_TCP_ULP;
2516 break;
2517 case QED_PCI_ETH_ROCE:
2518 conn_type = QED_LL2_TYPE_ROCE;
2519 break;
2520 default:
2521
2522 conn_type = QED_LL2_TYPE_TEST;
2523 }
2524
2525 qed_ll2_set_conn_data(p_hwfn, &data, params, conn_type,
2526 &cdev->ll2->handle, false);
2527
2528 rc = qed_ll2_acquire_connection(p_hwfn, &data);
2529 if (rc) {
2530 DP_INFO(p_hwfn, "Failed to acquire LL2 connection\n");
2531 return rc;
2532 }
2533
2534 rc = qed_ll2_establish_connection(p_hwfn, cdev->ll2->handle);
2535 if (rc) {
2536 DP_INFO(p_hwfn, "Failed to establish LL2 connection\n");
2537 goto release_conn;
2538 }
2539
2540 /* Post all Rx buffers to FW */
2541 spin_lock_bh(&cdev->ll2->lock);
2542 rx_cnt = cdev->ll2->rx_cnt;
2543 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
2544 rc = qed_ll2_post_rx_buffer(p_hwfn,
2545 cdev->ll2->handle,
2546 buffer->phys_addr, 0, buffer, 1);
2547 if (rc) {
2548 DP_INFO(p_hwfn,
2549 "Failed to post an Rx buffer; Deleting it\n");
2550 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2551 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2552 kfree(buffer->data);
2553 list_del(&buffer->list);
2554 kfree(buffer);
2555 } else {
2556 rx_cnt++;
2557 }
2558 }
2559 spin_unlock_bh(&cdev->ll2->lock);
2560
2561 if (rx_cnt == cdev->ll2->rx_cnt) {
2562 DP_NOTICE(p_hwfn, "Failed passing even a single Rx buffer\n");
2563 goto terminate_conn;
2564 }
2565 cdev->ll2->rx_cnt = rx_cnt;
2566
2567 return 0;
2568
2569 terminate_conn:
2570 qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2571 release_conn:
2572 qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2573 return rc;
2574 }
2575
qed_ll2_start(struct qed_dev * cdev,struct qed_ll2_params * params)2576 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2577 {
2578 bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2579 struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2580 struct qed_ll2_buffer *buffer;
2581 int rx_num_desc, i, rc;
2582
2583 if (!is_valid_ether_addr(params->ll2_mac_address)) {
2584 DP_NOTICE(cdev, "Invalid Ethernet address\n");
2585 return -EINVAL;
2586 }
2587
2588 WARN_ON(!cdev->ll2->cbs);
2589
2590 /* Initialize LL2 locks & lists */
2591 INIT_LIST_HEAD(&cdev->ll2->list);
2592 spin_lock_init(&cdev->ll2->lock);
2593
2594 cdev->ll2->rx_size = PRM_DMA_PAD_BYTES_NUM + ETH_HLEN +
2595 L1_CACHE_BYTES + params->mtu;
2596
2597 /* Allocate memory for LL2.
2598 * In CMT mode, in case of a storage PF which is affintized to engine 1,
2599 * LL2 is started also on engine 0 and thus we need twofold buffers.
2600 */
2601 rx_num_desc = QED_LL2_RX_SIZE * (b_is_storage_eng1 ? 2 : 1);
2602 DP_INFO(cdev, "Allocating %d LL2 buffers of size %08x bytes\n",
2603 rx_num_desc, cdev->ll2->rx_size);
2604 for (i = 0; i < rx_num_desc; i++) {
2605 buffer = kzalloc_obj(*buffer);
2606 if (!buffer) {
2607 DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2608 rc = -ENOMEM;
2609 goto err0;
2610 }
2611
2612 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2613 &buffer->phys_addr);
2614 if (rc) {
2615 kfree(buffer);
2616 goto err0;
2617 }
2618
2619 list_add_tail(&buffer->list, &cdev->ll2->list);
2620 }
2621
2622 rc = __qed_ll2_start(p_hwfn, params);
2623 if (rc) {
2624 DP_NOTICE(cdev, "Failed to start LL2\n");
2625 goto err0;
2626 }
2627
2628 /* In CMT mode, always need to start LL2 on engine 0 for a storage PF,
2629 * since broadcast/mutlicast packets are routed to engine 0.
2630 */
2631 if (b_is_storage_eng1) {
2632 rc = __qed_ll2_start(QED_LEADING_HWFN(cdev), params);
2633 if (rc) {
2634 DP_NOTICE(QED_LEADING_HWFN(cdev),
2635 "Failed to start LL2 on engine 0\n");
2636 goto err1;
2637 }
2638 }
2639
2640 if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn)) {
2641 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2642 rc = qed_ll2_start_ooo(p_hwfn, params);
2643 if (rc) {
2644 DP_NOTICE(cdev, "Failed to start OOO LL2\n");
2645 goto err2;
2646 }
2647 }
2648
2649 if (!QED_IS_NVMETCP_PERSONALITY(p_hwfn)) {
2650 rc = qed_llh_add_mac_filter(cdev, 0, params->ll2_mac_address);
2651 if (rc) {
2652 DP_NOTICE(cdev, "Failed to add an LLH filter\n");
2653 goto err3;
2654 }
2655 }
2656
2657 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
2658
2659 return 0;
2660
2661 err3:
2662 if (QED_IS_ISCSI_PERSONALITY(p_hwfn) || QED_IS_NVMETCP_PERSONALITY(p_hwfn))
2663 qed_ll2_stop_ooo(p_hwfn);
2664 err2:
2665 if (b_is_storage_eng1)
2666 __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2667 err1:
2668 __qed_ll2_stop(p_hwfn);
2669 err0:
2670 qed_ll2_kill_buffers(cdev);
2671 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2672 return rc;
2673 }
2674
qed_ll2_start_xmit(struct qed_dev * cdev,struct sk_buff * skb,unsigned long xmit_flags)2675 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb,
2676 unsigned long xmit_flags)
2677 {
2678 struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2679 struct qed_ll2_tx_pkt_info pkt;
2680 const skb_frag_t *frag;
2681 u8 flags = 0, nr_frags;
2682 int rc = -EINVAL, i;
2683 dma_addr_t mapping;
2684 u16 vlan = 0;
2685
2686 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2687 DP_INFO(cdev, "Cannot transmit a checksummed packet\n");
2688 return -EINVAL;
2689 }
2690
2691 /* Cache number of fragments from SKB since SKB may be freed by
2692 * the completion routine after calling qed_ll2_prepare_tx_packet()
2693 */
2694 nr_frags = skb_shinfo(skb)->nr_frags;
2695
2696 if (unlikely(1 + nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET)) {
2697 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2698 1 + nr_frags);
2699 return -EINVAL;
2700 }
2701
2702 mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2703 skb->len, DMA_TO_DEVICE);
2704 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2705 DP_NOTICE(cdev, "SKB mapping failed\n");
2706 return -EINVAL;
2707 }
2708
2709 /* Request HW to calculate IP csum */
2710 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2711 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2712 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
2713
2714 if (skb_vlan_tag_present(skb)) {
2715 vlan = skb_vlan_tag_get(skb);
2716 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
2717 }
2718
2719 memset(&pkt, 0, sizeof(pkt));
2720 pkt.num_of_bds = 1 + nr_frags;
2721 pkt.vlan = vlan;
2722 pkt.bd_flags = flags;
2723 pkt.tx_dest = QED_LL2_TX_DEST_NW;
2724 pkt.first_frag = mapping;
2725 pkt.first_frag_len = skb->len;
2726 pkt.cookie = skb;
2727 if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) &&
2728 test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags))
2729 pkt.remove_stag = true;
2730
2731 /* qed_ll2_prepare_tx_packet() may actually send the packet if
2732 * there are no fragments in the skb and subsequently the completion
2733 * routine may run and free the SKB, so no dereferencing the SKB
2734 * beyond this point unless skb has any fragments.
2735 */
2736 rc = qed_ll2_prepare_tx_packet(p_hwfn, cdev->ll2->handle,
2737 &pkt, 1);
2738 if (unlikely(rc))
2739 goto err;
2740
2741 for (i = 0; i < nr_frags; i++) {
2742 frag = &skb_shinfo(skb)->frags[i];
2743
2744 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2745 skb_frag_size(frag), DMA_TO_DEVICE);
2746
2747 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2748 DP_NOTICE(cdev,
2749 "Unable to map frag - dropping packet\n");
2750 rc = -ENOMEM;
2751 goto err;
2752 }
2753
2754 rc = qed_ll2_set_fragment_of_tx_packet(p_hwfn,
2755 cdev->ll2->handle,
2756 mapping,
2757 skb_frag_size(frag));
2758
2759 /* if failed not much to do here, partial packet has been posted
2760 * we can't free memory, will need to wait for completion
2761 */
2762 if (unlikely(rc))
2763 goto err2;
2764 }
2765
2766 return 0;
2767
2768 err:
2769 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2770 err2:
2771 return rc;
2772 }
2773
qed_ll2_stats(struct qed_dev * cdev,struct qed_ll2_stats * stats)2774 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2775 {
2776 bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2777 struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2778 int rc;
2779
2780 if (!cdev->ll2)
2781 return -EINVAL;
2782
2783 rc = qed_ll2_get_stats(p_hwfn, cdev->ll2->handle, stats);
2784 if (rc) {
2785 DP_NOTICE(p_hwfn, "Failed to get LL2 stats\n");
2786 return rc;
2787 }
2788
2789 /* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2790 if (b_is_storage_eng1) {
2791 rc = __qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2792 cdev->ll2->handle, stats);
2793 if (rc) {
2794 DP_NOTICE(QED_LEADING_HWFN(cdev),
2795 "Failed to get LL2 stats on engine 0\n");
2796 return rc;
2797 }
2798 }
2799
2800 return 0;
2801 }
2802
2803 const struct qed_ll2_ops qed_ll2_ops_pass = {
2804 .start = &qed_ll2_start,
2805 .stop = &qed_ll2_stop,
2806 .start_xmit = &qed_ll2_start_xmit,
2807 .register_cb_ops = &qed_ll2_register_cb_ops,
2808 .get_stats = &qed_ll2_stats,
2809 };
2810
qed_ll2_alloc_if(struct qed_dev * cdev)2811 int qed_ll2_alloc_if(struct qed_dev *cdev)
2812 {
2813 cdev->ll2 = kzalloc_obj(*cdev->ll2);
2814 return cdev->ll2 ? 0 : -ENOMEM;
2815 }
2816
qed_ll2_dealloc_if(struct qed_dev * cdev)2817 void qed_ll2_dealloc_if(struct qed_dev *cdev)
2818 {
2819 kfree(cdev->ll2);
2820 cdev->ll2 = NULL;
2821 }
2822