1 /* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/kernel.h> 22 #include <linux/string.h> 23 #include <linux/errno.h> 24 #include <linux/types.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/workqueue.h> 28 #include <linux/pci.h> 29 #include <linux/netdevice.h> 30 #include <linux/etherdevice.h> 31 #include <linux/if.h> 32 #include <linux/if_ether.h> 33 #include <linux/if_vlan.h> 34 #include <linux/in.h> 35 #include <linux/ip.h> 36 #include <linux/ipv6.h> 37 #include <linux/tcp.h> 38 #include <linux/rtnetlink.h> 39 #include <linux/prefetch.h> 40 #include <net/ip6_checksum.h> 41 #include <linux/ktime.h> 42 #include <linux/numa.h> 43 #ifdef CONFIG_RFS_ACCEL 44 #include <linux/cpu_rmap.h> 45 #endif 46 #include <linux/crash_dump.h> 47 #include <net/busy_poll.h> 48 #include <net/vxlan.h> 49 #include <net/netdev_queues.h> 50 51 #include "cq_enet_desc.h" 52 #include "vnic_dev.h" 53 #include "vnic_intr.h" 54 #include "vnic_stats.h" 55 #include "vnic_vic.h" 56 #include "enic_res.h" 57 #include "enic.h" 58 #include "enic_dev.h" 59 #include "enic_pp.h" 60 #include "enic_clsf.h" 61 #include "enic_rq.h" 62 #include "enic_wq.h" 63 #include "enic_admin.h" 64 #include "enic_mbox.h" 65 66 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) 67 68 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ 69 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */ 70 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */ 71 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2 0x02b7 /* enet SRIOV V2 VF */ 72 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF_USNIC 0x00cf /* enet USNIC VF */ 73 74 /* Supported devices */ 75 static const struct pci_device_id enic_id_table[] = { 76 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 77 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) }, 78 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 79 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2) }, 80 { 0, } /* end of table */ 81 }; 82 83 MODULE_DESCRIPTION(DRV_DESCRIPTION); 84 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>"); 85 MODULE_LICENSE("GPL"); 86 MODULE_DEVICE_TABLE(pci, enic_id_table); 87 88 #define ENIC_LARGE_PKT_THRESHOLD 1000 89 #define ENIC_MAX_COALESCE_TIMERS 10 90 /* Interrupt moderation table, which will be used to decide the 91 * coalescing timer values 92 * {rx_rate in Mbps, mapping percentage of the range} 93 */ 94 static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = { 95 {4000, 0}, 96 {4400, 10}, 97 {5060, 20}, 98 {5230, 30}, 99 {5540, 40}, 100 {5820, 50}, 101 {6120, 60}, 102 {6435, 70}, 103 {6745, 80}, 104 {7000, 90}, 105 {0xFFFFFFFF, 100} 106 }; 107 108 /* This table helps the driver to pick different ranges for rx coalescing 109 * timer depending on the link speed. 110 */ 111 static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = { 112 {0, 0}, /* 0 - 4 Gbps */ 113 {0, 3}, /* 4 - 10 Gbps */ 114 {3, 6}, /* 10+ Gbps */ 115 }; 116 117 static void enic_init_affinity_hint(struct enic *enic) 118 { 119 int numa_node = dev_to_node(&enic->pdev->dev); 120 int i; 121 122 for (i = 0; i < enic->intr_count; i++) { 123 if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i) || 124 (cpumask_available(enic->msix[i].affinity_mask) && 125 !cpumask_empty(enic->msix[i].affinity_mask))) 126 continue; 127 if (zalloc_cpumask_var(&enic->msix[i].affinity_mask, 128 GFP_KERNEL)) 129 cpumask_set_cpu(cpumask_local_spread(i, numa_node), 130 enic->msix[i].affinity_mask); 131 } 132 } 133 134 static void enic_free_affinity_hint(struct enic *enic) 135 { 136 int i; 137 138 for (i = 0; i < enic->intr_count; i++) { 139 if (enic_is_err_intr(enic, i) || enic_is_notify_intr(enic, i)) 140 continue; 141 free_cpumask_var(enic->msix[i].affinity_mask); 142 } 143 } 144 145 static void enic_set_affinity_hint(struct enic *enic) 146 { 147 int i; 148 int err; 149 150 for (i = 0; i < enic->intr_count; i++) { 151 if (enic_is_err_intr(enic, i) || 152 enic_is_notify_intr(enic, i) || 153 !cpumask_available(enic->msix[i].affinity_mask) || 154 cpumask_empty(enic->msix[i].affinity_mask)) 155 continue; 156 err = irq_update_affinity_hint(enic->msix_entry[i].vector, 157 enic->msix[i].affinity_mask); 158 if (err) 159 netdev_warn(enic->netdev, "irq_update_affinity_hint failed, err %d\n", 160 err); 161 } 162 163 for (i = 0; i < enic->wq_count; i++) { 164 int wq_intr = enic_msix_wq_intr(enic, i); 165 166 if (cpumask_available(enic->msix[wq_intr].affinity_mask) && 167 !cpumask_empty(enic->msix[wq_intr].affinity_mask)) 168 netif_set_xps_queue(enic->netdev, 169 enic->msix[wq_intr].affinity_mask, 170 i); 171 } 172 } 173 174 static void enic_unset_affinity_hint(struct enic *enic) 175 { 176 int i; 177 178 for (i = 0; i < enic->intr_count; i++) 179 irq_update_affinity_hint(enic->msix_entry[i].vector, NULL); 180 } 181 182 static int enic_udp_tunnel_set_port(struct net_device *netdev, 183 unsigned int table, unsigned int entry, 184 struct udp_tunnel_info *ti) 185 { 186 struct enic *enic = netdev_priv(netdev); 187 int err; 188 189 spin_lock_bh(&enic->devcmd_lock); 190 191 err = vnic_dev_overlay_offload_cfg(enic->vdev, 192 OVERLAY_CFG_VXLAN_PORT_UPDATE, 193 ntohs(ti->port)); 194 if (err) 195 goto error; 196 197 err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN, 198 enic->vxlan.patch_level); 199 if (err) 200 goto error; 201 202 enic->vxlan.vxlan_udp_port_number = ntohs(ti->port); 203 error: 204 spin_unlock_bh(&enic->devcmd_lock); 205 206 return err; 207 } 208 209 static int enic_udp_tunnel_unset_port(struct net_device *netdev, 210 unsigned int table, unsigned int entry, 211 struct udp_tunnel_info *ti) 212 { 213 struct enic *enic = netdev_priv(netdev); 214 int err; 215 216 spin_lock_bh(&enic->devcmd_lock); 217 218 err = vnic_dev_overlay_offload_ctrl(enic->vdev, OVERLAY_FEATURE_VXLAN, 219 OVERLAY_OFFLOAD_DISABLE); 220 if (err) 221 goto unlock; 222 223 enic->vxlan.vxlan_udp_port_number = 0; 224 225 unlock: 226 spin_unlock_bh(&enic->devcmd_lock); 227 228 return err; 229 } 230 231 static const struct udp_tunnel_nic_info enic_udp_tunnels = { 232 .set_port = enic_udp_tunnel_set_port, 233 .unset_port = enic_udp_tunnel_unset_port, 234 .tables = { 235 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 236 }, 237 }, enic_udp_tunnels_v4 = { 238 .set_port = enic_udp_tunnel_set_port, 239 .unset_port = enic_udp_tunnel_unset_port, 240 .flags = UDP_TUNNEL_NIC_INFO_IPV4_ONLY, 241 .tables = { 242 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, 243 }, 244 }; 245 246 static netdev_features_t enic_features_check(struct sk_buff *skb, 247 struct net_device *dev, 248 netdev_features_t features) 249 { 250 const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb); 251 struct enic *enic = netdev_priv(dev); 252 struct udphdr *udph; 253 u16 port = 0; 254 u8 proto; 255 256 if (!skb->encapsulation) 257 return features; 258 259 features = vxlan_features_check(skb, features); 260 261 switch (vlan_get_protocol(skb)) { 262 case htons(ETH_P_IPV6): 263 if (!(enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6)) 264 goto out; 265 proto = ipv6_hdr(skb)->nexthdr; 266 break; 267 case htons(ETH_P_IP): 268 proto = ip_hdr(skb)->protocol; 269 break; 270 default: 271 goto out; 272 } 273 274 switch (eth->h_proto) { 275 case ntohs(ETH_P_IPV6): 276 if (!(enic->vxlan.flags & ENIC_VXLAN_INNER_IPV6)) 277 goto out; 278 fallthrough; 279 case ntohs(ETH_P_IP): 280 break; 281 default: 282 goto out; 283 } 284 285 286 if (proto == IPPROTO_UDP) { 287 udph = udp_hdr(skb); 288 port = be16_to_cpu(udph->dest); 289 } 290 291 /* HW supports offload of only one UDP port. Remove CSUM and GSO MASK 292 * for other UDP port tunnels 293 */ 294 if (port != enic->vxlan.vxlan_udp_port_number) 295 goto out; 296 297 return features; 298 299 out: 300 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK); 301 } 302 303 int enic_is_dynamic(struct enic *enic) 304 { 305 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN; 306 } 307 308 int enic_sriov_enabled(struct enic *enic) 309 { 310 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0; 311 } 312 313 static int enic_is_sriov_vf(struct enic *enic) 314 { 315 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF || 316 enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2; 317 } 318 319 int enic_is_sriov_vf_v2(struct enic *enic) 320 { 321 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2; 322 } 323 324 int enic_is_valid_vf(struct enic *enic, int vf) 325 { 326 #ifdef CONFIG_PCI_IOV 327 return vf >= 0 && vf < enic->num_vfs; 328 #else 329 return 0; 330 #endif 331 } 332 333 static bool enic_log_q_error(struct enic *enic) 334 { 335 unsigned int i; 336 u32 error_status; 337 bool err = false; 338 339 for (i = 0; i < enic->wq_count; i++) { 340 error_status = vnic_wq_error_status(&enic->wq[i].vwq); 341 err |= error_status; 342 if (error_status) 343 netdev_err(enic->netdev, "WQ[%d] error_status %d\n", 344 i, error_status); 345 } 346 347 for (i = 0; i < enic->rq_count; i++) { 348 error_status = vnic_rq_error_status(&enic->rq[i].vrq); 349 err |= error_status; 350 if (error_status) 351 netdev_err(enic->netdev, "RQ[%d] error_status %d\n", 352 i, error_status); 353 } 354 355 return err; 356 } 357 358 static void enic_msglvl_check(struct enic *enic) 359 { 360 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev); 361 362 if (msg_enable != enic->msg_enable) { 363 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n", 364 enic->msg_enable, msg_enable); 365 enic->msg_enable = msg_enable; 366 } 367 } 368 369 static void enic_mtu_check(struct enic *enic) 370 { 371 u32 mtu = vnic_dev_mtu(enic->vdev); 372 struct net_device *netdev = enic->netdev; 373 374 if (mtu && mtu != enic->port_mtu) { 375 enic->port_mtu = mtu; 376 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 377 mtu = max_t(int, ENIC_MIN_MTU, 378 min_t(int, ENIC_MAX_MTU, mtu)); 379 if (mtu != netdev->mtu) 380 schedule_work(&enic->change_mtu_work); 381 } else { 382 if (mtu < netdev->mtu) 383 netdev_warn(netdev, 384 "interface MTU (%d) set higher " 385 "than switch port MTU (%d)\n", 386 netdev->mtu, mtu); 387 } 388 } 389 } 390 391 static void enic_set_rx_coal_setting(struct enic *enic) 392 { 393 unsigned int speed; 394 int index = -1; 395 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 396 397 /* 1. Read the link speed from fw 398 * 2. Pick the default range for the speed 399 * 3. Update it in enic->rx_coalesce_setting 400 */ 401 speed = vnic_dev_port_speed(enic->vdev); 402 if (speed > ENIC_LINK_SPEED_10G) 403 index = ENIC_LINK_40G_INDEX; 404 else if (speed > ENIC_LINK_SPEED_4G) 405 index = ENIC_LINK_10G_INDEX; 406 else 407 index = ENIC_LINK_4G_INDEX; 408 409 rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start; 410 rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start; 411 rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END; 412 413 /* Start with the value provided by UCSM */ 414 for (index = 0; index < enic->rq_count; index++) 415 enic->cq[index].cur_rx_coal_timeval = 416 enic->config.intr_timer_usec; 417 418 rx_coal->use_adaptive_rx_coalesce = 1; 419 } 420 421 static void enic_link_notify_work_handler(struct work_struct *work) 422 { 423 struct enic *enic = container_of(work, struct enic, 424 link_notify_work); 425 u32 state; 426 u16 i; 427 428 if (!enic_sriov_enabled(enic) || !enic->vf_state) 429 return; 430 431 state = netif_carrier_ok(enic->netdev) ? 432 ENIC_MBOX_LINK_STATE_ENABLE : 433 ENIC_MBOX_LINK_STATE_DISABLE; 434 435 for (i = 0; i < enic->num_vfs; i++) 436 enic_mbox_send_link_state(enic, i, state); 437 } 438 439 static void enic_link_check(struct enic *enic) 440 { 441 int link_status; 442 int carrier_ok; 443 444 /* A V2 SR-IOV VF's carrier is driven by PF link-state MBOX 445 * notifications, not by its own vnic link status; skip the 446 * autonomous check so it cannot flap the VF carrier. 447 */ 448 if (enic_is_sriov_vf_v2(enic)) 449 return; 450 451 link_status = vnic_dev_link_status(enic->vdev); 452 carrier_ok = netif_carrier_ok(enic->netdev); 453 454 if (link_status && !carrier_ok) { 455 netdev_info(enic->netdev, "Link UP\n"); 456 netif_carrier_on(enic->netdev); 457 enic_set_rx_coal_setting(enic); 458 if (enic_sriov_enabled(enic) && enic->vf_state) 459 schedule_work(&enic->link_notify_work); 460 } else if (!link_status && carrier_ok) { 461 netdev_info(enic->netdev, "Link DOWN\n"); 462 netif_carrier_off(enic->netdev); 463 if (enic_sriov_enabled(enic) && enic->vf_state) 464 schedule_work(&enic->link_notify_work); 465 } 466 } 467 468 static void enic_notify_check(struct enic *enic) 469 { 470 enic_msglvl_check(enic); 471 enic_mtu_check(enic); 472 enic_link_check(enic); 473 } 474 475 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i)) 476 477 static irqreturn_t enic_isr_legacy(int irq, void *data) 478 { 479 struct net_device *netdev = data; 480 struct enic *enic = netdev_priv(netdev); 481 unsigned int io_intr = ENIC_LEGACY_IO_INTR; 482 unsigned int err_intr = ENIC_LEGACY_ERR_INTR; 483 unsigned int notify_intr = ENIC_LEGACY_NOTIFY_INTR; 484 u32 pba; 485 486 vnic_intr_mask(&enic->intr[io_intr]); 487 488 pba = vnic_intr_legacy_pba(enic->legacy_pba); 489 if (!pba) { 490 vnic_intr_unmask(&enic->intr[io_intr]); 491 return IRQ_NONE; /* not our interrupt */ 492 } 493 494 if (ENIC_TEST_INTR(pba, notify_intr)) { 495 enic_notify_check(enic); 496 vnic_intr_return_all_credits(&enic->intr[notify_intr]); 497 } 498 499 if (ENIC_TEST_INTR(pba, err_intr)) { 500 vnic_intr_return_all_credits(&enic->intr[err_intr]); 501 enic_log_q_error(enic); 502 /* schedule recovery from WQ/RQ error */ 503 schedule_work(&enic->reset); 504 return IRQ_HANDLED; 505 } 506 507 if (ENIC_TEST_INTR(pba, io_intr)) 508 napi_schedule_irqoff(&enic->napi[0]); 509 else 510 vnic_intr_unmask(&enic->intr[io_intr]); 511 512 return IRQ_HANDLED; 513 } 514 515 static irqreturn_t enic_isr_msi(int irq, void *data) 516 { 517 struct enic *enic = data; 518 519 /* With MSI, there is no sharing of interrupts, so this is 520 * our interrupt and there is no need to ack it. The device 521 * is not providing per-vector masking, so the OS will not 522 * write to PCI config space to mask/unmask the interrupt. 523 * We're using mask_on_assertion for MSI, so the device 524 * automatically masks the interrupt when the interrupt is 525 * generated. Later, when exiting polling, the interrupt 526 * will be unmasked (see enic_poll). 527 * 528 * Also, the device uses the same PCIe Traffic Class (TC) 529 * for Memory Write data and MSI, so there are no ordering 530 * issues; the MSI will always arrive at the Root Complex 531 * _after_ corresponding Memory Writes (i.e. descriptor 532 * writes). 533 */ 534 535 napi_schedule_irqoff(&enic->napi[0]); 536 537 return IRQ_HANDLED; 538 } 539 540 static irqreturn_t enic_isr_msix(int irq, void *data) 541 { 542 struct napi_struct *napi = data; 543 544 napi_schedule_irqoff(napi); 545 546 return IRQ_HANDLED; 547 } 548 549 static irqreturn_t enic_isr_msix_err(int irq, void *data) 550 { 551 struct enic *enic = data; 552 unsigned int intr = enic_msix_err_intr(enic); 553 554 vnic_intr_return_all_credits(&enic->intr[intr]); 555 556 if (enic_log_q_error(enic)) 557 /* schedule recovery from WQ/RQ error */ 558 schedule_work(&enic->reset); 559 560 return IRQ_HANDLED; 561 } 562 563 static irqreturn_t enic_isr_msix_notify(int irq, void *data) 564 { 565 struct enic *enic = data; 566 unsigned int intr = enic_msix_notify_intr(enic); 567 568 enic_notify_check(enic); 569 vnic_intr_return_all_credits(&enic->intr[intr]); 570 571 return IRQ_HANDLED; 572 } 573 574 static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq, 575 struct sk_buff *skb, unsigned int len_left, 576 int loopback) 577 { 578 const skb_frag_t *frag; 579 dma_addr_t dma_addr; 580 581 /* Queue additional data fragments */ 582 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 583 len_left -= skb_frag_size(frag); 584 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0, 585 skb_frag_size(frag), 586 DMA_TO_DEVICE); 587 if (unlikely(enic_dma_map_check(enic, dma_addr))) 588 return -ENOMEM; 589 enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag), 590 (len_left == 0), /* EOP? */ 591 loopback); 592 } 593 594 return 0; 595 } 596 597 static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq, 598 struct sk_buff *skb, int vlan_tag_insert, 599 unsigned int vlan_tag, int loopback) 600 { 601 unsigned int head_len = skb_headlen(skb); 602 unsigned int len_left = skb->len - head_len; 603 int eop = (len_left == 0); 604 dma_addr_t dma_addr; 605 int err = 0; 606 607 dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len, 608 DMA_TO_DEVICE); 609 if (unlikely(enic_dma_map_check(enic, dma_addr))) 610 return -ENOMEM; 611 612 /* Queue the main skb fragment. The fragments are no larger 613 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 614 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 615 * per fragment is queued. 616 */ 617 enic_queue_wq_desc(wq, skb, dma_addr, head_len, vlan_tag_insert, 618 vlan_tag, eop, loopback); 619 620 if (!eop) 621 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 622 623 /* The enic_queue_wq_desc() above does not do HW checksum */ 624 enic->wq[wq->index].stats.csum_none++; 625 enic->wq[wq->index].stats.packets++; 626 enic->wq[wq->index].stats.bytes += skb->len; 627 628 return err; 629 } 630 631 static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq, 632 struct sk_buff *skb, int vlan_tag_insert, 633 unsigned int vlan_tag, int loopback) 634 { 635 unsigned int head_len = skb_headlen(skb); 636 unsigned int len_left = skb->len - head_len; 637 unsigned int hdr_len = skb_checksum_start_offset(skb); 638 unsigned int csum_offset = hdr_len + skb->csum_offset; 639 int eop = (len_left == 0); 640 dma_addr_t dma_addr; 641 int err = 0; 642 643 dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len, 644 DMA_TO_DEVICE); 645 if (unlikely(enic_dma_map_check(enic, dma_addr))) 646 return -ENOMEM; 647 648 /* Queue the main skb fragment. The fragments are no larger 649 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 650 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 651 * per fragment is queued. 652 */ 653 enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len, csum_offset, 654 hdr_len, vlan_tag_insert, vlan_tag, eop, 655 loopback); 656 657 if (!eop) 658 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 659 660 enic->wq[wq->index].stats.csum_partial++; 661 enic->wq[wq->index].stats.packets++; 662 enic->wq[wq->index].stats.bytes += skb->len; 663 664 return err; 665 } 666 667 static void enic_preload_tcp_csum_encap(struct sk_buff *skb) 668 { 669 const struct ethhdr *eth = (struct ethhdr *)skb_inner_mac_header(skb); 670 671 switch (eth->h_proto) { 672 case ntohs(ETH_P_IP): 673 inner_ip_hdr(skb)->check = 0; 674 inner_tcp_hdr(skb)->check = 675 ~csum_tcpudp_magic(inner_ip_hdr(skb)->saddr, 676 inner_ip_hdr(skb)->daddr, 0, 677 IPPROTO_TCP, 0); 678 break; 679 case ntohs(ETH_P_IPV6): 680 inner_tcp_hdr(skb)->check = 681 ~csum_ipv6_magic(&inner_ipv6_hdr(skb)->saddr, 682 &inner_ipv6_hdr(skb)->daddr, 0, 683 IPPROTO_TCP, 0); 684 break; 685 default: 686 WARN_ONCE(1, "Non ipv4/ipv6 inner pkt for encap offload"); 687 break; 688 } 689 } 690 691 static void enic_preload_tcp_csum(struct sk_buff *skb) 692 { 693 /* Preload TCP csum field with IP pseudo hdr calculated 694 * with IP length set to zero. HW will later add in length 695 * to each TCP segment resulting from the TSO. 696 */ 697 698 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { 699 ip_hdr(skb)->check = 0; 700 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, 701 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 702 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) { 703 tcp_v6_gso_csum_prep(skb); 704 } 705 } 706 707 static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq, 708 struct sk_buff *skb, unsigned int mss, 709 int vlan_tag_insert, unsigned int vlan_tag, 710 int loopback) 711 { 712 unsigned int frag_len_left = skb_headlen(skb); 713 unsigned int len_left = skb->len - frag_len_left; 714 int eop = (len_left == 0); 715 unsigned int offset = 0; 716 unsigned int hdr_len; 717 dma_addr_t dma_addr; 718 unsigned int pkts; 719 unsigned int len; 720 skb_frag_t *frag; 721 722 if (skb->encapsulation) { 723 hdr_len = skb_inner_tcp_all_headers(skb); 724 enic_preload_tcp_csum_encap(skb); 725 enic->wq[wq->index].stats.encap_tso++; 726 } else { 727 hdr_len = skb_tcp_all_headers(skb); 728 enic_preload_tcp_csum(skb); 729 enic->wq[wq->index].stats.tso++; 730 } 731 732 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 733 * for the main skb fragment 734 */ 735 while (frag_len_left) { 736 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN); 737 dma_addr = dma_map_single(&enic->pdev->dev, 738 skb->data + offset, len, 739 DMA_TO_DEVICE); 740 if (unlikely(enic_dma_map_check(enic, dma_addr))) 741 return -ENOMEM; 742 enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len, 743 vlan_tag_insert, vlan_tag, 744 eop && (len == frag_len_left), loopback); 745 frag_len_left -= len; 746 offset += len; 747 } 748 749 if (eop) 750 goto tso_out_stats; 751 752 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 753 * for additional data fragments 754 */ 755 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 756 len_left -= skb_frag_size(frag); 757 frag_len_left = skb_frag_size(frag); 758 offset = 0; 759 760 while (frag_len_left) { 761 len = min(frag_len_left, 762 (unsigned int)WQ_ENET_MAX_DESC_LEN); 763 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 764 offset, len, 765 DMA_TO_DEVICE); 766 if (unlikely(enic_dma_map_check(enic, dma_addr))) 767 return -ENOMEM; 768 enic_queue_wq_desc_cont(wq, skb, dma_addr, len, 769 (len_left == 0) && 770 (len == frag_len_left),/*EOP*/ 771 loopback); 772 frag_len_left -= len; 773 offset += len; 774 } 775 } 776 777 tso_out_stats: 778 /* calculate how many packets tso sent */ 779 len = skb->len - hdr_len; 780 pkts = len / mss; 781 if ((len % mss) > 0) 782 pkts++; 783 enic->wq[wq->index].stats.packets += pkts; 784 enic->wq[wq->index].stats.bytes += (len + (pkts * hdr_len)); 785 786 return 0; 787 } 788 789 static inline int enic_queue_wq_skb_encap(struct enic *enic, struct vnic_wq *wq, 790 struct sk_buff *skb, 791 int vlan_tag_insert, 792 unsigned int vlan_tag, int loopback) 793 { 794 unsigned int head_len = skb_headlen(skb); 795 unsigned int len_left = skb->len - head_len; 796 /* Hardware will overwrite the checksum fields, calculating from 797 * scratch and ignoring the value placed by software. 798 * Offload mode = 00 799 * mss[2], mss[1], mss[0] bits are set 800 */ 801 unsigned int mss_or_csum = 7; 802 int eop = (len_left == 0); 803 dma_addr_t dma_addr; 804 int err = 0; 805 806 dma_addr = dma_map_single(&enic->pdev->dev, skb->data, head_len, 807 DMA_TO_DEVICE); 808 if (unlikely(enic_dma_map_check(enic, dma_addr))) 809 return -ENOMEM; 810 811 enic_queue_wq_desc_ex(wq, skb, dma_addr, head_len, mss_or_csum, 0, 812 vlan_tag_insert, vlan_tag, 813 WQ_ENET_OFFLOAD_MODE_CSUM, eop, 1 /* SOP */, eop, 814 loopback); 815 if (!eop) 816 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 817 818 enic->wq[wq->index].stats.encap_csum++; 819 enic->wq[wq->index].stats.packets++; 820 enic->wq[wq->index].stats.bytes += skb->len; 821 822 return err; 823 } 824 825 static inline int enic_queue_wq_skb(struct enic *enic, 826 struct vnic_wq *wq, struct sk_buff *skb) 827 { 828 unsigned int mss = skb_shinfo(skb)->gso_size; 829 unsigned int vlan_tag = 0; 830 int vlan_tag_insert = 0; 831 int loopback = 0; 832 int err; 833 834 if (skb_vlan_tag_present(skb)) { 835 /* VLAN tag from trunking driver */ 836 vlan_tag_insert = 1; 837 vlan_tag = skb_vlan_tag_get(skb); 838 enic->wq[wq->index].stats.add_vlan++; 839 } else if (enic->loop_enable) { 840 vlan_tag = enic->loop_tag; 841 loopback = 1; 842 } 843 844 if (mss) 845 err = enic_queue_wq_skb_tso(enic, wq, skb, mss, 846 vlan_tag_insert, vlan_tag, 847 loopback); 848 else if (skb->encapsulation) 849 err = enic_queue_wq_skb_encap(enic, wq, skb, vlan_tag_insert, 850 vlan_tag, loopback); 851 else if (skb->ip_summed == CHECKSUM_PARTIAL) 852 err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert, 853 vlan_tag, loopback); 854 else 855 err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert, 856 vlan_tag, loopback); 857 if (unlikely(err)) { 858 struct vnic_wq_buf *buf; 859 860 buf = wq->to_use->prev; 861 /* while not EOP of previous pkt && queue not empty. 862 * For all non EOP bufs, os_buf is NULL. 863 */ 864 while (!buf->os_buf && (buf->next != wq->to_clean)) { 865 enic_free_wq_buf(wq, buf); 866 wq->ring.desc_avail++; 867 buf = buf->prev; 868 } 869 wq->to_use = buf->next; 870 dev_kfree_skb(skb); 871 } 872 return err; 873 } 874 875 /* netif_tx_lock held, process context with BHs disabled, or BH */ 876 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb, 877 struct net_device *netdev) 878 { 879 struct enic *enic = netdev_priv(netdev); 880 struct vnic_wq *wq; 881 unsigned int txq_map; 882 struct netdev_queue *txq; 883 884 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; 885 wq = &enic->wq[txq_map].vwq; 886 887 if (skb->len <= 0) { 888 dev_kfree_skb_any(skb); 889 enic->wq[wq->index].stats.null_pkt++; 890 return NETDEV_TX_OK; 891 } 892 893 txq = netdev_get_tx_queue(netdev, txq_map); 894 895 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs, 896 * which is very likely. In the off chance it's going to take 897 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb. 898 */ 899 900 if (skb_shinfo(skb)->gso_size == 0 && 901 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC && 902 skb_linearize(skb)) { 903 dev_kfree_skb_any(skb); 904 enic->wq[wq->index].stats.skb_linear_fail++; 905 return NETDEV_TX_OK; 906 } 907 908 spin_lock(&enic->wq[txq_map].lock); 909 910 if (vnic_wq_desc_avail(wq) < 911 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) { 912 netif_tx_stop_queue(txq); 913 /* This is a hard error, log it */ 914 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n"); 915 spin_unlock(&enic->wq[txq_map].lock); 916 enic->wq[wq->index].stats.desc_full_awake++; 917 return NETDEV_TX_BUSY; 918 } 919 920 if (enic_queue_wq_skb(enic, wq, skb)) 921 goto error; 922 923 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) { 924 netif_tx_stop_queue(txq); 925 enic->wq[wq->index].stats.stopped++; 926 } 927 skb_tx_timestamp(skb); 928 if (!netdev_xmit_more() || netif_xmit_stopped(txq)) 929 vnic_wq_doorbell(wq); 930 931 error: 932 spin_unlock(&enic->wq[txq_map].lock); 933 934 return NETDEV_TX_OK; 935 } 936 937 /* rcu_read_lock potentially held, nominally process context */ 938 static void enic_get_stats(struct net_device *netdev, 939 struct rtnl_link_stats64 *net_stats) 940 { 941 struct enic *enic = netdev_priv(netdev); 942 struct vnic_stats *stats; 943 u64 pkt_truncated = 0; 944 u64 bad_fcs = 0; 945 int err; 946 int i; 947 948 err = enic_dev_stats_dump(enic, &stats); 949 /* return only when dma_alloc_coherent fails in vnic_dev_stats_dump 950 * For other failures, like devcmd failure, we return previously 951 * recorded stats. 952 */ 953 if (err == -ENOMEM) 954 return; 955 956 net_stats->tx_packets = stats->tx.tx_frames_ok; 957 net_stats->tx_bytes = stats->tx.tx_bytes_ok; 958 net_stats->tx_errors = stats->tx.tx_errors; 959 net_stats->tx_dropped = stats->tx.tx_drops; 960 961 net_stats->rx_packets = stats->rx.rx_frames_ok; 962 net_stats->rx_bytes = stats->rx.rx_bytes_ok; 963 net_stats->rx_errors = stats->rx.rx_errors; 964 net_stats->multicast = stats->rx.rx_multicast_frames_ok; 965 966 for (i = 0; i < enic->rq_count; i++) { 967 struct enic_rq_stats *rqs = &enic->rq[i].stats; 968 969 if (!enic->rq[i].vrq.ctrl) 970 break; 971 pkt_truncated += rqs->pkt_truncated; 972 bad_fcs += rqs->bad_fcs; 973 } 974 net_stats->rx_over_errors = pkt_truncated; 975 net_stats->rx_crc_errors = bad_fcs; 976 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop; 977 } 978 979 static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr) 980 { 981 struct enic *enic = netdev_priv(netdev); 982 983 if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) { 984 unsigned int mc_count = netdev_mc_count(netdev); 985 986 netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n", 987 ENIC_MULTICAST_PERFECT_FILTERS, mc_count); 988 989 return -ENOSPC; 990 } 991 992 enic_dev_add_addr(enic, mc_addr); 993 enic->mc_count++; 994 995 return 0; 996 } 997 998 static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr) 999 { 1000 struct enic *enic = netdev_priv(netdev); 1001 1002 enic_dev_del_addr(enic, mc_addr); 1003 enic->mc_count--; 1004 1005 return 0; 1006 } 1007 1008 static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr) 1009 { 1010 struct enic *enic = netdev_priv(netdev); 1011 1012 if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) { 1013 unsigned int uc_count = netdev_uc_count(netdev); 1014 1015 netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n", 1016 ENIC_UNICAST_PERFECT_FILTERS, uc_count); 1017 1018 return -ENOSPC; 1019 } 1020 1021 enic_dev_add_addr(enic, uc_addr); 1022 enic->uc_count++; 1023 1024 return 0; 1025 } 1026 1027 static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr) 1028 { 1029 struct enic *enic = netdev_priv(netdev); 1030 1031 enic_dev_del_addr(enic, uc_addr); 1032 enic->uc_count--; 1033 1034 return 0; 1035 } 1036 1037 void enic_reset_addr_lists(struct enic *enic) 1038 { 1039 struct net_device *netdev = enic->netdev; 1040 1041 __dev_uc_unsync(netdev, NULL); 1042 __dev_mc_unsync(netdev, NULL); 1043 1044 enic->mc_count = 0; 1045 enic->uc_count = 0; 1046 enic->flags = 0; 1047 } 1048 1049 static int enic_set_mac_addr(struct net_device *netdev, char *addr) 1050 { 1051 struct enic *enic = netdev_priv(netdev); 1052 1053 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 1054 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr)) 1055 return -EADDRNOTAVAIL; 1056 } else { 1057 if (!is_valid_ether_addr(addr)) 1058 return -EADDRNOTAVAIL; 1059 } 1060 1061 eth_hw_addr_set(netdev, addr); 1062 1063 return 0; 1064 } 1065 1066 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p) 1067 { 1068 struct enic *enic = netdev_priv(netdev); 1069 struct sockaddr *saddr = p; 1070 char *addr = saddr->sa_data; 1071 int err; 1072 1073 if (netif_running(enic->netdev)) { 1074 err = enic_dev_del_station_addr(enic); 1075 if (err) 1076 return err; 1077 } 1078 1079 err = enic_set_mac_addr(netdev, addr); 1080 if (err) 1081 return err; 1082 1083 if (netif_running(enic->netdev)) { 1084 err = enic_dev_add_station_addr(enic); 1085 if (err) 1086 return err; 1087 } 1088 1089 return err; 1090 } 1091 1092 static int enic_set_mac_address(struct net_device *netdev, void *p) 1093 { 1094 struct sockaddr *saddr = p; 1095 char *addr = saddr->sa_data; 1096 struct enic *enic = netdev_priv(netdev); 1097 int err; 1098 1099 err = enic_dev_del_station_addr(enic); 1100 if (err) 1101 return err; 1102 1103 err = enic_set_mac_addr(netdev, addr); 1104 if (err) 1105 return err; 1106 1107 return enic_dev_add_station_addr(enic); 1108 } 1109 1110 /* netif_tx_lock held, BHs disabled */ 1111 static void enic_set_rx_mode(struct net_device *netdev) 1112 { 1113 struct enic *enic = netdev_priv(netdev); 1114 int directed = 1; 1115 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0; 1116 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0; 1117 int promisc = (netdev->flags & IFF_PROMISC) || 1118 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS; 1119 int allmulti = (netdev->flags & IFF_ALLMULTI) || 1120 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS; 1121 unsigned int flags = netdev->flags | 1122 (allmulti ? IFF_ALLMULTI : 0) | 1123 (promisc ? IFF_PROMISC : 0); 1124 1125 if (enic->flags != flags) { 1126 enic->flags = flags; 1127 enic_dev_packet_filter(enic, directed, 1128 multicast, broadcast, promisc, allmulti); 1129 } 1130 1131 if (!promisc) { 1132 __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync); 1133 if (!allmulti) 1134 __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync); 1135 } 1136 } 1137 1138 /* netif_tx_lock held, BHs disabled */ 1139 static void enic_tx_timeout(struct net_device *netdev, unsigned int txqueue) 1140 { 1141 struct enic *enic = netdev_priv(netdev); 1142 schedule_work(&enic->tx_hang_reset); 1143 } 1144 1145 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) 1146 { 1147 struct enic *enic = netdev_priv(netdev); 1148 struct enic_port_profile *pp; 1149 int err; 1150 1151 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1152 if (err) 1153 return err; 1154 1155 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) { 1156 if (vf == PORT_SELF_VF) { 1157 memcpy(pp->vf_mac, mac, ETH_ALEN); 1158 return 0; 1159 } else { 1160 /* 1161 * For sriov vf's set the mac in hw 1162 */ 1163 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 1164 vnic_dev_set_mac_addr, mac); 1165 return enic_dev_status_to_errno(err); 1166 } 1167 } else 1168 return -EINVAL; 1169 } 1170 1171 static int enic_set_vf_port(struct net_device *netdev, int vf, 1172 struct nlattr *port[]) 1173 { 1174 static const u8 zero_addr[ETH_ALEN] = {}; 1175 struct enic *enic = netdev_priv(netdev); 1176 struct enic_port_profile prev_pp; 1177 struct enic_port_profile *pp; 1178 int err = 0, restore_pp = 1; 1179 1180 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1181 if (err) 1182 return err; 1183 1184 if (!port[IFLA_PORT_REQUEST]) 1185 return -EOPNOTSUPP; 1186 1187 memcpy(&prev_pp, pp, sizeof(*enic->pp)); 1188 memset(pp, 0, sizeof(*enic->pp)); 1189 1190 pp->set |= ENIC_SET_REQUEST; 1191 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]); 1192 1193 if (port[IFLA_PORT_PROFILE]) { 1194 if (nla_len(port[IFLA_PORT_PROFILE]) != PORT_PROFILE_MAX) { 1195 memcpy(pp, &prev_pp, sizeof(*pp)); 1196 return -EINVAL; 1197 } 1198 pp->set |= ENIC_SET_NAME; 1199 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]), 1200 PORT_PROFILE_MAX); 1201 } 1202 1203 if (port[IFLA_PORT_INSTANCE_UUID]) { 1204 if (nla_len(port[IFLA_PORT_INSTANCE_UUID]) != PORT_UUID_MAX) { 1205 memcpy(pp, &prev_pp, sizeof(*pp)); 1206 return -EINVAL; 1207 } 1208 pp->set |= ENIC_SET_INSTANCE; 1209 memcpy(pp->instance_uuid, 1210 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX); 1211 } 1212 1213 if (port[IFLA_PORT_HOST_UUID]) { 1214 if (nla_len(port[IFLA_PORT_HOST_UUID]) != PORT_UUID_MAX) { 1215 memcpy(pp, &prev_pp, sizeof(*pp)); 1216 return -EINVAL; 1217 } 1218 pp->set |= ENIC_SET_HOST; 1219 memcpy(pp->host_uuid, 1220 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX); 1221 } 1222 1223 if (vf == PORT_SELF_VF) { 1224 /* Special case handling: mac came from IFLA_VF_MAC */ 1225 if (!is_zero_ether_addr(prev_pp.vf_mac)) 1226 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN); 1227 1228 if (is_zero_ether_addr(netdev->dev_addr)) 1229 eth_hw_addr_random(netdev); 1230 } else { 1231 /* SR-IOV VF: get mac from adapter */ 1232 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 1233 vnic_dev_get_mac_addr, pp->mac_addr); 1234 if (err) { 1235 netdev_err(netdev, "Error getting mac for vf %d\n", vf); 1236 memcpy(pp, &prev_pp, sizeof(*pp)); 1237 return enic_dev_status_to_errno(err); 1238 } 1239 } 1240 1241 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp); 1242 if (err) { 1243 if (restore_pp) { 1244 /* Things are still the way they were: Implicit 1245 * DISASSOCIATE failed 1246 */ 1247 memcpy(pp, &prev_pp, sizeof(*pp)); 1248 } else { 1249 memset(pp, 0, sizeof(*pp)); 1250 if (vf == PORT_SELF_VF) 1251 eth_hw_addr_set(netdev, zero_addr); 1252 } 1253 } else { 1254 /* Set flag to indicate that the port assoc/disassoc 1255 * request has been sent out to fw 1256 */ 1257 pp->set |= ENIC_PORT_REQUEST_APPLIED; 1258 1259 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */ 1260 if (pp->request == PORT_REQUEST_DISASSOCIATE) { 1261 eth_zero_addr(pp->mac_addr); 1262 if (vf == PORT_SELF_VF) 1263 eth_hw_addr_set(netdev, zero_addr); 1264 } 1265 } 1266 1267 if (vf == PORT_SELF_VF) 1268 eth_zero_addr(pp->vf_mac); 1269 1270 return err; 1271 } 1272 1273 static int enic_get_vf_port(struct net_device *netdev, int vf, 1274 struct sk_buff *skb) 1275 { 1276 struct enic *enic = netdev_priv(netdev); 1277 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 1278 struct enic_port_profile *pp; 1279 int err; 1280 1281 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 1282 if (err) 1283 return err; 1284 1285 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED)) 1286 return -ENODATA; 1287 1288 err = enic_process_get_pp_request(enic, vf, pp->request, &response); 1289 if (err) 1290 return err; 1291 1292 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) || 1293 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) || 1294 ((pp->set & ENIC_SET_NAME) && 1295 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) || 1296 ((pp->set & ENIC_SET_INSTANCE) && 1297 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 1298 pp->instance_uuid)) || 1299 ((pp->set & ENIC_SET_HOST) && 1300 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid))) 1301 goto nla_put_failure; 1302 return 0; 1303 1304 nla_put_failure: 1305 return -EMSGSIZE; 1306 } 1307 1308 static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq) 1309 { 1310 unsigned int intr = enic_msix_rq_intr(enic, rq->index); 1311 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1312 u32 timer = cq->tobe_rx_coal_timeval; 1313 1314 if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) { 1315 vnic_intr_coalescing_timer_set(&enic->intr[intr], timer); 1316 cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval; 1317 } 1318 } 1319 1320 static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq) 1321 { 1322 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1323 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1324 struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter; 1325 int index; 1326 u32 timer; 1327 u32 range_start; 1328 u32 traffic; 1329 u64 delta; 1330 ktime_t now = ktime_get(); 1331 1332 delta = ktime_us_delta(now, cq->prev_ts); 1333 if (delta < ENIC_AIC_TS_BREAK) 1334 return; 1335 cq->prev_ts = now; 1336 1337 traffic = pkt_size_counter->large_pkt_bytes_cnt + 1338 pkt_size_counter->small_pkt_bytes_cnt; 1339 /* The table takes Mbps 1340 * traffic *= 8 => bits 1341 * traffic *= (10^6 / delta) => bps 1342 * traffic /= 10^6 => Mbps 1343 * 1344 * Combining, traffic *= (8 / delta) 1345 */ 1346 1347 traffic <<= 3; 1348 traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta; 1349 1350 for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++) 1351 if (traffic < mod_table[index].rx_rate) 1352 break; 1353 range_start = (pkt_size_counter->small_pkt_bytes_cnt > 1354 pkt_size_counter->large_pkt_bytes_cnt << 1) ? 1355 rx_coal->small_pkt_range_start : 1356 rx_coal->large_pkt_range_start; 1357 timer = range_start + ((rx_coal->range_end - range_start) * 1358 mod_table[index].range_percent / 100); 1359 /* Damping */ 1360 cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1; 1361 1362 pkt_size_counter->large_pkt_bytes_cnt = 0; 1363 pkt_size_counter->small_pkt_bytes_cnt = 0; 1364 } 1365 1366 static int enic_poll(struct napi_struct *napi, int budget) 1367 { 1368 struct net_device *netdev = napi->dev; 1369 struct enic *enic = netdev_priv(netdev); 1370 unsigned int cq_rq = enic_cq_rq(enic, 0); 1371 unsigned int cq_wq = enic_cq_wq(enic, 0); 1372 unsigned int intr = ENIC_LEGACY_IO_INTR; 1373 unsigned int rq_work_to_do = budget; 1374 unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET; 1375 unsigned int work_done, rq_work_done = 0, wq_work_done; 1376 int err; 1377 1378 wq_work_done = enic_wq_cq_service(enic, cq_wq, wq_work_to_do); 1379 1380 if (budget > 0) 1381 rq_work_done = enic_rq_cq_service(enic, cq_rq, rq_work_to_do); 1382 1383 /* Accumulate intr event credits for this polling 1384 * cycle. An intr event is the completion of a 1385 * a WQ or RQ packet. 1386 */ 1387 1388 work_done = rq_work_done + wq_work_done; 1389 1390 if (work_done > 0) 1391 vnic_intr_return_credits(&enic->intr[intr], 1392 work_done, 1393 0 /* don't unmask intr */, 1394 0 /* don't reset intr timer */); 1395 1396 err = vnic_rq_fill(&enic->rq[0].vrq, enic_rq_alloc_buf); 1397 1398 /* Buffer allocation failed. Stay in polling 1399 * mode so we can try to fill the ring again. 1400 */ 1401 1402 if (err) 1403 rq_work_done = rq_work_to_do; 1404 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1405 /* Call the function which refreshes the intr coalescing timer 1406 * value based on the traffic. 1407 */ 1408 enic_calc_int_moderation(enic, &enic->rq[0].vrq); 1409 1410 if ((rq_work_done < budget) && napi_complete_done(napi, rq_work_done)) { 1411 1412 /* Some work done, but not enough to stay in polling, 1413 * exit polling 1414 */ 1415 1416 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1417 enic_set_int_moderation(enic, &enic->rq[0].vrq); 1418 vnic_intr_unmask(&enic->intr[intr]); 1419 enic->rq[0].stats.napi_complete++; 1420 } else { 1421 enic->rq[0].stats.napi_repoll++; 1422 } 1423 1424 return rq_work_done; 1425 } 1426 1427 #ifdef CONFIG_RFS_ACCEL 1428 static void enic_free_rx_cpu_rmap(struct enic *enic) 1429 { 1430 free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap); 1431 enic->netdev->rx_cpu_rmap = NULL; 1432 } 1433 1434 static void enic_set_rx_cpu_rmap(struct enic *enic) 1435 { 1436 int i, res; 1437 1438 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) { 1439 enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count); 1440 if (unlikely(!enic->netdev->rx_cpu_rmap)) 1441 return; 1442 for (i = 0; i < enic->rq_count; i++) { 1443 res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap, 1444 enic->msix_entry[i].vector); 1445 if (unlikely(res)) { 1446 enic_free_rx_cpu_rmap(enic); 1447 return; 1448 } 1449 } 1450 } 1451 } 1452 1453 #else 1454 1455 static void enic_free_rx_cpu_rmap(struct enic *enic) 1456 { 1457 } 1458 1459 static void enic_set_rx_cpu_rmap(struct enic *enic) 1460 { 1461 } 1462 1463 #endif /* CONFIG_RFS_ACCEL */ 1464 1465 static int enic_poll_msix_wq(struct napi_struct *napi, int budget) 1466 { 1467 struct net_device *netdev = napi->dev; 1468 struct enic *enic = netdev_priv(netdev); 1469 unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count; 1470 struct vnic_wq *wq = &enic->wq[wq_index].vwq; 1471 unsigned int cq; 1472 unsigned int intr; 1473 unsigned int wq_work_to_do = ENIC_WQ_NAPI_BUDGET; 1474 unsigned int wq_work_done; 1475 unsigned int wq_irq; 1476 1477 wq_irq = wq->index; 1478 cq = enic_cq_wq(enic, wq_irq); 1479 intr = enic_msix_wq_intr(enic, wq_irq); 1480 1481 wq_work_done = enic_wq_cq_service(enic, cq, wq_work_to_do); 1482 1483 vnic_intr_return_credits(&enic->intr[intr], wq_work_done, 1484 0 /* don't unmask intr */, 1485 1 /* reset intr timer */); 1486 if (!wq_work_done) { 1487 napi_complete(napi); 1488 vnic_intr_unmask(&enic->intr[intr]); 1489 return 0; 1490 } 1491 1492 return budget; 1493 } 1494 1495 static int enic_poll_msix_rq(struct napi_struct *napi, int budget) 1496 { 1497 struct net_device *netdev = napi->dev; 1498 struct enic *enic = netdev_priv(netdev); 1499 unsigned int rq = (napi - &enic->napi[0]); 1500 unsigned int cq = enic_cq_rq(enic, rq); 1501 unsigned int intr = enic_msix_rq_intr(enic, rq); 1502 unsigned int work_to_do = budget; 1503 unsigned int work_done = 0; 1504 int err; 1505 1506 /* Service RQ 1507 */ 1508 1509 if (budget > 0) 1510 work_done = enic_rq_cq_service(enic, cq, work_to_do); 1511 1512 /* Return intr event credits for this polling 1513 * cycle. An intr event is the completion of a 1514 * RQ packet. 1515 */ 1516 1517 if (work_done > 0) 1518 vnic_intr_return_credits(&enic->intr[intr], 1519 work_done, 1520 0 /* don't unmask intr */, 1521 0 /* don't reset intr timer */); 1522 1523 err = vnic_rq_fill(&enic->rq[rq].vrq, enic_rq_alloc_buf); 1524 1525 /* Buffer allocation failed. Stay in polling mode 1526 * so we can try to fill the ring again. 1527 */ 1528 1529 if (err) 1530 work_done = work_to_do; 1531 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1532 /* Call the function which refreshes the intr coalescing timer 1533 * value based on the traffic. 1534 */ 1535 enic_calc_int_moderation(enic, &enic->rq[rq].vrq); 1536 1537 if ((work_done < budget) && napi_complete_done(napi, work_done)) { 1538 1539 /* Some work done, but not enough to stay in polling, 1540 * exit polling 1541 */ 1542 1543 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1544 enic_set_int_moderation(enic, &enic->rq[rq].vrq); 1545 vnic_intr_unmask(&enic->intr[intr]); 1546 enic->rq[rq].stats.napi_complete++; 1547 } else { 1548 enic->rq[rq].stats.napi_repoll++; 1549 } 1550 1551 return work_done; 1552 } 1553 1554 static void enic_notify_timer(struct timer_list *t) 1555 { 1556 struct enic *enic = timer_container_of(enic, t, notify_timer); 1557 1558 enic_notify_check(enic); 1559 1560 mod_timer(&enic->notify_timer, 1561 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD)); 1562 } 1563 1564 static void enic_free_intr(struct enic *enic) 1565 { 1566 struct net_device *netdev = enic->netdev; 1567 unsigned int i; 1568 1569 enic_free_rx_cpu_rmap(enic); 1570 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1571 case VNIC_DEV_INTR_MODE_INTX: 1572 free_irq(enic->pdev->irq, netdev); 1573 break; 1574 case VNIC_DEV_INTR_MODE_MSI: 1575 free_irq(enic->pdev->irq, enic); 1576 break; 1577 case VNIC_DEV_INTR_MODE_MSIX: 1578 for (i = 0; i < enic->intr_count; i++) 1579 if (enic->msix[i].requested) 1580 free_irq(enic->msix_entry[i].vector, 1581 enic->msix[i].devid); 1582 break; 1583 default: 1584 break; 1585 } 1586 } 1587 1588 static int enic_request_intr(struct enic *enic) 1589 { 1590 struct net_device *netdev = enic->netdev; 1591 unsigned int i, intr; 1592 int err = 0; 1593 1594 enic_set_rx_cpu_rmap(enic); 1595 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1596 1597 case VNIC_DEV_INTR_MODE_INTX: 1598 1599 err = request_irq(enic->pdev->irq, enic_isr_legacy, 1600 IRQF_SHARED, netdev->name, netdev); 1601 break; 1602 1603 case VNIC_DEV_INTR_MODE_MSI: 1604 1605 err = request_irq(enic->pdev->irq, enic_isr_msi, 1606 0, netdev->name, enic); 1607 break; 1608 1609 case VNIC_DEV_INTR_MODE_MSIX: 1610 1611 for (i = 0; i < enic->rq_count; i++) { 1612 intr = enic_msix_rq_intr(enic, i); 1613 snprintf(enic->msix[intr].devname, 1614 sizeof(enic->msix[intr].devname), 1615 "%s-rx-%u", netdev->name, i); 1616 enic->msix[intr].isr = enic_isr_msix; 1617 enic->msix[intr].devid = &enic->napi[i]; 1618 } 1619 1620 for (i = 0; i < enic->wq_count; i++) { 1621 int wq = enic_cq_wq(enic, i); 1622 1623 intr = enic_msix_wq_intr(enic, i); 1624 snprintf(enic->msix[intr].devname, 1625 sizeof(enic->msix[intr].devname), 1626 "%s-tx-%u", netdev->name, i); 1627 enic->msix[intr].isr = enic_isr_msix; 1628 enic->msix[intr].devid = &enic->napi[wq]; 1629 } 1630 1631 intr = enic_msix_err_intr(enic); 1632 snprintf(enic->msix[intr].devname, 1633 sizeof(enic->msix[intr].devname), 1634 "%s-err", netdev->name); 1635 enic->msix[intr].isr = enic_isr_msix_err; 1636 enic->msix[intr].devid = enic; 1637 1638 intr = enic_msix_notify_intr(enic); 1639 snprintf(enic->msix[intr].devname, 1640 sizeof(enic->msix[intr].devname), 1641 "%s-notify", netdev->name); 1642 enic->msix[intr].isr = enic_isr_msix_notify; 1643 enic->msix[intr].devid = enic; 1644 1645 for (i = 0; i < enic->intr_count; i++) 1646 enic->msix[i].requested = 0; 1647 1648 for (i = 0; i < enic->intr_count; i++) { 1649 err = request_irq(enic->msix_entry[i].vector, 1650 enic->msix[i].isr, 0, 1651 enic->msix[i].devname, 1652 enic->msix[i].devid); 1653 if (err) { 1654 enic_free_intr(enic); 1655 break; 1656 } 1657 enic->msix[i].requested = 1; 1658 } 1659 1660 break; 1661 1662 default: 1663 break; 1664 } 1665 1666 return err; 1667 } 1668 1669 static void enic_synchronize_irqs(struct enic *enic) 1670 { 1671 unsigned int i; 1672 1673 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1674 case VNIC_DEV_INTR_MODE_INTX: 1675 case VNIC_DEV_INTR_MODE_MSI: 1676 synchronize_irq(enic->pdev->irq); 1677 break; 1678 case VNIC_DEV_INTR_MODE_MSIX: 1679 for (i = 0; i < enic->intr_count; i++) 1680 synchronize_irq(enic->msix_entry[i].vector); 1681 break; 1682 default: 1683 break; 1684 } 1685 } 1686 1687 static int enic_dev_notify_set(struct enic *enic) 1688 { 1689 int err; 1690 1691 spin_lock_bh(&enic->devcmd_lock); 1692 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1693 case VNIC_DEV_INTR_MODE_INTX: 1694 err = vnic_dev_notify_set(enic->vdev, ENIC_LEGACY_NOTIFY_INTR); 1695 break; 1696 case VNIC_DEV_INTR_MODE_MSIX: 1697 err = vnic_dev_notify_set(enic->vdev, 1698 enic_msix_notify_intr(enic)); 1699 break; 1700 default: 1701 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */); 1702 break; 1703 } 1704 spin_unlock_bh(&enic->devcmd_lock); 1705 1706 return err; 1707 } 1708 1709 static void enic_notify_timer_start(struct enic *enic) 1710 { 1711 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1712 case VNIC_DEV_INTR_MODE_MSI: 1713 mod_timer(&enic->notify_timer, jiffies); 1714 break; 1715 default: 1716 /* Using intr for notification for INTx/MSI-X */ 1717 break; 1718 } 1719 } 1720 1721 /* rtnl lock is held, process context */ 1722 static int enic_open(struct net_device *netdev) 1723 { 1724 struct enic *enic = netdev_priv(netdev); 1725 unsigned int i; 1726 int err, ret; 1727 unsigned int max_pkt_len = netdev->mtu + VLAN_ETH_HLEN; 1728 struct page_pool_params pp_params = { 1729 .order = get_order(max_pkt_len), 1730 .pool_size = enic->config.rq_desc_count, 1731 .nid = dev_to_node(&enic->pdev->dev), 1732 .dev = &enic->pdev->dev, 1733 .dma_dir = DMA_FROM_DEVICE, 1734 .max_len = (max_pkt_len > PAGE_SIZE) ? max_pkt_len : PAGE_SIZE, 1735 .netdev = netdev, 1736 .flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV, 1737 }; 1738 1739 err = enic_request_intr(enic); 1740 if (err) { 1741 netdev_err(netdev, "Unable to request irq.\n"); 1742 return err; 1743 } 1744 enic_init_affinity_hint(enic); 1745 enic_set_affinity_hint(enic); 1746 1747 err = enic_dev_notify_set(enic); 1748 if (err) { 1749 netdev_err(netdev, 1750 "Failed to alloc notify buffer, aborting.\n"); 1751 goto err_out_free_intr; 1752 } 1753 1754 for (i = 0; i < enic->rq_count; i++) { 1755 /* create a page pool for each RQ */ 1756 pp_params.napi = &enic->napi[i]; 1757 pp_params.queue_idx = i; 1758 enic->rq[i].pool = page_pool_create(&pp_params); 1759 if (IS_ERR(enic->rq[i].pool)) { 1760 err = PTR_ERR(enic->rq[i].pool); 1761 enic->rq[i].pool = NULL; 1762 goto err_out_free_rq; 1763 } 1764 1765 /* enable rq before updating rq desc */ 1766 vnic_rq_enable(&enic->rq[i].vrq); 1767 vnic_rq_fill(&enic->rq[i].vrq, enic_rq_alloc_buf); 1768 /* Need at least one buffer on ring to get going */ 1769 if (vnic_rq_desc_used(&enic->rq[i].vrq) == 0) { 1770 netdev_err(netdev, "Unable to alloc receive buffers\n"); 1771 err = -ENOMEM; 1772 goto err_out_free_rq; 1773 } 1774 } 1775 1776 for (i = 0; i < enic->wq_count; i++) 1777 vnic_wq_enable(&enic->wq[i].vwq); 1778 1779 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1780 enic_dev_add_station_addr(enic); 1781 1782 enic_set_rx_mode(netdev); 1783 1784 netif_tx_wake_all_queues(netdev); 1785 1786 for (i = 0; i < enic->rq_count; i++) 1787 napi_enable(&enic->napi[i]); 1788 1789 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1790 for (i = 0; i < enic->wq_count; i++) 1791 napi_enable(&enic->napi[enic_cq_wq(enic, i)]); 1792 err = enic_dev_enable(enic); 1793 if (err) { 1794 netdev_err(netdev, "Failed to enable device: %d\n", err); 1795 goto err_out_dev_enable; 1796 } 1797 1798 for (i = 0; i < enic->intr_count; i++) 1799 vnic_intr_unmask(&enic->intr[i]); 1800 1801 enic_notify_timer_start(enic); 1802 enic_rfs_timer_start(enic); 1803 if (enic_is_sriov_vf_v2(enic)) 1804 enic_mbox_vf_link_state_set_running(enic, true); 1805 1806 return 0; 1807 1808 err_out_dev_enable: 1809 for (i = 0; i < enic->rq_count; i++) 1810 napi_disable(&enic->napi[i]); 1811 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1812 for (i = 0; i < enic->wq_count; i++) 1813 napi_disable(&enic->napi[enic_cq_wq(enic, i)]); 1814 netif_tx_disable(netdev); 1815 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1816 enic_dev_del_station_addr(enic); 1817 for (i = 0; i < enic->wq_count; i++) 1818 vnic_wq_disable(&enic->wq[i].vwq); 1819 err_out_free_rq: 1820 for (i = 0; i < enic->rq_count; i++) { 1821 ret = vnic_rq_disable(&enic->rq[i].vrq); 1822 if (!ret) { 1823 vnic_rq_clean(&enic->rq[i].vrq, enic_free_rq_buf); 1824 page_pool_destroy(enic->rq[i].pool); 1825 enic->rq[i].pool = NULL; 1826 } 1827 } 1828 enic_dev_notify_unset(enic); 1829 err_out_free_intr: 1830 enic_unset_affinity_hint(enic); 1831 enic_free_intr(enic); 1832 1833 return err; 1834 } 1835 1836 /* rtnl lock is held, process context */ 1837 static int enic_stop(struct net_device *netdev) 1838 { 1839 struct enic *enic = netdev_priv(netdev); 1840 unsigned int i; 1841 int err; 1842 1843 for (i = 0; i < enic->intr_count; i++) { 1844 vnic_intr_mask(&enic->intr[i]); 1845 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */ 1846 } 1847 1848 enic_synchronize_irqs(enic); 1849 1850 timer_delete_sync(&enic->notify_timer); 1851 enic_rfs_flw_tbl_free(enic); 1852 1853 enic_dev_disable(enic); 1854 1855 for (i = 0; i < enic->rq_count; i++) 1856 napi_disable(&enic->napi[i]); 1857 1858 if (enic_is_sriov_vf_v2(enic)) 1859 enic_mbox_vf_link_state_set_running(enic, false); 1860 else 1861 netif_carrier_off(netdev); 1862 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1863 for (i = 0; i < enic->wq_count; i++) 1864 napi_disable(&enic->napi[enic_cq_wq(enic, i)]); 1865 netif_tx_disable(netdev); 1866 1867 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1868 enic_dev_del_station_addr(enic); 1869 1870 for (i = 0; i < enic->wq_count; i++) { 1871 err = vnic_wq_disable(&enic->wq[i].vwq); 1872 if (err) 1873 return err; 1874 } 1875 for (i = 0; i < enic->rq_count; i++) { 1876 err = vnic_rq_disable(&enic->rq[i].vrq); 1877 if (err) 1878 return err; 1879 } 1880 1881 enic_dev_notify_unset(enic); 1882 enic_unset_affinity_hint(enic); 1883 enic_free_intr(enic); 1884 1885 for (i = 0; i < enic->wq_count; i++) 1886 vnic_wq_clean(&enic->wq[i].vwq, enic_free_wq_buf); 1887 for (i = 0; i < enic->rq_count; i++) { 1888 vnic_rq_clean(&enic->rq[i].vrq, enic_free_rq_buf); 1889 page_pool_destroy(enic->rq[i].pool); 1890 enic->rq[i].pool = NULL; 1891 } 1892 for (i = 0; i < enic->cq_count; i++) 1893 vnic_cq_clean(&enic->cq[i]); 1894 for (i = 0; i < enic->intr_count; i++) 1895 vnic_intr_clean(&enic->intr[i]); 1896 1897 return 0; 1898 } 1899 1900 static int _enic_change_mtu(struct net_device *netdev, int new_mtu) 1901 { 1902 bool running = netif_running(netdev); 1903 int err = 0; 1904 1905 ASSERT_RTNL(); 1906 if (running) { 1907 err = enic_stop(netdev); 1908 if (err) 1909 return err; 1910 } 1911 1912 WRITE_ONCE(netdev->mtu, new_mtu); 1913 1914 if (running) { 1915 err = enic_open(netdev); 1916 if (err) 1917 return err; 1918 } 1919 1920 return 0; 1921 } 1922 1923 static int enic_change_mtu(struct net_device *netdev, int new_mtu) 1924 { 1925 struct enic *enic = netdev_priv(netdev); 1926 1927 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 1928 return -EOPNOTSUPP; 1929 1930 if (new_mtu > enic->port_mtu) 1931 netdev_warn(netdev, 1932 "interface MTU (%d) set higher than port MTU (%d)\n", 1933 new_mtu, enic->port_mtu); 1934 1935 return _enic_change_mtu(netdev, new_mtu); 1936 } 1937 1938 static void enic_change_mtu_work(struct work_struct *work) 1939 { 1940 struct enic *enic = container_of(work, struct enic, change_mtu_work); 1941 struct net_device *netdev = enic->netdev; 1942 int new_mtu = vnic_dev_mtu(enic->vdev); 1943 1944 rtnl_lock(); 1945 (void)_enic_change_mtu(netdev, new_mtu); 1946 rtnl_unlock(); 1947 1948 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu); 1949 } 1950 1951 #ifdef CONFIG_NET_POLL_CONTROLLER 1952 static void enic_poll_controller(struct net_device *netdev) 1953 { 1954 struct enic *enic = netdev_priv(netdev); 1955 struct vnic_dev *vdev = enic->vdev; 1956 unsigned int i, intr; 1957 1958 switch (vnic_dev_get_intr_mode(vdev)) { 1959 case VNIC_DEV_INTR_MODE_MSIX: 1960 for (i = 0; i < enic->rq_count; i++) { 1961 intr = enic_msix_rq_intr(enic, i); 1962 enic_isr_msix(enic->msix_entry[intr].vector, 1963 &enic->napi[i]); 1964 } 1965 1966 for (i = 0; i < enic->wq_count; i++) { 1967 intr = enic_msix_wq_intr(enic, i); 1968 enic_isr_msix(enic->msix_entry[intr].vector, 1969 &enic->napi[enic_cq_wq(enic, i)]); 1970 } 1971 1972 break; 1973 case VNIC_DEV_INTR_MODE_MSI: 1974 enic_isr_msi(enic->pdev->irq, enic); 1975 break; 1976 case VNIC_DEV_INTR_MODE_INTX: 1977 enic_isr_legacy(enic->pdev->irq, netdev); 1978 break; 1979 default: 1980 break; 1981 } 1982 } 1983 #endif 1984 1985 static int enic_dev_wait(struct vnic_dev *vdev, 1986 int (*start)(struct vnic_dev *, int), 1987 int (*finished)(struct vnic_dev *, int *), 1988 int arg) 1989 { 1990 unsigned long time; 1991 int done; 1992 int err; 1993 1994 err = start(vdev, arg); 1995 if (err) 1996 return err; 1997 1998 /* Wait for func to complete...2 seconds max 1999 */ 2000 2001 time = jiffies + (HZ * 2); 2002 do { 2003 2004 err = finished(vdev, &done); 2005 if (err) 2006 return err; 2007 2008 if (done) 2009 return 0; 2010 2011 schedule_timeout_uninterruptible(HZ / 10); 2012 2013 } while (time_after(time, jiffies)); 2014 2015 return -ETIMEDOUT; 2016 } 2017 2018 static int enic_dev_open(struct enic *enic) 2019 { 2020 int err; 2021 u32 flags = CMD_OPENF_IG_DESCCACHE; 2022 2023 err = enic_dev_wait(enic->vdev, vnic_dev_open, 2024 vnic_dev_open_done, flags); 2025 if (err) 2026 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n", 2027 err); 2028 2029 return err; 2030 } 2031 2032 static int enic_dev_soft_reset(struct enic *enic) 2033 { 2034 int err; 2035 2036 err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset, 2037 vnic_dev_soft_reset_done, 0); 2038 if (err) 2039 netdev_err(enic->netdev, "vNIC soft reset failed, err %d\n", 2040 err); 2041 2042 return err; 2043 } 2044 2045 static int enic_dev_hang_reset(struct enic *enic) 2046 { 2047 int err; 2048 2049 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset, 2050 vnic_dev_hang_reset_done, 0); 2051 if (err) 2052 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n", 2053 err); 2054 2055 return err; 2056 } 2057 2058 int __enic_set_rsskey(struct enic *enic) 2059 { 2060 union vnic_rss_key *rss_key_buf_va; 2061 dma_addr_t rss_key_buf_pa; 2062 int i, kidx, bidx, err; 2063 2064 rss_key_buf_va = dma_alloc_coherent(&enic->pdev->dev, 2065 sizeof(union vnic_rss_key), 2066 &rss_key_buf_pa, GFP_ATOMIC); 2067 if (!rss_key_buf_va) 2068 return -ENOMEM; 2069 2070 for (i = 0; i < ENIC_RSS_LEN; i++) { 2071 kidx = i / ENIC_RSS_BYTES_PER_KEY; 2072 bidx = i % ENIC_RSS_BYTES_PER_KEY; 2073 rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i]; 2074 } 2075 spin_lock_bh(&enic->devcmd_lock); 2076 err = enic_set_rss_key(enic, 2077 rss_key_buf_pa, 2078 sizeof(union vnic_rss_key)); 2079 spin_unlock_bh(&enic->devcmd_lock); 2080 2081 dma_free_coherent(&enic->pdev->dev, sizeof(union vnic_rss_key), 2082 rss_key_buf_va, rss_key_buf_pa); 2083 2084 return err; 2085 } 2086 2087 static int enic_set_rsskey(struct enic *enic) 2088 { 2089 netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN); 2090 2091 return __enic_set_rsskey(enic); 2092 } 2093 2094 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 2095 { 2096 dma_addr_t rss_cpu_buf_pa; 2097 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 2098 unsigned int i; 2099 int err; 2100 2101 rss_cpu_buf_va = dma_alloc_coherent(&enic->pdev->dev, 2102 sizeof(union vnic_rss_cpu), 2103 &rss_cpu_buf_pa, GFP_ATOMIC); 2104 if (!rss_cpu_buf_va) 2105 return -ENOMEM; 2106 2107 for (i = 0; i < (1 << rss_hash_bits); i++) 2108 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count; 2109 2110 spin_lock_bh(&enic->devcmd_lock); 2111 err = enic_set_rss_cpu(enic, 2112 rss_cpu_buf_pa, 2113 sizeof(union vnic_rss_cpu)); 2114 spin_unlock_bh(&enic->devcmd_lock); 2115 2116 dma_free_coherent(&enic->pdev->dev, sizeof(union vnic_rss_cpu), 2117 rss_cpu_buf_va, rss_cpu_buf_pa); 2118 2119 return err; 2120 } 2121 2122 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 2123 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 2124 { 2125 const u8 tso_ipid_split_en = 0; 2126 const u8 ig_vlan_strip_en = 1; 2127 int err; 2128 2129 /* Enable VLAN tag stripping. 2130 */ 2131 2132 spin_lock_bh(&enic->devcmd_lock); 2133 err = enic_set_nic_cfg(enic, 2134 rss_default_cpu, rss_hash_type, 2135 rss_hash_bits, rss_base_cpu, 2136 rss_enable, tso_ipid_split_en, 2137 ig_vlan_strip_en); 2138 spin_unlock_bh(&enic->devcmd_lock); 2139 2140 return err; 2141 } 2142 2143 static int enic_set_rss_nic_cfg(struct enic *enic) 2144 { 2145 struct device *dev = enic_get_dev(enic); 2146 const u8 rss_default_cpu = 0; 2147 const u8 rss_hash_bits = 7; 2148 const u8 rss_base_cpu = 0; 2149 u8 rss_hash_type; 2150 int res; 2151 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 2152 2153 spin_lock_bh(&enic->devcmd_lock); 2154 res = vnic_dev_capable_rss_hash_type(enic->vdev, &rss_hash_type); 2155 spin_unlock_bh(&enic->devcmd_lock); 2156 if (res) { 2157 /* defaults for old adapters 2158 */ 2159 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 2160 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 2161 NIC_CFG_RSS_HASH_TYPE_IPV6 | 2162 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 2163 } 2164 2165 if (rss_enable) { 2166 if (!enic_set_rsskey(enic)) { 2167 if (enic_set_rsscpu(enic, rss_hash_bits)) { 2168 rss_enable = 0; 2169 dev_warn(dev, "RSS disabled, " 2170 "Failed to set RSS cpu indirection table."); 2171 } 2172 } else { 2173 rss_enable = 0; 2174 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n"); 2175 } 2176 } 2177 2178 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 2179 rss_hash_bits, rss_base_cpu, rss_enable); 2180 } 2181 2182 static void enic_set_api_busy(struct enic *enic, bool busy) 2183 { 2184 spin_lock(&enic->enic_api_lock); 2185 enic->enic_api_busy = busy; 2186 spin_unlock(&enic->enic_api_lock); 2187 } 2188 2189 /* The admin/MBOX channel exists on a V2 PF while SR-IOV is enabled and on 2190 * every V2 VF. A reset wipes the admin WQ/RQ/CQ, so such devices must tear 2191 * the channel down before the reset and re-establish it afterwards. 2192 */ 2193 static bool enic_has_admin_chan(struct enic *enic) 2194 { 2195 return enic_is_sriov_vf_v2(enic) || 2196 (enic_sriov_enabled(enic) && enic->vf_type == ENIC_VF_TYPE_V2); 2197 } 2198 2199 /* Re-establish the admin/MBOX channel after a reset has re-created the data 2200 * path. Mirrors the relevant part of the probe / SR-IOV-enable sequence: 2201 * reinitialise MBOX and reopen the channel, then for a VF re-run the PF 2202 * handshake (the reset wiped the VF's admin QP, so the VF must register 2203 * again), or for a PF re-push the current link state to registered VFs. 2204 */ 2205 static void enic_admin_chan_reopen(struct enic *enic) 2206 { 2207 int err; 2208 2209 /* Install the MBOX receive handler and clear pending reply state before 2210 * opening the channel, so the handler is in place before the admin 2211 * interrupt is unmasked and no early completion is dropped. Keep the 2212 * sequence number monotonic across channel generations. 2213 */ 2214 enic_mbox_init(enic); 2215 2216 /* A reset destroys the VF's local admin QP, so the VF can no longer 2217 * rely on its previous registration. The PF may retain stale software 2218 * registration state until the VF successfully registers again. 2219 * Clear the local flag before reopening so a failed reopen or 2220 * re-handshake cannot leave the VF believing it has a usable PF 2221 * registration over a dead channel. 2222 */ 2223 if (enic_is_sriov_vf_v2(enic)) 2224 WRITE_ONCE(enic->vf_registered, false); 2225 2226 err = enic_admin_channel_open(enic); 2227 if (err) { 2228 netdev_err(enic->netdev, 2229 "admin channel reopen after reset failed: %d\n", err); 2230 return; 2231 } 2232 2233 if (enic_is_sriov_vf_v2(enic)) { 2234 err = enic_mbox_vf_capability_check(enic); 2235 if (err) { 2236 netdev_err(enic->netdev, 2237 "MBOX capability check after reset failed: %d\n", 2238 err); 2239 enic_admin_channel_close(enic); 2240 return; 2241 } 2242 err = enic_mbox_vf_register(enic); 2243 if (err) { 2244 netdev_err(enic->netdev, 2245 "MBOX VF re-registration after reset failed: %d\n", 2246 err); 2247 enic_admin_channel_close(enic); 2248 } 2249 } else { 2250 /* The link came back up during enic_open() above while MBOX 2251 * sends were still disabled (channel not yet reopened), so that 2252 * link-notify was dropped. Re-push current link state now. 2253 */ 2254 schedule_work(&enic->link_notify_work); 2255 } 2256 } 2257 2258 static void enic_reset(struct work_struct *work) 2259 { 2260 struct enic *enic = container_of(work, struct enic, reset); 2261 2262 if (!netif_running(enic->netdev)) 2263 return; 2264 2265 rtnl_lock(); 2266 2267 /* Stop any activity from infiniband */ 2268 enic_set_api_busy(enic, true); 2269 2270 /* Fully tear down the V2 admin/MBOX channel before the soft reset. 2271 * The reset wipes all hardware queues including the admin WQ/RQ; 2272 * closing first tells firmware to stop the admin QP (so it no longer 2273 * DMAs from the about-to-be-reset rings) and frees the admin resources 2274 * so they are cleanly re-allocated afterwards. 2275 */ 2276 if (enic_has_admin_chan(enic)) 2277 enic_admin_channel_close(enic); 2278 2279 enic_stop(enic->netdev); 2280 if (enic_is_sriov_vf_v2(enic)) 2281 enic_mbox_vf_link_state_reset(enic); 2282 2283 enic_dev_soft_reset(enic); 2284 enic_reset_addr_lists(enic); 2285 enic_init_vnic_resources(enic); 2286 enic_set_rss_nic_cfg(enic); 2287 enic_dev_set_ig_vlan_rewrite_mode(enic); 2288 enic_ext_cq(enic); 2289 2290 enic_open(enic->netdev); 2291 2292 /* Re-establish the admin/MBOX channel after the data path is back up. 2293 * It was fully torn down by enic_admin_channel_close() above; 2294 * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link 2295 * state, or for a VF re-runs the probe-time PF handshake. 2296 */ 2297 if (enic_has_admin_chan(enic)) 2298 enic_admin_chan_reopen(enic); 2299 2300 /* Allow infiniband to fiddle with the device again */ 2301 enic_set_api_busy(enic, false); 2302 2303 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2304 2305 rtnl_unlock(); 2306 } 2307 2308 static void enic_tx_hang_reset(struct work_struct *work) 2309 { 2310 struct enic *enic = container_of(work, struct enic, tx_hang_reset); 2311 2312 rtnl_lock(); 2313 2314 /* Stop any activity from infiniband */ 2315 enic_set_api_busy(enic, true); 2316 2317 /* Fully tear down the V2 admin/MBOX channel before the hang reset, for 2318 * the same reason as the soft reset path: stop the admin QP and free 2319 * the admin resources before the hardware queues are wiped. 2320 */ 2321 if (enic_has_admin_chan(enic)) 2322 enic_admin_channel_close(enic); 2323 2324 enic_dev_hang_notify(enic); 2325 enic_stop(enic->netdev); 2326 if (enic_is_sriov_vf_v2(enic)) 2327 enic_mbox_vf_link_state_reset(enic); 2328 2329 enic_dev_hang_reset(enic); 2330 enic_reset_addr_lists(enic); 2331 enic_init_vnic_resources(enic); 2332 enic_set_rss_nic_cfg(enic); 2333 enic_dev_set_ig_vlan_rewrite_mode(enic); 2334 enic_ext_cq(enic); 2335 2336 enic_open(enic->netdev); 2337 2338 /* Re-establish the admin/MBOX channel after the data path is back up. 2339 * It was fully torn down by enic_admin_channel_close() above; 2340 * enic_admin_chan_reopen() reopens it and, for a PF re-pushes link 2341 * state, or for a VF re-runs the probe-time PF handshake. 2342 */ 2343 if (enic_has_admin_chan(enic)) 2344 enic_admin_chan_reopen(enic); 2345 2346 /* Allow infiniband to fiddle with the device again */ 2347 enic_set_api_busy(enic, false); 2348 2349 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2350 2351 rtnl_unlock(); 2352 } 2353 2354 static int enic_set_intr_mode(struct enic *enic) 2355 { 2356 unsigned int admin_reserve = enic->has_admin_channel ? 1 : 0; 2357 unsigned int min_intr = ENIC_MSIX_MIN_INTR + admin_reserve; 2358 unsigned int i; 2359 int num_intr; 2360 2361 /* Set interrupt mode (INTx, MSI, MSI-X) depending 2362 * on system capabilities. 2363 * 2364 * Try MSI-X first 2365 */ 2366 2367 if (enic->config.intr_mode < 1 && 2368 enic->intr_avail >= min_intr) { 2369 for (i = 0; i < enic->intr_avail; i++) 2370 enic->msix_entry[i].entry = i; 2371 2372 num_intr = pci_enable_msix_range(enic->pdev, enic->msix_entry, 2373 min_intr, 2374 enic->intr_avail); 2375 if (num_intr > 0) { 2376 vnic_dev_set_intr_mode(enic->vdev, 2377 VNIC_DEV_INTR_MODE_MSIX); 2378 enic->intr_avail = num_intr; 2379 return 0; 2380 } 2381 } 2382 2383 /* Next try MSI 2384 * 2385 * We need 1 INTR 2386 */ 2387 2388 if (enic->config.intr_mode < 2 && 2389 enic->intr_avail >= 1 && 2390 !pci_enable_msi(enic->pdev)) { 2391 enic->intr_avail = 1; 2392 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI); 2393 return 0; 2394 } 2395 2396 /* Next try INTx 2397 * 2398 * We need 3 INTRs 2399 * (the first INTR is used for WQ/RQ) 2400 * (the second INTR is used for WQ/RQ errors) 2401 * (the last INTR is used for notifications) 2402 */ 2403 2404 if (enic->config.intr_mode < 3 && 2405 enic->intr_avail >= 3) { 2406 enic->intr_avail = 3; 2407 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX); 2408 return 0; 2409 } 2410 2411 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2412 2413 return -EINVAL; 2414 } 2415 2416 static void enic_clear_intr_mode(struct enic *enic) 2417 { 2418 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2419 case VNIC_DEV_INTR_MODE_MSIX: 2420 pci_disable_msix(enic->pdev); 2421 break; 2422 case VNIC_DEV_INTR_MODE_MSI: 2423 pci_disable_msi(enic->pdev); 2424 break; 2425 default: 2426 break; 2427 } 2428 2429 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2430 } 2431 2432 static int enic_adjust_resources(struct enic *enic) 2433 { 2434 unsigned int max_queues; 2435 unsigned int rq_default; 2436 unsigned int rq_avail; 2437 unsigned int wq_avail; 2438 2439 if (enic->rq_avail < 1 || enic->wq_avail < 1 || enic->cq_avail < 2) { 2440 dev_err(enic_get_dev(enic), 2441 "Not enough resources available rq: %d wq: %d cq: %d\n", 2442 enic->rq_avail, enic->wq_avail, 2443 enic->cq_avail); 2444 return -ENOSPC; 2445 } 2446 2447 if (is_kdump_kernel()) { 2448 dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n"); 2449 enic->rq_avail = 1; 2450 enic->wq_avail = 1; 2451 enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS; 2452 enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS; 2453 enic->config.mtu = min_t(u16, 1500, enic->config.mtu); 2454 } 2455 2456 /* if RSS isn't set, then we can only use one RQ */ 2457 if (!ENIC_SETTING(enic, RSS)) 2458 enic->rq_avail = 1; 2459 2460 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2461 case VNIC_DEV_INTR_MODE_INTX: 2462 case VNIC_DEV_INTR_MODE_MSI: 2463 enic->rq_count = 1; 2464 enic->wq_count = 1; 2465 enic->cq_count = 2; 2466 enic->intr_count = enic->intr_avail; 2467 break; 2468 case VNIC_DEV_INTR_MODE_MSIX: { 2469 /* Adjust the number of wqs/rqs/cqs/interrupts that will be 2470 * used based on which resource is the most constrained. 2471 * Reserve one extra MSI-X slot for the admin channel INTR 2472 * when has_admin_channel is set so that 2473 * enic_admin_setup_intr() can allocate at intr_count 2474 * within the intr_avail bounds even when the data queue 2475 * count is maxed out. intr_count counts only the data-path 2476 * IRQs (registered by enic_request_intr()); the admin INTR 2477 * lives at msix index intr_count and is set up later by 2478 * enic_admin_setup_intr(). 2479 */ 2480 unsigned int admin_reserve = enic->has_admin_channel ? 1 : 0; 2481 2482 wq_avail = min(enic->wq_avail, ENIC_WQ_MAX); 2483 rq_default = max(netif_get_num_default_rss_queues(), 2484 ENIC_RQ_MIN_DEFAULT); 2485 rq_avail = min3(enic->rq_avail, ENIC_RQ_MAX, rq_default); 2486 max_queues = min(enic->cq_avail, 2487 enic->intr_avail - ENIC_MSIX_RESERVED_INTR - 2488 admin_reserve); 2489 if (wq_avail + rq_avail <= max_queues) { 2490 enic->rq_count = rq_avail; 2491 enic->wq_count = wq_avail; 2492 } else { 2493 /* recalculate wq/rq count */ 2494 if (rq_avail < wq_avail) { 2495 enic->rq_count = min(rq_avail, max_queues / 2); 2496 enic->wq_count = max_queues - enic->rq_count; 2497 } else { 2498 enic->wq_count = min(wq_avail, max_queues / 2); 2499 enic->rq_count = max_queues - enic->wq_count; 2500 } 2501 } 2502 enic->cq_count = enic->rq_count + enic->wq_count; 2503 enic->intr_count = enic->cq_count + ENIC_MSIX_RESERVED_INTR; 2504 2505 break; 2506 } 2507 default: 2508 dev_err(enic_get_dev(enic), "Unknown interrupt mode\n"); 2509 return -EINVAL; 2510 } 2511 2512 return 0; 2513 } 2514 2515 static void enic_get_queue_stats_rx(struct net_device *dev, int idx, 2516 struct netdev_queue_stats_rx *rxs) 2517 { 2518 struct enic *enic = netdev_priv(dev); 2519 struct enic_rq_stats *rqstats = &enic->rq[idx].stats; 2520 2521 rxs->bytes = rqstats->bytes; 2522 rxs->packets = rqstats->packets; 2523 rxs->hw_drops = rqstats->bad_fcs + rqstats->pkt_truncated; 2524 rxs->hw_drop_overruns = rqstats->pkt_truncated; 2525 rxs->csum_unnecessary = rqstats->csum_unnecessary + 2526 rqstats->csum_unnecessary_encap; 2527 rxs->alloc_fail = rqstats->pp_alloc_fail; 2528 } 2529 2530 static void enic_get_queue_stats_tx(struct net_device *dev, int idx, 2531 struct netdev_queue_stats_tx *txs) 2532 { 2533 struct enic *enic = netdev_priv(dev); 2534 struct enic_wq_stats *wqstats = &enic->wq[idx].stats; 2535 2536 txs->bytes = wqstats->bytes; 2537 txs->packets = wqstats->packets; 2538 txs->csum_none = wqstats->csum_none; 2539 txs->needs_csum = wqstats->csum_partial + wqstats->encap_csum + 2540 wqstats->tso; 2541 txs->hw_gso_packets = wqstats->tso; 2542 txs->stop = wqstats->stopped; 2543 txs->wake = wqstats->wake; 2544 } 2545 2546 static void enic_get_base_stats(struct net_device *dev, 2547 struct netdev_queue_stats_rx *rxs, 2548 struct netdev_queue_stats_tx *txs) 2549 { 2550 rxs->bytes = 0; 2551 rxs->packets = 0; 2552 rxs->hw_drops = 0; 2553 rxs->hw_drop_overruns = 0; 2554 rxs->csum_unnecessary = 0; 2555 rxs->alloc_fail = 0; 2556 txs->bytes = 0; 2557 txs->packets = 0; 2558 txs->csum_none = 0; 2559 txs->needs_csum = 0; 2560 txs->hw_gso_packets = 0; 2561 txs->stop = 0; 2562 txs->wake = 0; 2563 } 2564 2565 static const struct net_device_ops enic_netdev_dynamic_ops = { 2566 .ndo_open = enic_open, 2567 .ndo_stop = enic_stop, 2568 .ndo_start_xmit = enic_hard_start_xmit, 2569 .ndo_get_stats64 = enic_get_stats, 2570 .ndo_validate_addr = eth_validate_addr, 2571 .ndo_set_rx_mode = enic_set_rx_mode, 2572 .ndo_set_mac_address = enic_set_mac_address_dynamic, 2573 .ndo_change_mtu = enic_change_mtu, 2574 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2575 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2576 .ndo_tx_timeout = enic_tx_timeout, 2577 .ndo_set_vf_port = enic_set_vf_port, 2578 .ndo_get_vf_port = enic_get_vf_port, 2579 .ndo_set_vf_mac = enic_set_vf_mac, 2580 #ifdef CONFIG_NET_POLL_CONTROLLER 2581 .ndo_poll_controller = enic_poll_controller, 2582 #endif 2583 #ifdef CONFIG_RFS_ACCEL 2584 .ndo_rx_flow_steer = enic_rx_flow_steer, 2585 #endif 2586 .ndo_features_check = enic_features_check, 2587 }; 2588 2589 static const struct net_device_ops enic_netdev_ops = { 2590 .ndo_open = enic_open, 2591 .ndo_stop = enic_stop, 2592 .ndo_start_xmit = enic_hard_start_xmit, 2593 .ndo_get_stats64 = enic_get_stats, 2594 .ndo_validate_addr = eth_validate_addr, 2595 .ndo_set_mac_address = enic_set_mac_address, 2596 .ndo_set_rx_mode = enic_set_rx_mode, 2597 .ndo_change_mtu = enic_change_mtu, 2598 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2599 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2600 .ndo_tx_timeout = enic_tx_timeout, 2601 .ndo_set_vf_port = enic_set_vf_port, 2602 .ndo_get_vf_port = enic_get_vf_port, 2603 .ndo_set_vf_mac = enic_set_vf_mac, 2604 #ifdef CONFIG_NET_POLL_CONTROLLER 2605 .ndo_poll_controller = enic_poll_controller, 2606 #endif 2607 #ifdef CONFIG_RFS_ACCEL 2608 .ndo_rx_flow_steer = enic_rx_flow_steer, 2609 #endif 2610 .ndo_features_check = enic_features_check, 2611 }; 2612 2613 static const struct netdev_stat_ops enic_netdev_stat_ops = { 2614 .get_queue_stats_rx = enic_get_queue_stats_rx, 2615 .get_queue_stats_tx = enic_get_queue_stats_tx, 2616 .get_base_stats = enic_get_base_stats, 2617 }; 2618 2619 static void enic_free_enic_resources(struct enic *enic) 2620 { 2621 kfree(enic->wq); 2622 enic->wq = NULL; 2623 2624 kfree(enic->rq); 2625 enic->rq = NULL; 2626 2627 kfree(enic->cq); 2628 enic->cq = NULL; 2629 2630 kfree(enic->napi); 2631 enic->napi = NULL; 2632 2633 kfree(enic->msix_entry); 2634 enic->msix_entry = NULL; 2635 2636 kfree(enic->msix); 2637 enic->msix = NULL; 2638 2639 kfree(enic->intr); 2640 enic->intr = NULL; 2641 } 2642 2643 static int enic_alloc_enic_resources(struct enic *enic) 2644 { 2645 enic->wq = kzalloc_objs(struct enic_wq, enic->wq_avail); 2646 if (!enic->wq) 2647 goto free_queues; 2648 2649 enic->rq = kzalloc_objs(struct enic_rq, enic->rq_avail); 2650 if (!enic->rq) 2651 goto free_queues; 2652 2653 enic->cq = kzalloc_objs(struct vnic_cq, enic->cq_avail); 2654 if (!enic->cq) 2655 goto free_queues; 2656 2657 enic->napi = kzalloc_objs(struct napi_struct, 2658 enic->wq_avail + enic->rq_avail); 2659 if (!enic->napi) 2660 goto free_queues; 2661 2662 enic->msix_entry = kzalloc_objs(struct msix_entry, enic->intr_avail); 2663 if (!enic->msix_entry) 2664 goto free_queues; 2665 2666 enic->msix = kzalloc_objs(struct enic_msix_entry, enic->intr_avail); 2667 if (!enic->msix) 2668 goto free_queues; 2669 2670 enic->intr = kzalloc_objs(struct vnic_intr, enic->intr_avail); 2671 if (!enic->intr) 2672 goto free_queues; 2673 2674 return 0; 2675 2676 free_queues: 2677 enic_free_enic_resources(enic); 2678 return -ENOMEM; 2679 } 2680 2681 static void enic_dev_deinit(struct enic *enic) 2682 { 2683 unsigned int i; 2684 2685 for (i = 0; i < enic->rq_count; i++) 2686 __netif_napi_del(&enic->napi[i]); 2687 2688 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 2689 for (i = 0; i < enic->wq_count; i++) 2690 __netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]); 2691 2692 /* observe RCU grace period after __netif_napi_del() calls */ 2693 synchronize_net(); 2694 2695 enic_free_vnic_resources(enic); 2696 enic_clear_intr_mode(enic); 2697 enic_free_affinity_hint(enic); 2698 enic_free_enic_resources(enic); 2699 } 2700 2701 static int enic_dev_init(struct enic *enic) 2702 { 2703 struct device *dev = enic_get_dev(enic); 2704 struct net_device *netdev = enic->netdev; 2705 unsigned int i; 2706 int err; 2707 2708 /* Get interrupt coalesce timer info */ 2709 err = enic_dev_intr_coal_timer_info(enic); 2710 if (err) { 2711 dev_warn(dev, "Using default conversion factor for " 2712 "interrupt coalesce timer\n"); 2713 vnic_dev_intr_coal_timer_info_default(enic->vdev); 2714 } 2715 2716 /* Get vNIC configuration 2717 */ 2718 2719 err = enic_get_vnic_config(enic); 2720 if (err) { 2721 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 2722 return err; 2723 } 2724 2725 /* Get available resource counts 2726 */ 2727 2728 enic_get_res_counts(enic); 2729 2730 enic_ext_cq(enic); 2731 2732 err = enic_alloc_enic_resources(enic); 2733 if (err) { 2734 dev_err(dev, "Failed to allocate enic resources\n"); 2735 return err; 2736 } 2737 2738 /* Set interrupt mode based on system capabilities */ 2739 2740 err = enic_set_intr_mode(enic); 2741 if (err) { 2742 dev_err(dev, "Failed to set intr mode based on resource " 2743 "counts and system capabilities, aborting\n"); 2744 goto err_out_free_vnic_resources; 2745 } 2746 2747 /* Adjust resource counts based on most constrained resources */ 2748 err = enic_adjust_resources(enic); 2749 if (err) { 2750 dev_err(dev, "Failed to adjust resources\n"); 2751 goto err_out_free_vnic_resources; 2752 } 2753 2754 /* Allocate and configure vNIC resources 2755 */ 2756 2757 err = enic_alloc_vnic_resources(enic); 2758 if (err) { 2759 dev_err(dev, "Failed to alloc vNIC resources, aborting\n"); 2760 goto err_out_free_vnic_resources; 2761 } 2762 2763 enic_init_vnic_resources(enic); 2764 2765 err = enic_set_rss_nic_cfg(enic); 2766 if (err) { 2767 dev_err(dev, "Failed to config nic, aborting\n"); 2768 goto err_out_free_vnic_resources; 2769 } 2770 2771 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2772 default: 2773 netif_napi_add(netdev, &enic->napi[0], enic_poll); 2774 break; 2775 case VNIC_DEV_INTR_MODE_MSIX: 2776 for (i = 0; i < enic->rq_count; i++) { 2777 netif_napi_add(netdev, &enic->napi[i], 2778 enic_poll_msix_rq); 2779 } 2780 for (i = 0; i < enic->wq_count; i++) 2781 netif_napi_add(netdev, 2782 &enic->napi[enic_cq_wq(enic, i)], 2783 enic_poll_msix_wq); 2784 break; 2785 } 2786 2787 return 0; 2788 2789 err_out_free_vnic_resources: 2790 enic_free_affinity_hint(enic); 2791 enic_clear_intr_mode(enic); 2792 enic_free_vnic_resources(enic); 2793 enic_free_enic_resources(enic); 2794 2795 return err; 2796 } 2797 2798 static void enic_iounmap(struct enic *enic) 2799 { 2800 unsigned int i; 2801 2802 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) 2803 if (enic->bar[i].vaddr) 2804 iounmap(enic->bar[i].vaddr); 2805 } 2806 2807 #ifdef CONFIG_PCI_IOV 2808 static void enic_sriov_detect_vf_type(struct enic *enic) 2809 { 2810 struct pci_dev *pdev = enic->pdev; 2811 u64 supported_versions, a1 = 0; 2812 u16 vf_dev_id; 2813 int pos; 2814 int err; 2815 2816 if (enic_is_sriov_vf(enic) || enic_is_dynamic(enic)) 2817 return; 2818 2819 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2820 if (!pos) { 2821 enic->vf_type = ENIC_VF_TYPE_NONE; 2822 return; 2823 } 2824 2825 pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_dev_id); 2826 2827 switch (vf_dev_id) { 2828 case PCI_DEVICE_ID_CISCO_VIC_ENET_VF: 2829 enic->vf_type = ENIC_VF_TYPE_V1; 2830 break; 2831 case PCI_DEVICE_ID_CISCO_VIC_ENET_VF_USNIC: 2832 enic->vf_type = ENIC_VF_TYPE_USNIC; 2833 break; 2834 case PCI_DEVICE_ID_CISCO_VIC_ENET_VF_V2: 2835 enic->vf_type = ENIC_VF_TYPE_V2; 2836 break; 2837 default: 2838 enic->vf_type = ENIC_VF_TYPE_NONE; 2839 break; 2840 } 2841 2842 if (enic->vf_type != ENIC_VF_TYPE_V2) 2843 return; 2844 2845 /* A successful command means firmware recognizes 2846 * VIC_FEATURE_SRIOV; supported_versions is available 2847 * for sub-feature versioning in the future. 2848 */ 2849 err = vnic_dev_get_supported_feature_ver(enic->vdev, 2850 VIC_FEATURE_SRIOV, 2851 &supported_versions, 2852 &a1); 2853 if (err) { 2854 dev_warn(&pdev->dev, 2855 "SR-IOV V2 not supported by current firmware. Upgrade to VIC FW 5.3(4.72) or higher.\n"); 2856 enic->vf_type = ENIC_VF_TYPE_NONE; 2857 } 2858 } 2859 2860 static int __maybe_unused 2861 enic_sriov_v2_enable(struct enic *enic, int num_vfs) 2862 { 2863 int err; 2864 2865 if (!enic->has_admin_channel) { 2866 netdev_err(enic->netdev, 2867 "V2 SR-IOV requires admin channel resources\n"); 2868 return -EOPNOTSUPP; 2869 } 2870 2871 enic->vf_state = kzalloc_objs(*enic->vf_state, num_vfs); 2872 if (!enic->vf_state) 2873 return -ENOMEM; 2874 2875 /* Install the MBOX receive handler before the admin interrupt is 2876 * unmasked in enic_admin_channel_open(), so no early completion is 2877 * dropped. 2878 */ 2879 enic_mbox_init(enic); 2880 2881 err = enic_admin_channel_open(enic); 2882 if (err) { 2883 netdev_err(enic->netdev, 2884 "Failed to open admin channel: %d\n", err); 2885 goto free_vf_state; 2886 } 2887 2888 enic->num_vfs = num_vfs; 2889 2890 err = pci_enable_sriov(enic->pdev, num_vfs); 2891 if (err) { 2892 netdev_err(enic->netdev, 2893 "pci_enable_sriov failed: %d\n", err); 2894 goto close_admin; 2895 } 2896 2897 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2898 return num_vfs; 2899 2900 close_admin: 2901 enic->num_vfs = 0; 2902 enic_admin_channel_close(enic); 2903 free_vf_state: 2904 kfree(enic->vf_state); 2905 enic->vf_state = NULL; 2906 return err; 2907 } 2908 2909 static void enic_sriov_v2_disable(struct enic *enic) 2910 { 2911 /* Stop new VF link-state broadcasts before tearing down vf_state. 2912 * Clearing ENIC_SRIOV_ENABLED makes enic_link_check() (called from 2913 * the notify timer/ISR) skip the VF notify path, and cancelling 2914 * link_notify_work ensures any already-queued broadcast has finished 2915 * before vf_state is freed, closing a use-after-free window. 2916 */ 2917 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2918 cancel_work_sync(&enic->link_notify_work); 2919 2920 pci_disable_sriov(enic->pdev); 2921 enic_admin_channel_close(enic); 2922 kfree(enic->vf_state); 2923 enic->vf_state = NULL; 2924 enic->num_vfs = 0; 2925 } 2926 2927 /* 2928 * enic_sriov_configure() and its V2 helpers are defined but not yet wired 2929 * into enic_driver via .sriov_configure (see the __maybe_unused annotations); 2930 * V2 enable/disable is activated in a follow-up series. Because the callback 2931 * is not registered, it cannot run concurrently with the rtnl-protected reset 2932 * paths (enic_reset(), enic_tx_hang_reset()) yet. Serialization against those 2933 * paths is added together with the .sriov_configure wiring in that series. 2934 */ 2935 static int __maybe_unused 2936 enic_sriov_configure(struct pci_dev *pdev, int num_vfs) 2937 { 2938 struct net_device *netdev = pci_get_drvdata(pdev); 2939 struct enic *enic = netdev_priv(netdev); 2940 struct enic_port_profile *pp; 2941 int err; 2942 2943 if (num_vfs > 0) { 2944 if (enic->config.mq_subvnic_count) { 2945 netdev_err(netdev, 2946 "SR-IOV not supported with multi-queue sub-vnics\n"); 2947 return -EOPNOTSUPP; 2948 } 2949 2950 if (enic->vf_type == ENIC_VF_TYPE_NONE) { 2951 netdev_err(netdev, 2952 "SR-IOV not supported on this firmware version\n"); 2953 return -EOPNOTSUPP; 2954 } 2955 2956 if (enic->vf_type == ENIC_VF_TYPE_V2) 2957 return enic_sriov_v2_enable(enic, num_vfs); 2958 2959 pp = kzalloc_objs(*pp, num_vfs); 2960 if (!pp) 2961 return -ENOMEM; 2962 2963 err = pci_enable_sriov(pdev, num_vfs); 2964 if (err) { 2965 kfree(pp); 2966 return err; 2967 } 2968 2969 kfree(enic->pp); 2970 enic->pp = pp; 2971 enic->num_vfs = num_vfs; 2972 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2973 return num_vfs; 2974 } 2975 2976 if (!enic_sriov_enabled(enic)) 2977 return 0; 2978 2979 if (enic->vf_type == ENIC_VF_TYPE_V2) { 2980 enic_sriov_v2_disable(enic); 2981 return 0; 2982 } 2983 2984 pp = kzalloc_obj(*enic->pp); 2985 if (!pp) 2986 return -ENOMEM; 2987 2988 pci_disable_sriov(pdev); 2989 enic->num_vfs = 0; 2990 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2991 2992 kfree(enic->pp); 2993 enic->pp = pp; 2994 2995 return 0; 2996 } 2997 #endif 2998 2999 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3000 { 3001 struct device *dev = &pdev->dev; 3002 struct net_device *netdev; 3003 struct enic *enic; 3004 int using_dac = 0; 3005 unsigned int i; 3006 int err; 3007 #ifdef CONFIG_PCI_IOV 3008 int pos = 0; 3009 #endif 3010 int num_pps = 1; 3011 3012 /* Allocate net device structure and initialize. Private 3013 * instance data is initialized to zero. 3014 */ 3015 3016 netdev = alloc_etherdev_mqs(sizeof(struct enic), 3017 ENIC_RQ_MAX, ENIC_WQ_MAX); 3018 if (!netdev) 3019 return -ENOMEM; 3020 3021 pci_set_drvdata(pdev, netdev); 3022 3023 SET_NETDEV_DEV(netdev, &pdev->dev); 3024 3025 enic = netdev_priv(netdev); 3026 enic->netdev = netdev; 3027 enic->pdev = pdev; 3028 spin_lock_init(&enic->vf_link_state_lock); 3029 3030 /* Setup PCI resources 3031 */ 3032 3033 err = pci_enable_device_mem(pdev); 3034 if (err) { 3035 dev_err(dev, "Cannot enable PCI device, aborting\n"); 3036 goto err_out_free_netdev; 3037 } 3038 3039 err = pci_request_regions(pdev, DRV_NAME); 3040 if (err) { 3041 dev_err(dev, "Cannot request PCI regions, aborting\n"); 3042 goto err_out_disable_device; 3043 } 3044 3045 pci_set_master(pdev); 3046 3047 /* Query PCI controller on system for DMA addressing 3048 * limitation for the device. Try 47-bit first, and 3049 * fail to 32-bit. 3050 */ 3051 3052 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(47)); 3053 if (err) { 3054 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 3055 if (err) { 3056 dev_err(dev, "No usable DMA configuration, aborting\n"); 3057 goto err_out_release_regions; 3058 } 3059 } else { 3060 using_dac = 1; 3061 } 3062 3063 /* Map vNIC resources from BAR0-5 3064 */ 3065 3066 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) { 3067 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 3068 continue; 3069 enic->bar[i].len = pci_resource_len(pdev, i); 3070 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len); 3071 if (!enic->bar[i].vaddr) { 3072 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i); 3073 err = -ENODEV; 3074 goto err_out_iounmap; 3075 } 3076 enic->bar[i].bus_addr = pci_resource_start(pdev, i); 3077 } 3078 3079 /* Register vNIC device 3080 */ 3081 3082 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar, 3083 ARRAY_SIZE(enic->bar)); 3084 if (!enic->vdev) { 3085 dev_err(dev, "vNIC registration failed, aborting\n"); 3086 err = -ENODEV; 3087 goto err_out_iounmap; 3088 } 3089 3090 err = vnic_devcmd_init(enic->vdev); 3091 3092 if (err) 3093 goto err_out_vnic_unregister; 3094 3095 #ifdef CONFIG_PCI_IOV 3096 enic_sriov_detect_vf_type(enic); 3097 3098 /* Auto-enable SR-IOV only for the legacy VF types. V2 VFs require 3099 * the admin channel, which is not yet set up at probe time (V2 SR-IOV 3100 * will be enabled through the sysfs .sriov_configure callback once a 3101 * follow-up series wires it up); and a V2-capable device whose 3102 * firmware lacks V2 support is downgraded to ENIC_VF_TYPE_NONE by 3103 * enic_sriov_detect_vf_type() and must not be brought up through the 3104 * legacy pci_enable_sriov() path either. 3105 */ 3106 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 3107 if (pos) { 3108 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, 3109 &enic->num_vfs); 3110 if (enic->num_vfs && 3111 (enic->vf_type == ENIC_VF_TYPE_V1 || 3112 enic->vf_type == ENIC_VF_TYPE_USNIC)) { 3113 err = pci_enable_sriov(pdev, enic->num_vfs); 3114 if (err) { 3115 dev_err(dev, "SRIOV enable failed, aborting." 3116 " pci_enable_sriov() returned %d\n", 3117 err); 3118 goto err_out_vnic_unregister; 3119 } 3120 enic->priv_flags |= ENIC_SRIOV_ENABLED; 3121 num_pps = enic->num_vfs; 3122 } 3123 } 3124 #endif 3125 3126 /* Allocate structure for port profiles */ 3127 enic->pp = kzalloc_objs(*enic->pp, num_pps); 3128 if (!enic->pp) { 3129 err = -ENOMEM; 3130 goto err_out_disable_sriov_pp; 3131 } 3132 3133 /* Issue device open to get device in known state 3134 */ 3135 3136 err = enic_dev_open(enic); 3137 if (err) { 3138 dev_err(dev, "vNIC dev open failed, aborting\n"); 3139 goto err_out_disable_sriov; 3140 } 3141 3142 /* Setup devcmd lock 3143 */ 3144 3145 spin_lock_init(&enic->devcmd_lock); 3146 spin_lock_init(&enic->enic_api_lock); 3147 3148 /* 3149 * Set ingress vlan rewrite mode before vnic initialization 3150 */ 3151 3152 err = enic_dev_set_ig_vlan_rewrite_mode(enic); 3153 if (err) { 3154 dev_err(dev, 3155 "Failed to set ingress vlan rewrite mode, aborting.\n"); 3156 goto err_out_dev_close; 3157 } 3158 3159 /* Issue device init to initialize the vnic-to-switch link. 3160 * We'll start with carrier off and wait for link UP 3161 * notification later to turn on carrier. We don't need 3162 * to wait here for the vnic-to-switch link initialization 3163 * to complete; link UP notification is the indication that 3164 * the process is complete. 3165 */ 3166 3167 netif_carrier_off(netdev); 3168 3169 /* Do not call dev_init for a dynamic vnic. 3170 * For a dynamic vnic, init_prov_info will be 3171 * called later by an upper layer. 3172 */ 3173 3174 if (!enic_is_dynamic(enic)) { 3175 err = vnic_dev_init(enic->vdev, 0); 3176 if (err) { 3177 dev_err(dev, "vNIC dev init failed, aborting\n"); 3178 goto err_out_dev_close; 3179 } 3180 } 3181 3182 err = enic_dev_init(enic); 3183 if (err) { 3184 dev_err(dev, "Device initialization failed, aborting\n"); 3185 goto err_out_dev_close; 3186 } 3187 3188 /* Initialise link_notify_work before the V2-VF admin-open block below: 3189 * its error path (err_out_admin_close -> enic_admin_channel_close() -> 3190 * cancel_work_sync()) would otherwise act on an uninitialised work. 3191 */ 3192 INIT_WORK(&enic->link_notify_work, enic_link_notify_work_handler); 3193 3194 /* V2 VF: open admin channel and register with PF. 3195 * Must happen before register_netdev so the VF is fully 3196 * initialized before the interface is visible to userspace. 3197 * 3198 * enic_mbox_init() installs the receive handler and resets the 3199 * sequence number; it must run before enic_admin_channel_open() 3200 * unmasks the admin interrupt so an early completion is not dropped. 3201 */ 3202 if (enic_is_sriov_vf_v2(enic)) { 3203 enic_mbox_init(enic); 3204 err = enic_admin_channel_open(enic); 3205 if (err) { 3206 dev_err(dev, 3207 "Failed to open admin channel: %d\n", err); 3208 goto err_out_dev_deinit; 3209 } 3210 err = enic_mbox_vf_capability_check(enic); 3211 if (err) { 3212 dev_err(dev, 3213 "MBOX capability check failed: %d\n", err); 3214 goto err_out_admin_close; 3215 } 3216 err = enic_mbox_vf_register(enic); 3217 if (err) { 3218 dev_err(dev, 3219 "MBOX VF registration failed: %d\n", err); 3220 goto err_out_admin_close; 3221 } 3222 } 3223 3224 netif_set_real_num_tx_queues(netdev, enic->wq_count); 3225 netif_set_real_num_rx_queues(netdev, enic->rq_count); 3226 3227 /* Setup notification timer, HW reset task, and wq locks 3228 */ 3229 3230 timer_setup(&enic->notify_timer, enic_notify_timer, 0); 3231 3232 enic_rfs_flw_tbl_init(enic); 3233 INIT_WORK(&enic->reset, enic_reset); 3234 INIT_WORK(&enic->tx_hang_reset, enic_tx_hang_reset); 3235 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work); 3236 3237 for (i = 0; i < enic->wq_count; i++) 3238 spin_lock_init(&enic->wq[i].lock); 3239 3240 /* Register net device 3241 */ 3242 3243 enic->port_mtu = enic->config.mtu; 3244 3245 err = enic_set_mac_addr(netdev, enic->mac_addr); 3246 if (err) { 3247 dev_err(dev, "Invalid MAC address, aborting\n"); 3248 goto err_out_admin_close; 3249 } 3250 3251 enic->tx_coalesce_usecs = enic->config.intr_timer_usec; 3252 /* rx coalesce time already got initialized. This gets used 3253 * if adaptive coal is turned off 3254 */ 3255 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs; 3256 3257 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 3258 netdev->netdev_ops = &enic_netdev_dynamic_ops; 3259 else 3260 netdev->netdev_ops = &enic_netdev_ops; 3261 netdev->stat_ops = &enic_netdev_stat_ops; 3262 3263 netdev->watchdog_timeo = 2 * HZ; 3264 enic_set_ethtool_ops(netdev); 3265 3266 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 3267 if (ENIC_SETTING(enic, LOOP)) { 3268 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX; 3269 enic->loop_enable = 1; 3270 enic->loop_tag = enic->config.loop_tag; 3271 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag); 3272 } 3273 if (ENIC_SETTING(enic, TXCSUM)) 3274 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM; 3275 if (ENIC_SETTING(enic, TSO)) 3276 netdev->hw_features |= NETIF_F_TSO | 3277 NETIF_F_TSO6 | NETIF_F_TSO_ECN; 3278 if (ENIC_SETTING(enic, RSS)) 3279 netdev->hw_features |= NETIF_F_RXHASH; 3280 if (ENIC_SETTING(enic, RXCSUM)) 3281 netdev->hw_features |= NETIF_F_RXCSUM; 3282 if (ENIC_SETTING(enic, VXLAN)) { 3283 u64 patch_level; 3284 u64 a1 = 0; 3285 3286 netdev->hw_enc_features |= NETIF_F_RXCSUM | 3287 NETIF_F_TSO | 3288 NETIF_F_TSO6 | 3289 NETIF_F_TSO_ECN | 3290 NETIF_F_GSO_UDP_TUNNEL | 3291 NETIF_F_HW_CSUM | 3292 NETIF_F_GSO_UDP_TUNNEL_CSUM; 3293 netdev->hw_features |= netdev->hw_enc_features; 3294 /* get bit mask from hw about supported offload bit level 3295 * BIT(0) = fw supports patch_level 0 3296 * fcoe bit = encap 3297 * fcoe_fc_crc_ok = outer csum ok 3298 * BIT(1) = always set by fw 3299 * BIT(2) = fw supports patch_level 2 3300 * BIT(0) in rss_hash = encap 3301 * BIT(1,2) in rss_hash = outer_ip_csum_ok/ 3302 * outer_tcp_csum_ok 3303 * used in enic_rq_indicate_buf 3304 */ 3305 err = vnic_dev_get_supported_feature_ver(enic->vdev, 3306 VIC_FEATURE_VXLAN, 3307 &patch_level, &a1); 3308 if (err) 3309 patch_level = 0; 3310 enic->vxlan.flags = (u8)a1; 3311 /* mask bits that are supported by driver 3312 */ 3313 patch_level &= BIT_ULL(0) | BIT_ULL(2); 3314 patch_level = fls(patch_level); 3315 patch_level = patch_level ? patch_level - 1 : 0; 3316 enic->vxlan.patch_level = patch_level; 3317 3318 if (vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ) == 1 || 3319 enic->vxlan.flags & ENIC_VXLAN_MULTI_WQ) { 3320 netdev->udp_tunnel_nic_info = &enic_udp_tunnels_v4; 3321 if (enic->vxlan.flags & ENIC_VXLAN_OUTER_IPV6) 3322 netdev->udp_tunnel_nic_info = &enic_udp_tunnels; 3323 } 3324 } 3325 3326 netdev->features |= netdev->hw_features; 3327 netdev->vlan_features |= netdev->features; 3328 3329 #ifdef CONFIG_RFS_ACCEL 3330 netdev->hw_features |= NETIF_F_NTUPLE; 3331 #endif 3332 3333 if (using_dac) 3334 netdev->features |= NETIF_F_HIGHDMA; 3335 3336 netdev->priv_flags |= IFF_UNICAST_FLT; 3337 3338 /* MTU range: 68 - 9000 */ 3339 netdev->min_mtu = ENIC_MIN_MTU; 3340 netdev->max_mtu = ENIC_MAX_MTU; 3341 netdev->mtu = enic->port_mtu; 3342 3343 err = register_netdev(netdev); 3344 if (err) { 3345 dev_err(dev, "Cannot register net device, aborting\n"); 3346 goto err_out_admin_close; 3347 } 3348 3349 return 0; 3350 3351 err_out_admin_close: 3352 if (enic_is_sriov_vf_v2(enic)) { 3353 if (READ_ONCE(enic->vf_registered)) { 3354 int unreg_err = enic_mbox_vf_unregister(enic); 3355 3356 if (unreg_err) 3357 netdev_warn(netdev, 3358 "Failed to unregister from PF: %d\n", 3359 unreg_err); 3360 } 3361 enic_admin_channel_close(enic); 3362 } 3363 err_out_dev_deinit: 3364 enic_dev_deinit(enic); 3365 err_out_dev_close: 3366 vnic_dev_close(enic->vdev); 3367 err_out_disable_sriov: 3368 kfree(enic->pp); 3369 err_out_disable_sriov_pp: 3370 #ifdef CONFIG_PCI_IOV 3371 if (enic_sriov_enabled(enic)) { 3372 pci_disable_sriov(pdev); 3373 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 3374 } 3375 #endif 3376 err_out_vnic_unregister: 3377 vnic_dev_unregister(enic->vdev); 3378 err_out_iounmap: 3379 enic_iounmap(enic); 3380 err_out_release_regions: 3381 pci_release_regions(pdev); 3382 err_out_disable_device: 3383 pci_disable_device(pdev); 3384 err_out_free_netdev: 3385 free_netdev(netdev); 3386 3387 return err; 3388 } 3389 3390 static void enic_remove(struct pci_dev *pdev) 3391 { 3392 struct net_device *netdev = pci_get_drvdata(pdev); 3393 3394 if (netdev) { 3395 struct enic *enic = netdev_priv(netdev); 3396 3397 disable_work_sync(&enic->reset); 3398 disable_work_sync(&enic->tx_hang_reset); 3399 disable_work_sync(&enic->change_mtu_work); 3400 3401 /* Close the admin channel and unregister from the PF before 3402 * unregister_netdev() to prevent a late PF notification from 3403 * touching a netdev that is being torn down. 3404 */ 3405 if (enic_is_sriov_vf_v2(enic)) { 3406 if (READ_ONCE(enic->vf_registered)) { 3407 int unreg_err = enic_mbox_vf_unregister(enic); 3408 3409 if (unreg_err) 3410 netdev_warn(netdev, 3411 "Failed to unregister from PF: %d\n", 3412 unreg_err); 3413 } 3414 enic_admin_channel_close(enic); 3415 } 3416 3417 unregister_netdev(netdev); 3418 /* unregister_netdev() -> enic_stop() stops the notify timer, so 3419 * no new link_notify_work can be queued past this point. Cancel 3420 * unconditionally to cover the narrow window where 3421 * enic_link_check() scheduled it just as SR-IOV was disabled. 3422 */ 3423 cancel_work_sync(&enic->link_notify_work); 3424 #ifdef CONFIG_PCI_IOV 3425 if (enic_sriov_enabled(enic)) { 3426 if (enic->vf_type == ENIC_VF_TYPE_V2) 3427 enic_sriov_v2_disable(enic); 3428 else 3429 pci_disable_sriov(pdev); 3430 } 3431 #endif 3432 enic_dev_deinit(enic); 3433 vnic_dev_close(enic->vdev); 3434 kfree(enic->pp); 3435 vnic_dev_unregister(enic->vdev); 3436 enic_iounmap(enic); 3437 pci_release_regions(pdev); 3438 pci_disable_device(pdev); 3439 free_netdev(netdev); 3440 } 3441 } 3442 3443 static struct pci_driver enic_driver = { 3444 .name = DRV_NAME, 3445 .id_table = enic_id_table, 3446 .probe = enic_probe, 3447 .remove = enic_remove, 3448 }; 3449 3450 module_pci_driver(enic_driver); 3451