1 #include <linux/gfp.h>
2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/swapfile.h>
7 #include <linux/swapops.h>
8 #include <linux/kmemleak.h>
9 #include <linux/sched/task.h>
10 #include <linux/execmem.h>
11
12 #include <asm/set_memory.h>
13 #include <asm/cpu_device_id.h>
14 #include <asm/e820/api.h>
15 #include <asm/init.h>
16 #include <asm/page.h>
17 #include <asm/page_types.h>
18 #include <asm/sections.h>
19 #include <asm/setup.h>
20 #include <asm/tlbflush.h>
21 #include <asm/tlb.h>
22 #include <asm/proto.h>
23 #include <asm/dma.h> /* for MAX_DMA_PFN */
24 #include <asm/kaslr.h>
25 #include <asm/hypervisor.h>
26 #include <asm/cpufeature.h>
27 #include <asm/pti.h>
28 #include <asm/text-patching.h>
29 #include <asm/memtype.h>
30 #include <asm/paravirt.h>
31 #include <asm/mmu_context.h>
32
33 /*
34 * We need to define the tracepoints somewhere, and tlb.c
35 * is only compiled when SMP=y.
36 */
37 #define CREATE_TRACE_POINTS
38 #include <trace/events/tlb.h>
39
40 #include "mm_internal.h"
41
42 /*
43 * Tables translating between page_cache_type_t and pte encoding.
44 *
45 * The default values are defined statically as minimal supported mode;
46 * WC and WT fall back to UC-. pat_init() updates these values to support
47 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
48 * for the details. Note, __early_ioremap() used during early boot-time
49 * takes pgprot_t (pte encoding) and does not use these tables.
50 *
51 * Index into __cachemode2pte_tbl[] is the cachemode.
52 *
53 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
54 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
55 */
56 static uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
57 [_PAGE_CACHE_MODE_WB ] = 0 | 0 ,
58 [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD,
59 [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
60 [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
61 [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
62 [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
63 };
64
cachemode2protval(enum page_cache_mode pcm)65 unsigned long cachemode2protval(enum page_cache_mode pcm)
66 {
67 if (likely(pcm == 0))
68 return 0;
69 return __cachemode2pte_tbl[pcm];
70 }
71 EXPORT_SYMBOL(cachemode2protval);
72
73 static uint8_t __pte2cachemode_tbl[8] = {
74 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB,
75 [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
76 [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
77 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,
78 [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
79 [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
80 [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
81 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
82 };
83
84 /*
85 * Check that the write-protect PAT entry is set for write-protect.
86 * To do this without making assumptions how PAT has been set up (Xen has
87 * another layout than the kernel), translate the _PAGE_CACHE_MODE_WP cache
88 * mode via the __cachemode2pte_tbl[] into protection bits (those protection
89 * bits will select a cache mode of WP or better), and then translate the
90 * protection bits back into the cache mode using __pte2cm_idx() and the
91 * __pte2cachemode_tbl[] array. This will return the really used cache mode.
92 */
x86_has_pat_wp(void)93 bool x86_has_pat_wp(void)
94 {
95 uint16_t prot = __cachemode2pte_tbl[_PAGE_CACHE_MODE_WP];
96
97 return __pte2cachemode_tbl[__pte2cm_idx(prot)] == _PAGE_CACHE_MODE_WP;
98 }
99
pgprot2cachemode(pgprot_t pgprot)100 enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
101 {
102 unsigned long masked;
103
104 masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
105 if (likely(masked == 0))
106 return 0;
107 return __pte2cachemode_tbl[__pte2cm_idx(masked)];
108 }
109
110 static unsigned long __initdata pgt_buf_start;
111 static unsigned long __initdata pgt_buf_end;
112 static unsigned long __initdata pgt_buf_top;
113
114 static unsigned long min_pfn_mapped;
115
116 static bool __initdata can_use_brk_pgt = true;
117
118 /*
119 * Pages returned are already directly mapped.
120 *
121 * Changing that is likely to break Xen, see commit:
122 *
123 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
124 *
125 * for detailed information.
126 */
alloc_low_pages(unsigned int num)127 __ref void *alloc_low_pages(unsigned int num)
128 {
129 unsigned long pfn;
130 int i;
131
132 if (after_bootmem) {
133 unsigned int order;
134
135 order = get_order((unsigned long)num << PAGE_SHIFT);
136 return (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO, order);
137 }
138
139 if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
140 unsigned long ret = 0;
141
142 if (min_pfn_mapped < max_pfn_mapped) {
143 ret = memblock_phys_alloc_range(
144 PAGE_SIZE * num, PAGE_SIZE,
145 min_pfn_mapped << PAGE_SHIFT,
146 max_pfn_mapped << PAGE_SHIFT);
147 }
148 if (!ret && can_use_brk_pgt)
149 ret = __pa(extend_brk(PAGE_SIZE * num, PAGE_SIZE));
150
151 if (!ret)
152 panic("alloc_low_pages: can not alloc memory");
153
154 pfn = ret >> PAGE_SHIFT;
155 } else {
156 pfn = pgt_buf_end;
157 pgt_buf_end += num;
158 }
159
160 for (i = 0; i < num; i++) {
161 void *adr;
162
163 adr = __va((pfn + i) << PAGE_SHIFT);
164 clear_page(adr);
165 }
166
167 return __va(pfn << PAGE_SHIFT);
168 }
169
170 /*
171 * By default need to be able to allocate page tables below PGD firstly for
172 * the 0-ISA_END_ADDRESS range and secondly for the initial PMD_SIZE mapping.
173 * With KASLR memory randomization, depending on the machine e820 memory and the
174 * PUD alignment, twice that many pages may be needed when KASLR memory
175 * randomization is enabled.
176 */
177
178 #define INIT_PGD_PAGE_TABLES 4
179
180 #ifndef CONFIG_RANDOMIZE_MEMORY
181 #define INIT_PGD_PAGE_COUNT (2 * INIT_PGD_PAGE_TABLES)
182 #else
183 #define INIT_PGD_PAGE_COUNT (4 * INIT_PGD_PAGE_TABLES)
184 #endif
185
186 #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
187 RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
early_alloc_pgt_buf(void)188 void __init early_alloc_pgt_buf(void)
189 {
190 unsigned long tables = INIT_PGT_BUF_SIZE;
191 phys_addr_t base;
192
193 base = __pa(extend_brk(tables, PAGE_SIZE));
194
195 pgt_buf_start = base >> PAGE_SHIFT;
196 pgt_buf_end = pgt_buf_start;
197 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
198 }
199
200 int after_bootmem;
201
202 early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
203
204 struct map_range {
205 unsigned long start;
206 unsigned long end;
207 unsigned page_size_mask;
208 };
209
210 static int page_size_mask;
211
212 /*
213 * Save some of cr4 feature set we're using (e.g. Pentium 4MB
214 * enable and PPro Global page enable), so that any CPU's that boot
215 * up after us can get the correct flags. Invoked on the boot CPU.
216 */
cr4_set_bits_and_update_boot(unsigned long mask)217 static inline void cr4_set_bits_and_update_boot(unsigned long mask)
218 {
219 mmu_cr4_features |= mask;
220 if (trampoline_cr4_features)
221 *trampoline_cr4_features = mmu_cr4_features;
222 cr4_set_bits(mask);
223 }
224
probe_page_size_mask(void)225 static void __init probe_page_size_mask(void)
226 {
227 /*
228 * For pagealloc debugging, identity mapping will use small pages.
229 * This will simplify cpa(), which otherwise needs to support splitting
230 * large pages into small in interrupt context, etc.
231 */
232 if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled())
233 page_size_mask |= 1 << PG_LEVEL_2M;
234 else
235 direct_gbpages = 0;
236
237 /* Enable PSE if available */
238 if (boot_cpu_has(X86_FEATURE_PSE))
239 cr4_set_bits_and_update_boot(X86_CR4_PSE);
240
241 /* Enable PGE if available */
242 __supported_pte_mask &= ~_PAGE_GLOBAL;
243 if (boot_cpu_has(X86_FEATURE_PGE)) {
244 cr4_set_bits_and_update_boot(X86_CR4_PGE);
245 __supported_pte_mask |= _PAGE_GLOBAL;
246 }
247
248 /* By the default is everything supported: */
249 __default_kernel_pte_mask = __supported_pte_mask;
250 /* Except when with PTI where the kernel is mostly non-Global: */
251 if (cpu_feature_enabled(X86_FEATURE_PTI))
252 __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
253
254 /* Enable 1 GB linear kernel mappings if available: */
255 if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) {
256 printk(KERN_INFO "Using GB pages for direct mapping\n");
257 page_size_mask |= 1 << PG_LEVEL_1G;
258 } else {
259 direct_gbpages = 0;
260 }
261 }
262
263 /*
264 * INVLPG may not properly flush Global entries on
265 * these CPUs. New microcode fixes the issue.
266 */
267 static const struct x86_cpu_id invlpg_miss_ids[] = {
268 X86_MATCH_VFM(INTEL_ALDERLAKE, 0x2e),
269 X86_MATCH_VFM(INTEL_ALDERLAKE_L, 0x42c),
270 X86_MATCH_VFM(INTEL_ATOM_GRACEMONT, 0x11),
271 X86_MATCH_VFM(INTEL_RAPTORLAKE, 0x118),
272 X86_MATCH_VFM(INTEL_RAPTORLAKE_P, 0x4117),
273 X86_MATCH_VFM(INTEL_RAPTORLAKE_S, 0x2e),
274 {}
275 };
276
setup_pcid(void)277 static void setup_pcid(void)
278 {
279 const struct x86_cpu_id *invlpg_miss_match;
280
281 if (!IS_ENABLED(CONFIG_X86_64))
282 return;
283
284 if (!boot_cpu_has(X86_FEATURE_PCID))
285 return;
286
287 invlpg_miss_match = x86_match_cpu(invlpg_miss_ids);
288
289 if (invlpg_miss_match &&
290 boot_cpu_data.microcode < invlpg_miss_match->driver_data) {
291 pr_info("Incomplete global flushes, disabling PCID");
292 setup_clear_cpu_cap(X86_FEATURE_PCID);
293 return;
294 }
295
296 if (boot_cpu_has(X86_FEATURE_PGE)) {
297 /*
298 * This can't be cr4_set_bits_and_update_boot() -- the
299 * trampoline code can't handle CR4.PCIDE and it wouldn't
300 * do any good anyway. Despite the name,
301 * cr4_set_bits_and_update_boot() doesn't actually cause
302 * the bits in question to remain set all the way through
303 * the secondary boot asm.
304 *
305 * Instead, we brute-force it and set CR4.PCIDE manually in
306 * start_secondary().
307 */
308 cr4_set_bits(X86_CR4_PCIDE);
309 } else {
310 /*
311 * flush_tlb_all(), as currently implemented, won't work if
312 * PCID is on but PGE is not. Since that combination
313 * doesn't exist on real hardware, there's no reason to try
314 * to fully support it, but it's polite to avoid corrupting
315 * data if we're on an improperly configured VM.
316 */
317 setup_clear_cpu_cap(X86_FEATURE_PCID);
318 }
319 }
320
321 #ifdef CONFIG_X86_32
322 #define NR_RANGE_MR 3
323 #else /* CONFIG_X86_64 */
324 #define NR_RANGE_MR 5
325 #endif
326
save_mr(struct map_range * mr,int nr_range,unsigned long start_pfn,unsigned long end_pfn,unsigned long page_size_mask)327 static int __meminit save_mr(struct map_range *mr, int nr_range,
328 unsigned long start_pfn, unsigned long end_pfn,
329 unsigned long page_size_mask)
330 {
331 if (start_pfn < end_pfn) {
332 if (nr_range >= NR_RANGE_MR)
333 panic("run out of range for init_memory_mapping\n");
334 mr[nr_range].start = start_pfn<<PAGE_SHIFT;
335 mr[nr_range].end = end_pfn<<PAGE_SHIFT;
336 mr[nr_range].page_size_mask = page_size_mask;
337 nr_range++;
338 }
339
340 return nr_range;
341 }
342
343 /*
344 * adjust the page_size_mask for small range to go with
345 * big page size instead small one if nearby are ram too.
346 */
adjust_range_page_size_mask(struct map_range * mr,int nr_range)347 static void __ref adjust_range_page_size_mask(struct map_range *mr,
348 int nr_range)
349 {
350 int i;
351
352 for (i = 0; i < nr_range; i++) {
353 if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
354 !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
355 unsigned long start = round_down(mr[i].start, PMD_SIZE);
356 unsigned long end = round_up(mr[i].end, PMD_SIZE);
357
358 #ifdef CONFIG_X86_32
359 if ((end >> PAGE_SHIFT) > max_low_pfn)
360 continue;
361 #endif
362
363 if (memblock_is_region_memory(start, end - start))
364 mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
365 }
366 if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
367 !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
368 unsigned long start = round_down(mr[i].start, PUD_SIZE);
369 unsigned long end = round_up(mr[i].end, PUD_SIZE);
370
371 if (memblock_is_region_memory(start, end - start))
372 mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
373 }
374 }
375 }
376
page_size_string(struct map_range * mr)377 static const char *page_size_string(struct map_range *mr)
378 {
379 static const char str_1g[] = "1G";
380 static const char str_2m[] = "2M";
381 static const char str_4m[] = "4M";
382 static const char str_4k[] = "4k";
383
384 if (mr->page_size_mask & (1<<PG_LEVEL_1G))
385 return str_1g;
386 /*
387 * 32-bit without PAE has a 4M large page size.
388 * PG_LEVEL_2M is misnamed, but we can at least
389 * print out the right size in the string.
390 */
391 if (IS_ENABLED(CONFIG_X86_32) &&
392 !IS_ENABLED(CONFIG_X86_PAE) &&
393 mr->page_size_mask & (1<<PG_LEVEL_2M))
394 return str_4m;
395
396 if (mr->page_size_mask & (1<<PG_LEVEL_2M))
397 return str_2m;
398
399 return str_4k;
400 }
401
split_mem_range(struct map_range * mr,int nr_range,unsigned long start,unsigned long end)402 static int __meminit split_mem_range(struct map_range *mr, int nr_range,
403 unsigned long start,
404 unsigned long end)
405 {
406 unsigned long start_pfn, end_pfn, limit_pfn;
407 unsigned long pfn;
408 int i;
409
410 limit_pfn = PFN_DOWN(end);
411
412 /* head if not big page alignment ? */
413 pfn = start_pfn = PFN_DOWN(start);
414 #ifdef CONFIG_X86_32
415 /*
416 * Don't use a large page for the first 2/4MB of memory
417 * because there are often fixed size MTRRs in there
418 * and overlapping MTRRs into large pages can cause
419 * slowdowns.
420 */
421 if (pfn == 0)
422 end_pfn = PFN_DOWN(PMD_SIZE);
423 else
424 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
425 #else /* CONFIG_X86_64 */
426 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
427 #endif
428 if (end_pfn > limit_pfn)
429 end_pfn = limit_pfn;
430 if (start_pfn < end_pfn) {
431 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
432 pfn = end_pfn;
433 }
434
435 /* big page (2M) range */
436 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
437 #ifdef CONFIG_X86_32
438 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
439 #else /* CONFIG_X86_64 */
440 end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
441 if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
442 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
443 #endif
444
445 if (start_pfn < end_pfn) {
446 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
447 page_size_mask & (1<<PG_LEVEL_2M));
448 pfn = end_pfn;
449 }
450
451 #ifdef CONFIG_X86_64
452 /* big page (1G) range */
453 start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
454 end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
455 if (start_pfn < end_pfn) {
456 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
457 page_size_mask &
458 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
459 pfn = end_pfn;
460 }
461
462 /* tail is not big page (1G) alignment */
463 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
464 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
465 if (start_pfn < end_pfn) {
466 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
467 page_size_mask & (1<<PG_LEVEL_2M));
468 pfn = end_pfn;
469 }
470 #endif
471
472 /* tail is not big page (2M) alignment */
473 start_pfn = pfn;
474 end_pfn = limit_pfn;
475 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
476
477 if (!after_bootmem)
478 adjust_range_page_size_mask(mr, nr_range);
479
480 /* try to merge same page size and continuous */
481 for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
482 unsigned long old_start;
483 if (mr[i].end != mr[i+1].start ||
484 mr[i].page_size_mask != mr[i+1].page_size_mask)
485 continue;
486 /* move it */
487 old_start = mr[i].start;
488 memmove(&mr[i], &mr[i+1],
489 (nr_range - 1 - i) * sizeof(struct map_range));
490 mr[i--].start = old_start;
491 nr_range--;
492 }
493
494 for (i = 0; i < nr_range; i++)
495 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
496 mr[i].start, mr[i].end - 1,
497 page_size_string(&mr[i]));
498
499 return nr_range;
500 }
501
502 struct range pfn_mapped[E820_MAX_ENTRIES];
503 int nr_pfn_mapped;
504
add_pfn_range_mapped(unsigned long start_pfn,unsigned long end_pfn)505 static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
506 {
507 nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_MAX_ENTRIES,
508 nr_pfn_mapped, start_pfn, end_pfn);
509 nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_MAX_ENTRIES);
510
511 max_pfn_mapped = max(max_pfn_mapped, end_pfn);
512
513 if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
514 max_low_pfn_mapped = max(max_low_pfn_mapped,
515 min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
516 }
517
pfn_range_is_mapped(unsigned long start_pfn,unsigned long end_pfn)518 bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
519 {
520 int i;
521
522 for (i = 0; i < nr_pfn_mapped; i++)
523 if ((start_pfn >= pfn_mapped[i].start) &&
524 (end_pfn <= pfn_mapped[i].end))
525 return true;
526
527 return false;
528 }
529
530 /*
531 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
532 * This runs before bootmem is initialized and gets pages directly from
533 * the physical memory. To access them they are temporarily mapped.
534 */
init_memory_mapping(unsigned long start,unsigned long end,pgprot_t prot)535 unsigned long __ref init_memory_mapping(unsigned long start,
536 unsigned long end, pgprot_t prot)
537 {
538 struct map_range mr[NR_RANGE_MR];
539 unsigned long ret = 0;
540 int nr_range, i;
541
542 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
543 start, end - 1);
544
545 memset(mr, 0, sizeof(mr));
546 nr_range = split_mem_range(mr, 0, start, end);
547
548 for (i = 0; i < nr_range; i++)
549 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
550 mr[i].page_size_mask,
551 prot);
552
553 add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
554
555 return ret >> PAGE_SHIFT;
556 }
557
558 /*
559 * We need to iterate through the E820 memory map and create direct mappings
560 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
561 * create direct mappings for all pfns from [0 to max_low_pfn) and
562 * [4GB to max_pfn) because of possible memory holes in high addresses
563 * that cannot be marked as UC by fixed/variable range MTRRs.
564 * Depending on the alignment of E820 ranges, this may possibly result
565 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
566 *
567 * init_mem_mapping() calls init_range_memory_mapping() with big range.
568 * That range would have hole in the middle or ends, and only ram parts
569 * will be mapped in init_range_memory_mapping().
570 */
init_range_memory_mapping(unsigned long r_start,unsigned long r_end)571 static unsigned long __init init_range_memory_mapping(
572 unsigned long r_start,
573 unsigned long r_end)
574 {
575 unsigned long start_pfn, end_pfn;
576 unsigned long mapped_ram_size = 0;
577 int i;
578
579 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
580 u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
581 u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
582 if (start >= end)
583 continue;
584
585 /*
586 * if it is overlapping with brk pgt, we need to
587 * alloc pgt buf from memblock instead.
588 */
589 can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
590 min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
591 init_memory_mapping(start, end, PAGE_KERNEL);
592 mapped_ram_size += end - start;
593 can_use_brk_pgt = true;
594 }
595
596 return mapped_ram_size;
597 }
598
get_new_step_size(unsigned long step_size)599 static unsigned long __init get_new_step_size(unsigned long step_size)
600 {
601 /*
602 * Initial mapped size is PMD_SIZE (2M).
603 * We can not set step_size to be PUD_SIZE (1G) yet.
604 * In worse case, when we cross the 1G boundary, and
605 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
606 * to map 1G range with PTE. Hence we use one less than the
607 * difference of page table level shifts.
608 *
609 * Don't need to worry about overflow in the top-down case, on 32bit,
610 * when step_size is 0, round_down() returns 0 for start, and that
611 * turns it into 0x100000000ULL.
612 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
613 * needs to be taken into consideration by the code below.
614 */
615 return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
616 }
617
618 /**
619 * memory_map_top_down - Map [map_start, map_end) top down
620 * @map_start: start address of the target memory range
621 * @map_end: end address of the target memory range
622 *
623 * This function will setup direct mapping for memory range
624 * [map_start, map_end) in top-down. That said, the page tables
625 * will be allocated at the end of the memory, and we map the
626 * memory in top-down.
627 */
memory_map_top_down(unsigned long map_start,unsigned long map_end)628 static void __init memory_map_top_down(unsigned long map_start,
629 unsigned long map_end)
630 {
631 unsigned long real_end, last_start;
632 unsigned long step_size;
633 unsigned long addr;
634 unsigned long mapped_ram_size = 0;
635
636 /*
637 * Systems that have many reserved areas near top of the memory,
638 * e.g. QEMU with less than 1G RAM and EFI enabled, or Xen, will
639 * require lots of 4K mappings which may exhaust pgt_buf.
640 * Start with top-most PMD_SIZE range aligned at PMD_SIZE to ensure
641 * there is enough mapped memory that can be allocated from
642 * memblock.
643 */
644 addr = memblock_phys_alloc_range(PMD_SIZE, PMD_SIZE, map_start,
645 map_end);
646 if (!addr) {
647 pr_warn("Failed to release memory for alloc_low_pages()");
648 real_end = max(map_start, ALIGN_DOWN(map_end, PMD_SIZE));
649 } else {
650 memblock_phys_free(addr, PMD_SIZE);
651 real_end = addr + PMD_SIZE;
652 }
653
654 /* step_size need to be small so pgt_buf from BRK could cover it */
655 step_size = PMD_SIZE;
656 max_pfn_mapped = 0; /* will get exact value next */
657 min_pfn_mapped = real_end >> PAGE_SHIFT;
658 last_start = real_end;
659
660 /*
661 * We start from the top (end of memory) and go to the bottom.
662 * The memblock_find_in_range() gets us a block of RAM from the
663 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
664 * for page table.
665 */
666 while (last_start > map_start) {
667 unsigned long start;
668
669 if (last_start > step_size) {
670 start = round_down(last_start - 1, step_size);
671 if (start < map_start)
672 start = map_start;
673 } else
674 start = map_start;
675 mapped_ram_size += init_range_memory_mapping(start,
676 last_start);
677 last_start = start;
678 min_pfn_mapped = last_start >> PAGE_SHIFT;
679 if (mapped_ram_size >= step_size)
680 step_size = get_new_step_size(step_size);
681 }
682
683 if (real_end < map_end)
684 init_range_memory_mapping(real_end, map_end);
685 }
686
687 /**
688 * memory_map_bottom_up - Map [map_start, map_end) bottom up
689 * @map_start: start address of the target memory range
690 * @map_end: end address of the target memory range
691 *
692 * This function will setup direct mapping for memory range
693 * [map_start, map_end) in bottom-up. Since we have limited the
694 * bottom-up allocation above the kernel, the page tables will
695 * be allocated just above the kernel and we map the memory
696 * in [map_start, map_end) in bottom-up.
697 */
memory_map_bottom_up(unsigned long map_start,unsigned long map_end)698 static void __init memory_map_bottom_up(unsigned long map_start,
699 unsigned long map_end)
700 {
701 unsigned long next, start;
702 unsigned long mapped_ram_size = 0;
703 /* step_size need to be small so pgt_buf from BRK could cover it */
704 unsigned long step_size = PMD_SIZE;
705
706 start = map_start;
707 min_pfn_mapped = start >> PAGE_SHIFT;
708
709 /*
710 * We start from the bottom (@map_start) and go to the top (@map_end).
711 * The memblock_find_in_range() gets us a block of RAM from the
712 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
713 * for page table.
714 */
715 while (start < map_end) {
716 if (step_size && map_end - start > step_size) {
717 next = round_up(start + 1, step_size);
718 if (next > map_end)
719 next = map_end;
720 } else {
721 next = map_end;
722 }
723
724 mapped_ram_size += init_range_memory_mapping(start, next);
725 start = next;
726
727 if (mapped_ram_size >= step_size)
728 step_size = get_new_step_size(step_size);
729 }
730 }
731
732 /*
733 * The real mode trampoline, which is required for bootstrapping CPUs
734 * occupies only a small area under the low 1MB. See reserve_real_mode()
735 * for details.
736 *
737 * If KASLR is disabled the first PGD entry of the direct mapping is copied
738 * to map the real mode trampoline.
739 *
740 * If KASLR is enabled, copy only the PUD which covers the low 1MB
741 * area. This limits the randomization granularity to 1GB for both 4-level
742 * and 5-level paging.
743 */
init_trampoline(void)744 static void __init init_trampoline(void)
745 {
746 #ifdef CONFIG_X86_64
747 /*
748 * The code below will alias kernel page-tables in the user-range of the
749 * address space, including the Global bit. So global TLB entries will
750 * be created when using the trampoline page-table.
751 */
752 if (!kaslr_memory_enabled())
753 trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)];
754 else
755 init_trampoline_kaslr();
756 #endif
757 }
758
init_mem_mapping(void)759 void __init init_mem_mapping(void)
760 {
761 unsigned long end;
762
763 pti_check_boottime_disable();
764 probe_page_size_mask();
765 setup_pcid();
766
767 #ifdef CONFIG_X86_64
768 end = max_pfn << PAGE_SHIFT;
769 #else
770 end = max_low_pfn << PAGE_SHIFT;
771 #endif
772
773 /* the ISA range is always mapped regardless of memory holes */
774 init_memory_mapping(0, ISA_END_ADDRESS, PAGE_KERNEL);
775
776 /* Init the trampoline, possibly with KASLR memory offset */
777 init_trampoline();
778
779 /*
780 * If the allocation is in bottom-up direction, we setup direct mapping
781 * in bottom-up, otherwise we setup direct mapping in top-down.
782 */
783 if (memblock_bottom_up()) {
784 unsigned long kernel_end = __pa_symbol(_end);
785
786 /*
787 * we need two separate calls here. This is because we want to
788 * allocate page tables above the kernel. So we first map
789 * [kernel_end, end) to make memory above the kernel be mapped
790 * as soon as possible. And then use page tables allocated above
791 * the kernel to map [ISA_END_ADDRESS, kernel_end).
792 */
793 memory_map_bottom_up(kernel_end, end);
794 memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
795 } else {
796 memory_map_top_down(ISA_END_ADDRESS, end);
797 }
798
799 #ifdef CONFIG_X86_64
800 if (max_pfn > max_low_pfn) {
801 /* can we preserve max_low_pfn ?*/
802 max_low_pfn = max_pfn;
803 }
804 #else
805 early_ioremap_page_table_range_init();
806 #endif
807
808 load_cr3(swapper_pg_dir);
809 __flush_tlb_all();
810
811 x86_init.hyper.init_mem_mapping();
812
813 early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
814 }
815
816 /*
817 * Initialize an mm_struct to be used during poking and a pointer to be used
818 * during patching.
819 */
poking_init(void)820 void __init poking_init(void)
821 {
822 spinlock_t *ptl;
823 pte_t *ptep;
824
825 text_poke_mm = mm_alloc();
826 BUG_ON(!text_poke_mm);
827
828 /* Xen PV guests need the PGD to be pinned. */
829 paravirt_enter_mmap(text_poke_mm);
830
831 set_notrack_mm(text_poke_mm);
832
833 /*
834 * Randomize the poking address, but make sure that the following page
835 * will be mapped at the same PMD. We need 2 pages, so find space for 3,
836 * and adjust the address if the PMD ends after the first one.
837 */
838 text_poke_mm_addr = TASK_UNMAPPED_BASE;
839 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))
840 text_poke_mm_addr += (kaslr_get_random_long("Poking") & PAGE_MASK) %
841 (TASK_SIZE - TASK_UNMAPPED_BASE - 3 * PAGE_SIZE);
842
843 if (((text_poke_mm_addr + PAGE_SIZE) & ~PMD_MASK) == 0)
844 text_poke_mm_addr += PAGE_SIZE;
845
846 /*
847 * We need to trigger the allocation of the page-tables that will be
848 * needed for poking now. Later, poking may be performed in an atomic
849 * section, which might cause allocation to fail.
850 */
851 ptep = get_locked_pte(text_poke_mm, text_poke_mm_addr, &ptl);
852 BUG_ON(!ptep);
853 pte_unmap_unlock(ptep, ptl);
854 }
855
856 /*
857 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
858 * is valid. The argument is a physical page number.
859 *
860 * On x86, access has to be given to the first megabyte of RAM because that
861 * area traditionally contains BIOS code and data regions used by X, dosemu,
862 * and similar apps. Since they map the entire memory range, the whole range
863 * must be allowed (for mapping), but any areas that would otherwise be
864 * disallowed are flagged as being "zero filled" instead of rejected.
865 * Access has to be given to non-kernel-ram areas as well, these contain the
866 * PCI mmio resources as well as potential bios/acpi data regions.
867 */
devmem_is_allowed(unsigned long pagenr)868 int devmem_is_allowed(unsigned long pagenr)
869 {
870 if (region_intersects(PFN_PHYS(pagenr), PAGE_SIZE,
871 IORESOURCE_SYSTEM_RAM, IORES_DESC_NONE)
872 != REGION_DISJOINT) {
873 /*
874 * For disallowed memory regions in the low 1MB range,
875 * request that the page be shown as all zeros.
876 */
877 if (pagenr < 256)
878 return 2;
879
880 return 0;
881 }
882
883 /*
884 * This must follow RAM test, since System RAM is considered a
885 * restricted resource under CONFIG_STRICT_DEVMEM.
886 */
887 if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) {
888 /* Low 1MB bypasses iomem restrictions. */
889 if (pagenr < 256)
890 return 1;
891
892 return 0;
893 }
894
895 return 1;
896 }
897
free_init_pages(const char * what,unsigned long begin,unsigned long end)898 void free_init_pages(const char *what, unsigned long begin, unsigned long end)
899 {
900 unsigned long begin_aligned, end_aligned;
901
902 /* Make sure boundaries are page aligned */
903 begin_aligned = PAGE_ALIGN(begin);
904 end_aligned = end & PAGE_MASK;
905
906 if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
907 begin = begin_aligned;
908 end = end_aligned;
909 }
910
911 if (begin >= end)
912 return;
913
914 /*
915 * If debugging page accesses then do not free this memory but
916 * mark them not present - any buggy init-section access will
917 * create a kernel page fault:
918 */
919 if (debug_pagealloc_enabled()) {
920 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
921 begin, end - 1);
922 /*
923 * Inform kmemleak about the hole in the memory since the
924 * corresponding pages will be unmapped.
925 */
926 kmemleak_free_part((void *)begin, end - begin);
927 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
928 } else {
929 /*
930 * We just marked the kernel text read only above, now that
931 * we are going to free part of that, we need to make that
932 * writeable and non-executable first.
933 */
934 set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
935 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
936
937 free_reserved_area((void *)begin, (void *)end,
938 POISON_FREE_INITMEM, what);
939 }
940 }
941
942 /*
943 * begin/end can be in the direct map or the "high kernel mapping"
944 * used for the kernel image only. free_init_pages() will do the
945 * right thing for either kind of address.
946 */
free_kernel_image_pages(const char * what,void * begin,void * end)947 void free_kernel_image_pages(const char *what, void *begin, void *end)
948 {
949 unsigned long begin_ul = (unsigned long)begin;
950 unsigned long end_ul = (unsigned long)end;
951 unsigned long len_pages = (end_ul - begin_ul) >> PAGE_SHIFT;
952
953 free_init_pages(what, begin_ul, end_ul);
954
955 /*
956 * PTI maps some of the kernel into userspace. For performance,
957 * this includes some kernel areas that do not contain secrets.
958 * Those areas might be adjacent to the parts of the kernel image
959 * being freed, which may contain secrets. Remove the "high kernel
960 * image mapping" for these freed areas, ensuring they are not even
961 * potentially vulnerable to Meltdown regardless of the specific
962 * optimizations PTI is currently using.
963 *
964 * The "noalias" prevents unmapping the direct map alias which is
965 * needed to access the freed pages.
966 *
967 * This is only valid for 64bit kernels. 32bit has only one mapping
968 * which can't be treated in this way for obvious reasons.
969 */
970 if (IS_ENABLED(CONFIG_X86_64) && cpu_feature_enabled(X86_FEATURE_PTI))
971 set_memory_np_noalias(begin_ul, len_pages);
972 }
973
free_initmem(void)974 void __ref free_initmem(void)
975 {
976 e820__reallocate_tables();
977
978 mem_encrypt_free_decrypted_mem();
979
980 free_kernel_image_pages("unused kernel image (initmem)",
981 &__init_begin, &__init_end);
982 }
983
984 #ifdef CONFIG_BLK_DEV_INITRD
free_initrd_mem(unsigned long start,unsigned long end)985 void __init free_initrd_mem(unsigned long start, unsigned long end)
986 {
987 /*
988 * end could be not aligned, and We can not align that,
989 * decompressor could be confused by aligned initrd_end
990 * We already reserve the end partial page before in
991 * - i386_start_kernel()
992 * - x86_64_start_kernel()
993 * - relocate_initrd()
994 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
995 */
996 free_init_pages("initrd", start, PAGE_ALIGN(end));
997 }
998 #endif
999
zone_sizes_init(void)1000 void __init zone_sizes_init(void)
1001 {
1002 unsigned long max_zone_pfns[MAX_NR_ZONES];
1003
1004 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
1005
1006 #ifdef CONFIG_ZONE_DMA
1007 max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn);
1008 #endif
1009 #ifdef CONFIG_ZONE_DMA32
1010 max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn);
1011 #endif
1012 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
1013 #ifdef CONFIG_HIGHMEM
1014 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
1015 #endif
1016
1017 free_area_init(max_zone_pfns);
1018 }
1019
1020 __visible DEFINE_PER_CPU_ALIGNED(struct tlb_state, cpu_tlbstate) = {
1021 .loaded_mm = &init_mm,
1022 .next_asid = 1,
1023 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
1024 };
1025
1026 #ifdef CONFIG_ADDRESS_MASKING
1027 DEFINE_PER_CPU(u64, tlbstate_untag_mask);
1028 EXPORT_PER_CPU_SYMBOL(tlbstate_untag_mask);
1029 #endif
1030
update_cache_mode_entry(unsigned entry,enum page_cache_mode cache)1031 void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
1032 {
1033 /* entry 0 MUST be WB (hardwired to speed up translations) */
1034 BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
1035
1036 __cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
1037 __pte2cachemode_tbl[entry] = cache;
1038 }
1039
1040 #ifdef CONFIG_SWAP
arch_max_swapfile_size(void)1041 unsigned long arch_max_swapfile_size(void)
1042 {
1043 unsigned long pages;
1044
1045 pages = generic_max_swapfile_size();
1046
1047 if (boot_cpu_has_bug(X86_BUG_L1TF) && l1tf_mitigation != L1TF_MITIGATION_OFF) {
1048 /* Limit the swap file size to MAX_PA/2 for L1TF workaround */
1049 unsigned long long l1tf_limit = l1tf_pfn_limit();
1050 /*
1051 * We encode swap offsets also with 3 bits below those for pfn
1052 * which makes the usable limit higher.
1053 */
1054 #if CONFIG_PGTABLE_LEVELS > 2
1055 l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT;
1056 #endif
1057 pages = min_t(unsigned long long, l1tf_limit, pages);
1058 }
1059 return pages;
1060 }
1061 #endif
1062
1063 #ifdef CONFIG_EXECMEM
1064 static struct execmem_info execmem_info __ro_after_init;
1065
1066 #ifdef CONFIG_ARCH_HAS_EXECMEM_ROX
execmem_fill_trapping_insns(void * ptr,size_t size)1067 void execmem_fill_trapping_insns(void *ptr, size_t size)
1068 {
1069 memset(ptr, INT3_INSN_OPCODE, size);
1070 }
1071 #endif
1072
execmem_arch_setup(void)1073 struct execmem_info __init *execmem_arch_setup(void)
1074 {
1075 unsigned long start, offset = 0;
1076 enum execmem_range_flags flags;
1077 pgprot_t pgprot;
1078
1079 if (kaslr_enabled())
1080 offset = get_random_u32_inclusive(1, 1024) * PAGE_SIZE;
1081
1082 start = MODULES_VADDR + offset;
1083
1084 if (IS_ENABLED(CONFIG_ARCH_HAS_EXECMEM_ROX) &&
1085 cpu_feature_enabled(X86_FEATURE_PSE)) {
1086 pgprot = PAGE_KERNEL_ROX;
1087 flags = EXECMEM_KASAN_SHADOW | EXECMEM_ROX_CACHE;
1088 } else {
1089 pgprot = PAGE_KERNEL;
1090 flags = EXECMEM_KASAN_SHADOW;
1091 }
1092
1093 execmem_info = (struct execmem_info){
1094 .ranges = {
1095 [EXECMEM_MODULE_TEXT] = {
1096 .flags = flags,
1097 .start = start,
1098 .end = MODULES_END,
1099 .pgprot = pgprot,
1100 .alignment = MODULE_ALIGN,
1101 },
1102 [EXECMEM_KPROBES] = {
1103 .flags = flags,
1104 .start = start,
1105 .end = MODULES_END,
1106 .pgprot = PAGE_KERNEL_ROX,
1107 .alignment = MODULE_ALIGN,
1108 },
1109 [EXECMEM_FTRACE] = {
1110 .flags = flags,
1111 .start = start,
1112 .end = MODULES_END,
1113 .pgprot = pgprot,
1114 .alignment = MODULE_ALIGN,
1115 },
1116 [EXECMEM_BPF] = {
1117 .flags = EXECMEM_KASAN_SHADOW,
1118 .start = start,
1119 .end = MODULES_END,
1120 .pgprot = PAGE_KERNEL,
1121 .alignment = MODULE_ALIGN,
1122 },
1123 [EXECMEM_MODULE_DATA] = {
1124 .flags = EXECMEM_KASAN_SHADOW,
1125 .start = start,
1126 .end = MODULES_END,
1127 .pgprot = PAGE_KERNEL,
1128 .alignment = MODULE_ALIGN,
1129 },
1130 },
1131 };
1132
1133 return &execmem_info;
1134 }
1135 #endif /* CONFIG_EXECMEM */
1136