1 // SPDX-License-Identifier: GPL-2.0-only
2 /****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2018 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include "net_driver.h"
12 #include <linux/module.h>
13 #include <linux/iommu.h>
14 #include <net/rps.h>
15 #include "efx.h"
16 #include "nic.h"
17 #include "rx_common.h"
18
19 /* This is the percentage fill level below which new RX descriptors
20 * will be added to the RX descriptor ring.
21 */
22 static unsigned int rx_refill_threshold;
23 module_param(rx_refill_threshold, uint, 0444);
24 MODULE_PARM_DESC(rx_refill_threshold,
25 "RX descriptor ring refill threshold (%)");
26
27 /* RX maximum head room required.
28 *
29 * This must be at least 1 to prevent overflow, plus one packet-worth
30 * to allow pipelined receives.
31 */
32 #define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
33
34 static void efx_unmap_rx_buffer(struct efx_nic *efx,
35 struct efx_rx_buffer *rx_buf);
36
37 /* Check the RX page recycle ring for a page that can be reused. */
efx_reuse_page(struct efx_rx_queue * rx_queue)38 static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
39 {
40 struct efx_nic *efx = rx_queue->efx;
41 struct efx_rx_page_state *state;
42 unsigned int index;
43 struct page *page;
44
45 if (unlikely(!rx_queue->page_ring))
46 return NULL;
47 index = rx_queue->page_remove & rx_queue->page_ptr_mask;
48 page = rx_queue->page_ring[index];
49 if (page == NULL)
50 return NULL;
51
52 rx_queue->page_ring[index] = NULL;
53 /* page_remove cannot exceed page_add. */
54 if (rx_queue->page_remove != rx_queue->page_add)
55 ++rx_queue->page_remove;
56
57 /* If page_count is 1 then we hold the only reference to this page. */
58 if (page_count(page) == 1) {
59 ++rx_queue->page_recycle_count;
60 return page;
61 } else {
62 state = page_address(page);
63 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
64 PAGE_SIZE << efx->rx_buffer_order,
65 DMA_FROM_DEVICE);
66 put_page(page);
67 ++rx_queue->page_recycle_failed;
68 }
69
70 return NULL;
71 }
72
73 /* Attempt to recycle the page if there is an RX recycle ring; the page can
74 * only be added if this is the final RX buffer, to prevent pages being used in
75 * the descriptor ring and appearing in the recycle ring simultaneously.
76 */
efx_recycle_rx_page(struct efx_channel * channel,struct efx_rx_buffer * rx_buf)77 static void efx_recycle_rx_page(struct efx_channel *channel,
78 struct efx_rx_buffer *rx_buf)
79 {
80 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
81 struct efx_nic *efx = rx_queue->efx;
82 struct page *page = rx_buf->page;
83 unsigned int index;
84
85 /* Only recycle the page after processing the final buffer. */
86 if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
87 return;
88
89 index = rx_queue->page_add & rx_queue->page_ptr_mask;
90 if (rx_queue->page_ring[index] == NULL) {
91 unsigned int read_index = rx_queue->page_remove &
92 rx_queue->page_ptr_mask;
93
94 /* The next slot in the recycle ring is available, but
95 * increment page_remove if the read pointer currently
96 * points here.
97 */
98 if (read_index == index)
99 ++rx_queue->page_remove;
100 rx_queue->page_ring[index] = page;
101 ++rx_queue->page_add;
102 return;
103 }
104 ++rx_queue->page_recycle_full;
105 efx_unmap_rx_buffer(efx, rx_buf);
106 put_page(rx_buf->page);
107 }
108
109 /* Recycle the pages that are used by buffers that have just been received. */
efx_siena_recycle_rx_pages(struct efx_channel * channel,struct efx_rx_buffer * rx_buf,unsigned int n_frags)110 void efx_siena_recycle_rx_pages(struct efx_channel *channel,
111 struct efx_rx_buffer *rx_buf,
112 unsigned int n_frags)
113 {
114 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
115
116 if (unlikely(!rx_queue->page_ring))
117 return;
118
119 do {
120 efx_recycle_rx_page(channel, rx_buf);
121 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
122 } while (--n_frags);
123 }
124
efx_siena_discard_rx_packet(struct efx_channel * channel,struct efx_rx_buffer * rx_buf,unsigned int n_frags)125 void efx_siena_discard_rx_packet(struct efx_channel *channel,
126 struct efx_rx_buffer *rx_buf,
127 unsigned int n_frags)
128 {
129 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
130
131 efx_siena_recycle_rx_pages(channel, rx_buf, n_frags);
132
133 efx_siena_free_rx_buffers(rx_queue, rx_buf, n_frags);
134 }
135
efx_init_rx_recycle_ring(struct efx_rx_queue * rx_queue)136 static void efx_init_rx_recycle_ring(struct efx_rx_queue *rx_queue)
137 {
138 unsigned int bufs_in_recycle_ring, page_ring_size;
139 struct efx_nic *efx = rx_queue->efx;
140
141 bufs_in_recycle_ring = efx_rx_recycle_ring_size(efx);
142 page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
143 efx->rx_bufs_per_page);
144 rx_queue->page_ring = kcalloc(page_ring_size,
145 sizeof(*rx_queue->page_ring), GFP_KERNEL);
146 if (!rx_queue->page_ring)
147 rx_queue->page_ptr_mask = 0;
148 else
149 rx_queue->page_ptr_mask = page_ring_size - 1;
150 }
151
efx_fini_rx_recycle_ring(struct efx_rx_queue * rx_queue)152 static void efx_fini_rx_recycle_ring(struct efx_rx_queue *rx_queue)
153 {
154 struct efx_nic *efx = rx_queue->efx;
155 int i;
156
157 if (unlikely(!rx_queue->page_ring))
158 return;
159
160 /* Unmap and release the pages in the recycle ring. Remove the ring. */
161 for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
162 struct page *page = rx_queue->page_ring[i];
163 struct efx_rx_page_state *state;
164
165 if (page == NULL)
166 continue;
167
168 state = page_address(page);
169 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
170 PAGE_SIZE << efx->rx_buffer_order,
171 DMA_FROM_DEVICE);
172 put_page(page);
173 }
174 kfree(rx_queue->page_ring);
175 rx_queue->page_ring = NULL;
176 }
177
efx_fini_rx_buffer(struct efx_rx_queue * rx_queue,struct efx_rx_buffer * rx_buf)178 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
179 struct efx_rx_buffer *rx_buf)
180 {
181 /* Release the page reference we hold for the buffer. */
182 if (rx_buf->page)
183 put_page(rx_buf->page);
184
185 /* If this is the last buffer in a page, unmap and free it. */
186 if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
187 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
188 efx_siena_free_rx_buffers(rx_queue, rx_buf, 1);
189 }
190 rx_buf->page = NULL;
191 }
192
efx_siena_probe_rx_queue(struct efx_rx_queue * rx_queue)193 int efx_siena_probe_rx_queue(struct efx_rx_queue *rx_queue)
194 {
195 struct efx_nic *efx = rx_queue->efx;
196 unsigned int entries;
197 int rc;
198
199 /* Create the smallest power-of-two aligned ring */
200 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
201 EFX_WARN_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
202 rx_queue->ptr_mask = entries - 1;
203
204 netif_dbg(efx, probe, efx->net_dev,
205 "creating RX queue %d size %#x mask %#x\n",
206 efx_rx_queue_index(rx_queue), efx->rxq_entries,
207 rx_queue->ptr_mask);
208
209 /* Allocate RX buffers */
210 rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
211 GFP_KERNEL);
212 if (!rx_queue->buffer)
213 return -ENOMEM;
214
215 rc = efx_nic_probe_rx(rx_queue);
216 if (rc) {
217 kfree(rx_queue->buffer);
218 rx_queue->buffer = NULL;
219 }
220
221 return rc;
222 }
223
efx_siena_init_rx_queue(struct efx_rx_queue * rx_queue)224 void efx_siena_init_rx_queue(struct efx_rx_queue *rx_queue)
225 {
226 unsigned int max_fill, trigger, max_trigger;
227 struct efx_nic *efx = rx_queue->efx;
228 int rc = 0;
229
230 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
231 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
232
233 /* Initialise ptr fields */
234 rx_queue->added_count = 0;
235 rx_queue->notified_count = 0;
236 rx_queue->removed_count = 0;
237 rx_queue->min_fill = -1U;
238 efx_init_rx_recycle_ring(rx_queue);
239
240 rx_queue->page_remove = 0;
241 rx_queue->page_add = rx_queue->page_ptr_mask + 1;
242 rx_queue->page_recycle_count = 0;
243 rx_queue->page_recycle_failed = 0;
244 rx_queue->page_recycle_full = 0;
245
246 /* Initialise limit fields */
247 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
248 max_trigger =
249 max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
250 if (rx_refill_threshold != 0) {
251 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
252 if (trigger > max_trigger)
253 trigger = max_trigger;
254 } else {
255 trigger = max_trigger;
256 }
257
258 rx_queue->max_fill = max_fill;
259 rx_queue->fast_fill_trigger = trigger;
260 rx_queue->refill_enabled = true;
261
262 /* Initialise XDP queue information */
263 rc = xdp_rxq_info_reg(&rx_queue->xdp_rxq_info, efx->net_dev,
264 rx_queue->core_index, 0);
265
266 if (rc) {
267 netif_err(efx, rx_err, efx->net_dev,
268 "Failure to initialise XDP queue information rc=%d\n",
269 rc);
270 efx->xdp_rxq_info_failed = true;
271 } else {
272 rx_queue->xdp_rxq_info_valid = true;
273 }
274
275 /* Set up RX descriptor ring */
276 efx_nic_init_rx(rx_queue);
277 }
278
efx_siena_fini_rx_queue(struct efx_rx_queue * rx_queue)279 void efx_siena_fini_rx_queue(struct efx_rx_queue *rx_queue)
280 {
281 struct efx_rx_buffer *rx_buf;
282 int i;
283
284 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
285 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
286
287 timer_delete_sync(&rx_queue->slow_fill);
288
289 /* Release RX buffers from the current read ptr to the write ptr */
290 if (rx_queue->buffer) {
291 for (i = rx_queue->removed_count; i < rx_queue->added_count;
292 i++) {
293 unsigned int index = i & rx_queue->ptr_mask;
294
295 rx_buf = efx_rx_buffer(rx_queue, index);
296 efx_fini_rx_buffer(rx_queue, rx_buf);
297 }
298 }
299
300 efx_fini_rx_recycle_ring(rx_queue);
301
302 if (rx_queue->xdp_rxq_info_valid)
303 xdp_rxq_info_unreg(&rx_queue->xdp_rxq_info);
304
305 rx_queue->xdp_rxq_info_valid = false;
306 }
307
efx_siena_remove_rx_queue(struct efx_rx_queue * rx_queue)308 void efx_siena_remove_rx_queue(struct efx_rx_queue *rx_queue)
309 {
310 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
311 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
312
313 efx_nic_remove_rx(rx_queue);
314
315 kfree(rx_queue->buffer);
316 rx_queue->buffer = NULL;
317 }
318
319 /* Unmap a DMA-mapped page. This function is only called for the final RX
320 * buffer in a page.
321 */
efx_unmap_rx_buffer(struct efx_nic * efx,struct efx_rx_buffer * rx_buf)322 static void efx_unmap_rx_buffer(struct efx_nic *efx,
323 struct efx_rx_buffer *rx_buf)
324 {
325 struct page *page = rx_buf->page;
326
327 if (page) {
328 struct efx_rx_page_state *state = page_address(page);
329
330 dma_unmap_page(&efx->pci_dev->dev,
331 state->dma_addr,
332 PAGE_SIZE << efx->rx_buffer_order,
333 DMA_FROM_DEVICE);
334 }
335 }
336
efx_siena_free_rx_buffers(struct efx_rx_queue * rx_queue,struct efx_rx_buffer * rx_buf,unsigned int num_bufs)337 void efx_siena_free_rx_buffers(struct efx_rx_queue *rx_queue,
338 struct efx_rx_buffer *rx_buf,
339 unsigned int num_bufs)
340 {
341 do {
342 if (rx_buf->page) {
343 put_page(rx_buf->page);
344 rx_buf->page = NULL;
345 }
346 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
347 } while (--num_bufs);
348 }
349
efx_siena_rx_slow_fill(struct timer_list * t)350 void efx_siena_rx_slow_fill(struct timer_list *t)
351 {
352 struct efx_rx_queue *rx_queue = timer_container_of(rx_queue, t,
353 slow_fill);
354
355 /* Post an event to cause NAPI to run and refill the queue */
356 efx_nic_generate_fill_event(rx_queue);
357 ++rx_queue->slow_fill_count;
358 }
359
efx_schedule_slow_fill(struct efx_rx_queue * rx_queue)360 static void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
361 {
362 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(10));
363 }
364
365 /* efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
366 *
367 * @rx_queue: Efx RX queue
368 *
369 * This allocates a batch of pages, maps them for DMA, and populates
370 * struct efx_rx_buffers for each one. Return a negative error code or
371 * 0 on success. If a single page can be used for multiple buffers,
372 * then the page will either be inserted fully, or not at all.
373 */
efx_init_rx_buffers(struct efx_rx_queue * rx_queue,bool atomic)374 static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
375 {
376 unsigned int page_offset, index, count;
377 struct efx_nic *efx = rx_queue->efx;
378 struct efx_rx_page_state *state;
379 struct efx_rx_buffer *rx_buf;
380 dma_addr_t dma_addr;
381 struct page *page;
382
383 count = 0;
384 do {
385 page = efx_reuse_page(rx_queue);
386 if (page == NULL) {
387 page = alloc_pages(__GFP_COMP |
388 (atomic ? GFP_ATOMIC : GFP_KERNEL),
389 efx->rx_buffer_order);
390 if (unlikely(page == NULL))
391 return -ENOMEM;
392 dma_addr =
393 dma_map_page(&efx->pci_dev->dev, page, 0,
394 PAGE_SIZE << efx->rx_buffer_order,
395 DMA_FROM_DEVICE);
396 if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
397 dma_addr))) {
398 __free_pages(page, efx->rx_buffer_order);
399 return -EIO;
400 }
401 state = page_address(page);
402 state->dma_addr = dma_addr;
403 } else {
404 state = page_address(page);
405 dma_addr = state->dma_addr;
406 }
407
408 dma_addr += sizeof(struct efx_rx_page_state);
409 page_offset = sizeof(struct efx_rx_page_state);
410
411 do {
412 index = rx_queue->added_count & rx_queue->ptr_mask;
413 rx_buf = efx_rx_buffer(rx_queue, index);
414 rx_buf->dma_addr = dma_addr + efx->rx_ip_align +
415 EFX_XDP_HEADROOM;
416 rx_buf->page = page;
417 rx_buf->page_offset = page_offset + efx->rx_ip_align +
418 EFX_XDP_HEADROOM;
419 rx_buf->len = efx->rx_dma_len;
420 rx_buf->flags = 0;
421 ++rx_queue->added_count;
422 get_page(page);
423 dma_addr += efx->rx_page_buf_step;
424 page_offset += efx->rx_page_buf_step;
425 } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
426
427 rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
428 } while (++count < efx->rx_pages_per_batch);
429
430 return 0;
431 }
432
efx_siena_rx_config_page_split(struct efx_nic * efx)433 void efx_siena_rx_config_page_split(struct efx_nic *efx)
434 {
435 efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align +
436 EFX_XDP_HEADROOM + EFX_XDP_TAILROOM,
437 EFX_RX_BUF_ALIGNMENT);
438 efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
439 ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
440 efx->rx_page_buf_step);
441 efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
442 efx->rx_bufs_per_page;
443 efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
444 efx->rx_bufs_per_page);
445 }
446
447 /* efx_siena_fast_push_rx_descriptors - push new RX descriptors quickly
448 * @rx_queue: RX descriptor queue
449 *
450 * This will aim to fill the RX descriptor queue up to
451 * @rx_queue->@max_fill. If there is insufficient atomic
452 * memory to do so, a slow fill will be scheduled.
453 *
454 * The caller must provide serialisation (none is used here). In practise,
455 * this means this function must run from the NAPI handler, or be called
456 * when NAPI is disabled.
457 */
efx_siena_fast_push_rx_descriptors(struct efx_rx_queue * rx_queue,bool atomic)458 void efx_siena_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue,
459 bool atomic)
460 {
461 struct efx_nic *efx = rx_queue->efx;
462 unsigned int fill_level, batch_size;
463 int space, rc = 0;
464
465 if (!rx_queue->refill_enabled)
466 return;
467
468 /* Calculate current fill level, and exit if we don't need to fill */
469 fill_level = (rx_queue->added_count - rx_queue->removed_count);
470 EFX_WARN_ON_ONCE_PARANOID(fill_level > rx_queue->efx->rxq_entries);
471 if (fill_level >= rx_queue->fast_fill_trigger)
472 goto out;
473
474 /* Record minimum fill level */
475 if (unlikely(fill_level < rx_queue->min_fill)) {
476 if (fill_level)
477 rx_queue->min_fill = fill_level;
478 }
479
480 batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
481 space = rx_queue->max_fill - fill_level;
482 EFX_WARN_ON_ONCE_PARANOID(space < batch_size);
483
484 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
485 "RX queue %d fast-filling descriptor ring from"
486 " level %d to level %d\n",
487 efx_rx_queue_index(rx_queue), fill_level,
488 rx_queue->max_fill);
489
490 do {
491 rc = efx_init_rx_buffers(rx_queue, atomic);
492 if (unlikely(rc)) {
493 /* Ensure that we don't leave the rx queue empty */
494 efx_schedule_slow_fill(rx_queue);
495 goto out;
496 }
497 } while ((space -= batch_size) >= batch_size);
498
499 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
500 "RX queue %d fast-filled descriptor ring "
501 "to level %d\n", efx_rx_queue_index(rx_queue),
502 rx_queue->added_count - rx_queue->removed_count);
503
504 out:
505 if (rx_queue->notified_count != rx_queue->added_count)
506 efx_nic_notify_rx_desc(rx_queue);
507 }
508
509 /* Pass a received packet up through GRO. GRO can handle pages
510 * regardless of checksum state and skbs with a good checksum.
511 */
512 void
efx_siena_rx_packet_gro(struct efx_channel * channel,struct efx_rx_buffer * rx_buf,unsigned int n_frags,u8 * eh,__wsum csum)513 efx_siena_rx_packet_gro(struct efx_channel *channel,
514 struct efx_rx_buffer *rx_buf,
515 unsigned int n_frags, u8 *eh, __wsum csum)
516 {
517 struct napi_struct *napi = &channel->napi_str;
518 struct efx_nic *efx = channel->efx;
519 struct sk_buff *skb;
520
521 skb = napi_get_frags(napi);
522 if (unlikely(!skb)) {
523 struct efx_rx_queue *rx_queue;
524
525 rx_queue = efx_channel_get_rx_queue(channel);
526 efx_siena_free_rx_buffers(rx_queue, rx_buf, n_frags);
527 return;
528 }
529
530 if (efx->net_dev->features & NETIF_F_RXHASH)
531 skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
532 PKT_HASH_TYPE_L3);
533 if (csum) {
534 skb->csum = csum;
535 skb->ip_summed = CHECKSUM_COMPLETE;
536 } else {
537 skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
538 CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
539 }
540 skb->csum_level = !!(rx_buf->flags & EFX_RX_PKT_CSUM_LEVEL);
541
542 for (;;) {
543 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
544 rx_buf->page, rx_buf->page_offset,
545 rx_buf->len);
546 rx_buf->page = NULL;
547 skb->len += rx_buf->len;
548 if (skb_shinfo(skb)->nr_frags == n_frags)
549 break;
550
551 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
552 }
553
554 skb->data_len = skb->len;
555 skb->truesize += n_frags * efx->rx_buffer_truesize;
556
557 skb_record_rx_queue(skb, channel->rx_queue.core_index);
558
559 napi_gro_frags(napi);
560 }
561
efx_siena_set_default_rx_indir_table(struct efx_nic * efx,struct efx_rss_context * ctx)562 void efx_siena_set_default_rx_indir_table(struct efx_nic *efx,
563 struct efx_rss_context *ctx)
564 {
565 size_t i;
566
567 for (i = 0; i < ARRAY_SIZE(ctx->rx_indir_table); i++)
568 ctx->rx_indir_table[i] =
569 ethtool_rxfh_indir_default(i, efx->rss_spread);
570 }
571
572 /**
573 * efx_siena_filter_is_mc_recipient - test whether spec is a multicast recipient
574 * @spec: Specification to test
575 *
576 * Return: %true if the specification is a non-drop RX filter that
577 * matches a local MAC address I/G bit value of 1 or matches a local
578 * IPv4 or IPv6 address value in the respective multicast address
579 * range. Otherwise %false.
580 */
efx_siena_filter_is_mc_recipient(const struct efx_filter_spec * spec)581 bool efx_siena_filter_is_mc_recipient(const struct efx_filter_spec *spec)
582 {
583 if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
584 spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
585 return false;
586
587 if (spec->match_flags &
588 (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
589 is_multicast_ether_addr(spec->loc_mac))
590 return true;
591
592 if ((spec->match_flags &
593 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
594 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
595 if (spec->ether_type == htons(ETH_P_IP) &&
596 ipv4_is_multicast(spec->loc_host[0]))
597 return true;
598 if (spec->ether_type == htons(ETH_P_IPV6) &&
599 ((const u8 *)spec->loc_host)[0] == 0xff)
600 return true;
601 }
602
603 return false;
604 }
605
efx_siena_filter_spec_equal(const struct efx_filter_spec * left,const struct efx_filter_spec * right)606 bool efx_siena_filter_spec_equal(const struct efx_filter_spec *left,
607 const struct efx_filter_spec *right)
608 {
609 if ((left->match_flags ^ right->match_flags) |
610 ((left->flags ^ right->flags) &
611 (EFX_FILTER_FLAG_RX | EFX_FILTER_FLAG_TX)))
612 return false;
613
614 return memcmp(&left->outer_vid, &right->outer_vid,
615 sizeof(struct efx_filter_spec) -
616 offsetof(struct efx_filter_spec, outer_vid)) == 0;
617 }
618
efx_siena_filter_spec_hash(const struct efx_filter_spec * spec)619 u32 efx_siena_filter_spec_hash(const struct efx_filter_spec *spec)
620 {
621 BUILD_BUG_ON(offsetof(struct efx_filter_spec, outer_vid) & 3);
622 return jhash2((const u32 *)&spec->outer_vid,
623 (sizeof(struct efx_filter_spec) -
624 offsetof(struct efx_filter_spec, outer_vid)) / 4,
625 0);
626 }
627
628 #ifdef CONFIG_RFS_ACCEL
efx_siena_rps_check_rule(struct efx_arfs_rule * rule,unsigned int filter_idx,bool * force)629 bool efx_siena_rps_check_rule(struct efx_arfs_rule *rule,
630 unsigned int filter_idx, bool *force)
631 {
632 if (rule->filter_id == EFX_ARFS_FILTER_ID_PENDING) {
633 /* ARFS is currently updating this entry, leave it */
634 return false;
635 }
636 if (rule->filter_id == EFX_ARFS_FILTER_ID_ERROR) {
637 /* ARFS tried and failed to update this, so it's probably out
638 * of date. Remove the filter and the ARFS rule entry.
639 */
640 rule->filter_id = EFX_ARFS_FILTER_ID_REMOVING;
641 *force = true;
642 return true;
643 } else if (WARN_ON(rule->filter_id != filter_idx)) { /* can't happen */
644 /* ARFS has moved on, so old filter is not needed. Since we did
645 * not mark the rule with EFX_ARFS_FILTER_ID_REMOVING, it will
646 * not be removed by efx_siena_rps_hash_del() subsequently.
647 */
648 *force = true;
649 return true;
650 }
651 /* Remove it iff ARFS wants to. */
652 return true;
653 }
654
655 static
efx_rps_hash_bucket(struct efx_nic * efx,const struct efx_filter_spec * spec)656 struct hlist_head *efx_rps_hash_bucket(struct efx_nic *efx,
657 const struct efx_filter_spec *spec)
658 {
659 u32 hash = efx_siena_filter_spec_hash(spec);
660
661 lockdep_assert_held(&efx->rps_hash_lock);
662 if (!efx->rps_hash_table)
663 return NULL;
664 return &efx->rps_hash_table[hash % EFX_ARFS_HASH_TABLE_SIZE];
665 }
666
efx_siena_rps_hash_find(struct efx_nic * efx,const struct efx_filter_spec * spec)667 struct efx_arfs_rule *efx_siena_rps_hash_find(struct efx_nic *efx,
668 const struct efx_filter_spec *spec)
669 {
670 struct efx_arfs_rule *rule;
671 struct hlist_head *head;
672 struct hlist_node *node;
673
674 head = efx_rps_hash_bucket(efx, spec);
675 if (!head)
676 return NULL;
677 hlist_for_each(node, head) {
678 rule = container_of(node, struct efx_arfs_rule, node);
679 if (efx_siena_filter_spec_equal(spec, &rule->spec))
680 return rule;
681 }
682 return NULL;
683 }
684
efx_rps_hash_add(struct efx_nic * efx,const struct efx_filter_spec * spec,bool * new)685 static struct efx_arfs_rule *efx_rps_hash_add(struct efx_nic *efx,
686 const struct efx_filter_spec *spec,
687 bool *new)
688 {
689 struct efx_arfs_rule *rule;
690 struct hlist_head *head;
691 struct hlist_node *node;
692
693 head = efx_rps_hash_bucket(efx, spec);
694 if (!head)
695 return NULL;
696 hlist_for_each(node, head) {
697 rule = container_of(node, struct efx_arfs_rule, node);
698 if (efx_siena_filter_spec_equal(spec, &rule->spec)) {
699 *new = false;
700 return rule;
701 }
702 }
703 rule = kmalloc(sizeof(*rule), GFP_ATOMIC);
704 *new = true;
705 if (rule) {
706 memcpy(&rule->spec, spec, sizeof(rule->spec));
707 hlist_add_head(&rule->node, head);
708 }
709 return rule;
710 }
711
efx_siena_rps_hash_del(struct efx_nic * efx,const struct efx_filter_spec * spec)712 void efx_siena_rps_hash_del(struct efx_nic *efx,
713 const struct efx_filter_spec *spec)
714 {
715 struct efx_arfs_rule *rule;
716 struct hlist_head *head;
717 struct hlist_node *node;
718
719 head = efx_rps_hash_bucket(efx, spec);
720 if (WARN_ON(!head))
721 return;
722 hlist_for_each(node, head) {
723 rule = container_of(node, struct efx_arfs_rule, node);
724 if (efx_siena_filter_spec_equal(spec, &rule->spec)) {
725 /* Someone already reused the entry. We know that if
726 * this check doesn't fire (i.e. filter_id == REMOVING)
727 * then the REMOVING mark was put there by our caller,
728 * because caller is holding a lock on filter table and
729 * only holders of that lock set REMOVING.
730 */
731 if (rule->filter_id != EFX_ARFS_FILTER_ID_REMOVING)
732 return;
733 hlist_del(node);
734 kfree(rule);
735 return;
736 }
737 }
738 /* We didn't find it. */
739 WARN_ON(1);
740 }
741 #endif
742
efx_siena_probe_filters(struct efx_nic * efx)743 int efx_siena_probe_filters(struct efx_nic *efx)
744 {
745 int rc;
746
747 mutex_lock(&efx->mac_lock);
748 down_write(&efx->filter_sem);
749 rc = efx->type->filter_table_probe(efx);
750 if (rc)
751 goto out_unlock;
752
753 #ifdef CONFIG_RFS_ACCEL
754 if (efx->type->offload_features & NETIF_F_NTUPLE) {
755 struct efx_channel *channel;
756 int i, success = 1;
757
758 efx_for_each_channel(channel, efx) {
759 channel->rps_flow_id =
760 kcalloc(efx->type->max_rx_ip_filters,
761 sizeof(*channel->rps_flow_id),
762 GFP_KERNEL);
763 if (!channel->rps_flow_id)
764 success = 0;
765 else
766 for (i = 0;
767 i < efx->type->max_rx_ip_filters;
768 ++i)
769 channel->rps_flow_id[i] =
770 RPS_FLOW_ID_INVALID;
771 channel->rfs_expire_index = 0;
772 channel->rfs_filter_count = 0;
773 }
774
775 if (!success) {
776 efx_for_each_channel(channel, efx)
777 kfree(channel->rps_flow_id);
778 efx->type->filter_table_remove(efx);
779 rc = -ENOMEM;
780 goto out_unlock;
781 }
782 }
783 #endif
784 out_unlock:
785 up_write(&efx->filter_sem);
786 mutex_unlock(&efx->mac_lock);
787 return rc;
788 }
789
efx_siena_remove_filters(struct efx_nic * efx)790 void efx_siena_remove_filters(struct efx_nic *efx)
791 {
792 #ifdef CONFIG_RFS_ACCEL
793 struct efx_channel *channel;
794
795 efx_for_each_channel(channel, efx) {
796 cancel_delayed_work_sync(&channel->filter_work);
797 kfree(channel->rps_flow_id);
798 channel->rps_flow_id = NULL;
799 }
800 #endif
801 down_write(&efx->filter_sem);
802 efx->type->filter_table_remove(efx);
803 up_write(&efx->filter_sem);
804 }
805
806 #ifdef CONFIG_RFS_ACCEL
807
efx_filter_rfs_work(struct work_struct * data)808 static void efx_filter_rfs_work(struct work_struct *data)
809 {
810 struct efx_async_filter_insertion *req = container_of(data, struct efx_async_filter_insertion,
811 work);
812 struct efx_nic *efx = netdev_priv(req->net_dev);
813 struct efx_channel *channel = efx_get_channel(efx, req->rxq_index);
814 int slot_idx = req - efx->rps_slot;
815 struct efx_arfs_rule *rule;
816 u16 arfs_id = 0;
817 int rc;
818
819 rc = efx->type->filter_insert(efx, &req->spec, true);
820 if (rc >= 0)
821 /* Discard 'priority' part of EF10+ filter ID (mcdi_filters) */
822 rc %= efx->type->max_rx_ip_filters;
823 if (efx->rps_hash_table) {
824 spin_lock_bh(&efx->rps_hash_lock);
825 rule = efx_siena_rps_hash_find(efx, &req->spec);
826 /* The rule might have already gone, if someone else's request
827 * for the same spec was already worked and then expired before
828 * we got around to our work. In that case we have nothing
829 * tying us to an arfs_id, meaning that as soon as the filter
830 * is considered for expiry it will be removed.
831 */
832 if (rule) {
833 if (rc < 0)
834 rule->filter_id = EFX_ARFS_FILTER_ID_ERROR;
835 else
836 rule->filter_id = rc;
837 arfs_id = rule->arfs_id;
838 }
839 spin_unlock_bh(&efx->rps_hash_lock);
840 }
841 if (rc >= 0) {
842 /* Remember this so we can check whether to expire the filter
843 * later.
844 */
845 mutex_lock(&efx->rps_mutex);
846 if (channel->rps_flow_id[rc] == RPS_FLOW_ID_INVALID)
847 channel->rfs_filter_count++;
848 channel->rps_flow_id[rc] = req->flow_id;
849 mutex_unlock(&efx->rps_mutex);
850
851 if (req->spec.ether_type == htons(ETH_P_IP))
852 netif_info(efx, rx_status, efx->net_dev,
853 "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d id %u]\n",
854 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
855 req->spec.rem_host, ntohs(req->spec.rem_port),
856 req->spec.loc_host, ntohs(req->spec.loc_port),
857 req->rxq_index, req->flow_id, rc, arfs_id);
858 else
859 netif_info(efx, rx_status, efx->net_dev,
860 "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d id %u]\n",
861 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
862 req->spec.rem_host, ntohs(req->spec.rem_port),
863 req->spec.loc_host, ntohs(req->spec.loc_port),
864 req->rxq_index, req->flow_id, rc, arfs_id);
865 channel->n_rfs_succeeded++;
866 } else {
867 if (req->spec.ether_type == htons(ETH_P_IP))
868 netif_dbg(efx, rx_status, efx->net_dev,
869 "failed to steer %s %pI4:%u:%pI4:%u to queue %u [flow %u rc %d id %u]\n",
870 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
871 req->spec.rem_host, ntohs(req->spec.rem_port),
872 req->spec.loc_host, ntohs(req->spec.loc_port),
873 req->rxq_index, req->flow_id, rc, arfs_id);
874 else
875 netif_dbg(efx, rx_status, efx->net_dev,
876 "failed to steer %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u rc %d id %u]\n",
877 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
878 req->spec.rem_host, ntohs(req->spec.rem_port),
879 req->spec.loc_host, ntohs(req->spec.loc_port),
880 req->rxq_index, req->flow_id, rc, arfs_id);
881 channel->n_rfs_failed++;
882 /* We're overloading the NIC's filter tables, so let's do a
883 * chunk of extra expiry work.
884 */
885 __efx_siena_filter_rfs_expire(channel,
886 min(channel->rfs_filter_count,
887 100u));
888 }
889
890 /* Release references */
891 clear_bit(slot_idx, &efx->rps_slot_map);
892 netdev_put(req->net_dev, &req->net_dev_tracker);
893 }
894
efx_siena_filter_rfs(struct net_device * net_dev,const struct sk_buff * skb,u16 rxq_index,u32 flow_id)895 int efx_siena_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
896 u16 rxq_index, u32 flow_id)
897 {
898 struct efx_nic *efx = netdev_priv(net_dev);
899 struct efx_async_filter_insertion *req;
900 struct efx_arfs_rule *rule;
901 struct flow_keys fk;
902 int slot_idx;
903 bool new;
904 int rc;
905
906 /* find a free slot */
907 for (slot_idx = 0; slot_idx < EFX_RPS_MAX_IN_FLIGHT; slot_idx++)
908 if (!test_and_set_bit(slot_idx, &efx->rps_slot_map))
909 break;
910 if (slot_idx >= EFX_RPS_MAX_IN_FLIGHT)
911 return -EBUSY;
912
913 if (flow_id == RPS_FLOW_ID_INVALID) {
914 rc = -EINVAL;
915 goto out_clear;
916 }
917
918 if (!skb_flow_dissect_flow_keys(skb, &fk, 0)) {
919 rc = -EPROTONOSUPPORT;
920 goto out_clear;
921 }
922
923 if (fk.basic.n_proto != htons(ETH_P_IP) && fk.basic.n_proto != htons(ETH_P_IPV6)) {
924 rc = -EPROTONOSUPPORT;
925 goto out_clear;
926 }
927 if (fk.control.flags & FLOW_DIS_IS_FRAGMENT) {
928 rc = -EPROTONOSUPPORT;
929 goto out_clear;
930 }
931
932 req = efx->rps_slot + slot_idx;
933 efx_filter_init_rx(&req->spec, EFX_FILTER_PRI_HINT,
934 efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
935 rxq_index);
936 req->spec.match_flags =
937 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
938 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
939 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
940 req->spec.ether_type = fk.basic.n_proto;
941 req->spec.ip_proto = fk.basic.ip_proto;
942
943 if (fk.basic.n_proto == htons(ETH_P_IP)) {
944 req->spec.rem_host[0] = fk.addrs.v4addrs.src;
945 req->spec.loc_host[0] = fk.addrs.v4addrs.dst;
946 } else {
947 memcpy(req->spec.rem_host, &fk.addrs.v6addrs.src,
948 sizeof(struct in6_addr));
949 memcpy(req->spec.loc_host, &fk.addrs.v6addrs.dst,
950 sizeof(struct in6_addr));
951 }
952
953 req->spec.rem_port = fk.ports.src;
954 req->spec.loc_port = fk.ports.dst;
955
956 if (efx->rps_hash_table) {
957 /* Add it to ARFS hash table */
958 spin_lock(&efx->rps_hash_lock);
959 rule = efx_rps_hash_add(efx, &req->spec, &new);
960 if (!rule) {
961 rc = -ENOMEM;
962 goto out_unlock;
963 }
964 if (new)
965 rule->arfs_id = efx->rps_next_id++ % RPS_NO_FILTER;
966 rc = rule->arfs_id;
967 /* Skip if existing or pending filter already does the right thing */
968 if (!new && rule->rxq_index == rxq_index &&
969 rule->filter_id >= EFX_ARFS_FILTER_ID_PENDING)
970 goto out_unlock;
971 rule->rxq_index = rxq_index;
972 rule->filter_id = EFX_ARFS_FILTER_ID_PENDING;
973 spin_unlock(&efx->rps_hash_lock);
974 } else {
975 /* Without an ARFS hash table, we just use arfs_id 0 for all
976 * filters. This means if multiple flows hash to the same
977 * flow_id, all but the most recently touched will be eligible
978 * for expiry.
979 */
980 rc = 0;
981 }
982
983 /* Queue the request */
984 req->net_dev = net_dev;
985 netdev_hold(req->net_dev, &req->net_dev_tracker, GFP_ATOMIC);
986 INIT_WORK(&req->work, efx_filter_rfs_work);
987 req->rxq_index = rxq_index;
988 req->flow_id = flow_id;
989 schedule_work(&req->work);
990 return rc;
991 out_unlock:
992 spin_unlock(&efx->rps_hash_lock);
993 out_clear:
994 clear_bit(slot_idx, &efx->rps_slot_map);
995 return rc;
996 }
997
__efx_siena_filter_rfs_expire(struct efx_channel * channel,unsigned int quota)998 bool __efx_siena_filter_rfs_expire(struct efx_channel *channel,
999 unsigned int quota)
1000 {
1001 bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
1002 struct efx_nic *efx = channel->efx;
1003 unsigned int index, size, start;
1004 u32 flow_id;
1005
1006 if (!mutex_trylock(&efx->rps_mutex))
1007 return false;
1008 expire_one = efx->type->filter_rfs_expire_one;
1009 index = channel->rfs_expire_index;
1010 start = index;
1011 size = efx->type->max_rx_ip_filters;
1012 while (quota) {
1013 flow_id = channel->rps_flow_id[index];
1014
1015 if (flow_id != RPS_FLOW_ID_INVALID) {
1016 quota--;
1017 if (expire_one(efx, flow_id, index)) {
1018 netif_info(efx, rx_status, efx->net_dev,
1019 "expired filter %d [channel %u flow %u]\n",
1020 index, channel->channel, flow_id);
1021 channel->rps_flow_id[index] = RPS_FLOW_ID_INVALID;
1022 channel->rfs_filter_count--;
1023 }
1024 }
1025 if (++index == size)
1026 index = 0;
1027 /* If we were called with a quota that exceeds the total number
1028 * of filters in the table (which shouldn't happen, but could
1029 * if two callers race), ensure that we don't loop forever -
1030 * stop when we've examined every row of the table.
1031 */
1032 if (index == start)
1033 break;
1034 }
1035
1036 channel->rfs_expire_index = index;
1037 mutex_unlock(&efx->rps_mutex);
1038 return true;
1039 }
1040
1041 #endif /* CONFIG_RFS_ACCEL */
1042