1 // SPDX-License-Identifier: GPL-2.0-only
2 /****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2018 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include "net_driver.h"
12 #include <linux/module.h>
13 #include <linux/iommu.h>
14 #include <net/rps.h>
15 #include "efx.h"
16 #include "nic.h"
17 #include "rx_common.h"
18
19 /* This is the percentage fill level below which new RX descriptors
20 * will be added to the RX descriptor ring.
21 */
22 static unsigned int rx_refill_threshold;
23 module_param(rx_refill_threshold, uint, 0444);
24 MODULE_PARM_DESC(rx_refill_threshold,
25 "RX descriptor ring refill threshold (%)");
26
27 /* RX maximum head room required.
28 *
29 * This must be at least 1 to prevent overflow, plus one packet-worth
30 * to allow pipelined receives.
31 */
32 #define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
33
34 static void efx_unmap_rx_buffer(struct efx_nic *efx,
35 struct efx_rx_buffer *rx_buf);
36
37 /* Check the RX page recycle ring for a page that can be reused. */
efx_reuse_page(struct efx_rx_queue * rx_queue)38 static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
39 {
40 struct efx_nic *efx = rx_queue->efx;
41 struct efx_rx_page_state *state;
42 unsigned int index;
43 struct page *page;
44
45 if (unlikely(!rx_queue->page_ring))
46 return NULL;
47 index = rx_queue->page_remove & rx_queue->page_ptr_mask;
48 page = rx_queue->page_ring[index];
49 if (page == NULL)
50 return NULL;
51
52 rx_queue->page_ring[index] = NULL;
53 /* page_remove cannot exceed page_add. */
54 if (rx_queue->page_remove != rx_queue->page_add)
55 ++rx_queue->page_remove;
56
57 /* If page_count is 1 then we hold the only reference to this page. */
58 if (page_count(page) == 1) {
59 ++rx_queue->page_recycle_count;
60 return page;
61 } else {
62 state = page_address(page);
63 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
64 PAGE_SIZE << efx->rx_buffer_order,
65 DMA_FROM_DEVICE);
66 put_page(page);
67 ++rx_queue->page_recycle_failed;
68 }
69
70 return NULL;
71 }
72
73 /* Attempt to recycle the page if there is an RX recycle ring; the page can
74 * only be added if this is the final RX buffer, to prevent pages being used in
75 * the descriptor ring and appearing in the recycle ring simultaneously.
76 */
efx_recycle_rx_page(struct efx_channel * channel,struct efx_rx_buffer * rx_buf)77 static void efx_recycle_rx_page(struct efx_channel *channel,
78 struct efx_rx_buffer *rx_buf)
79 {
80 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
81 struct efx_nic *efx = rx_queue->efx;
82 struct page *page = rx_buf->page;
83 unsigned int index;
84
85 /* Only recycle the page after processing the final buffer. */
86 if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
87 return;
88
89 index = rx_queue->page_add & rx_queue->page_ptr_mask;
90 if (rx_queue->page_ring[index] == NULL) {
91 unsigned int read_index = rx_queue->page_remove &
92 rx_queue->page_ptr_mask;
93
94 /* The next slot in the recycle ring is available, but
95 * increment page_remove if the read pointer currently
96 * points here.
97 */
98 if (read_index == index)
99 ++rx_queue->page_remove;
100 rx_queue->page_ring[index] = page;
101 ++rx_queue->page_add;
102 return;
103 }
104 ++rx_queue->page_recycle_full;
105 efx_unmap_rx_buffer(efx, rx_buf);
106 put_page(rx_buf->page);
107 }
108
109 /* Recycle the pages that are used by buffers that have just been received. */
efx_siena_recycle_rx_pages(struct efx_channel * channel,struct efx_rx_buffer * rx_buf,unsigned int n_frags)110 void efx_siena_recycle_rx_pages(struct efx_channel *channel,
111 struct efx_rx_buffer *rx_buf,
112 unsigned int n_frags)
113 {
114 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
115
116 if (unlikely(!rx_queue->page_ring))
117 return;
118
119 do {
120 efx_recycle_rx_page(channel, rx_buf);
121 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
122 } while (--n_frags);
123 }
124
efx_siena_discard_rx_packet(struct efx_channel * channel,struct efx_rx_buffer * rx_buf,unsigned int n_frags)125 void efx_siena_discard_rx_packet(struct efx_channel *channel,
126 struct efx_rx_buffer *rx_buf,
127 unsigned int n_frags)
128 {
129 struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
130
131 efx_siena_recycle_rx_pages(channel, rx_buf, n_frags);
132
133 efx_siena_free_rx_buffers(rx_queue, rx_buf, n_frags);
134 }
135
efx_init_rx_recycle_ring(struct efx_rx_queue * rx_queue)136 static void efx_init_rx_recycle_ring(struct efx_rx_queue *rx_queue)
137 {
138 unsigned int bufs_in_recycle_ring, page_ring_size;
139 struct efx_nic *efx = rx_queue->efx;
140
141 bufs_in_recycle_ring = efx_rx_recycle_ring_size(efx);
142 page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
143 efx->rx_bufs_per_page);
144 rx_queue->page_ring = kzalloc_objs(*rx_queue->page_ring, page_ring_size);
145 if (!rx_queue->page_ring)
146 rx_queue->page_ptr_mask = 0;
147 else
148 rx_queue->page_ptr_mask = page_ring_size - 1;
149 }
150
efx_fini_rx_recycle_ring(struct efx_rx_queue * rx_queue)151 static void efx_fini_rx_recycle_ring(struct efx_rx_queue *rx_queue)
152 {
153 struct efx_nic *efx = rx_queue->efx;
154 int i;
155
156 if (unlikely(!rx_queue->page_ring))
157 return;
158
159 /* Unmap and release the pages in the recycle ring. Remove the ring. */
160 for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
161 struct page *page = rx_queue->page_ring[i];
162 struct efx_rx_page_state *state;
163
164 if (page == NULL)
165 continue;
166
167 state = page_address(page);
168 dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
169 PAGE_SIZE << efx->rx_buffer_order,
170 DMA_FROM_DEVICE);
171 put_page(page);
172 }
173 kfree(rx_queue->page_ring);
174 rx_queue->page_ring = NULL;
175 }
176
efx_fini_rx_buffer(struct efx_rx_queue * rx_queue,struct efx_rx_buffer * rx_buf)177 static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
178 struct efx_rx_buffer *rx_buf)
179 {
180 /* Release the page reference we hold for the buffer. */
181 if (rx_buf->page)
182 put_page(rx_buf->page);
183
184 /* If this is the last buffer in a page, unmap and free it. */
185 if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
186 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
187 efx_siena_free_rx_buffers(rx_queue, rx_buf, 1);
188 }
189 rx_buf->page = NULL;
190 }
191
efx_siena_probe_rx_queue(struct efx_rx_queue * rx_queue)192 int efx_siena_probe_rx_queue(struct efx_rx_queue *rx_queue)
193 {
194 struct efx_nic *efx = rx_queue->efx;
195 unsigned int entries;
196 int rc;
197
198 /* Create the smallest power-of-two aligned ring */
199 entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
200 EFX_WARN_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
201 rx_queue->ptr_mask = entries - 1;
202
203 netif_dbg(efx, probe, efx->net_dev,
204 "creating RX queue %d size %#x mask %#x\n",
205 efx_rx_queue_index(rx_queue), efx->rxq_entries,
206 rx_queue->ptr_mask);
207
208 /* Allocate RX buffers */
209 rx_queue->buffer = kzalloc_objs(*rx_queue->buffer, entries);
210 if (!rx_queue->buffer)
211 return -ENOMEM;
212
213 rc = efx_nic_probe_rx(rx_queue);
214 if (rc) {
215 kfree(rx_queue->buffer);
216 rx_queue->buffer = NULL;
217 }
218
219 return rc;
220 }
221
efx_siena_init_rx_queue(struct efx_rx_queue * rx_queue)222 void efx_siena_init_rx_queue(struct efx_rx_queue *rx_queue)
223 {
224 unsigned int max_fill, trigger, max_trigger;
225 struct efx_nic *efx = rx_queue->efx;
226 int rc = 0;
227
228 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
229 "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
230
231 /* Initialise ptr fields */
232 rx_queue->added_count = 0;
233 rx_queue->notified_count = 0;
234 rx_queue->removed_count = 0;
235 rx_queue->min_fill = -1U;
236 efx_init_rx_recycle_ring(rx_queue);
237
238 rx_queue->page_remove = 0;
239 rx_queue->page_add = rx_queue->page_ptr_mask + 1;
240 rx_queue->page_recycle_count = 0;
241 rx_queue->page_recycle_failed = 0;
242 rx_queue->page_recycle_full = 0;
243
244 /* Initialise limit fields */
245 max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
246 max_trigger =
247 max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
248 if (rx_refill_threshold != 0) {
249 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
250 if (trigger > max_trigger)
251 trigger = max_trigger;
252 } else {
253 trigger = max_trigger;
254 }
255
256 rx_queue->max_fill = max_fill;
257 rx_queue->fast_fill_trigger = trigger;
258 rx_queue->refill_enabled = true;
259
260 /* Initialise XDP queue information */
261 rc = xdp_rxq_info_reg(&rx_queue->xdp_rxq_info, efx->net_dev,
262 rx_queue->core_index, 0);
263
264 if (rc) {
265 netif_err(efx, rx_err, efx->net_dev,
266 "Failure to initialise XDP queue information rc=%d\n",
267 rc);
268 efx->xdp_rxq_info_failed = true;
269 }
270
271 /* Set up RX descriptor ring */
272 efx_nic_init_rx(rx_queue);
273 }
274
efx_siena_fini_rx_queue(struct efx_rx_queue * rx_queue)275 void efx_siena_fini_rx_queue(struct efx_rx_queue *rx_queue)
276 {
277 struct efx_rx_buffer *rx_buf;
278 int i;
279
280 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
281 "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
282
283 timer_delete_sync(&rx_queue->slow_fill);
284
285 /* Release RX buffers from the current read ptr to the write ptr */
286 if (rx_queue->buffer) {
287 for (i = rx_queue->removed_count; i < rx_queue->added_count;
288 i++) {
289 unsigned int index = i & rx_queue->ptr_mask;
290
291 rx_buf = efx_rx_buffer(rx_queue, index);
292 efx_fini_rx_buffer(rx_queue, rx_buf);
293 }
294 }
295
296 efx_fini_rx_recycle_ring(rx_queue);
297
298 if (xdp_rxq_info_is_reg(&rx_queue->xdp_rxq_info))
299 xdp_rxq_info_unreg(&rx_queue->xdp_rxq_info);
300 }
301
efx_siena_remove_rx_queue(struct efx_rx_queue * rx_queue)302 void efx_siena_remove_rx_queue(struct efx_rx_queue *rx_queue)
303 {
304 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
305 "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
306
307 efx_nic_remove_rx(rx_queue);
308
309 kfree(rx_queue->buffer);
310 rx_queue->buffer = NULL;
311 }
312
313 /* Unmap a DMA-mapped page. This function is only called for the final RX
314 * buffer in a page.
315 */
efx_unmap_rx_buffer(struct efx_nic * efx,struct efx_rx_buffer * rx_buf)316 static void efx_unmap_rx_buffer(struct efx_nic *efx,
317 struct efx_rx_buffer *rx_buf)
318 {
319 struct page *page = rx_buf->page;
320
321 if (page) {
322 struct efx_rx_page_state *state = page_address(page);
323
324 dma_unmap_page(&efx->pci_dev->dev,
325 state->dma_addr,
326 PAGE_SIZE << efx->rx_buffer_order,
327 DMA_FROM_DEVICE);
328 }
329 }
330
efx_siena_free_rx_buffers(struct efx_rx_queue * rx_queue,struct efx_rx_buffer * rx_buf,unsigned int num_bufs)331 void efx_siena_free_rx_buffers(struct efx_rx_queue *rx_queue,
332 struct efx_rx_buffer *rx_buf,
333 unsigned int num_bufs)
334 {
335 do {
336 if (rx_buf->page) {
337 put_page(rx_buf->page);
338 rx_buf->page = NULL;
339 }
340 rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
341 } while (--num_bufs);
342 }
343
efx_siena_rx_slow_fill(struct timer_list * t)344 void efx_siena_rx_slow_fill(struct timer_list *t)
345 {
346 struct efx_rx_queue *rx_queue = timer_container_of(rx_queue, t,
347 slow_fill);
348
349 /* Post an event to cause NAPI to run and refill the queue */
350 efx_nic_generate_fill_event(rx_queue);
351 ++rx_queue->slow_fill_count;
352 }
353
efx_schedule_slow_fill(struct efx_rx_queue * rx_queue)354 static void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
355 {
356 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(10));
357 }
358
359 /* efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
360 *
361 * @rx_queue: Efx RX queue
362 *
363 * This allocates a batch of pages, maps them for DMA, and populates
364 * struct efx_rx_buffers for each one. Return a negative error code or
365 * 0 on success. If a single page can be used for multiple buffers,
366 * then the page will either be inserted fully, or not at all.
367 */
efx_init_rx_buffers(struct efx_rx_queue * rx_queue,bool atomic)368 static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
369 {
370 unsigned int page_offset, index, count;
371 struct efx_nic *efx = rx_queue->efx;
372 struct efx_rx_page_state *state;
373 struct efx_rx_buffer *rx_buf;
374 dma_addr_t dma_addr;
375 struct page *page;
376
377 count = 0;
378 do {
379 page = efx_reuse_page(rx_queue);
380 if (page == NULL) {
381 page = alloc_pages(__GFP_COMP |
382 (atomic ? GFP_ATOMIC : GFP_KERNEL),
383 efx->rx_buffer_order);
384 if (unlikely(page == NULL))
385 return -ENOMEM;
386 dma_addr =
387 dma_map_page(&efx->pci_dev->dev, page, 0,
388 PAGE_SIZE << efx->rx_buffer_order,
389 DMA_FROM_DEVICE);
390 if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
391 dma_addr))) {
392 __free_pages(page, efx->rx_buffer_order);
393 return -EIO;
394 }
395 state = page_address(page);
396 state->dma_addr = dma_addr;
397 } else {
398 state = page_address(page);
399 dma_addr = state->dma_addr;
400 }
401
402 dma_addr += sizeof(struct efx_rx_page_state);
403 page_offset = sizeof(struct efx_rx_page_state);
404
405 do {
406 index = rx_queue->added_count & rx_queue->ptr_mask;
407 rx_buf = efx_rx_buffer(rx_queue, index);
408 rx_buf->dma_addr = dma_addr + efx->rx_ip_align +
409 EFX_XDP_HEADROOM;
410 rx_buf->page = page;
411 rx_buf->page_offset = page_offset + efx->rx_ip_align +
412 EFX_XDP_HEADROOM;
413 rx_buf->len = efx->rx_dma_len;
414 rx_buf->flags = 0;
415 ++rx_queue->added_count;
416 get_page(page);
417 dma_addr += efx->rx_page_buf_step;
418 page_offset += efx->rx_page_buf_step;
419 } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
420
421 rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
422 } while (++count < efx->rx_pages_per_batch);
423
424 return 0;
425 }
426
efx_siena_rx_config_page_split(struct efx_nic * efx)427 void efx_siena_rx_config_page_split(struct efx_nic *efx)
428 {
429 efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align +
430 EFX_XDP_HEADROOM + EFX_XDP_TAILROOM,
431 EFX_RX_BUF_ALIGNMENT);
432 efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
433 ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
434 efx->rx_page_buf_step);
435 efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
436 efx->rx_bufs_per_page;
437 efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
438 efx->rx_bufs_per_page);
439 }
440
441 /* efx_siena_fast_push_rx_descriptors - push new RX descriptors quickly
442 * @rx_queue: RX descriptor queue
443 *
444 * This will aim to fill the RX descriptor queue up to
445 * @rx_queue->@max_fill. If there is insufficient atomic
446 * memory to do so, a slow fill will be scheduled.
447 *
448 * The caller must provide serialisation (none is used here). In practise,
449 * this means this function must run from the NAPI handler, or be called
450 * when NAPI is disabled.
451 */
efx_siena_fast_push_rx_descriptors(struct efx_rx_queue * rx_queue,bool atomic)452 void efx_siena_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue,
453 bool atomic)
454 {
455 struct efx_nic *efx = rx_queue->efx;
456 unsigned int fill_level, batch_size;
457 int space, rc = 0;
458
459 if (!rx_queue->refill_enabled)
460 return;
461
462 /* Calculate current fill level, and exit if we don't need to fill */
463 fill_level = (rx_queue->added_count - rx_queue->removed_count);
464 EFX_WARN_ON_ONCE_PARANOID(fill_level > rx_queue->efx->rxq_entries);
465 if (fill_level >= rx_queue->fast_fill_trigger)
466 goto out;
467
468 /* Record minimum fill level */
469 if (unlikely(fill_level < rx_queue->min_fill)) {
470 if (fill_level)
471 rx_queue->min_fill = fill_level;
472 }
473
474 batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
475 space = rx_queue->max_fill - fill_level;
476 EFX_WARN_ON_ONCE_PARANOID(space < batch_size);
477
478 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
479 "RX queue %d fast-filling descriptor ring from"
480 " level %d to level %d\n",
481 efx_rx_queue_index(rx_queue), fill_level,
482 rx_queue->max_fill);
483
484 do {
485 rc = efx_init_rx_buffers(rx_queue, atomic);
486 if (unlikely(rc)) {
487 /* Ensure that we don't leave the rx queue empty */
488 efx_schedule_slow_fill(rx_queue);
489 goto out;
490 }
491 } while ((space -= batch_size) >= batch_size);
492
493 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
494 "RX queue %d fast-filled descriptor ring "
495 "to level %d\n", efx_rx_queue_index(rx_queue),
496 rx_queue->added_count - rx_queue->removed_count);
497
498 out:
499 if (rx_queue->notified_count != rx_queue->added_count)
500 efx_nic_notify_rx_desc(rx_queue);
501 }
502
503 /* Pass a received packet up through GRO. GRO can handle pages
504 * regardless of checksum state and skbs with a good checksum.
505 */
506 void
efx_siena_rx_packet_gro(struct efx_channel * channel,struct efx_rx_buffer * rx_buf,unsigned int n_frags,u8 * eh,__wsum csum)507 efx_siena_rx_packet_gro(struct efx_channel *channel,
508 struct efx_rx_buffer *rx_buf,
509 unsigned int n_frags, u8 *eh, __wsum csum)
510 {
511 struct napi_struct *napi = &channel->napi_str;
512 struct efx_nic *efx = channel->efx;
513 struct sk_buff *skb;
514
515 skb = napi_get_frags(napi);
516 if (unlikely(!skb)) {
517 struct efx_rx_queue *rx_queue;
518
519 rx_queue = efx_channel_get_rx_queue(channel);
520 efx_siena_free_rx_buffers(rx_queue, rx_buf, n_frags);
521 return;
522 }
523
524 if (efx->net_dev->features & NETIF_F_RXHASH)
525 skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
526 PKT_HASH_TYPE_L3);
527 if (csum) {
528 skb->csum = csum;
529 skb->ip_summed = CHECKSUM_COMPLETE;
530 } else {
531 skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
532 CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
533 }
534 skb->csum_level = !!(rx_buf->flags & EFX_RX_PKT_CSUM_LEVEL);
535
536 for (;;) {
537 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
538 rx_buf->page, rx_buf->page_offset,
539 rx_buf->len);
540 rx_buf->page = NULL;
541 skb->len += rx_buf->len;
542 if (skb_shinfo(skb)->nr_frags == n_frags)
543 break;
544
545 rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
546 }
547
548 skb->data_len = skb->len;
549 skb->truesize += n_frags * efx->rx_buffer_truesize;
550
551 skb_record_rx_queue(skb, channel->rx_queue.core_index);
552
553 napi_gro_frags(napi);
554 }
555
efx_siena_set_default_rx_indir_table(struct efx_nic * efx,struct efx_rss_context * ctx)556 void efx_siena_set_default_rx_indir_table(struct efx_nic *efx,
557 struct efx_rss_context *ctx)
558 {
559 size_t i;
560
561 for (i = 0; i < ARRAY_SIZE(ctx->rx_indir_table); i++)
562 ctx->rx_indir_table[i] =
563 ethtool_rxfh_indir_default(i, efx->rss_spread);
564 }
565
566 /**
567 * efx_siena_filter_is_mc_recipient - test whether spec is a multicast recipient
568 * @spec: Specification to test
569 *
570 * Return: %true if the specification is a non-drop RX filter that
571 * matches a local MAC address I/G bit value of 1 or matches a local
572 * IPv4 or IPv6 address value in the respective multicast address
573 * range. Otherwise %false.
574 */
efx_siena_filter_is_mc_recipient(const struct efx_filter_spec * spec)575 bool efx_siena_filter_is_mc_recipient(const struct efx_filter_spec *spec)
576 {
577 if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
578 spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
579 return false;
580
581 if (spec->match_flags &
582 (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
583 is_multicast_ether_addr(spec->loc_mac))
584 return true;
585
586 if ((spec->match_flags &
587 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
588 (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
589 if (spec->ether_type == htons(ETH_P_IP) &&
590 ipv4_is_multicast(spec->loc_host[0]))
591 return true;
592 if (spec->ether_type == htons(ETH_P_IPV6) &&
593 ((const u8 *)spec->loc_host)[0] == 0xff)
594 return true;
595 }
596
597 return false;
598 }
599
efx_siena_filter_spec_equal(const struct efx_filter_spec * left,const struct efx_filter_spec * right)600 bool efx_siena_filter_spec_equal(const struct efx_filter_spec *left,
601 const struct efx_filter_spec *right)
602 {
603 if ((left->match_flags ^ right->match_flags) |
604 ((left->flags ^ right->flags) &
605 (EFX_FILTER_FLAG_RX | EFX_FILTER_FLAG_TX)))
606 return false;
607
608 return memcmp(&left->outer_vid, &right->outer_vid,
609 sizeof(struct efx_filter_spec) -
610 offsetof(struct efx_filter_spec, outer_vid)) == 0;
611 }
612
efx_siena_filter_spec_hash(const struct efx_filter_spec * spec)613 u32 efx_siena_filter_spec_hash(const struct efx_filter_spec *spec)
614 {
615 BUILD_BUG_ON(offsetof(struct efx_filter_spec, outer_vid) & 3);
616 return jhash2((const u32 *)&spec->outer_vid,
617 (sizeof(struct efx_filter_spec) -
618 offsetof(struct efx_filter_spec, outer_vid)) / 4,
619 0);
620 }
621
622 #ifdef CONFIG_RFS_ACCEL
efx_siena_rps_check_rule(struct efx_arfs_rule * rule,unsigned int filter_idx,bool * force)623 bool efx_siena_rps_check_rule(struct efx_arfs_rule *rule,
624 unsigned int filter_idx, bool *force)
625 {
626 if (rule->filter_id == EFX_ARFS_FILTER_ID_PENDING) {
627 /* ARFS is currently updating this entry, leave it */
628 return false;
629 }
630 if (rule->filter_id == EFX_ARFS_FILTER_ID_ERROR) {
631 /* ARFS tried and failed to update this, so it's probably out
632 * of date. Remove the filter and the ARFS rule entry.
633 */
634 rule->filter_id = EFX_ARFS_FILTER_ID_REMOVING;
635 *force = true;
636 return true;
637 } else if (WARN_ON(rule->filter_id != filter_idx)) { /* can't happen */
638 /* ARFS has moved on, so old filter is not needed. Since we did
639 * not mark the rule with EFX_ARFS_FILTER_ID_REMOVING, it will
640 * not be removed by efx_siena_rps_hash_del() subsequently.
641 */
642 *force = true;
643 return true;
644 }
645 /* Remove it iff ARFS wants to. */
646 return true;
647 }
648
649 static
efx_rps_hash_bucket(struct efx_nic * efx,const struct efx_filter_spec * spec)650 struct hlist_head *efx_rps_hash_bucket(struct efx_nic *efx,
651 const struct efx_filter_spec *spec)
652 {
653 u32 hash = efx_siena_filter_spec_hash(spec);
654
655 lockdep_assert_held(&efx->rps_hash_lock);
656 if (!efx->rps_hash_table)
657 return NULL;
658 return &efx->rps_hash_table[hash % EFX_ARFS_HASH_TABLE_SIZE];
659 }
660
efx_siena_rps_hash_find(struct efx_nic * efx,const struct efx_filter_spec * spec)661 struct efx_arfs_rule *efx_siena_rps_hash_find(struct efx_nic *efx,
662 const struct efx_filter_spec *spec)
663 {
664 struct efx_arfs_rule *rule;
665 struct hlist_head *head;
666 struct hlist_node *node;
667
668 head = efx_rps_hash_bucket(efx, spec);
669 if (!head)
670 return NULL;
671 hlist_for_each(node, head) {
672 rule = container_of(node, struct efx_arfs_rule, node);
673 if (efx_siena_filter_spec_equal(spec, &rule->spec))
674 return rule;
675 }
676 return NULL;
677 }
678
efx_rps_hash_add(struct efx_nic * efx,const struct efx_filter_spec * spec,bool * new)679 static struct efx_arfs_rule *efx_rps_hash_add(struct efx_nic *efx,
680 const struct efx_filter_spec *spec,
681 bool *new)
682 {
683 struct efx_arfs_rule *rule;
684 struct hlist_head *head;
685 struct hlist_node *node;
686
687 head = efx_rps_hash_bucket(efx, spec);
688 if (!head)
689 return NULL;
690 hlist_for_each(node, head) {
691 rule = container_of(node, struct efx_arfs_rule, node);
692 if (efx_siena_filter_spec_equal(spec, &rule->spec)) {
693 *new = false;
694 return rule;
695 }
696 }
697 rule = kmalloc_obj(*rule, GFP_ATOMIC);
698 *new = true;
699 if (rule) {
700 memcpy(&rule->spec, spec, sizeof(rule->spec));
701 hlist_add_head(&rule->node, head);
702 }
703 return rule;
704 }
705
efx_siena_rps_hash_del(struct efx_nic * efx,const struct efx_filter_spec * spec)706 void efx_siena_rps_hash_del(struct efx_nic *efx,
707 const struct efx_filter_spec *spec)
708 {
709 struct efx_arfs_rule *rule;
710 struct hlist_head *head;
711 struct hlist_node *node;
712
713 head = efx_rps_hash_bucket(efx, spec);
714 if (WARN_ON(!head))
715 return;
716 hlist_for_each(node, head) {
717 rule = container_of(node, struct efx_arfs_rule, node);
718 if (efx_siena_filter_spec_equal(spec, &rule->spec)) {
719 /* Someone already reused the entry. We know that if
720 * this check doesn't fire (i.e. filter_id == REMOVING)
721 * then the REMOVING mark was put there by our caller,
722 * because caller is holding a lock on filter table and
723 * only holders of that lock set REMOVING.
724 */
725 if (rule->filter_id != EFX_ARFS_FILTER_ID_REMOVING)
726 return;
727 hlist_del(node);
728 kfree(rule);
729 return;
730 }
731 }
732 /* We didn't find it. */
733 WARN_ON(1);
734 }
735 #endif
736
efx_siena_probe_filters(struct efx_nic * efx)737 int efx_siena_probe_filters(struct efx_nic *efx)
738 {
739 int rc;
740
741 mutex_lock(&efx->mac_lock);
742 down_write(&efx->filter_sem);
743 rc = efx->type->filter_table_probe(efx);
744 if (rc)
745 goto out_unlock;
746
747 #ifdef CONFIG_RFS_ACCEL
748 if (efx->type->offload_features & NETIF_F_NTUPLE) {
749 struct efx_channel *channel;
750 int i, success = 1;
751
752 efx_for_each_channel(channel, efx) {
753 channel->rps_flow_id =
754 kcalloc(efx->type->max_rx_ip_filters,
755 sizeof(*channel->rps_flow_id),
756 GFP_KERNEL);
757 if (!channel->rps_flow_id)
758 success = 0;
759 else
760 for (i = 0;
761 i < efx->type->max_rx_ip_filters;
762 ++i)
763 channel->rps_flow_id[i] =
764 RPS_FLOW_ID_INVALID;
765 channel->rfs_expire_index = 0;
766 channel->rfs_filter_count = 0;
767 }
768
769 if (!success) {
770 efx_for_each_channel(channel, efx)
771 kfree(channel->rps_flow_id);
772 efx->type->filter_table_remove(efx);
773 rc = -ENOMEM;
774 goto out_unlock;
775 }
776 }
777 #endif
778 out_unlock:
779 up_write(&efx->filter_sem);
780 mutex_unlock(&efx->mac_lock);
781 return rc;
782 }
783
efx_siena_remove_filters(struct efx_nic * efx)784 void efx_siena_remove_filters(struct efx_nic *efx)
785 {
786 #ifdef CONFIG_RFS_ACCEL
787 struct efx_channel *channel;
788
789 efx_for_each_channel(channel, efx) {
790 cancel_delayed_work_sync(&channel->filter_work);
791 kfree(channel->rps_flow_id);
792 channel->rps_flow_id = NULL;
793 }
794 #endif
795 down_write(&efx->filter_sem);
796 efx->type->filter_table_remove(efx);
797 up_write(&efx->filter_sem);
798 }
799
800 #ifdef CONFIG_RFS_ACCEL
801
efx_filter_rfs_work(struct work_struct * data)802 static void efx_filter_rfs_work(struct work_struct *data)
803 {
804 struct efx_async_filter_insertion *req = container_of(data, struct efx_async_filter_insertion,
805 work);
806 struct efx_nic *efx = netdev_priv(req->net_dev);
807 struct efx_channel *channel = efx_get_channel(efx, req->rxq_index);
808 int slot_idx = req - efx->rps_slot;
809 struct efx_arfs_rule *rule;
810 u16 arfs_id = 0;
811 int rc;
812
813 rc = efx->type->filter_insert(efx, &req->spec, true);
814 if (rc >= 0)
815 /* Discard 'priority' part of EF10+ filter ID (mcdi_filters) */
816 rc %= efx->type->max_rx_ip_filters;
817 if (efx->rps_hash_table) {
818 spin_lock_bh(&efx->rps_hash_lock);
819 rule = efx_siena_rps_hash_find(efx, &req->spec);
820 /* The rule might have already gone, if someone else's request
821 * for the same spec was already worked and then expired before
822 * we got around to our work. In that case we have nothing
823 * tying us to an arfs_id, meaning that as soon as the filter
824 * is considered for expiry it will be removed.
825 */
826 if (rule) {
827 if (rc < 0)
828 rule->filter_id = EFX_ARFS_FILTER_ID_ERROR;
829 else
830 rule->filter_id = rc;
831 arfs_id = rule->arfs_id;
832 }
833 spin_unlock_bh(&efx->rps_hash_lock);
834 }
835 if (rc >= 0) {
836 /* Remember this so we can check whether to expire the filter
837 * later.
838 */
839 mutex_lock(&efx->rps_mutex);
840 if (channel->rps_flow_id[rc] == RPS_FLOW_ID_INVALID)
841 channel->rfs_filter_count++;
842 channel->rps_flow_id[rc] = req->flow_id;
843 mutex_unlock(&efx->rps_mutex);
844
845 if (req->spec.ether_type == htons(ETH_P_IP))
846 netif_info(efx, rx_status, efx->net_dev,
847 "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d id %u]\n",
848 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
849 req->spec.rem_host, ntohs(req->spec.rem_port),
850 req->spec.loc_host, ntohs(req->spec.loc_port),
851 req->rxq_index, req->flow_id, rc, arfs_id);
852 else
853 netif_info(efx, rx_status, efx->net_dev,
854 "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d id %u]\n",
855 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
856 req->spec.rem_host, ntohs(req->spec.rem_port),
857 req->spec.loc_host, ntohs(req->spec.loc_port),
858 req->rxq_index, req->flow_id, rc, arfs_id);
859 channel->n_rfs_succeeded++;
860 } else {
861 if (req->spec.ether_type == htons(ETH_P_IP))
862 netif_dbg(efx, rx_status, efx->net_dev,
863 "failed to steer %s %pI4:%u:%pI4:%u to queue %u [flow %u rc %d id %u]\n",
864 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
865 req->spec.rem_host, ntohs(req->spec.rem_port),
866 req->spec.loc_host, ntohs(req->spec.loc_port),
867 req->rxq_index, req->flow_id, rc, arfs_id);
868 else
869 netif_dbg(efx, rx_status, efx->net_dev,
870 "failed to steer %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u rc %d id %u]\n",
871 (req->spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
872 req->spec.rem_host, ntohs(req->spec.rem_port),
873 req->spec.loc_host, ntohs(req->spec.loc_port),
874 req->rxq_index, req->flow_id, rc, arfs_id);
875 channel->n_rfs_failed++;
876 /* We're overloading the NIC's filter tables, so let's do a
877 * chunk of extra expiry work.
878 */
879 __efx_siena_filter_rfs_expire(channel,
880 min(channel->rfs_filter_count,
881 100u));
882 }
883
884 /* Release references */
885 clear_bit(slot_idx, &efx->rps_slot_map);
886 netdev_put(req->net_dev, &req->net_dev_tracker);
887 }
888
efx_siena_filter_rfs(struct net_device * net_dev,const struct sk_buff * skb,u16 rxq_index,u32 flow_id)889 int efx_siena_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
890 u16 rxq_index, u32 flow_id)
891 {
892 struct efx_nic *efx = netdev_priv(net_dev);
893 struct efx_async_filter_insertion *req;
894 struct efx_arfs_rule *rule;
895 struct flow_keys fk;
896 int slot_idx;
897 bool new;
898 int rc;
899
900 /* find a free slot */
901 for (slot_idx = 0; slot_idx < EFX_RPS_MAX_IN_FLIGHT; slot_idx++)
902 if (!test_and_set_bit(slot_idx, &efx->rps_slot_map))
903 break;
904 if (slot_idx >= EFX_RPS_MAX_IN_FLIGHT)
905 return -EBUSY;
906
907 if (flow_id == RPS_FLOW_ID_INVALID) {
908 rc = -EINVAL;
909 goto out_clear;
910 }
911
912 if (!skb_flow_dissect_flow_keys(skb, &fk, 0)) {
913 rc = -EPROTONOSUPPORT;
914 goto out_clear;
915 }
916
917 if (fk.basic.n_proto != htons(ETH_P_IP) && fk.basic.n_proto != htons(ETH_P_IPV6)) {
918 rc = -EPROTONOSUPPORT;
919 goto out_clear;
920 }
921 if (fk.control.flags & FLOW_DIS_IS_FRAGMENT) {
922 rc = -EPROTONOSUPPORT;
923 goto out_clear;
924 }
925
926 req = efx->rps_slot + slot_idx;
927 efx_filter_init_rx(&req->spec, EFX_FILTER_PRI_HINT,
928 efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
929 rxq_index);
930 req->spec.match_flags =
931 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
932 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
933 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
934 req->spec.ether_type = fk.basic.n_proto;
935 req->spec.ip_proto = fk.basic.ip_proto;
936
937 if (fk.basic.n_proto == htons(ETH_P_IP)) {
938 req->spec.rem_host[0] = fk.addrs.v4addrs.src;
939 req->spec.loc_host[0] = fk.addrs.v4addrs.dst;
940 } else {
941 memcpy(req->spec.rem_host, &fk.addrs.v6addrs.src,
942 sizeof(struct in6_addr));
943 memcpy(req->spec.loc_host, &fk.addrs.v6addrs.dst,
944 sizeof(struct in6_addr));
945 }
946
947 req->spec.rem_port = fk.ports.src;
948 req->spec.loc_port = fk.ports.dst;
949
950 if (efx->rps_hash_table) {
951 /* Add it to ARFS hash table */
952 spin_lock(&efx->rps_hash_lock);
953 rule = efx_rps_hash_add(efx, &req->spec, &new);
954 if (!rule) {
955 rc = -ENOMEM;
956 goto out_unlock;
957 }
958 if (new)
959 rule->arfs_id = efx->rps_next_id++ % RPS_NO_FILTER;
960 rc = rule->arfs_id;
961 /* Skip if existing or pending filter already does the right thing */
962 if (!new && rule->rxq_index == rxq_index &&
963 rule->filter_id >= EFX_ARFS_FILTER_ID_PENDING)
964 goto out_unlock;
965 rule->rxq_index = rxq_index;
966 rule->filter_id = EFX_ARFS_FILTER_ID_PENDING;
967 spin_unlock(&efx->rps_hash_lock);
968 } else {
969 /* Without an ARFS hash table, we just use arfs_id 0 for all
970 * filters. This means if multiple flows hash to the same
971 * flow_id, all but the most recently touched will be eligible
972 * for expiry.
973 */
974 rc = 0;
975 }
976
977 /* Queue the request */
978 req->net_dev = net_dev;
979 netdev_hold(req->net_dev, &req->net_dev_tracker, GFP_ATOMIC);
980 INIT_WORK(&req->work, efx_filter_rfs_work);
981 req->rxq_index = rxq_index;
982 req->flow_id = flow_id;
983 schedule_work(&req->work);
984 return rc;
985 out_unlock:
986 spin_unlock(&efx->rps_hash_lock);
987 out_clear:
988 clear_bit(slot_idx, &efx->rps_slot_map);
989 return rc;
990 }
991
__efx_siena_filter_rfs_expire(struct efx_channel * channel,unsigned int quota)992 bool __efx_siena_filter_rfs_expire(struct efx_channel *channel,
993 unsigned int quota)
994 {
995 bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
996 struct efx_nic *efx = channel->efx;
997 unsigned int index, size, start;
998 u32 flow_id;
999
1000 if (!mutex_trylock(&efx->rps_mutex))
1001 return false;
1002 expire_one = efx->type->filter_rfs_expire_one;
1003 index = channel->rfs_expire_index;
1004 start = index;
1005 size = efx->type->max_rx_ip_filters;
1006 while (quota) {
1007 flow_id = channel->rps_flow_id[index];
1008
1009 if (flow_id != RPS_FLOW_ID_INVALID) {
1010 quota--;
1011 if (expire_one(efx, flow_id, index)) {
1012 netif_info(efx, rx_status, efx->net_dev,
1013 "expired filter %d [channel %u flow %u]\n",
1014 index, channel->channel, flow_id);
1015 channel->rps_flow_id[index] = RPS_FLOW_ID_INVALID;
1016 channel->rfs_filter_count--;
1017 }
1018 }
1019 if (++index == size)
1020 index = 0;
1021 /* If we were called with a quota that exceeds the total number
1022 * of filters in the table (which shouldn't happen, but could
1023 * if two callers race), ensure that we don't loop forever -
1024 * stop when we've examined every row of the table.
1025 */
1026 if (index == start)
1027 break;
1028 }
1029
1030 channel->rfs_expire_index = index;
1031 mutex_unlock(&efx->rps_mutex);
1032 return true;
1033 }
1034
1035 #endif /* CONFIG_RFS_ACCEL */
1036