1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Early serial console for 8250/16550 devices
4 *
5 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
6 * Bjorn Helgaas <bjorn.helgaas@hp.com>
7 *
8 * Based on the 8250.c serial driver, Copyright (C) 2001 Russell King,
9 * and on early_printk.c by Andi Kleen.
10 *
11 * This is for use before the serial driver has initialized, in
12 * particular, before the UARTs have been discovered and named.
13 * Instead of specifying the console device as, e.g., "ttyS0",
14 * we locate the device directly by its MMIO or I/O port address.
15 *
16 * The user can specify the device directly, e.g.,
17 * earlycon=uart8250,io,0x3f8,9600n8
18 * earlycon=uart8250,mmio,0xff5e0000,115200n8
19 * earlycon=uart8250,mmio32,0xff5e0000,115200n8
20 * or
21 * console=uart8250,io,0x3f8,9600n8
22 * console=uart8250,mmio,0xff5e0000,115200n8
23 * console=uart8250,mmio32,0xff5e0000,115200n8
24 */
25
26 #include <linux/tty.h>
27 #include <linux/init.h>
28 #include <linux/console.h>
29 #include <linux/of.h>
30 #include <linux/serial_reg.h>
31 #include <linux/serial.h>
32 #include <linux/serial_8250.h>
33 #include <asm/io.h>
34 #include <asm/serial.h>
35
serial8250_early_in(struct uart_port * port,int offset)36 static unsigned int serial8250_early_in(struct uart_port *port, int offset)
37 {
38 offset <<= port->regshift;
39
40 switch (port->iotype) {
41 case UPIO_MEM:
42 return readb(port->membase + offset);
43 case UPIO_MEM16:
44 return readw(port->membase + offset);
45 case UPIO_MEM32:
46 return readl(port->membase + offset);
47 case UPIO_MEM32BE:
48 return ioread32be(port->membase + offset);
49 #ifdef CONFIG_HAS_IOPORT
50 case UPIO_PORT:
51 return inb(port->iobase + offset);
52 #endif
53 default:
54 return 0;
55 }
56 }
57
serial8250_early_out(struct uart_port * port,int offset,int value)58 static void serial8250_early_out(struct uart_port *port, int offset, int value)
59 {
60 offset <<= port->regshift;
61
62 switch (port->iotype) {
63 case UPIO_MEM:
64 writeb(value, port->membase + offset);
65 break;
66 case UPIO_MEM16:
67 writew(value, port->membase + offset);
68 break;
69 case UPIO_MEM32:
70 writel(value, port->membase + offset);
71 break;
72 case UPIO_MEM32BE:
73 iowrite32be(value, port->membase + offset);
74 break;
75 #ifdef CONFIG_HAS_IOPORT
76 case UPIO_PORT:
77 outb(value, port->iobase + offset);
78 break;
79 #endif
80 }
81 }
82
serial_putc(struct uart_port * port,unsigned char c)83 static void serial_putc(struct uart_port *port, unsigned char c)
84 {
85 unsigned int status;
86
87 serial8250_early_out(port, UART_TX, c);
88
89 for (;;) {
90 status = serial8250_early_in(port, UART_LSR);
91 if (uart_lsr_tx_empty(status))
92 break;
93 cpu_relax();
94 }
95 }
96
early_serial8250_write(struct console * console,const char * s,unsigned int count)97 static void early_serial8250_write(struct console *console,
98 const char *s, unsigned int count)
99 {
100 struct earlycon_device *device = console->data;
101 struct uart_port *port = &device->port;
102
103 uart_console_write(port, s, count, serial_putc);
104 }
105
106 #ifdef CONFIG_CONSOLE_POLL
early_serial8250_read(struct console * console,char * s,unsigned int count)107 static int early_serial8250_read(struct console *console,
108 char *s, unsigned int count)
109 {
110 struct earlycon_device *device = console->data;
111 struct uart_port *port = &device->port;
112 unsigned int status;
113 int num_read = 0;
114
115 while (num_read < count) {
116 status = serial8250_early_in(port, UART_LSR);
117 if (!(status & UART_LSR_DR))
118 break;
119 s[num_read++] = serial8250_early_in(port, UART_RX);
120 }
121
122 return num_read;
123 }
124 #else
125 #define early_serial8250_read NULL
126 #endif
127
init_port(struct earlycon_device * device)128 static void __init init_port(struct earlycon_device *device)
129 {
130 struct uart_port *port = &device->port;
131 unsigned int divisor;
132 unsigned char c;
133 unsigned int ier;
134
135 serial8250_early_out(port, UART_LCR, UART_LCR_WLEN8); /* 8n1 */
136 ier = serial8250_early_in(port, UART_IER);
137 serial8250_early_out(port, UART_IER, ier & UART_IER_UUE); /* no interrupt */
138 serial8250_early_out(port, UART_FCR, 0); /* no fifo */
139 serial8250_early_out(port, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
140
141 if (port->uartclk) {
142 divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * device->baud);
143 c = serial8250_early_in(port, UART_LCR);
144 serial8250_early_out(port, UART_LCR, c | UART_LCR_DLAB);
145 serial8250_early_out(port, UART_DLL, divisor & 0xff);
146 serial8250_early_out(port, UART_DLM, (divisor >> 8) & 0xff);
147 serial8250_early_out(port, UART_LCR, c & ~UART_LCR_DLAB);
148 }
149 }
150
early_serial8250_setup(struct earlycon_device * device,const char * options)151 int __init early_serial8250_setup(struct earlycon_device *device,
152 const char *options)
153 {
154 if (!(device->port.membase || device->port.iobase))
155 return -ENODEV;
156
157 if (!device->baud) {
158 struct uart_port *port = &device->port;
159 unsigned int ier;
160
161 /* assume the device was initialized, only mask interrupts */
162 ier = serial8250_early_in(port, UART_IER);
163 serial8250_early_out(port, UART_IER, ier & UART_IER_UUE);
164 } else
165 init_port(device);
166
167 device->con->write = early_serial8250_write;
168 device->con->read = early_serial8250_read;
169 return 0;
170 }
171 EARLYCON_DECLARE(uart8250, early_serial8250_setup);
172 EARLYCON_DECLARE(uart, early_serial8250_setup);
173 OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
174 OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
175 OF_EARLYCON_DECLARE(uart, "nvidia,tegra20-uart", early_serial8250_setup);
176 OF_EARLYCON_DECLARE(uart, "snps,dw-apb-uart", early_serial8250_setup);
177
early_serial8250_rs2_setup(struct earlycon_device * device,const char * options)178 static int __init early_serial8250_rs2_setup(struct earlycon_device *device,
179 const char *options)
180 {
181 device->port.regshift = 2;
182
183 return early_serial8250_setup(device, options);
184 }
185 OF_EARLYCON_DECLARE(uart, "intel,xscale-uart", early_serial8250_rs2_setup);
186 OF_EARLYCON_DECLARE(uart, "mrvl,mmp-uart", early_serial8250_rs2_setup);
187 OF_EARLYCON_DECLARE(uart, "mrvl,pxa-uart", early_serial8250_rs2_setup);
188
189 #ifdef CONFIG_SERIAL_8250_OMAP
190
early_omap8250_setup(struct earlycon_device * device,const char * options)191 static int __init early_omap8250_setup(struct earlycon_device *device,
192 const char *options)
193 {
194 struct uart_port *port = &device->port;
195
196 if (!(device->port.membase || device->port.iobase))
197 return -ENODEV;
198
199 port->regshift = 2;
200 device->con->write = early_serial8250_write;
201 return 0;
202 }
203
204 OF_EARLYCON_DECLARE(omap8250, "ti,omap2-uart", early_omap8250_setup);
205 OF_EARLYCON_DECLARE(omap8250, "ti,omap3-uart", early_omap8250_setup);
206 OF_EARLYCON_DECLARE(omap8250, "ti,omap4-uart", early_omap8250_setup);
207 OF_EARLYCON_DECLARE(omap8250, "ti,am654-uart", early_omap8250_setup);
208
209 #endif
210