1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Author: AMD 23 */ 24 25 #include <drm/display/drm_dp_helper.h> 26 #include <drm/display/drm_dsc_helper.h> 27 #include "dc_hw_types.h" 28 #include "dsc.h" 29 #include "dc.h" 30 #include "rc_calc.h" 31 #include "fixed31_32.h" 32 33 #include "clk_mgr.h" 34 #include "resource.h" 35 36 #define DC_LOGGER \ 37 dsc->ctx->logger 38 39 /* This module's internal functions */ 40 41 /* default DSC policy target bitrate limit is 16bpp */ 42 static uint32_t dsc_policy_max_target_bpp_limit = 16; 43 44 /* default DSC policy enables DSC only when needed */ 45 static bool dsc_policy_enable_dsc_when_not_needed; 46 47 static bool dsc_policy_disable_dsc_stream_overhead; 48 49 static bool disable_128b_132b_stream_overhead; 50 51 #ifndef MAX 52 #define MAX(X, Y) ((X) > (Y) ? (X) : (Y)) 53 #endif 54 #ifndef MIN 55 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y)) 56 #endif 57 58 /* Need to account for padding due to pixel-to-symbol packing 59 * for uncompressed 128b/132b streams. 60 */ 61 static uint32_t apply_128b_132b_stream_overhead( 62 const struct dc_crtc_timing *timing, const uint32_t kbps) 63 { 64 uint32_t total_kbps = kbps; 65 66 if (disable_128b_132b_stream_overhead) 67 return kbps; 68 69 if (!timing->flags.DSC) { 70 struct fixed31_32 bpp; 71 struct fixed31_32 overhead_factor; 72 73 bpp = dc_fixpt_from_int(kbps); 74 bpp = dc_fixpt_div_int(bpp, timing->pix_clk_100hz / 10); 75 76 /* Symbols_per_HActive = HActive * bpp / (4 lanes * 32-bit symbol size) 77 * Overhead_factor = ceil(Symbols_per_HActive) / Symbols_per_HActive 78 */ 79 overhead_factor = dc_fixpt_from_int(timing->h_addressable); 80 overhead_factor = dc_fixpt_mul(overhead_factor, bpp); 81 overhead_factor = dc_fixpt_div_int(overhead_factor, 128); 82 overhead_factor = dc_fixpt_div( 83 dc_fixpt_from_int(dc_fixpt_ceil(overhead_factor)), 84 overhead_factor); 85 86 total_kbps = dc_fixpt_ceil( 87 dc_fixpt_mul_int(overhead_factor, total_kbps)); 88 } 89 90 return total_kbps; 91 } 92 93 uint32_t dc_bandwidth_in_kbps_from_timing( 94 const struct dc_crtc_timing *timing, 95 const enum dc_link_encoding_format link_encoding) 96 { 97 uint32_t bits_per_channel = 0; 98 uint32_t kbps; 99 100 if (timing->flags.DSC) 101 return dc_dsc_stream_bandwidth_in_kbps(timing, 102 timing->dsc_cfg.bits_per_pixel, 103 timing->dsc_cfg.num_slices_h, 104 timing->dsc_cfg.is_dp); 105 106 switch (timing->display_color_depth) { 107 case COLOR_DEPTH_666: 108 bits_per_channel = 6; 109 break; 110 case COLOR_DEPTH_888: 111 bits_per_channel = 8; 112 break; 113 case COLOR_DEPTH_101010: 114 bits_per_channel = 10; 115 break; 116 case COLOR_DEPTH_121212: 117 bits_per_channel = 12; 118 break; 119 case COLOR_DEPTH_141414: 120 bits_per_channel = 14; 121 break; 122 case COLOR_DEPTH_161616: 123 bits_per_channel = 16; 124 break; 125 default: 126 ASSERT(bits_per_channel != 0); 127 bits_per_channel = 8; 128 break; 129 } 130 131 kbps = timing->pix_clk_100hz / 10; 132 kbps *= bits_per_channel; 133 134 if (timing->flags.Y_ONLY != 1) { 135 /*Only YOnly make reduce bandwidth by 1/3 compares to RGB*/ 136 kbps *= 3; 137 if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) 138 kbps /= 2; 139 else if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) 140 kbps = kbps * 2 / 3; 141 } 142 143 if (link_encoding == DC_LINK_ENCODING_DP_128b_132b) 144 kbps = apply_128b_132b_stream_overhead(timing, kbps); 145 146 if (link_encoding == DC_LINK_ENCODING_HDMI_FRL && 147 timing->vic == 0 && timing->hdmi_vic == 0 && 148 timing->frl_uncompressed_video_bandwidth_in_kbps != 0) 149 kbps = timing->frl_uncompressed_video_bandwidth_in_kbps; 150 151 return kbps; 152 } 153 154 const struct dc_dsc_primary_bpp prim_bpp_444[] = { 155 /* VIC/BPP */ 156 {64, 192}, /* 1920x1080 @ 100 */ 157 {77, 192}, /* 1920x1080 @ 100 */ 158 {63, 192}, /* 1920x1080 @ 120 */ 159 {78, 192}, /* 1920x1080 @ 120 */ 160 {93, 192}, /* 3840x2160 @ 24 */ 161 {103, 192}, /* 3840x2160 @ 24 */ 162 {94, 192}, /* 3840x2160 @ 25 */ 163 {104, 192}, /* 3840x2160 @ 25 */ 164 {95, 192}, /* 3840x2160 @ 30 */ 165 {105, 192}, /* 3840x2160 @ 30 */ 166 {114, 192}, /* 3840x2160 @ 48 */ 167 {116, 192}, /* 3840x2160 @ 48 */ 168 {96, 192}, /* 3840x2160 @ 50 */ 169 {106, 192}, /* 3840x2160 @ 50 */ 170 {97, 192}, /* 3840x2160 @ 60 */ 171 {107, 192}, /* 3840x2160 @ 60 */ 172 {117, 192}, /* 3840x2160 @ 100 */ 173 {119, 192}, /* 3840x2160 @ 100 */ 174 {118, 192}, /* 3840x2160 @ 120 */ 175 {120, 192}, /* 3840x2160 @ 120 */ 176 {98, 192}, /* 4096x2160 @ 24 */ 177 {99, 192}, /* 4096x2160 @ 25 */ 178 {100, 192}, /* 4096x2160 @ 30 */ 179 {115, 192}, /* 4096x2160 @ 48 */ 180 {101, 192}, /* 4096x2160 @ 50 */ 181 {102, 192}, /* 4096x2160 @ 60 */ 182 {218, 192}, /* 4096x2160 @ 100 */ 183 {219, 192}, /* 4096x2160 @ 120 */ 184 {121, 192}, /* 5120x2160 @ 24 */ 185 {122, 192}, /* 5120x2160 @ 25 */ 186 {123, 192}, /* 5120x2160 @ 30 */ 187 {124, 192}, /* 5120x2160 @ 48 */ 188 {125, 192}, /* 5120x2160 @ 50 */ 189 {126, 173}, /* 5120x2160 @ 60 */ 190 {127, 192}, /* 5120x2160 @ 100 */ 191 {193, 175}, /* 5120x2160 @ 120 */ 192 {194, 192}, /* 7680x2160 @ 24 */ 193 {202, 192}, /* 7680x2160 @ 24 */ 194 {195, 192}, /* 7680x2160 @ 25 */ 195 {203, 192}, /* 7680x2160 @ 25 */ 196 {196, 192}, /* 7680x2160 @ 30 */ 197 {204, 192}, /* 7680x2160 @ 30 */ 198 {197, 157}, /* 7680x2160 @ 48 */ 199 {205, 157}, /* 7680x2160 @ 48 */ 200 {198, 157}, /* 7680x2160 @ 50 */ 201 {206, 157}, /* 7680x2160 @ 50 */ 202 {199, 159}, /* 7680x2160 @ 60 */ 203 {207, 159}, /* 7680x2160 @ 60 */ 204 {200, 134}, /* 7680x2160 @ 100 */ 205 {208, 134}, /* 7680x2160 @ 100 */ 206 {201, 130}, /* 7680x2160 @ 120 */ 207 {209, 130}, /* 7680x2160 @ 120 */ 208 {210, 182}, /* 10240x4320 @ 24 */ 209 {211, 181}, /* 10240x4320 @ 25 */ 210 {212, 177}, /* 10240x4320 @ 30 */ 211 {213, 163}, /* 10240x4320 @ 48 */ 212 {214, 162}, /* 10240x4320 @ 50 */ 213 {215, 157}, /* 10240x4320 @ 60 */ 214 }; 215 const struct dc_dsc_primary_bpp prim_bpp_422[] = { 216 /* VIC/BPP */ 217 {114, 192}, /* 3840x2160 @ 48 */ 218 {116, 192}, /* 3840x2160 @ 48 */ 219 {96, 192}, /* 3840x2160 @ 50 */ 220 {106, 192}, /* 3840x2160 @ 50 */ 221 {97, 192}, /* 3840x2160 @ 60 */ 222 {107, 192}, /* 3840x2160 @ 60 */ 223 {117, 137}, /* 3840x2160 @ 100 */ 224 {119, 137}, /* 3840x2160 @ 100 */ 225 {118, 113}, /* 3840x2160 @ 120 */ 226 {120, 113}, /* 3840x2160 @ 120 */ 227 {115, 192}, /* 4096x2160 @ 48 */ 228 {101, 192}, /* 4096x2160 @ 50 */ 229 {102, 192}, /* 4096x2160 @ 60 */ 230 {218, 192}, /* 4096x2160 @ 100 */ 231 {219, 192}, /* 4096x2160 @ 120 */ 232 {121, 192}, /* 5120x2160 @ 24 */ 233 {122, 192}, /* 5120x2160 @ 25 */ 234 {123, 192}, /* 5120x2160 @ 30 */ 235 {124, 192}, /* 5120x2160 @ 48 */ 236 {125, 192}, /* 5120x2160 @ 50 */ 237 {126, 173}, /* 5120x2160 @ 60 */ 238 {127, 192}, /* 5120x2160 @ 100 */ 239 {193, 175}, /* 5120x2160 @ 120 */ 240 {194, 123}, /* 7680x2160 @ 24 */ 241 {202, 123}, /* 7680x2160 @ 24 */ 242 {195, 123}, /* 7680x2160 @ 25 */ 243 {203, 123}, /* 7680x2160 @ 25 */ 244 {196, 118}, /* 7680x2160 @ 30 */ 245 {204, 118}, /* 7680x2160 @ 30 */ 246 {197, 123}, /* 7680x2160 @ 48 */ 247 {205, 123}, /* 7680x2160 @ 48 */ 248 {198, 123}, /* 7680x2160 @ 50 */ 249 {206, 123}, /* 7680x2160 @ 50 */ 250 {199, 119}, /* 7680x2160 @ 60 */ 251 {207, 119}, /* 7680x2160 @ 60 */ 252 {200, 134}, /* 7680x2160 @ 100 */ 253 {208, 134}, /* 7680x2160 @ 100 */ 254 {201, 130}, /* 7680x2160 @ 120 */ 255 {209, 130}, /* 7680x2160 @ 120 */ 256 {210, 182}, /* 10240x4320 @ 24 */ 257 {211, 181}, /* 10240x4320 @ 25 */ 258 {212, 177}, /* 10240x4320 @ 30 */ 259 {213, 126}, /* 10240x4320 @ 48 */ 260 {214, 125}, /* 10240x4320 @ 50 */ 261 {215, 117}, /* 10240x4320 @ 60 */ 262 {216, 125}, /* 10240x4320 @ 100 */ 263 {217, 117}, /* 10240x4320 @ 120 */ 264 }; 265 266 const struct dc_dsc_primary_bpp prim_bpp_420[] = { 267 /* VIC/BPP */ 268 {114, 192}, /* 3840x2160 @ 48 */ 269 {116, 192}, /* 3840x2160 @ 48 */ 270 {96, 192}, /* 3840x2160 @ 50 */ 271 {106, 192}, /* 3840x2160 @ 50 */ 272 {97, 192}, /* 3840x2160 @ 60 */ 273 {107, 192}, /* 3840x2160 @ 60 */ 274 {117, 137}, /* 3840x2160 @ 100 */ 275 {119, 137}, /* 3840x2160 @ 100 */ 276 {118, 113}, /* 3840x2160 @ 120 */ 277 {120, 113}, /* 3840x2160 @ 120 */ 278 {115, 192}, /* 4096x2160 @ 48 */ 279 {101, 192}, /* 4096x2160 @ 50 */ 280 {102, 192}, /* 4096x2160 @ 60 */ 281 {218, 129}, /* 4096x2160 @ 100 */ 282 {219, 106}, /* 4096x2160 @ 120 */ 283 {124, 192}, /* 5120x2160 @ 48 */ 284 {125, 192}, /* 5120x2160 @ 50 */ 285 {126, 173}, /* 5120x2160 @ 60 */ 286 {127, 192}, /* 5120x2160 @ 100 */ 287 {193, 175}, /* 5120x2160 @ 120 */ 288 {194, 123}, /* 7680x4320 @ 24 */ 289 {202, 123}, /* 7680x4320 @ 24 */ 290 {195, 123}, /* 7680x4320 @ 25 */ 291 {203, 123}, /* 7680x4320 @ 25 */ 292 {196, 118}, /* 7680x4320 @ 30 */ 293 {204, 118}, /* 7680x4320 @ 30 */ 294 {197, 123}, /* 7680x4320 @ 48 */ 295 {205, 123}, /* 7680x4320 @ 48 */ 296 {198, 123}, /* 7680x4320 @ 50 */ 297 {206, 123}, /* 7680x4320 @ 50 */ 298 {199, 119}, /* 7680x4320 @ 60 */ 299 {207, 119}, /* 7680x4320 @ 60 */ 300 {200, 112}, /* 7680x4320 @ 100 */ 301 {208, 112}, /* 7680x4320 @ 100 */ 302 {201, 103}, /* 7680x4320 @ 120 */ 303 {209, 103}, /* 7680x4320 @ 120 */ 304 {210, 98}, /* 10240x4320 @ 24 */ 305 {211, 98}, /* 10240x4320 @ 25 */ 306 {212, 177}, /* 10240x4320 @ 30 */ 307 {213, 98}, /* 10240x4320 @ 48 */ 308 {214, 125}, /* 10240x4320 @ 50 */ 309 {215, 117}, /* 10240x4320 @ 60 */ 310 {216, 107}, /* 10240x4320 @ 100 */ 311 {217, 97}, /* 10240x4320 @ 120 */ 312 }; 313 314 /* Forward Declerations */ 315 static unsigned int get_min_dsc_slice_count_for_odm( 316 const struct display_stream_compressor *dsc, 317 const struct dsc_enc_caps *dsc_enc_caps, 318 const struct dc_crtc_timing *timing); 319 320 static bool decide_dsc_bandwidth_range( 321 const uint32_t min_bpp_x16, 322 const uint32_t max_bpp_x16, 323 const uint32_t num_slices_h, 324 const struct dsc_enc_caps *dsc_caps, 325 const struct dc_crtc_timing *timing, 326 const enum dc_link_encoding_format link_encoding, 327 struct dc_dsc_bw_range *range); 328 329 static uint32_t compute_bpp_x16_from_target_bandwidth( 330 const uint32_t bandwidth_in_kbps, 331 const struct dc_crtc_timing *timing, 332 const uint32_t num_slices_h, 333 const uint32_t bpp_increment_div, 334 const bool is_dp); 335 336 static void get_dsc_enc_caps( 337 const struct display_stream_compressor *dsc, 338 struct dsc_enc_caps *dsc_enc_caps, 339 int pixel_clock_100Hz); 340 341 static bool intersect_dsc_caps( 342 const struct dsc_dec_dpcd_caps *dsc_sink_caps, 343 const struct dsc_enc_caps *dsc_enc_caps, 344 enum dc_pixel_encoding pixel_encoding, 345 struct dsc_enc_caps *dsc_common_caps); 346 347 static bool setup_dsc_config( 348 const struct dsc_dec_dpcd_caps *dsc_sink_caps, 349 const struct dsc_enc_caps *dsc_enc_caps, 350 int target_bandwidth_kbps, 351 const struct dc_crtc_timing *timing, 352 const struct dc_dsc_config_options *options, 353 const enum dc_link_encoding_format link_encoding, 354 int min_slice_count, 355 struct dc_dsc_config *dsc_cfg); 356 357 static bool convert_bandwidth_to_frl_params( 358 int bandwidth_kbps, 359 int *num_lanes, 360 int *frl_rate); 361 362 static uint32_t compute_bpp_x16_from_frl_params( 363 const struct dc_crtc_timing *timing, 364 const uint32_t num_slices_h, 365 const struct dsc_enc_caps *dsc_caps); 366 static bool dsc_buff_block_size_from_dpcd(int dpcd_buff_block_size, int *buff_block_size) 367 { 368 369 switch (dpcd_buff_block_size) { 370 case DP_DSC_RC_BUF_BLK_SIZE_1: 371 *buff_block_size = 1024; 372 break; 373 case DP_DSC_RC_BUF_BLK_SIZE_4: 374 *buff_block_size = 4 * 1024; 375 break; 376 case DP_DSC_RC_BUF_BLK_SIZE_16: 377 *buff_block_size = 16 * 1024; 378 break; 379 case DP_DSC_RC_BUF_BLK_SIZE_64: 380 *buff_block_size = 64 * 1024; 381 break; 382 default: { 383 dm_error("%s: DPCD DSC buffer size not recognized.\n", __func__); 384 return false; 385 } 386 } 387 388 return true; 389 } 390 391 392 static bool dsc_line_buff_depth_from_dpcd(int dpcd_line_buff_bit_depth, int *line_buff_bit_depth) 393 { 394 if (0 <= dpcd_line_buff_bit_depth && dpcd_line_buff_bit_depth <= 7) 395 *line_buff_bit_depth = dpcd_line_buff_bit_depth + 9; 396 else if (dpcd_line_buff_bit_depth == 8) 397 *line_buff_bit_depth = 8; 398 else { 399 dm_error("%s: DPCD DSC buffer depth not recognized.\n", __func__); 400 return false; 401 } 402 403 return true; 404 } 405 406 407 static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput) 408 { 409 switch (dpcd_throughput) { 410 case DP_DSC_THROUGHPUT_MODE_0_UNSUPPORTED: 411 *throughput = 0; 412 break; 413 case DP_DSC_THROUGHPUT_MODE_0_170: 414 *throughput = 170; 415 break; 416 case DP_DSC_THROUGHPUT_MODE_0_340: 417 *throughput = 340; 418 break; 419 case DP_DSC_THROUGHPUT_MODE_0_400: 420 *throughput = 400; 421 break; 422 case DP_DSC_THROUGHPUT_MODE_0_450: 423 *throughput = 450; 424 break; 425 case DP_DSC_THROUGHPUT_MODE_0_500: 426 *throughput = 500; 427 break; 428 case DP_DSC_THROUGHPUT_MODE_0_550: 429 *throughput = 550; 430 break; 431 case DP_DSC_THROUGHPUT_MODE_0_600: 432 *throughput = 600; 433 break; 434 case DP_DSC_THROUGHPUT_MODE_0_650: 435 *throughput = 650; 436 break; 437 case DP_DSC_THROUGHPUT_MODE_0_700: 438 *throughput = 700; 439 break; 440 case DP_DSC_THROUGHPUT_MODE_0_750: 441 *throughput = 750; 442 break; 443 case DP_DSC_THROUGHPUT_MODE_0_800: 444 *throughput = 800; 445 break; 446 case DP_DSC_THROUGHPUT_MODE_0_850: 447 *throughput = 850; 448 break; 449 case DP_DSC_THROUGHPUT_MODE_0_900: 450 *throughput = 900; 451 break; 452 case DP_DSC_THROUGHPUT_MODE_0_950: 453 *throughput = 950; 454 break; 455 case DP_DSC_THROUGHPUT_MODE_0_1000: 456 *throughput = 1000; 457 break; 458 default: { 459 dm_error("%s: DPCD DSC throughput mode not recognized.\n", __func__); 460 return false; 461 } 462 } 463 464 return true; 465 } 466 467 468 static bool dsc_bpp_increment_div_from_dpcd(uint8_t bpp_increment_dpcd, uint32_t *bpp_increment_div) 469 { 470 // Mask bpp increment dpcd field to avoid reading other fields 471 bpp_increment_dpcd &= 0x7; 472 473 switch (bpp_increment_dpcd) { 474 case 0: 475 *bpp_increment_div = 16; 476 break; 477 case 1: 478 *bpp_increment_div = 8; 479 break; 480 case 2: 481 *bpp_increment_div = 4; 482 break; 483 case 3: 484 *bpp_increment_div = 2; 485 break; 486 case 4: 487 *bpp_increment_div = 1; 488 break; 489 default: { 490 dm_error("%s: DPCD DSC bits-per-pixel increment not recognized.\n", __func__); 491 return false; 492 } 493 } 494 495 return true; 496 } 497 498 499 500 static bool get_vic_preset_bpp( 501 const struct dc_crtc_timing *timing, 502 int *preset_bpp) 503 { 504 bool preset_found = false; 505 uint32_t table_size_444 = ARRAY_SIZE(prim_bpp_444); 506 uint32_t table_size_422 = ARRAY_SIZE(prim_bpp_422); 507 uint32_t table_size_420 = ARRAY_SIZE(prim_bpp_420); 508 uint32_t i; 509 uint32_t vid_id; 510 511 if (timing->vic == 0 && timing->hdmi_vic == 0) 512 return false; 513 514 vid_id = timing->vic; 515 switch (timing->hdmi_vic) { 516 case 1: 517 vid_id = 95; 518 break; 519 case 2: 520 vid_id = 94; 521 break; 522 case 3: 523 vid_id = 93; 524 break; 525 case 4: 526 vid_id = 98; 527 break; 528 default: 529 break; 530 } 531 532 if (timing->pixel_encoding == PIXEL_ENCODING_RGB || 533 timing->pixel_encoding == PIXEL_ENCODING_YCBCR444) { 534 for (i = 0; i < table_size_444 ; i++) { 535 if (prim_bpp_444[i].vic == vid_id) { 536 preset_found = true; 537 *preset_bpp = prim_bpp_444[i].target_bpp; 538 break; 539 } 540 } 541 } else if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { 542 for (i = 0; i < table_size_422 ; i++) { 543 if (prim_bpp_422[i].vic == vid_id) { 544 preset_found = true; 545 *preset_bpp = prim_bpp_422[i].target_bpp; 546 break; 547 } 548 } 549 } else if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) { 550 for (i = 0; i < table_size_420 ; i++) { 551 if (prim_bpp_420[i].vic == vid_id) { 552 preset_found = true; 553 *preset_bpp = prim_bpp_420[i].target_bpp; 554 break; 555 } 556 } 557 } else { 558 return false; 559 } 560 561 return preset_found; 562 } 563 564 static int hdmi_dsc_get_num_slices(const struct dc_crtc_timing *timing) 565 { 566 int k_slice_adjust = 1; 567 int adj_pix_clk_mhz; 568 int min_slices; 569 int slice_target; 570 int slice_width = timing->h_addressable; 571 int h_ratio_adj_pix_clk_mhz; 572 573 if (timing->pixel_encoding == PIXEL_ENCODING_RGB || 574 timing->pixel_encoding == PIXEL_ENCODING_YCBCR444) 575 k_slice_adjust = 2; 576 577 adj_pix_clk_mhz = k_slice_adjust * timing->pix_clk_100hz / 10000 / 2; 578 h_ratio_adj_pix_clk_mhz = adj_pix_clk_mhz * timing->h_addressable / timing->h_total; 579 if (adj_pix_clk_mhz <= 2720) { 580 min_slices = adj_pix_clk_mhz / 340; 581 if (adj_pix_clk_mhz % 340 != 0) 582 min_slices++; 583 } else if (adj_pix_clk_mhz <= 4800) { 584 min_slices = adj_pix_clk_mhz / 400; 585 if (adj_pix_clk_mhz % 400 != 0) 586 min_slices++; 587 } else if (h_ratio_adj_pix_clk_mhz <= 4800) { 588 min_slices = h_ratio_adj_pix_clk_mhz / 600; 589 if (h_ratio_adj_pix_clk_mhz % 600 != 0) 590 min_slices++; 591 } else { 592 min_slices = h_ratio_adj_pix_clk_mhz / 900; 593 if (h_ratio_adj_pix_clk_mhz % 900 != 0) 594 min_slices++; 595 } 596 597 do { 598 if (min_slices <= 1) 599 slice_target = 1; 600 else if (min_slices <= 2) 601 slice_target = 2; 602 else if (min_slices <= 4) 603 slice_target = 4; 604 else if (min_slices <= 8) 605 slice_target = 8; 606 else if (min_slices <= 12) 607 slice_target = 12; 608 else if (min_slices <= 16) 609 slice_target = 16; 610 else 611 return 0; 612 613 slice_width = timing->h_addressable / slice_target; 614 min_slices++; 615 } while (slice_width > 2720); 616 617 return slice_target; 618 } 619 620 static int hdmi_dsc_get_bpp(const struct dc_crtc_timing *timing, 621 const struct dsc_enc_caps *dsc_common_caps) 622 { 623 int max_dsc_bpp, min_dsc_bpp; 624 int target_bytes; 625 bool bpp_found = false; 626 int bpp_decrement_x16; 627 int src_fractional_bpp = dsc_common_caps->bpp_increment_div; 628 int bpp_target; 629 int bpp_target_x16; 630 int bpc_factor = 8; 631 int slice_width; 632 int num_slices; 633 bool hdmi_all_bpp = dsc_common_caps->is_vic_all_bpp; 634 int hdmi_max_chunk_bytes = dsc_common_caps->total_chunk_kbytes; 635 636 int preset_bpp; 637 bool preset_found = false; 638 639 if (timing->display_color_depth == COLOR_DEPTH_101010) 640 bpc_factor = 10; 641 if (timing->display_color_depth == COLOR_DEPTH_121212) 642 bpc_factor = 12; 643 644 /* Assuming: bpc as 8*/ 645 if (timing->pixel_encoding == PIXEL_ENCODING_RGB || 646 timing->pixel_encoding == PIXEL_ENCODING_YCBCR444) { 647 min_dsc_bpp = 8; 648 max_dsc_bpp = 3 * bpc_factor; 649 } else if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { 650 min_dsc_bpp = 7; 651 max_dsc_bpp = 2 * bpc_factor; 652 } else { 653 min_dsc_bpp = 6; 654 max_dsc_bpp = 3 * bpc_factor / 2; 655 } 656 657 if (!hdmi_all_bpp) 658 max_dsc_bpp = min(max_dsc_bpp, 12); 659 660 661 num_slices = hdmi_dsc_get_num_slices(timing); 662 if (num_slices == 0) 663 return 0; 664 665 slice_width = timing->h_addressable / num_slices; 666 667 bpp_target = max_dsc_bpp; 668 bpp_decrement_x16 = 16 / src_fractional_bpp; 669 bpp_target_x16 = (bpp_target * 16) - bpp_decrement_x16; 670 if (!hdmi_all_bpp) 671 bpp_target_x16 = (bpp_target * 16); 672 673 /* check if byte target is below allowed Kbytes */ 674 while (bpp_target_x16 > (min_dsc_bpp * 16)) { 675 target_bytes = num_slices * slice_width * bpp_target_x16 / 16 / 8; 676 if (target_bytes <= hdmi_max_chunk_bytes) { 677 bpp_found = true; 678 break; 679 } 680 bpp_target_x16 -= bpp_decrement_x16; 681 } 682 683 if (bpp_found) { 684 if (!hdmi_all_bpp) { 685 /* Get preset bpp for CTA modes */ 686 preset_found = get_vic_preset_bpp(timing, &preset_bpp); 687 if (preset_found) { 688 bpp_target_x16 = preset_bpp; 689 target_bytes = 690 num_slices * slice_width * bpp_target_x16 / 16 / 8; 691 if (target_bytes > hdmi_max_chunk_bytes) 692 return 0; 693 } 694 } 695 return bpp_target_x16; 696 } 697 698 return 0; 699 } 700 701 bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, 702 const uint8_t *dpcd_dsc_basic_data, 703 const uint8_t *dpcd_dsc_branch_decoder_caps, 704 struct dsc_dec_dpcd_caps *dsc_sink_caps) 705 { 706 if (!dpcd_dsc_basic_data) 707 return false; 708 709 dsc_sink_caps->is_dsc_supported = 710 (dpcd_dsc_basic_data[DP_DSC_SUPPORT - DP_DSC_SUPPORT] & DP_DSC_DECOMPRESSION_IS_SUPPORTED) != 0; 711 if (!dsc_sink_caps->is_dsc_supported) 712 return false; 713 714 dsc_sink_caps->dsc_version = dpcd_dsc_basic_data[DP_DSC_REV - DP_DSC_SUPPORT]; 715 716 { 717 int buff_block_size; 718 int buff_size; 719 720 if (!dsc_buff_block_size_from_dpcd( 721 dpcd_dsc_basic_data[DP_DSC_RC_BUF_BLK_SIZE - DP_DSC_SUPPORT] & 0x03, 722 &buff_block_size)) 723 return false; 724 725 buff_size = dpcd_dsc_basic_data[DP_DSC_RC_BUF_SIZE - DP_DSC_SUPPORT] + 1; 726 dsc_sink_caps->rc_buffer_size = buff_size * buff_block_size; 727 } 728 729 dsc_sink_caps->slice_caps1.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT]; 730 if (!dsc_line_buff_depth_from_dpcd(dpcd_dsc_basic_data[DP_DSC_LINE_BUF_BIT_DEPTH - DP_DSC_SUPPORT], 731 &dsc_sink_caps->lb_bit_depth)) 732 return false; 733 734 dsc_sink_caps->is_block_pred_supported = 735 (dpcd_dsc_basic_data[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] & 736 DP_DSC_BLK_PREDICTION_IS_SUPPORTED) != 0; 737 738 dsc_sink_caps->edp_max_bits_per_pixel = 739 dpcd_dsc_basic_data[DP_DSC_MAX_BITS_PER_PIXEL_LOW - DP_DSC_SUPPORT] | 740 dpcd_dsc_basic_data[DP_DSC_MAX_BITS_PER_PIXEL_HI - DP_DSC_SUPPORT] << 8; 741 742 dsc_sink_caps->color_formats.raw = dpcd_dsc_basic_data[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT]; 743 dsc_sink_caps->color_depth.raw = dpcd_dsc_basic_data[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; 744 745 { 746 int dpcd_throughput = dpcd_dsc_basic_data[DP_DSC_PEAK_THROUGHPUT - DP_DSC_SUPPORT]; 747 int dsc_throughput_granular_delta; 748 749 dsc_throughput_granular_delta = dpcd_dsc_basic_data[DP_DSC_RC_BUF_BLK_SIZE - DP_DSC_SUPPORT] >> 3; 750 dsc_throughput_granular_delta *= 2; 751 752 if (!dsc_throughput_from_dpcd(dpcd_throughput & DP_DSC_THROUGHPUT_MODE_0_MASK, 753 &dsc_sink_caps->throughput_mode_0_mps)) 754 return false; 755 dsc_sink_caps->throughput_mode_0_mps += dsc_throughput_granular_delta; 756 757 dpcd_throughput = (dpcd_throughput & DP_DSC_THROUGHPUT_MODE_1_MASK) >> DP_DSC_THROUGHPUT_MODE_1_SHIFT; 758 if (!dsc_throughput_from_dpcd(dpcd_throughput, &dsc_sink_caps->throughput_mode_1_mps)) 759 return false; 760 } 761 762 dsc_sink_caps->max_slice_width = dpcd_dsc_basic_data[DP_DSC_MAX_SLICE_WIDTH - DP_DSC_SUPPORT] * 320; 763 dsc_sink_caps->slice_caps2.raw = dpcd_dsc_basic_data[DP_DSC_SLICE_CAP_2 - DP_DSC_SUPPORT]; 764 765 if (!dsc_bpp_increment_div_from_dpcd(dpcd_dsc_basic_data[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT], 766 &dsc_sink_caps->bpp_increment_div)) 767 return false; 768 769 if (dc->debug.dsc_bpp_increment_div) { 770 /* dsc_bpp_increment_div should onl be 1, 2, 4, 8 or 16, but rather than rejecting invalid values, 771 * we'll accept all and get it into range. This also makes the above check against 0 redundant, 772 * but that one stresses out the override will be only used if it's not 0. 773 */ 774 if (dc->debug.dsc_bpp_increment_div >= 1) 775 dsc_sink_caps->bpp_increment_div = 1; 776 if (dc->debug.dsc_bpp_increment_div >= 2) 777 dsc_sink_caps->bpp_increment_div = 2; 778 if (dc->debug.dsc_bpp_increment_div >= 4) 779 dsc_sink_caps->bpp_increment_div = 4; 780 if (dc->debug.dsc_bpp_increment_div >= 8) 781 dsc_sink_caps->bpp_increment_div = 8; 782 if (dc->debug.dsc_bpp_increment_div >= 16) 783 dsc_sink_caps->bpp_increment_div = 16; 784 } 785 786 /* Extended caps */ 787 if (dpcd_dsc_branch_decoder_caps == NULL) { // branch decoder DPCD DSC data can be null for non branch device 788 dsc_sink_caps->branch_overall_throughput_0_mps = 0; 789 dsc_sink_caps->branch_overall_throughput_1_mps = 0; 790 dsc_sink_caps->branch_max_line_width = 0; 791 return true; 792 } 793 794 dsc_sink_caps->branch_overall_throughput_0_mps = 795 dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0]; 796 if (dsc_sink_caps->branch_overall_throughput_0_mps == 0) 797 dsc_sink_caps->branch_overall_throughput_0_mps = 0; 798 else if (dsc_sink_caps->branch_overall_throughput_0_mps == 1) 799 dsc_sink_caps->branch_overall_throughput_0_mps = 680; 800 else { 801 dsc_sink_caps->branch_overall_throughput_0_mps *= 50; 802 dsc_sink_caps->branch_overall_throughput_0_mps += 600; 803 } 804 805 dsc_sink_caps->branch_overall_throughput_1_mps = 806 dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0]; 807 if (dsc_sink_caps->branch_overall_throughput_1_mps == 0) 808 dsc_sink_caps->branch_overall_throughput_1_mps = 0; 809 else if (dsc_sink_caps->branch_overall_throughput_1_mps == 1) 810 dsc_sink_caps->branch_overall_throughput_1_mps = 680; 811 else { 812 dsc_sink_caps->branch_overall_throughput_1_mps *= 50; 813 dsc_sink_caps->branch_overall_throughput_1_mps += 600; 814 } 815 816 dsc_sink_caps->branch_max_line_width = 817 dpcd_dsc_branch_decoder_caps[DP_DSC_BRANCH_MAX_LINE_WIDTH - DP_DSC_BRANCH_OVERALL_THROUGHPUT_0] * 320; 818 ASSERT(dsc_sink_caps->branch_max_line_width == 0 || dsc_sink_caps->branch_max_line_width >= 5120); 819 820 dsc_sink_caps->is_dp = true; 821 return true; 822 } 823 bool dc_dsc_parse_dsc_edid(const struct dc *dc, const struct dc_edid_caps *edid_caps, 824 struct dsc_dec_dpcd_caps *dsc_sink_caps) 825 { 826 (void)dc; 827 dsc_sink_caps->is_dsc_supported = edid_caps->frl_dsc_support; 828 if (!edid_caps->frl_dsc_support) 829 return false; 830 831 dsc_sink_caps->dsc_version = 0x21; 832 dsc_sink_caps->is_frl = true; 833 dsc_sink_caps->is_dp = false; 834 835 switch (edid_caps->frl_dsc_max_slices) { 836 case 0: 837 break; 838 case 1: 839 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1; 840 dsc_sink_caps->throughput_mode_0_mps = 340; 841 dsc_sink_caps->throughput_mode_1_mps = 680; 842 break; 843 case 2: 844 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1; 845 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1; 846 dsc_sink_caps->throughput_mode_0_mps = 340; 847 dsc_sink_caps->throughput_mode_1_mps = 680; 848 break; 849 case 3: 850 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1; 851 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1; 852 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1; 853 dsc_sink_caps->throughput_mode_0_mps = 340; 854 dsc_sink_caps->throughput_mode_1_mps = 680; 855 break; 856 case 4: 857 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1; 858 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1; 859 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1; 860 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1; 861 dsc_sink_caps->throughput_mode_0_mps = 340; 862 dsc_sink_caps->throughput_mode_1_mps = 680; 863 break; 864 case 5: 865 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1; 866 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1; 867 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1; 868 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1; 869 dsc_sink_caps->throughput_mode_0_mps = 400; 870 dsc_sink_caps->throughput_mode_1_mps = 800; 871 break; 872 case 6: 873 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1; 874 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1; 875 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1; 876 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1; 877 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_12 = 1; 878 dsc_sink_caps->throughput_mode_0_mps = 400; 879 dsc_sink_caps->throughput_mode_1_mps = 800; 880 break; 881 case 7: 882 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1; 883 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1; 884 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1; 885 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1; 886 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_12 = 1; 887 dsc_sink_caps->throughput_mode_0_mps = 600; 888 dsc_sink_caps->throughput_mode_1_mps = 1200; 889 break; 890 case 8: 891 default: 892 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 = 1; 893 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 = 1; 894 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 = 1; 895 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 = 1; 896 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_12 = 1; 897 dsc_sink_caps->throughput_mode_0_mps = 900; 898 dsc_sink_caps->throughput_mode_1_mps = 1800; 899 break; 900 } 901 dsc_sink_caps->lb_bit_depth = 13; //Table 7-25 902 dsc_sink_caps->is_block_pred_supported = true; //Table 7-25 903 dsc_sink_caps->color_formats.bits.RGB = 1; 904 dsc_sink_caps->color_formats.bits.YCBCR_444 = 1; 905 dsc_sink_caps->color_formats.bits.YCBCR_NATIVE_422 = 1; 906 dsc_sink_caps->color_formats.bits.YCBCR_NATIVE_420 = 907 (edid_caps->frl_dsc_native_420 == true) ? 1 : 0; 908 dsc_sink_caps->color_depth.bits.COLOR_DEPTH_8_BPC = 1; 909 dsc_sink_caps->color_depth.bits.COLOR_DEPTH_10_BPC = 910 (edid_caps->frl_dsc_10bpc == true) ? 1 : 0; 911 dsc_sink_caps->color_depth.bits.COLOR_DEPTH_12_BPC = 912 (edid_caps->frl_dsc_12bpc == true) ? 1 : 0; 913 dsc_sink_caps->max_slice_width = 2560; 914 dsc_sink_caps->bpp_increment_div = 16; /* bpp increment divisor, e.g. if 16, it's 1/16th of a bit */ 915 dsc_sink_caps->is_vic_all_bpp = edid_caps->frl_dsc_all_bpp; 916 dsc_sink_caps->total_chunk_kbytes = 917 1024 * (1 + edid_caps->frl_dsc_total_chunk_kbytes); 918 919 return true; 920 } 921 922 /* If DSC is possbile, get DSC bandwidth range based on [min_bpp, max_bpp] target bitrate range and 923 * timing's pixel clock and uncompressed bandwidth. 924 * If DSC is not possible, leave '*range' untouched. 925 */ 926 bool dc_dsc_compute_bandwidth_range( 927 const struct display_stream_compressor *dsc, 928 uint32_t dsc_min_slice_height_override, 929 uint32_t min_bpp_x16, 930 uint32_t max_bpp_x16, 931 const struct dsc_dec_dpcd_caps *dsc_sink_caps, 932 const struct dc_crtc_timing *timing, 933 const enum dc_link_encoding_format link_encoding, 934 struct dc_dsc_bw_range *range) 935 { 936 bool is_dsc_possible = false; 937 unsigned int min_dsc_slice_count; 938 struct dsc_enc_caps dsc_enc_caps; 939 struct dsc_enc_caps dsc_common_caps; 940 struct dc_dsc_config config = {0}; 941 struct dc_dsc_config_options options = {0}; 942 943 options.dsc_min_slice_height_override = dsc_min_slice_height_override; 944 options.max_target_bpp_limit_override_x16 = max_bpp_x16; 945 options.slice_height_granularity = 1; 946 947 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); 948 949 min_dsc_slice_count = get_min_dsc_slice_count_for_odm(dsc, &dsc_enc_caps, timing); 950 951 is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, &dsc_enc_caps, 952 timing->pixel_encoding, &dsc_common_caps); 953 954 if (is_dsc_possible) 955 is_dsc_possible = setup_dsc_config(dsc_sink_caps, &dsc_enc_caps, 0, timing, 956 &options, link_encoding, min_dsc_slice_count, &config); 957 958 if (is_dsc_possible) 959 is_dsc_possible = decide_dsc_bandwidth_range(min_bpp_x16, max_bpp_x16, 960 config.num_slices_h, &dsc_common_caps, timing, link_encoding, range); 961 962 return is_dsc_possible; 963 } 964 965 void dc_dsc_dump_encoder_caps(const struct display_stream_compressor *dsc, 966 const struct dc_crtc_timing *timing) 967 { 968 struct dsc_enc_caps dsc_enc_caps; 969 970 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); 971 972 DC_LOG_DSC("dsc encoder caps:"); 973 DC_LOG_DSC("\tdsc_version 0x%x", dsc_enc_caps.dsc_version); 974 DC_LOG_DSC("\tslice_caps 0x%x", dsc_enc_caps.slice_caps.raw); 975 DC_LOG_DSC("\tlb_bit_depth %d", dsc_enc_caps.lb_bit_depth); 976 DC_LOG_DSC("\tis_block_pred_supported %d", dsc_enc_caps.is_block_pred_supported); 977 DC_LOG_DSC("\tcolor_formats 0x%x", dsc_enc_caps.color_formats.raw); 978 DC_LOG_DSC("\tcolor_depth 0x%x", dsc_enc_caps.color_depth.raw); 979 DC_LOG_DSC("\tmax_total_throughput_mps %d", dsc_enc_caps.max_total_throughput_mps); 980 DC_LOG_DSC("\tmax_slice_width %d", dsc_enc_caps.max_slice_width); 981 DC_LOG_DSC("\tbpp_increment_div %d", dsc_enc_caps.bpp_increment_div); 982 } 983 984 void dc_dsc_dump_decoder_caps(const struct display_stream_compressor *dsc, 985 const struct dsc_dec_dpcd_caps *dsc_sink_caps) 986 { 987 DC_LOG_DSC("dsc decoder caps:"); 988 DC_LOG_DSC("\tis_dsc_supported %d", dsc_sink_caps->is_dsc_supported); 989 DC_LOG_DSC("\tdsc_version 0x%x", dsc_sink_caps->dsc_version); 990 DC_LOG_DSC("\trc_buffer_size %d", dsc_sink_caps->rc_buffer_size); 991 DC_LOG_DSC("\tslice_caps1 0x%x", dsc_sink_caps->slice_caps1.raw); 992 DC_LOG_DSC("\tslice_caps2 0x%x", dsc_sink_caps->slice_caps2.raw); 993 DC_LOG_DSC("\tlb_bit_depth %d", dsc_sink_caps->lb_bit_depth); 994 DC_LOG_DSC("\tis_block_pred_supported %d", dsc_sink_caps->is_block_pred_supported); 995 DC_LOG_DSC("\tedp_max_bits_per_pixel %d", dsc_sink_caps->edp_max_bits_per_pixel); 996 DC_LOG_DSC("\tcolor_formats 0x%x", dsc_sink_caps->color_formats.raw); 997 DC_LOG_DSC("\tthroughput_mode_0_mps %d", dsc_sink_caps->throughput_mode_0_mps); 998 DC_LOG_DSC("\tthroughput_mode_1_mps %d", dsc_sink_caps->throughput_mode_1_mps); 999 DC_LOG_DSC("\tmax_slice_width %d", dsc_sink_caps->max_slice_width); 1000 DC_LOG_DSC("\tbpp_increment_div %d", dsc_sink_caps->bpp_increment_div); 1001 DC_LOG_DSC("\tbranch_overall_throughput_0_mps %d", dsc_sink_caps->branch_overall_throughput_0_mps); 1002 DC_LOG_DSC("\tbranch_overall_throughput_1_mps %d", dsc_sink_caps->branch_overall_throughput_1_mps); 1003 DC_LOG_DSC("\tbranch_max_line_width %d", dsc_sink_caps->branch_max_line_width); 1004 DC_LOG_DSC("\tis_dp %d", dsc_sink_caps->is_dp); 1005 } 1006 1007 1008 static void build_dsc_enc_combined_slice_caps( 1009 const struct dsc_enc_caps *single_dsc_enc_caps, 1010 struct dsc_enc_caps *dsc_enc_caps, 1011 unsigned int max_odm_combine_factor) 1012 { 1013 /* 1-16 slice configurations, single DSC */ 1014 dsc_enc_caps->slice_caps.raw |= single_dsc_enc_caps->slice_caps.raw; 1015 1016 /* 2x DSC's */ 1017 if (max_odm_combine_factor >= 2) { 1018 /* 1 + 1 */ 1019 dsc_enc_caps->slice_caps.bits.NUM_SLICES_2 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_1; 1020 1021 /* 2 + 2 */ 1022 dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_2; 1023 1024 /* 4 + 4 */ 1025 dsc_enc_caps->slice_caps.bits.NUM_SLICES_8 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_4; 1026 1027 /* 8 + 8 */ 1028 dsc_enc_caps->slice_caps.bits.NUM_SLICES_16 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_8; 1029 } 1030 1031 /* 3x DSC's */ 1032 if (max_odm_combine_factor >= 3) { 1033 /* 4 + 4 + 4 */ 1034 dsc_enc_caps->slice_caps.bits.NUM_SLICES_12 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_4; 1035 } 1036 1037 /* 4x DSC's */ 1038 if (max_odm_combine_factor >= 4) { 1039 /* 1 + 1 + 1 + 1 */ 1040 dsc_enc_caps->slice_caps.bits.NUM_SLICES_4 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_1; 1041 1042 /* 2 + 2 + 2 + 2 */ 1043 dsc_enc_caps->slice_caps.bits.NUM_SLICES_8 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_2; 1044 1045 /* 3 + 3 + 3 + 3 */ 1046 dsc_enc_caps->slice_caps.bits.NUM_SLICES_12 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_3; 1047 1048 /* 4 + 4 + 4 + 4 */ 1049 dsc_enc_caps->slice_caps.bits.NUM_SLICES_16 |= single_dsc_enc_caps->slice_caps.bits.NUM_SLICES_4; 1050 } 1051 } 1052 1053 static void build_dsc_enc_caps( 1054 const struct display_stream_compressor *dsc, 1055 struct dsc_enc_caps *dsc_enc_caps) 1056 { 1057 unsigned int max_dscclk_khz; 1058 unsigned int num_dsc; 1059 unsigned int max_odm_combine_factor; 1060 struct dsc_enc_caps single_dsc_enc_caps; 1061 1062 struct dc *dc; 1063 1064 if (!dsc || !dsc->ctx || !dsc->ctx->dc || !dsc->funcs->dsc_get_single_enc_caps) 1065 return; 1066 1067 dc = dsc->ctx->dc; 1068 1069 if (!dc->clk_mgr || !dc->clk_mgr->funcs->get_max_clock_khz || !dc->res_pool || dc->debug.disable_dsc) 1070 return; 1071 1072 /* get max DSCCLK from clk_mgr */ 1073 max_dscclk_khz = dc->clk_mgr->funcs->get_max_clock_khz(dc->clk_mgr, CLK_TYPE_DSCCLK); 1074 1075 dsc->funcs->dsc_get_single_enc_caps(&single_dsc_enc_caps, max_dscclk_khz); 1076 1077 /* global capabilities */ 1078 dsc_enc_caps->dsc_version = single_dsc_enc_caps.dsc_version; 1079 dsc_enc_caps->lb_bit_depth = single_dsc_enc_caps.lb_bit_depth; 1080 dsc_enc_caps->is_block_pred_supported = single_dsc_enc_caps.is_block_pred_supported; 1081 dsc_enc_caps->max_slice_width = single_dsc_enc_caps.max_slice_width; 1082 dsc_enc_caps->bpp_increment_div = single_dsc_enc_caps.bpp_increment_div; 1083 dsc_enc_caps->color_formats.raw = single_dsc_enc_caps.color_formats.raw; 1084 dsc_enc_caps->color_depth.raw = single_dsc_enc_caps.color_depth.raw; 1085 1086 /* expand per DSC capabilities to global */ 1087 max_odm_combine_factor = dc->caps.max_odm_combine_factor; 1088 num_dsc = dc->res_pool->res_cap->num_dsc; 1089 max_odm_combine_factor = min(max_odm_combine_factor, num_dsc); 1090 dsc_enc_caps->max_total_throughput_mps = 1091 single_dsc_enc_caps.max_total_throughput_mps * 1092 max_odm_combine_factor; 1093 1094 /* check slice counts possible for with ODM combine */ 1095 build_dsc_enc_combined_slice_caps(&single_dsc_enc_caps, dsc_enc_caps, max_odm_combine_factor); 1096 } 1097 1098 static inline uint32_t dsc_div_by_10_round_up(uint32_t value) 1099 { 1100 return (value + 9) / 10; 1101 } 1102 1103 static unsigned int get_min_dsc_slice_count_for_odm( 1104 const struct display_stream_compressor *dsc, 1105 const struct dsc_enc_caps *dsc_enc_caps, 1106 const struct dc_crtc_timing *timing) 1107 { 1108 unsigned int max_dispclk_khz; 1109 1110 /* get max pixel rate and combine caps */ 1111 max_dispclk_khz = dsc_enc_caps->max_total_throughput_mps * 1000; 1112 if (dsc && dsc->ctx->dc) { 1113 if (dsc->ctx->dc->clk_mgr && 1114 dsc->ctx->dc->clk_mgr->funcs->get_max_clock_khz) { 1115 /* dispclk is available */ 1116 max_dispclk_khz = dsc->ctx->dc->clk_mgr->funcs->get_max_clock_khz(dsc->ctx->dc->clk_mgr, CLK_TYPE_DISPCLK); 1117 } 1118 } 1119 1120 /* validate parameters */ 1121 if (max_dispclk_khz == 0 || dsc_enc_caps->max_slice_width == 0) 1122 return 1; 1123 1124 /* consider minimum odm slices required due to 1125 * 1) display pipe throughput (dispclk) 1126 * 2) max image width per slice 1127 */ 1128 return dc_fixpt_ceil(dc_fixpt_max( 1129 dc_fixpt_div_int(dc_fixpt_from_int(dsc_div_by_10_round_up(timing->pix_clk_100hz)), 1130 max_dispclk_khz), // throughput 1131 dc_fixpt_div_int(dc_fixpt_from_int(timing->h_addressable + timing->h_border_left + timing->h_border_right), 1132 dsc_enc_caps->max_slice_width))); // slice width 1133 } 1134 1135 static void get_dsc_enc_caps( 1136 const struct display_stream_compressor *dsc, 1137 struct dsc_enc_caps *dsc_enc_caps, 1138 int pixel_clock_100Hz) 1139 { 1140 memset(dsc_enc_caps, 0, sizeof(struct dsc_enc_caps)); 1141 1142 if (!dsc || !dsc->ctx || !dsc->ctx->dc || dsc->ctx->dc->debug.disable_dsc) 1143 return; 1144 1145 /* check if reported cap global or only for a single DCN DSC enc */ 1146 if (dsc->funcs->dsc_get_enc_caps) { 1147 dsc->funcs->dsc_get_enc_caps(dsc_enc_caps, pixel_clock_100Hz); 1148 } else { 1149 build_dsc_enc_caps(dsc, dsc_enc_caps); 1150 } 1151 } 1152 1153 /* Returns 'false' if no intersection was found for at least one capability. 1154 * It also implicitly validates some sink caps against invalid value of zero. 1155 */ 1156 static bool intersect_dsc_caps( 1157 const struct dsc_dec_dpcd_caps *dsc_sink_caps, 1158 const struct dsc_enc_caps *dsc_enc_caps, 1159 enum dc_pixel_encoding pixel_encoding, 1160 struct dsc_enc_caps *dsc_common_caps) 1161 { 1162 int32_t max_slices; 1163 int32_t total_sink_throughput; 1164 1165 memset(dsc_common_caps, 0, sizeof(struct dsc_enc_caps)); 1166 1167 dsc_common_caps->dsc_version = min(dsc_sink_caps->dsc_version, dsc_enc_caps->dsc_version); 1168 if (!dsc_common_caps->dsc_version) 1169 return false; 1170 1171 dsc_common_caps->slice_caps.bits.NUM_SLICES_1 = 1172 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_1 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_1; 1173 dsc_common_caps->slice_caps.bits.NUM_SLICES_2 = 1174 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_2 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_2; 1175 dsc_common_caps->slice_caps.bits.NUM_SLICES_4 = 1176 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_4 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_4; 1177 dsc_common_caps->slice_caps.bits.NUM_SLICES_8 = 1178 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_8 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_8; 1179 dsc_common_caps->slice_caps.bits.NUM_SLICES_12 = 1180 dsc_sink_caps->slice_caps1.bits.NUM_SLICES_12 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_12; 1181 dsc_common_caps->slice_caps.bits.NUM_SLICES_16 = 1182 dsc_sink_caps->slice_caps2.bits.NUM_SLICES_16 && dsc_enc_caps->slice_caps.bits.NUM_SLICES_16; 1183 1184 if (!dsc_common_caps->slice_caps.raw) 1185 return false; 1186 1187 dsc_common_caps->lb_bit_depth = min(dsc_sink_caps->lb_bit_depth, dsc_enc_caps->lb_bit_depth); 1188 if (!dsc_common_caps->lb_bit_depth) 1189 return false; 1190 1191 dsc_common_caps->is_block_pred_supported = 1192 dsc_sink_caps->is_block_pred_supported && dsc_enc_caps->is_block_pred_supported; 1193 1194 dsc_common_caps->color_formats.raw = dsc_sink_caps->color_formats.raw & dsc_enc_caps->color_formats.raw; 1195 if (!dsc_common_caps->color_formats.raw) 1196 return false; 1197 1198 dsc_common_caps->color_depth.raw = dsc_sink_caps->color_depth.raw & dsc_enc_caps->color_depth.raw; 1199 if (!dsc_common_caps->color_depth.raw) 1200 return false; 1201 1202 max_slices = 0; 1203 if (dsc_common_caps->slice_caps.bits.NUM_SLICES_1) 1204 max_slices = 1; 1205 1206 if (dsc_common_caps->slice_caps.bits.NUM_SLICES_2) 1207 max_slices = 2; 1208 1209 if (dsc_common_caps->slice_caps.bits.NUM_SLICES_4) 1210 max_slices = 4; 1211 1212 total_sink_throughput = max_slices * dsc_sink_caps->throughput_mode_0_mps; 1213 if (pixel_encoding == PIXEL_ENCODING_YCBCR422 || pixel_encoding == PIXEL_ENCODING_YCBCR420) 1214 total_sink_throughput = max_slices * dsc_sink_caps->throughput_mode_1_mps; 1215 1216 dsc_common_caps->max_total_throughput_mps = min(total_sink_throughput, dsc_enc_caps->max_total_throughput_mps); 1217 1218 dsc_common_caps->max_slice_width = min(dsc_sink_caps->max_slice_width, dsc_enc_caps->max_slice_width); 1219 if (!dsc_common_caps->max_slice_width) 1220 return false; 1221 1222 dsc_common_caps->bpp_increment_div = min(dsc_sink_caps->bpp_increment_div, dsc_enc_caps->bpp_increment_div); 1223 1224 // TODO DSC: Remove this workaround for N422 and 420 once it's fixed, or move it to get_dsc_encoder_caps() 1225 if (pixel_encoding == PIXEL_ENCODING_YCBCR422 || pixel_encoding == PIXEL_ENCODING_YCBCR420) 1226 dsc_common_caps->bpp_increment_div = min(dsc_common_caps->bpp_increment_div, (uint32_t)8); 1227 1228 dsc_common_caps->is_frl = dsc_sink_caps->is_frl; 1229 dsc_common_caps->is_vic_all_bpp = dsc_sink_caps->is_vic_all_bpp; 1230 dsc_common_caps->total_chunk_kbytes = dsc_sink_caps->total_chunk_kbytes; 1231 dsc_common_caps->edp_sink_max_bits_per_pixel = dsc_sink_caps->edp_max_bits_per_pixel; 1232 dsc_common_caps->is_dp = dsc_sink_caps->is_dp; 1233 return true; 1234 } 1235 1236 static uint32_t compute_bpp_x16_from_target_bandwidth( 1237 const uint32_t bandwidth_in_kbps, 1238 const struct dc_crtc_timing *timing, 1239 const uint32_t num_slices_h, 1240 const uint32_t bpp_increment_div, 1241 const bool is_dp) 1242 { 1243 uint32_t overhead_in_kbps; 1244 struct fixed31_32 effective_bandwidth_in_kbps; 1245 struct fixed31_32 bpp_x16; 1246 1247 overhead_in_kbps = dc_dsc_stream_bandwidth_overhead_in_kbps( 1248 timing, num_slices_h, is_dp); 1249 effective_bandwidth_in_kbps = dc_fixpt_from_int(bandwidth_in_kbps); 1250 effective_bandwidth_in_kbps = dc_fixpt_sub_int(effective_bandwidth_in_kbps, 1251 overhead_in_kbps); 1252 bpp_x16 = dc_fixpt_mul_int(effective_bandwidth_in_kbps, 10); 1253 bpp_x16 = dc_fixpt_div_int(bpp_x16, timing->pix_clk_100hz); 1254 bpp_x16 = dc_fixpt_from_int(dc_fixpt_floor(dc_fixpt_mul_int(bpp_x16, bpp_increment_div))); 1255 bpp_x16 = dc_fixpt_div_int(bpp_x16, bpp_increment_div); 1256 bpp_x16 = dc_fixpt_mul_int(bpp_x16, 16); 1257 return dc_fixpt_floor(bpp_x16); 1258 } 1259 1260 static bool convert_bandwidth_to_frl_params( 1261 int bandwidth_kbps, 1262 int *num_lanes, 1263 int *frl_rate) 1264 { 1265 if (bandwidth_kbps == 0) 1266 return false; 1267 1268 switch (bandwidth_kbps) { 1269 case 9000000: 1270 *num_lanes = 3; 1271 *frl_rate = 3000; 1272 break; 1273 case 18000000: 1274 *num_lanes = 3; 1275 *frl_rate = 6000; 1276 break; 1277 case 24000000: 1278 *num_lanes = 4; 1279 *frl_rate = 6000; 1280 break; 1281 case 32000000: 1282 *num_lanes = 4; 1283 *frl_rate = 8000; 1284 break; 1285 case 40000000: 1286 *num_lanes = 4; 1287 *frl_rate = 10000; 1288 break; 1289 case 48000000: 1290 *num_lanes = 4; 1291 *frl_rate = 12000; 1292 break; 1293 default: 1294 return false; 1295 } 1296 return true; 1297 } 1298 1299 static uint32_t compute_bpp_x16_from_frl_params( 1300 const struct dc_crtc_timing *timing, 1301 const uint32_t num_slices_h, 1302 const struct dsc_enc_caps *dsc_caps) 1303 { 1304 struct fixed31_32 pixel_clock; 1305 uint32_t num_lanes = dsc_caps->num_lanes; 1306 uint32_t frl_rate = dsc_caps->frl_rate; 1307 uint32_t h_active = timing->h_addressable; 1308 uint32_t h_blank = timing->h_total - timing->h_addressable; 1309 uint32_t bpp_target_x16; 1310 struct fixed31_32 r_bit; 1311 uint32_t f_audio = 48000; 1312 struct fixed31_32 pixel_rate_tolerance; 1313 uint32_t audio_tolerance = 1000; 1314 uint32_t frl_bit_tolerance = 300; 1315 uint32_t acr_rate_max = 1500; 1316 uint32_t c_frl_cb = 510; 1317 uint32_t c_frl_sb; 1318 struct fixed31_32 overhead_sb; 1319 struct fixed31_32 overhead_rs; 1320 struct fixed31_32 overhead_map; 1321 struct fixed31_32 overhead_min; 1322 struct fixed31_32 overhead_m; 1323 struct fixed31_32 overhead_max; 1324 struct fixed31_32 pixel_clock_max; 1325 struct fixed31_32 t_line; 1326 struct fixed31_32 r_bit_min; 1327 struct fixed31_32 r_frl_char_min; 1328 struct fixed31_32 c_frl_line; 1329 uint32_t c_frl_line_int; 1330 struct fixed31_32 c_frl_available; 1331 uint32_t c_frl_av_int; 1332 struct fixed31_32 c_frl_active_av; 1333 struct fixed31_32 c_frl_blank_av; 1334 uint32_t acat_ap = 4; 1335 struct fixed31_32 r_ap; 1336 struct fixed31_32 max_audio_tol_rate; 1337 struct fixed31_32 avg_audio_packets_line; 1338 uint32_t avg_audio_packets_line_int; 1339 int hc_blank_audio_min; 1340 uint32_t bytes_target; 1341 uint32_t hc_active_target; 1342 uint32_t hc_blank_target_est1; 1343 uint32_t hc_blank_target_est2; 1344 struct fixed31_32 hc_blank_target_bandwidth; 1345 int hc_blank_target; 1346 uint32_t bpc_factor = 8; 1347 uint32_t min_dsc_bpp_x16; 1348 uint32_t max_dsc_bpp_x16; 1349 bool hdmi_all_bpp = dsc_caps->is_vic_all_bpp; 1350 uint32_t slice_width; 1351 1352 if (timing->display_color_depth == COLOR_DEPTH_101010) 1353 bpc_factor = 10; 1354 if (timing->display_color_depth == COLOR_DEPTH_121212) 1355 bpc_factor = 12; 1356 1357 /* Assuming: bpc as 8*/ 1358 if (timing->pixel_encoding == PIXEL_ENCODING_RGB || 1359 timing->pixel_encoding == PIXEL_ENCODING_YCBCR444) { 1360 min_dsc_bpp_x16 = 8 * 16; 1361 max_dsc_bpp_x16 = 3 * 16 * bpc_factor; 1362 } else if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) { 1363 min_dsc_bpp_x16 = 7 * 16; 1364 max_dsc_bpp_x16 = 2 * 16 * bpc_factor; 1365 } else { 1366 min_dsc_bpp_x16 = 6 * 16; 1367 max_dsc_bpp_x16 = 3 * 16 * bpc_factor / 2; 1368 } 1369 1370 max_dsc_bpp_x16 = MIN(max_dsc_bpp_x16, 256); 1371 if (!hdmi_all_bpp) 1372 max_dsc_bpp_x16 = MIN(max_dsc_bpp_x16, 192); 1373 1374 c_frl_sb = 4 * c_frl_cb + num_lanes; 1375 pixel_clock = dc_fixpt_div_int(dc_fixpt_from_int(timing->pix_clk_100hz), 10000); 1376 r_bit = dc_fixpt_from_int(frl_rate); 1377 pixel_rate_tolerance = dc_fixpt_div_int(dc_fixpt_from_int(5), 1000); 1378 overhead_sb = dc_fixpt_div_int(dc_fixpt_from_int(num_lanes), c_frl_sb); 1379 overhead_rs = dc_fixpt_div_int(dc_fixpt_from_int(32), c_frl_sb); 1380 overhead_map = dc_fixpt_div_int(dc_fixpt_from_int(25), (c_frl_sb * 10)); 1381 overhead_min = dc_fixpt_add(overhead_sb, overhead_rs); 1382 overhead_min = dc_fixpt_add(overhead_min, overhead_map); 1383 overhead_m = dc_fixpt_div_int(dc_fixpt_from_int(3), 1000); 1384 overhead_max = dc_fixpt_add(overhead_min, overhead_m); 1385 pixel_rate_tolerance = dc_fixpt_add_int(pixel_rate_tolerance, 1); 1386 pixel_clock_max = dc_fixpt_mul(pixel_clock, pixel_rate_tolerance); 1387 t_line = dc_fixpt_div(dc_fixpt_from_int(h_active + h_blank), pixel_clock_max); 1388 r_bit_min = dc_fixpt_div_int(dc_fixpt_from_int(frl_bit_tolerance), 1000000); 1389 r_bit_min = dc_fixpt_sub(dc_fixpt_from_int(1), r_bit_min); 1390 r_bit_min = dc_fixpt_mul(r_bit, r_bit_min); 1391 r_frl_char_min = dc_fixpt_div_int(r_bit_min, 18); 1392 c_frl_line = dc_fixpt_mul(t_line, r_frl_char_min); 1393 c_frl_line = dc_fixpt_mul_int(c_frl_line, num_lanes); 1394 c_frl_line_int = dc_fixpt_floor(c_frl_line); 1395 c_frl_available = dc_fixpt_sub(dc_fixpt_from_int(1), overhead_max); 1396 c_frl_available = dc_fixpt_mul_int(c_frl_available, c_frl_line_int); 1397 c_frl_av_int = dc_fixpt_floor(c_frl_available); 1398 c_frl_active_av = dc_fixpt_mul_int(dc_fixpt_from_int(c_frl_av_int), h_active); 1399 c_frl_active_av = dc_fixpt_div_int(c_frl_active_av, (h_active + h_blank)); 1400 c_frl_blank_av = dc_fixpt_mul_int(dc_fixpt_from_int(c_frl_av_int), h_blank); 1401 c_frl_blank_av = dc_fixpt_div_int(c_frl_blank_av, (h_active + h_blank)); 1402 r_ap = dc_fixpt_max(dc_fixpt_from_int(192000), 1403 dc_fixpt_from_int(f_audio * acat_ap)); 1404 r_ap = dc_fixpt_add(r_ap, dc_fixpt_from_int(2 * acr_rate_max)); 1405 max_audio_tol_rate = dc_fixpt_div_int(dc_fixpt_from_int(audio_tolerance), 1000000); 1406 max_audio_tol_rate = dc_fixpt_add(dc_fixpt_from_int(1), max_audio_tol_rate); 1407 r_ap = dc_fixpt_mul(r_ap, max_audio_tol_rate); 1408 avg_audio_packets_line = dc_fixpt_mul(r_ap, t_line); 1409 avg_audio_packets_line = dc_fixpt_div_int(avg_audio_packets_line, 1000000); 1410 avg_audio_packets_line_int = dc_fixpt_ceil(avg_audio_packets_line); 1411 hc_blank_audio_min = 32 + 32 * avg_audio_packets_line_int; 1412 slice_width = dc_fixpt_ceil(dc_fixpt_div_int( 1413 dc_fixpt_from_int(h_active), num_slices_h)); 1414 1415 /* Slice width for 420 must be even */ 1416 if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 && slice_width % 2 != 0) { 1417 slice_width++; 1418 } 1419 1420 for (uint32_t i = max_dsc_bpp_x16; i >= min_dsc_bpp_x16; i--) { 1421 bpp_target_x16 = i; 1422 bytes_target = num_slices_h * dc_fixpt_ceil(dc_fixpt_div_int( 1423 dc_fixpt_from_int(bpp_target_x16 * slice_width), 8 * 16)); 1424 hc_active_target = dc_fixpt_ceil(dc_fixpt_div_int( 1425 dc_fixpt_from_int(bytes_target), 3)); 1426 hc_blank_target_est1 = dc_fixpt_ceil(dc_fixpt_div_int( 1427 dc_fixpt_from_int(hc_active_target * h_blank), h_active)); 1428 hc_blank_target_est2 = dc_fixpt_floor(dc_fixpt_max( 1429 dc_fixpt_from_int(hc_blank_target_est1), 1430 dc_fixpt_from_int(hc_blank_audio_min))); 1431 hc_blank_target_bandwidth = dc_fixpt_div_int(dc_fixpt_from_int(3), 2); 1432 hc_blank_target_bandwidth = dc_fixpt_mul(hc_blank_target_bandwidth, 1433 dc_fixpt_from_int(hc_active_target)); 1434 hc_blank_target_bandwidth = dc_fixpt_sub(dc_fixpt_from_int(c_frl_av_int), 1435 hc_blank_target_bandwidth); 1436 hc_blank_target_bandwidth = dc_fixpt_min(hc_blank_target_bandwidth, 1437 dc_fixpt_from_int(hc_blank_target_est2)); 1438 hc_blank_target_bandwidth = dc_fixpt_div_int(hc_blank_target_bandwidth, 4); 1439 hc_blank_target = dc_fixpt_floor(hc_blank_target_bandwidth) * 4; 1440 if (hc_blank_target >= hc_blank_audio_min) 1441 return bpp_target_x16; 1442 } 1443 return 0; 1444 } 1445 /* Decide DSC bandwidth range based on signal, timing, specs specific and input min and max 1446 * requirements. 1447 * The range output includes decided min/max target bpp, the respective bandwidth requirements 1448 * and native timing bandwidth requirement when DSC is not used. 1449 */ 1450 static bool decide_dsc_bandwidth_range( 1451 const uint32_t min_bpp_x16, 1452 const uint32_t max_bpp_x16, 1453 const uint32_t num_slices_h, 1454 const struct dsc_enc_caps *dsc_caps, 1455 const struct dc_crtc_timing *timing, 1456 const enum dc_link_encoding_format link_encoding, 1457 struct dc_dsc_bw_range *range) 1458 { 1459 uint32_t preferred_bpp_x16 = timing->dsc_fixed_bits_per_pixel_x16; 1460 1461 memset(range, 0, sizeof(*range)); 1462 1463 /* apply signal, timing, specs and explicitly specified DSC range requirements */ 1464 if (preferred_bpp_x16) { 1465 if (preferred_bpp_x16 <= max_bpp_x16 && 1466 preferred_bpp_x16 >= min_bpp_x16) { 1467 range->max_target_bpp_x16 = preferred_bpp_x16; 1468 range->min_target_bpp_x16 = preferred_bpp_x16; 1469 } 1470 } 1471 else if (dsc_caps->is_frl) { 1472 uint32_t specs_preferred_bpp_x16 = hdmi_dsc_get_bpp(timing, dsc_caps); 1473 uint32_t specs_calculated_bpp_x16 = 0; 1474 1475 if (timing->vic) { 1476 /* For CTA timing, we should strictly follow HDMI spec. */ 1477 range->max_target_bpp_x16 = specs_preferred_bpp_x16; 1478 if (dsc_caps->is_vic_all_bpp || dsc_caps->is_dp) 1479 range->min_target_bpp_x16 = min_bpp_x16; 1480 else 1481 range->min_target_bpp_x16 = specs_preferred_bpp_x16; 1482 } else { 1483 if (timing->vic == 0 && timing->hdmi_vic == 0) 1484 specs_calculated_bpp_x16 = compute_bpp_x16_from_frl_params( 1485 timing, num_slices_h, dsc_caps); 1486 1487 if (specs_calculated_bpp_x16 != 0) 1488 specs_preferred_bpp_x16 = MIN(specs_calculated_bpp_x16, 1489 specs_preferred_bpp_x16); 1490 1491 range->max_target_bpp_x16 = MIN(max_bpp_x16, specs_preferred_bpp_x16); 1492 range->min_target_bpp_x16 = min_bpp_x16; 1493 } 1494 } 1495 /* TODO - make this value generic to all signal types */ 1496 else if (dsc_caps->edp_sink_max_bits_per_pixel) { 1497 /* apply max bpp limitation from edp sink */ 1498 range->max_target_bpp_x16 = MIN(dsc_caps->edp_sink_max_bits_per_pixel, 1499 max_bpp_x16); 1500 range->min_target_bpp_x16 = min_bpp_x16; 1501 } 1502 else { 1503 range->max_target_bpp_x16 = max_bpp_x16; 1504 range->min_target_bpp_x16 = min_bpp_x16; 1505 } 1506 1507 /* populate output structure */ 1508 if (range->max_target_bpp_x16 >= range->min_target_bpp_x16 && range->min_target_bpp_x16 > 0) { 1509 /* native stream bandwidth */ 1510 range->stream_kbps = dc_bandwidth_in_kbps_from_timing(timing, link_encoding); 1511 1512 /* max dsc target bpp */ 1513 range->max_kbps = dc_dsc_stream_bandwidth_in_kbps(timing, 1514 range->max_target_bpp_x16, num_slices_h, dsc_caps->is_dp); 1515 1516 /* min dsc target bpp */ 1517 range->min_kbps = dc_dsc_stream_bandwidth_in_kbps(timing, 1518 range->min_target_bpp_x16, num_slices_h, dsc_caps->is_dp); 1519 } 1520 1521 return range->max_kbps >= range->min_kbps && range->min_kbps > 0; 1522 } 1523 1524 /* Decides if DSC should be used and calculates target bpp if it should, applying DSC policy. 1525 * 1526 * Returns: 1527 * - 'true' if target bpp is decided 1528 * - 'false' if target bpp cannot be decided (e.g. cannot fit even with min DSC bpp), 1529 */ 1530 static bool decide_dsc_target_bpp_x16( 1531 const struct dc_dsc_policy *policy, 1532 const struct dc_dsc_config_options *options, 1533 const struct dsc_enc_caps *dsc_common_caps, 1534 const int target_bandwidth_kbps, 1535 const struct dc_crtc_timing *timing, 1536 const int num_slices_h, 1537 const enum dc_link_encoding_format link_encoding, 1538 int *target_bpp_x16) 1539 { 1540 struct dc_dsc_bw_range range; 1541 uint32_t target_bandwidth_kbps_u = (uint32_t)target_bandwidth_kbps; 1542 1543 *target_bpp_x16 = 0; 1544 1545 if (decide_dsc_bandwidth_range(policy->min_target_bpp * 16, policy->max_target_bpp * 16, 1546 num_slices_h, dsc_common_caps, timing, link_encoding, &range)) { 1547 if (target_bandwidth_kbps_u >= range.stream_kbps) { 1548 if (policy->enable_dsc_when_not_needed || options->force_dsc_when_not_needed) 1549 /* enable max bpp even dsc is not needed */ 1550 *target_bpp_x16 = range.max_target_bpp_x16; 1551 } else if (target_bandwidth_kbps_u >= range.max_kbps) { 1552 /* use max target bpp allowed */ 1553 *target_bpp_x16 = range.max_target_bpp_x16; 1554 } else if (target_bandwidth_kbps_u >= range.min_kbps) { 1555 /* use target bpp that can take entire target bandwidth */ 1556 *target_bpp_x16 = compute_bpp_x16_from_target_bandwidth( 1557 target_bandwidth_kbps, timing, num_slices_h, 1558 dsc_common_caps->bpp_increment_div, 1559 dsc_common_caps->is_dp); 1560 } 1561 /* Assign minimum bpp and validate TB borrow scenario later */ 1562 if (target_bandwidth_kbps < range.min_kbps) 1563 if (dsc_common_caps->is_frl) 1564 *target_bpp_x16 = range.min_target_bpp_x16; 1565 } 1566 1567 return *target_bpp_x16 != 0; 1568 } 1569 1570 #define MIN_AVAILABLE_SLICES_SIZE 6 1571 1572 static int get_available_dsc_slices(union dsc_enc_slice_caps slice_caps, int *available_slices) 1573 { 1574 int idx = 0; 1575 1576 if (slice_caps.bits.NUM_SLICES_1) 1577 available_slices[idx++] = 1; 1578 1579 if (slice_caps.bits.NUM_SLICES_2) 1580 available_slices[idx++] = 2; 1581 1582 if (slice_caps.bits.NUM_SLICES_4) 1583 available_slices[idx++] = 4; 1584 1585 if (slice_caps.bits.NUM_SLICES_8) 1586 available_slices[idx++] = 8; 1587 1588 if (slice_caps.bits.NUM_SLICES_12) 1589 available_slices[idx++] = 12; 1590 1591 if (slice_caps.bits.NUM_SLICES_16) 1592 available_slices[idx++] = 16; 1593 1594 return idx; 1595 } 1596 1597 1598 static int get_max_dsc_slices(union dsc_enc_slice_caps slice_caps) 1599 { 1600 int max_slices = 0; 1601 int available_slices[MIN_AVAILABLE_SLICES_SIZE]; 1602 int end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]); 1603 1604 if (end_idx > 0) 1605 max_slices = available_slices[end_idx - 1]; 1606 1607 return max_slices; 1608 } 1609 1610 1611 // Increment slice number in available slice numbers stops if possible, or just increment if not 1612 static int inc_num_slices(union dsc_enc_slice_caps slice_caps, int num_slices) 1613 { 1614 // Get next bigger num slices available in common caps 1615 int available_slices[MIN_AVAILABLE_SLICES_SIZE]; 1616 int end_idx; 1617 int i; 1618 int new_num_slices = num_slices; 1619 1620 end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]); 1621 if (end_idx == 0) { 1622 // No available slices found 1623 new_num_slices++; 1624 return new_num_slices; 1625 } 1626 1627 // Numbers of slices found - get the next bigger number 1628 for (i = 0; i < end_idx; i++) { 1629 if (new_num_slices < available_slices[i]) { 1630 new_num_slices = available_slices[i]; 1631 break; 1632 } 1633 } 1634 1635 if (new_num_slices == num_slices) // No bigger number of slices found 1636 new_num_slices++; 1637 1638 return new_num_slices; 1639 } 1640 1641 1642 // Decrement slice number in available slice numbers stops if possible, or just decrement if not. Stop at zero. 1643 static int dec_num_slices(union dsc_enc_slice_caps slice_caps, int num_slices) 1644 { 1645 // Get next bigger num slices available in common caps 1646 int available_slices[MIN_AVAILABLE_SLICES_SIZE]; 1647 int end_idx; 1648 int i; 1649 int new_num_slices = num_slices; 1650 1651 end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]); 1652 if (end_idx == 0 && new_num_slices > 0) { 1653 // No numbers of slices found 1654 new_num_slices++; 1655 return new_num_slices; 1656 } 1657 1658 // Numbers of slices found - get the next smaller number 1659 for (i = end_idx - 1; i >= 0; i--) { 1660 if (new_num_slices > available_slices[i]) { 1661 new_num_slices = available_slices[i]; 1662 break; 1663 } 1664 } 1665 1666 if (new_num_slices == num_slices) { 1667 // No smaller number of slices found 1668 new_num_slices--; 1669 if (new_num_slices < 0) 1670 new_num_slices = 0; 1671 } 1672 1673 return new_num_slices; 1674 } 1675 1676 1677 // Choose next bigger number of slices if the requested number of slices is not available 1678 static int fit_num_slices_up(union dsc_enc_slice_caps slice_caps, int num_slices) 1679 { 1680 // Get next bigger num slices available in common caps 1681 int available_slices[MIN_AVAILABLE_SLICES_SIZE]; 1682 int end_idx; 1683 int i; 1684 int new_num_slices = num_slices; 1685 1686 end_idx = get_available_dsc_slices(slice_caps, &available_slices[0]); 1687 if (end_idx == 0) { 1688 // No available slices found 1689 new_num_slices++; 1690 return new_num_slices; 1691 } 1692 1693 // Numbers of slices found - get the equal or next bigger number 1694 for (i = 0; i < end_idx; i++) { 1695 if (new_num_slices <= available_slices[i]) { 1696 new_num_slices = available_slices[i]; 1697 break; 1698 } 1699 } 1700 1701 return new_num_slices; 1702 } 1703 1704 1705 /* Attempts to set DSC configuration for the stream, applying DSC policy. 1706 * Returns 'true' if successful or 'false' if not. 1707 * 1708 * Parameters: 1709 * 1710 * dsc_sink_caps - DSC sink decoder capabilities (from DPCD) 1711 * 1712 * dsc_enc_caps - DSC encoder capabilities 1713 * 1714 * target_bandwidth_kbps - Target bandwidth to fit the stream into. 1715 * If 0, do not calculate target bpp. 1716 * 1717 * timing - The stream timing to fit into 'target_bandwidth_kbps' or apply 1718 * maximum compression to, if 'target_badwidth == 0' 1719 * 1720 * dsc_cfg - DSC configuration to use if it was possible to come up with 1721 * one for the given inputs. 1722 * The target bitrate after DSC can be calculated by multiplying 1723 * dsc_cfg.bits_per_pixel (in U6.4 format) by pixel rate, e.g. 1724 * 1725 * dsc_stream_bitrate_kbps = (int)ceil(timing->pix_clk_khz * dsc_cfg.bits_per_pixel / 16.0); 1726 */ 1727 static bool setup_dsc_config( 1728 const struct dsc_dec_dpcd_caps *dsc_sink_caps, 1729 const struct dsc_enc_caps *dsc_enc_caps, 1730 int target_bandwidth_kbps, 1731 const struct dc_crtc_timing *timing, 1732 const struct dc_dsc_config_options *options, 1733 const enum dc_link_encoding_format link_encoding, 1734 int min_slices_h, 1735 struct dc_dsc_config *dsc_cfg) 1736 { 1737 struct dsc_enc_caps dsc_common_caps; 1738 int max_slices_h = 0; 1739 int num_slices_h = 0; 1740 int pic_width; 1741 uint32_t pic_width_u; 1742 int slice_width; 1743 int target_bpp; 1744 int sink_per_slice_throughput_mps; 1745 uint32_t branch_max_throughput_mps = 0; 1746 bool is_dsc_possible = false; 1747 int pic_height; 1748 int slice_height; 1749 struct dc_dsc_policy policy; 1750 int num_lanes; 1751 int frl_rate; 1752 1753 memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); 1754 1755 dc_dsc_get_policy_for_timing(timing, options->max_target_bpp_limit_override_x16, &policy, link_encoding); 1756 pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; 1757 pic_width_u = (uint32_t)pic_width; 1758 pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; 1759 1760 if (!dsc_sink_caps->is_dsc_supported) 1761 goto done; 1762 1763 if (dsc_sink_caps->branch_max_line_width && dsc_sink_caps->branch_max_line_width < pic_width_u) 1764 goto done; 1765 1766 // Intersect decoder with encoder DSC caps and validate DSC settings 1767 is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, dsc_enc_caps, timing->pixel_encoding, &dsc_common_caps); 1768 if (!is_dsc_possible) 1769 goto done; 1770 if (convert_bandwidth_to_frl_params( 1771 target_bandwidth_kbps, &num_lanes, &frl_rate)) { 1772 dsc_common_caps.num_lanes = num_lanes; 1773 dsc_common_caps.frl_rate = frl_rate; 1774 } 1775 1776 sink_per_slice_throughput_mps = 0; 1777 1778 // Validate available DSC settings against the mode timing 1779 1780 // Validate color format (and pick up the throughput values) 1781 dsc_cfg->ycbcr422_simple = false; 1782 switch (timing->pixel_encoding) { 1783 case PIXEL_ENCODING_RGB: 1784 is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.RGB; 1785 sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps; 1786 branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_0_mps; 1787 break; 1788 case PIXEL_ENCODING_YCBCR444: 1789 is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_444; 1790 sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps; 1791 branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_0_mps; 1792 break; 1793 case PIXEL_ENCODING_YCBCR422: 1794 if (policy.ycbcr422_simple) { 1795 is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_SIMPLE_422; 1796 dsc_cfg->ycbcr422_simple = is_dsc_possible; 1797 sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_0_mps; 1798 } else { 1799 is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_422; 1800 sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_1_mps; 1801 branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_1_mps; 1802 } 1803 break; 1804 case PIXEL_ENCODING_YCBCR420: 1805 is_dsc_possible = (bool)dsc_common_caps.color_formats.bits.YCBCR_NATIVE_420; 1806 sink_per_slice_throughput_mps = dsc_sink_caps->throughput_mode_1_mps; 1807 branch_max_throughput_mps = dsc_sink_caps->branch_overall_throughput_1_mps; 1808 break; 1809 default: 1810 is_dsc_possible = false; 1811 } 1812 1813 // Validate branch's maximum throughput 1814 if (branch_max_throughput_mps && dsc_div_by_10_round_up(timing->pix_clk_100hz) > branch_max_throughput_mps * 1000) 1815 is_dsc_possible = false; 1816 1817 if (!is_dsc_possible) 1818 goto done; 1819 1820 // Color depth 1821 switch (timing->display_color_depth) { 1822 case COLOR_DEPTH_888: 1823 is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_8_BPC; 1824 break; 1825 case COLOR_DEPTH_101010: 1826 is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_10_BPC; 1827 break; 1828 case COLOR_DEPTH_121212: 1829 is_dsc_possible = (bool)dsc_common_caps.color_depth.bits.COLOR_DEPTH_12_BPC; 1830 break; 1831 default: 1832 is_dsc_possible = false; 1833 } 1834 1835 if (!is_dsc_possible) 1836 goto done; 1837 1838 // Slice width (i.e. number of slices per line) 1839 max_slices_h = get_max_dsc_slices(dsc_common_caps.slice_caps); 1840 1841 while (max_slices_h > 0) { 1842 if (pic_width % max_slices_h == 0) 1843 break; 1844 1845 max_slices_h = dec_num_slices(dsc_common_caps.slice_caps, max_slices_h); 1846 } 1847 1848 is_dsc_possible = (dsc_common_caps.max_slice_width > 0); 1849 if (!is_dsc_possible) 1850 goto done; 1851 1852 /* increase minimum slice count to meet sink slice width limitations */ 1853 min_slices_h = dc_fixpt_ceil(dc_fixpt_max( 1854 dc_fixpt_div_int(dc_fixpt_from_int(pic_width), dsc_common_caps.max_slice_width), // sink min 1855 dc_fixpt_from_int(min_slices_h))); // source min 1856 1857 min_slices_h = fit_num_slices_up(dsc_common_caps.slice_caps, min_slices_h); 1858 1859 /* increase minimum slice count to meet sink throughput limitations */ 1860 while (min_slices_h <= max_slices_h) { 1861 int pix_clk_per_slice_khz = dsc_div_by_10_round_up(timing->pix_clk_100hz) / min_slices_h; 1862 if (pix_clk_per_slice_khz <= sink_per_slice_throughput_mps * 1000) 1863 break; 1864 1865 min_slices_h = inc_num_slices(dsc_common_caps.slice_caps, min_slices_h); 1866 } 1867 1868 /* increase minimum slice count to meet divisibility requirements */ 1869 while (pic_width % min_slices_h != 0 && min_slices_h <= max_slices_h) { 1870 min_slices_h = inc_num_slices(dsc_common_caps.slice_caps, min_slices_h); 1871 } 1872 1873 is_dsc_possible = (min_slices_h <= max_slices_h) && max_slices_h != 0; 1874 if (!is_dsc_possible) 1875 goto done; 1876 1877 if (policy.use_min_slices_h) { 1878 if (min_slices_h > 0) 1879 num_slices_h = min_slices_h; 1880 else if (max_slices_h > 0) { // Fall back to max slices if min slices is not working out 1881 if (policy.max_slices_h) 1882 num_slices_h = min(policy.max_slices_h, max_slices_h); 1883 else 1884 num_slices_h = max_slices_h; 1885 } else 1886 is_dsc_possible = false; 1887 } else { 1888 if (max_slices_h > 0) { 1889 if (policy.max_slices_h) 1890 num_slices_h = min(policy.max_slices_h, max_slices_h); 1891 else 1892 num_slices_h = max_slices_h; 1893 } else if (min_slices_h > 0) // Fall back to min slices if max slices is not possible 1894 num_slices_h = min_slices_h; 1895 else 1896 is_dsc_possible = false; 1897 } 1898 if (dsc_sink_caps->is_frl) 1899 num_slices_h = hdmi_dsc_get_num_slices(timing); 1900 // When we force ODM, num dsc h slices must be divisible by num odm h slices 1901 switch (options->dsc_force_odm_hslice_override) { 1902 case 0: 1903 case 1: 1904 break; 1905 case 2: 1906 if (num_slices_h < 2) 1907 num_slices_h = fit_num_slices_up(dsc_common_caps.slice_caps, 2); 1908 break; 1909 case 3: 1910 if (dsc_common_caps.slice_caps.bits.NUM_SLICES_12) 1911 num_slices_h = 12; 1912 else 1913 num_slices_h = 0; 1914 break; 1915 case 4: 1916 if (num_slices_h < 4) 1917 num_slices_h = fit_num_slices_up(dsc_common_caps.slice_caps, 4); 1918 break; 1919 default: 1920 break; 1921 } 1922 if (num_slices_h == 0) 1923 is_dsc_possible = false; 1924 if (!is_dsc_possible) 1925 goto done; 1926 1927 dsc_cfg->num_slices_h = num_slices_h; 1928 slice_width = pic_width / num_slices_h; 1929 1930 is_dsc_possible = slice_width <= dsc_common_caps.max_slice_width; 1931 if (!is_dsc_possible) 1932 goto done; 1933 1934 // Slice height (i.e. number of slices per column): start with policy and pick the first one that height is divisible by. 1935 // For 4:2:0 make sure the slice height is divisible by 2 as well. 1936 if (options->dsc_min_slice_height_override == 0) 1937 slice_height = min(policy.min_slice_height, pic_height); 1938 else 1939 slice_height = min((int)(options->dsc_min_slice_height_override), pic_height); 1940 1941 while (slice_height < pic_height && (pic_height % slice_height != 0 || 1942 slice_height % options->slice_height_granularity != 0 || 1943 (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 && slice_height % 2 != 0))) 1944 slice_height++; 1945 1946 if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420) // For the case when pic_height < dsc_policy.min_sice_height 1947 is_dsc_possible = (slice_height % 2 == 0); 1948 1949 if (!is_dsc_possible) 1950 goto done; 1951 1952 if (slice_height > 0) { 1953 dsc_cfg->num_slices_v = pic_height / slice_height; 1954 } else { 1955 is_dsc_possible = false; 1956 goto done; 1957 } 1958 1959 if (target_bandwidth_kbps > 0) { 1960 is_dsc_possible = decide_dsc_target_bpp_x16( 1961 &policy, 1962 options, 1963 &dsc_common_caps, 1964 target_bandwidth_kbps, 1965 timing, 1966 num_slices_h, 1967 link_encoding, 1968 &target_bpp); 1969 dsc_cfg->bits_per_pixel = target_bpp; 1970 } 1971 if (!is_dsc_possible) 1972 goto done; 1973 1974 /* Fill out the rest of DSC settings */ 1975 dsc_cfg->block_pred_enable = dsc_common_caps.is_block_pred_supported; 1976 dsc_cfg->linebuf_depth = dsc_common_caps.lb_bit_depth; 1977 dsc_cfg->version_minor = (dsc_common_caps.dsc_version & 0xf0) >> 4; 1978 dsc_cfg->is_frl = dsc_sink_caps->is_frl; 1979 if (dsc_cfg->is_frl) 1980 dsc_cfg->num_slices_h = num_slices_h; 1981 dsc_cfg->is_vic_all_bpp = dsc_sink_caps->is_vic_all_bpp; 1982 dsc_cfg->total_chunk_kbytes = dsc_sink_caps->total_chunk_kbytes; 1983 dsc_cfg->is_dp = dsc_sink_caps->is_dp; 1984 1985 done: 1986 if (!is_dsc_possible) 1987 memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); 1988 1989 return is_dsc_possible; 1990 } 1991 1992 bool dc_dsc_compute_config( 1993 const struct display_stream_compressor *dsc, 1994 const struct dsc_dec_dpcd_caps *dsc_sink_caps, 1995 const struct dc_dsc_config_options *options, 1996 uint32_t target_bandwidth_kbps, 1997 const struct dc_crtc_timing *timing, 1998 const enum dc_link_encoding_format link_encoding, 1999 struct dc_dsc_config *dsc_cfg) 2000 { 2001 bool is_dsc_possible = false; 2002 struct dsc_enc_caps dsc_enc_caps; 2003 unsigned int min_dsc_slice_count; 2004 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); 2005 2006 min_dsc_slice_count = get_min_dsc_slice_count_for_odm(dsc, &dsc_enc_caps, timing); 2007 2008 is_dsc_possible = setup_dsc_config(dsc_sink_caps, 2009 &dsc_enc_caps, 2010 target_bandwidth_kbps, 2011 timing, 2012 options, 2013 link_encoding, 2014 min_dsc_slice_count, 2015 dsc_cfg); 2016 return is_dsc_possible; 2017 } 2018 2019 uint32_t dc_dsc_stream_bandwidth_in_kbps(const struct dc_crtc_timing *timing, 2020 uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp) 2021 { 2022 uint32_t overhead_in_kbps; 2023 struct fixed31_32 bpp; 2024 struct fixed31_32 actual_bandwidth_in_kbps; 2025 2026 overhead_in_kbps = dc_dsc_stream_bandwidth_overhead_in_kbps( 2027 timing, num_slices_h, is_dp); 2028 bpp = dc_fixpt_from_fraction(bpp_x16, 16); 2029 actual_bandwidth_in_kbps = dc_fixpt_from_fraction(timing->pix_clk_100hz, 10); 2030 actual_bandwidth_in_kbps = dc_fixpt_mul(actual_bandwidth_in_kbps, bpp); 2031 actual_bandwidth_in_kbps = dc_fixpt_add_int(actual_bandwidth_in_kbps, overhead_in_kbps); 2032 return dc_fixpt_ceil(actual_bandwidth_in_kbps); 2033 } 2034 2035 uint32_t dc_dsc_stream_bandwidth_overhead_in_kbps( 2036 const struct dc_crtc_timing *timing, 2037 const uint32_t num_slices_h, 2038 const bool is_dp) 2039 { 2040 struct fixed31_32 max_dsc_overhead; 2041 struct fixed31_32 refresh_rate; 2042 2043 if (dsc_policy_disable_dsc_stream_overhead || !is_dp) 2044 return 0; 2045 2046 /* use target bpp that can take entire target bandwidth */ 2047 refresh_rate = dc_fixpt_from_int(timing->pix_clk_100hz); 2048 refresh_rate = dc_fixpt_div_int(refresh_rate, timing->h_total); 2049 refresh_rate = dc_fixpt_div_int(refresh_rate, timing->v_total); 2050 refresh_rate = dc_fixpt_mul_int(refresh_rate, 100); 2051 2052 max_dsc_overhead = dc_fixpt_from_int(num_slices_h); 2053 max_dsc_overhead = dc_fixpt_mul_int(max_dsc_overhead, timing->v_total); 2054 max_dsc_overhead = dc_fixpt_mul_int(max_dsc_overhead, 256); 2055 max_dsc_overhead = dc_fixpt_div_int(max_dsc_overhead, 1000); 2056 max_dsc_overhead = dc_fixpt_mul(max_dsc_overhead, refresh_rate); 2057 2058 return dc_fixpt_ceil(max_dsc_overhead); 2059 } 2060 2061 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, 2062 uint32_t max_target_bpp_limit_override_x16, 2063 struct dc_dsc_policy *policy, 2064 const enum dc_link_encoding_format link_encoding) 2065 { 2066 uint32_t bpc = 0; 2067 2068 policy->min_target_bpp = 0; 2069 policy->max_target_bpp = 0; 2070 2071 /* DSC Policy: Use minimum number of slices that fits the pixel clock */ 2072 policy->use_min_slices_h = true; 2073 2074 /* DSC Policy: Use max available slices 2075 * (in our case 4 for or 8, depending on the mode) 2076 */ 2077 policy->max_slices_h = 0; 2078 2079 /* DSC Policy: Use slice height recommended 2080 * by VESA DSC Spreadsheet user guide 2081 */ 2082 policy->min_slice_height = 108; 2083 2084 /* DSC Policy: follow DP specs with an internal upper limit to 16 bpp 2085 * for better interoperability 2086 */ 2087 switch (timing->display_color_depth) { 2088 case COLOR_DEPTH_888: 2089 bpc = 8; 2090 break; 2091 case COLOR_DEPTH_101010: 2092 bpc = 10; 2093 break; 2094 case COLOR_DEPTH_121212: 2095 bpc = 12; 2096 break; 2097 default: 2098 return; 2099 } 2100 switch (timing->pixel_encoding) { 2101 case PIXEL_ENCODING_RGB: 2102 case PIXEL_ENCODING_YCBCR444: 2103 case PIXEL_ENCODING_YCBCR422: /* assume no YCbCr422 native support */ 2104 /* DP specs limits to 8 */ 2105 policy->min_target_bpp = 8; 2106 /* DP specs limits to 3 x bpc */ 2107 policy->max_target_bpp = 3 * bpc; 2108 policy->ycbcr422_simple = true; 2109 if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR422 && link_encoding == DC_LINK_ENCODING_HDMI_FRL) { 2110 /* HDMI FRL YCbCr422 native support */ 2111 policy->min_target_bpp = 7; 2112 policy->max_target_bpp = 2 * bpc; 2113 policy->ycbcr422_simple = false; 2114 } 2115 break; 2116 case PIXEL_ENCODING_YCBCR420: 2117 /* DP specs limits to 6 */ 2118 policy->min_target_bpp = 6; 2119 /* DP specs limits to 1.5 x bpc assume bpc is an even number */ 2120 policy->max_target_bpp = bpc * 3 / 2; 2121 break; 2122 default: 2123 return; 2124 } 2125 2126 /* internal upper limit, default 16 bpp */ 2127 if (policy->max_target_bpp > dsc_policy_max_target_bpp_limit) 2128 policy->max_target_bpp = dsc_policy_max_target_bpp_limit; 2129 2130 /* apply override */ 2131 if (max_target_bpp_limit_override_x16 && policy->max_target_bpp > max_target_bpp_limit_override_x16 / 16) 2132 policy->max_target_bpp = max_target_bpp_limit_override_x16 / 16; 2133 2134 /* enable DSC when not needed, default false */ 2135 policy->enable_dsc_when_not_needed = dsc_policy_enable_dsc_when_not_needed; 2136 } 2137 2138 void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit) 2139 { 2140 dsc_policy_max_target_bpp_limit = limit; 2141 } 2142 2143 void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable) 2144 { 2145 dsc_policy_enable_dsc_when_not_needed = enable; 2146 } 2147 2148 void dc_dsc_policy_set_disable_dsc_stream_overhead(bool disable) 2149 { 2150 dsc_policy_disable_dsc_stream_overhead = disable; 2151 } 2152 2153 void dc_set_disable_128b_132b_stream_overhead(bool disable) 2154 { 2155 disable_128b_132b_stream_overhead = disable; 2156 } 2157 2158 void dc_dsc_get_default_config_option(const struct dc *dc, struct dc_dsc_config_options *options) 2159 { 2160 options->dsc_min_slice_height_override = dc->debug.dsc_min_slice_height_override; 2161 options->dsc_force_odm_hslice_override = dc->debug.force_odm_combine; 2162 options->max_target_bpp_limit_override_x16 = 0; 2163 options->slice_height_granularity = 1; 2164 options->force_dsc_when_not_needed = false; 2165 } 2166