1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 25 #include <linux/aperture.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/pci.h> 29 #include <linux/pm_runtime.h> 30 #include <linux/vga_switcheroo.h> 31 #include <linux/mmu_notifier.h> 32 #include <linux/dynamic_debug.h> 33 #include <linux/debugfs.h> 34 35 #include <drm/clients/drm_client_setup.h> 36 #include <drm/drm_drv.h> 37 #include <drm/drm_fbdev_ttm.h> 38 #include <drm/drm_gem_ttm_helper.h> 39 #include <drm/drm_ioctl.h> 40 #include <drm/drm_vblank.h> 41 42 #include <core/gpuobj.h> 43 #include <core/option.h> 44 #include <core/pci.h> 45 #include <core/tegra.h> 46 47 #include <nvif/driver.h> 48 #include <nvif/fifo.h> 49 #include <nvif/push006c.h> 50 #include <nvif/user.h> 51 #include <nvif/log.h> 52 53 #include <nvif/class.h> 54 #include <nvif/cl0002.h> 55 56 #include "nouveau_drv.h" 57 #include "nouveau_dma.h" 58 #include "nouveau_ttm.h" 59 #include "nouveau_gem.h" 60 #include "nouveau_vga.h" 61 #include "nouveau_led.h" 62 #include "nouveau_hwmon.h" 63 #include "nouveau_acpi.h" 64 #include "nouveau_bios.h" 65 #include "nouveau_ioctl.h" 66 #include "nouveau_abi16.h" 67 #include "nouveau_fence.h" 68 #include "nouveau_debugfs.h" 69 #include "nouveau_connector.h" 70 #include "nouveau_platform.h" 71 #include "nouveau_svm.h" 72 #include "nouveau_dmem.h" 73 #include "nouveau_exec.h" 74 #include "nouveau_uvmm.h" 75 #include "nouveau_sched.h" 76 77 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0, 78 "DRM_UT_CORE", 79 "DRM_UT_DRIVER", 80 "DRM_UT_KMS", 81 "DRM_UT_PRIME", 82 "DRM_UT_ATOMIC", 83 "DRM_UT_VBL", 84 "DRM_UT_STATE", 85 "DRM_UT_LEASE", 86 "DRM_UT_DP", 87 "DRM_UT_DRMRES"); 88 89 MODULE_PARM_DESC(config, "option string to pass to driver core"); 90 static char *nouveau_config; 91 module_param_named(config, nouveau_config, charp, 0400); 92 93 MODULE_PARM_DESC(debug, "debug string to pass to driver core"); 94 static char *nouveau_debug; 95 module_param_named(debug, nouveau_debug, charp, 0400); 96 97 MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); 98 static int nouveau_noaccel = 0; 99 module_param_named(noaccel, nouveau_noaccel, int, 0400); 100 101 MODULE_PARM_DESC(modeset, "enable driver (default: auto, " 102 "0 = disabled, 1 = enabled, 2 = headless)"); 103 int nouveau_modeset = -1; 104 module_param_named(modeset, nouveau_modeset, int, 0400); 105 106 MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)"); 107 static int nouveau_atomic = 0; 108 module_param_named(atomic, nouveau_atomic, int, 0400); 109 110 MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); 111 static int nouveau_runtime_pm = -1; 112 module_param_named(runpm, nouveau_runtime_pm, int, 0400); 113 114 static struct drm_driver driver_stub; 115 static struct drm_driver driver_pci; 116 static struct drm_driver driver_platform; 117 118 #ifdef CONFIG_DEBUG_FS 119 struct dentry *nouveau_debugfs_root; 120 121 /* 122 * gsp_logs - list of nvif_log GSP-RM logging buffers 123 * 124 * Head pointer to a a list of nvif_log buffers that is created for each GPU 125 * upon GSP shutdown if the "keep_gsp_logging" command-line parameter is 126 * specified. This is used to track the alternative debugfs entries for the 127 * GSP-RM logs. 128 */ 129 NVIF_LOGS_DECLARE(gsp_logs); 130 #endif 131 132 static u64 133 nouveau_pci_name(struct pci_dev *pdev) 134 { 135 u64 name = (u64)pci_domain_nr(pdev->bus) << 32; 136 name |= pdev->bus->number << 16; 137 name |= PCI_SLOT(pdev->devfn) << 8; 138 return name | PCI_FUNC(pdev->devfn); 139 } 140 141 static u64 142 nouveau_platform_name(struct platform_device *platformdev) 143 { 144 return platformdev->id; 145 } 146 147 static u64 148 nouveau_name(struct drm_device *dev) 149 { 150 if (dev_is_pci(dev->dev)) 151 return nouveau_pci_name(to_pci_dev(dev->dev)); 152 else 153 return nouveau_platform_name(to_platform_device(dev->dev)); 154 } 155 156 static inline bool 157 nouveau_cli_work_ready(struct dma_fence *fence) 158 { 159 unsigned long flags; 160 bool ret = true; 161 162 dma_fence_lock_irqsave(fence, flags); 163 if (!dma_fence_is_signaled_locked(fence)) 164 ret = false; 165 dma_fence_unlock_irqrestore(fence, flags); 166 167 if (ret == true) 168 dma_fence_put(fence); 169 return ret; 170 } 171 172 static void 173 nouveau_cli_work(struct work_struct *w) 174 { 175 struct nouveau_cli *cli = container_of(w, typeof(*cli), work); 176 struct nouveau_cli_work *work, *wtmp; 177 mutex_lock(&cli->lock); 178 list_for_each_entry_safe(work, wtmp, &cli->worker, head) { 179 if (!work->fence || nouveau_cli_work_ready(work->fence)) { 180 list_del(&work->head); 181 work->func(work); 182 } 183 } 184 mutex_unlock(&cli->lock); 185 } 186 187 static void 188 nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb) 189 { 190 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb); 191 schedule_work(&work->cli->work); 192 } 193 194 void 195 nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence, 196 struct nouveau_cli_work *work) 197 { 198 work->fence = dma_fence_get(fence); 199 work->cli = cli; 200 mutex_lock(&cli->lock); 201 list_add_tail(&work->head, &cli->worker); 202 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence)) 203 nouveau_cli_work_fence(fence, &work->cb); 204 mutex_unlock(&cli->lock); 205 } 206 207 static void 208 nouveau_cli_fini(struct nouveau_cli *cli) 209 { 210 struct nouveau_uvmm *uvmm = nouveau_cli_uvmm_locked(cli); 211 212 /* All our channels are dead now, which means all the fences they 213 * own are signalled, and all callback functions have been called. 214 * 215 * So, after flushing the workqueue, there should be nothing left. 216 */ 217 flush_work(&cli->work); 218 WARN_ON(!list_empty(&cli->worker)); 219 220 if (cli->sched) 221 nouveau_sched_destroy(&cli->sched); 222 if (uvmm) 223 nouveau_uvmm_fini(uvmm); 224 nouveau_vmm_fini(&cli->svm); 225 nouveau_vmm_fini(&cli->vmm); 226 nvif_mmu_dtor(&cli->mmu); 227 cli->device.object.map.ptr = NULL; 228 nvif_device_dtor(&cli->device); 229 mutex_lock(&cli->drm->client_mutex); 230 nvif_client_dtor(&cli->base); 231 mutex_unlock(&cli->drm->client_mutex); 232 } 233 234 static int 235 nouveau_cli_init(struct nouveau_drm *drm, const char *sname, 236 struct nouveau_cli *cli) 237 { 238 static const struct nvif_mclass 239 mems[] = { 240 { NVIF_CLASS_MEM_GF100, -1 }, 241 { NVIF_CLASS_MEM_NV50 , -1 }, 242 { NVIF_CLASS_MEM_NV04 , -1 }, 243 {} 244 }; 245 static const struct nvif_mclass 246 vmms[] = { 247 { NVIF_CLASS_VMM_GP100, -1 }, 248 { NVIF_CLASS_VMM_GM200, -1 }, 249 { NVIF_CLASS_VMM_GF100, -1 }, 250 { NVIF_CLASS_VMM_NV50 , -1 }, 251 { NVIF_CLASS_VMM_NV04 , -1 }, 252 {} 253 }; 254 int ret; 255 256 snprintf(cli->name, sizeof(cli->name), "%s", sname); 257 cli->drm = drm; 258 mutex_init(&cli->mutex); 259 260 INIT_WORK(&cli->work, nouveau_cli_work); 261 INIT_LIST_HEAD(&cli->worker); 262 mutex_init(&cli->lock); 263 264 mutex_lock(&drm->client_mutex); 265 ret = nvif_client_ctor(&drm->_client, cli->name, &cli->base); 266 mutex_unlock(&drm->client_mutex); 267 if (ret) { 268 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret); 269 goto done; 270 } 271 272 ret = nvif_device_ctor(&cli->base, "drmDevice", &cli->device); 273 if (ret) { 274 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret); 275 goto done; 276 } 277 278 cli->device.object.map.ptr = drm->device.object.map.ptr; 279 280 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", drm->mmu.object.oclass, 281 &cli->mmu); 282 if (ret) { 283 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret); 284 goto done; 285 } 286 287 ret = nvif_mclass(&cli->mmu.object, vmms); 288 if (ret < 0) { 289 NV_PRINTK(err, cli, "No supported VMM class\n"); 290 goto done; 291 } 292 293 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm); 294 if (ret) { 295 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret); 296 goto done; 297 } 298 299 ret = nvif_mclass(&cli->mmu.object, mems); 300 if (ret < 0) { 301 NV_PRINTK(err, cli, "No supported MEM class\n"); 302 goto done; 303 } 304 305 cli->mem = &mems[ret]; 306 307 /* Don't pass in the (shared) sched_wq in order to let 308 * nouveau_sched_create() create a dedicated one for VM_BIND jobs. 309 * 310 * This is required to ensure that for VM_BIND jobs free_job() work and 311 * run_job() work can always run concurrently and hence, free_job() work 312 * can never stall run_job() work. For EXEC jobs we don't have this 313 * requirement, since EXEC job's free_job() does not require to take any 314 * locks which indirectly or directly are held for allocations 315 * elsewhere. 316 */ 317 ret = nouveau_sched_create(&cli->sched, drm, NULL, 1); 318 if (ret) 319 goto done; 320 321 return 0; 322 done: 323 if (ret) 324 nouveau_cli_fini(cli); 325 return ret; 326 } 327 328 static void 329 nouveau_accel_ce_fini(struct nouveau_drm *drm) 330 { 331 nouveau_channel_idle(drm->cechan); 332 nvif_object_dtor(&drm->ttm.copy); 333 nouveau_channel_del(&drm->cechan); 334 } 335 336 static void 337 nouveau_accel_ce_init(struct nouveau_drm *drm) 338 { 339 struct nvif_device *device = &drm->client.device; 340 u64 runm; 341 int ret = 0; 342 343 /* Allocate channel that has access to a (preferably async) copy 344 * engine, to use for TTM buffer moves. 345 */ 346 runm = nvif_fifo_runlist_ce(device); 347 if (!runm) { 348 NV_DEBUG(drm, "no ce runlist\n"); 349 return; 350 } 351 352 ret = nouveau_channel_new(&drm->client, true, runm, NvDmaFB, NvDmaTT, &drm->cechan); 353 if (ret) 354 NV_ERROR(drm, "failed to create ce channel, %d\n", ret); 355 } 356 357 static void 358 nouveau_accel_gr_fini(struct nouveau_drm *drm) 359 { 360 nouveau_channel_idle(drm->channel); 361 nvif_object_dtor(&drm->ntfy); 362 nvkm_gpuobj_del(&drm->notify); 363 nouveau_channel_del(&drm->channel); 364 } 365 366 static void 367 nouveau_accel_gr_init(struct nouveau_drm *drm) 368 { 369 struct nvif_device *device = &drm->client.device; 370 u64 runm; 371 int ret; 372 373 /* Allocate channel that has access to the graphics engine. */ 374 runm = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR); 375 if (!runm) { 376 NV_DEBUG(drm, "no gr runlist\n"); 377 return; 378 } 379 380 ret = nouveau_channel_new(&drm->client, false, runm, NvDmaFB, NvDmaTT, &drm->channel); 381 if (ret) { 382 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); 383 nouveau_accel_gr_fini(drm); 384 return; 385 } 386 387 /* A SW class is used on pre-NV50 HW to assist with handling the 388 * synchronisation of page flips, as well as to implement fences 389 * on TNT/TNT2 HW that lacks any kind of support in host. 390 */ 391 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) { 392 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw", 393 NVDRM_NVSW, nouveau_abi16_swclass(drm), 394 NULL, 0, &drm->channel->nvsw); 395 396 if (ret == 0 && device->info.chipset >= 0x11) { 397 ret = nvif_object_ctor(&drm->channel->user, "drmBlit", 398 0x005f, 0x009f, 399 NULL, 0, &drm->channel->blit); 400 } 401 402 if (ret == 0) { 403 struct nvif_push *push = &drm->channel->chan.push; 404 405 ret = PUSH_WAIT(push, 8); 406 if (ret == 0) { 407 if (device->info.chipset >= 0x11) { 408 PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle); 409 PUSH_NVSQ(push, NV09F, 0x0120, 0, 410 0x0124, 1, 411 0x0128, 2); 412 } 413 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle); 414 } 415 } 416 417 if (ret) { 418 NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret); 419 nouveau_accel_gr_fini(drm); 420 return; 421 } 422 } 423 424 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason, 425 * even if notification is never requested, so, allocate a ctxdma on 426 * any GPU where it's possible we'll end up using M2MF for BO moves. 427 */ 428 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { 429 ret = nvkm_gpuobj_new(nvxx_device(drm), 32, 0, false, NULL, &drm->notify); 430 if (ret) { 431 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); 432 nouveau_accel_gr_fini(drm); 433 return; 434 } 435 436 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy", 437 NvNotify0, NV_DMA_IN_MEMORY, 438 &(struct nv_dma_v0) { 439 .target = NV_DMA_V0_TARGET_VRAM, 440 .access = NV_DMA_V0_ACCESS_RDWR, 441 .start = drm->notify->addr, 442 .limit = drm->notify->addr + 31 443 }, sizeof(struct nv_dma_v0), 444 &drm->ntfy); 445 if (ret) { 446 nouveau_accel_gr_fini(drm); 447 return; 448 } 449 } 450 } 451 452 static void 453 nouveau_accel_fini(struct nouveau_drm *drm) 454 { 455 nouveau_accel_ce_fini(drm); 456 nouveau_accel_gr_fini(drm); 457 if (drm->fence) 458 nouveau_fence(drm)->dtor(drm); 459 nouveau_channels_fini(drm); 460 } 461 462 static void 463 nouveau_accel_init(struct nouveau_drm *drm) 464 { 465 struct nvif_device *device = &drm->client.device; 466 struct nvif_sclass *sclass; 467 int ret, i, n; 468 469 if (nouveau_noaccel) 470 return; 471 472 /* Initialise global support for channels, and synchronisation. */ 473 ret = nouveau_channels_init(drm); 474 if (ret) 475 return; 476 477 /*XXX: this is crap, but the fence/channel stuff is a little 478 * backwards in some places. this will be fixed. 479 */ 480 ret = n = nvif_object_sclass_get(&device->object, &sclass); 481 if (ret < 0) 482 return; 483 484 for (ret = -ENOSYS, i = 0; i < n; i++) { 485 switch (sclass[i].oclass) { 486 case NV03_CHANNEL_DMA: 487 ret = nv04_fence_create(drm); 488 break; 489 case NV10_CHANNEL_DMA: 490 ret = nv10_fence_create(drm); 491 break; 492 case NV17_CHANNEL_DMA: 493 case NV40_CHANNEL_DMA: 494 ret = nv17_fence_create(drm); 495 break; 496 case NV50_CHANNEL_GPFIFO: 497 ret = nv50_fence_create(drm); 498 break; 499 case G82_CHANNEL_GPFIFO: 500 ret = nv84_fence_create(drm); 501 break; 502 case FERMI_CHANNEL_GPFIFO: 503 case KEPLER_CHANNEL_GPFIFO_A: 504 case KEPLER_CHANNEL_GPFIFO_B: 505 case MAXWELL_CHANNEL_GPFIFO_A: 506 case PASCAL_CHANNEL_GPFIFO_A: 507 ret = nvc0_fence_create(drm); 508 break; 509 case VOLTA_CHANNEL_GPFIFO_A: 510 case TURING_CHANNEL_GPFIFO_A: 511 case AMPERE_CHANNEL_GPFIFO_A: 512 case AMPERE_CHANNEL_GPFIFO_B: 513 case HOPPER_CHANNEL_GPFIFO_A: 514 case BLACKWELL_CHANNEL_GPFIFO_A: 515 case BLACKWELL_CHANNEL_GPFIFO_B: 516 ret = gv100_fence_create(drm); 517 break; 518 default: 519 break; 520 } 521 } 522 523 nvif_object_sclass_put(&sclass); 524 if (ret) { 525 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); 526 nouveau_accel_fini(drm); 527 return; 528 } 529 530 /* Volta requires access to a doorbell register for kickoff. */ 531 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) { 532 ret = nvif_user_ctor(device, "drmUsermode"); 533 if (ret) 534 return; 535 } 536 537 /* Allocate channels we need to support various functions. */ 538 nouveau_accel_gr_init(drm); 539 nouveau_accel_ce_init(drm); 540 541 /* Initialise accelerated TTM buffer moves. */ 542 nouveau_bo_move_init(drm); 543 } 544 545 static void __printf(2, 3) 546 nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...) 547 { 548 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 549 struct va_format vaf; 550 va_list va; 551 552 va_start(va, fmt); 553 vaf.fmt = fmt; 554 vaf.va = &va; 555 NV_ERROR(drm, "%pV", &vaf); 556 va_end(va); 557 } 558 559 static void __printf(2, 3) 560 nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...) 561 { 562 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent); 563 struct va_format vaf; 564 va_list va; 565 566 va_start(va, fmt); 567 vaf.fmt = fmt; 568 vaf.va = &va; 569 NV_DEBUG(drm, "%pV", &vaf); 570 va_end(va); 571 } 572 573 static const struct nvif_parent_func 574 nouveau_parent = { 575 .debugf = nouveau_drm_debugf, 576 .errorf = nouveau_drm_errorf, 577 }; 578 579 static void 580 nouveau_drm_device_fini(struct nouveau_drm *drm) 581 { 582 struct drm_device *dev = drm->dev; 583 struct nouveau_cli *cli, *temp_cli; 584 585 if (nouveau_pmops_runtime()) { 586 pm_runtime_get_sync(dev->dev); 587 pm_runtime_forbid(dev->dev); 588 } 589 590 nouveau_led_fini(dev); 591 nouveau_dmem_fini(drm); 592 nouveau_svm_fini(drm); 593 nouveau_hwmon_fini(dev); 594 nouveau_debugfs_fini(drm); 595 596 if (dev->mode_config.num_crtc) 597 nouveau_display_fini(dev, false, false); 598 nouveau_display_destroy(dev); 599 600 nouveau_accel_fini(drm); 601 nouveau_bios_takedown(dev); 602 603 nouveau_ttm_fini(drm); 604 nouveau_vga_fini(drm); 605 606 /* 607 * There may be existing clients from as-yet unclosed files. For now, 608 * clean them up here rather than deferring until the file is closed, 609 * but this likely not correct if we want to support hot-unplugging 610 * properly. 611 */ 612 mutex_lock(&drm->clients_lock); 613 list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) { 614 list_del(&cli->head); 615 mutex_lock(&cli->mutex); 616 if (cli->abi16) 617 nouveau_abi16_fini(cli->abi16); 618 mutex_unlock(&cli->mutex); 619 nouveau_cli_fini(cli); 620 kfree(cli); 621 } 622 mutex_unlock(&drm->clients_lock); 623 624 nouveau_cli_fini(&drm->client); 625 destroy_workqueue(drm->sched_wq); 626 mutex_destroy(&drm->clients_lock); 627 } 628 629 static int 630 nouveau_drm_device_init(struct nouveau_drm *drm) 631 { 632 struct drm_device *dev = drm->dev; 633 int ret; 634 635 drm->sched_wq = alloc_workqueue("nouveau_sched_wq_shared", 0, 636 WQ_MAX_ACTIVE); 637 if (!drm->sched_wq) 638 return -ENOMEM; 639 640 ret = nouveau_cli_init(drm, "DRM", &drm->client); 641 if (ret) 642 goto fail_wq; 643 644 INIT_LIST_HEAD(&drm->clients); 645 mutex_init(&drm->clients_lock); 646 spin_lock_init(&drm->tile.lock); 647 648 /* workaround an odd issue on nvc1 by disabling the device's 649 * nosnoop capability. hopefully won't cause issues until a 650 * better fix is found - assuming there is one... 651 */ 652 if (drm->client.device.info.chipset == 0xc1) 653 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000); 654 655 nouveau_vga_init(drm); 656 657 ret = nouveau_ttm_init(drm); 658 if (ret) 659 goto fail_ttm; 660 661 ret = nouveau_bios_init(dev); 662 if (ret) 663 goto fail_bios; 664 665 nouveau_accel_init(drm); 666 667 ret = nouveau_display_create(dev); 668 if (ret) 669 goto fail_dispctor; 670 671 if (dev->mode_config.num_crtc) { 672 ret = nouveau_display_init(dev, false, false); 673 if (ret) 674 goto fail_dispinit; 675 } 676 677 nouveau_debugfs_init(drm); 678 nouveau_hwmon_init(dev); 679 nouveau_svm_init(drm); 680 nouveau_dmem_init(drm); 681 nouveau_led_init(dev); 682 683 if (nouveau_pmops_runtime()) { 684 pm_runtime_use_autosuspend(dev->dev); 685 pm_runtime_set_autosuspend_delay(dev->dev, 5000); 686 pm_runtime_set_active(dev->dev); 687 pm_runtime_allow(dev->dev); 688 pm_runtime_mark_last_busy(dev->dev); 689 pm_runtime_put(dev->dev); 690 } 691 692 ret = drm_dev_register(drm->dev, 0); 693 if (ret) { 694 nouveau_drm_device_fini(drm); 695 return ret; 696 } 697 698 return 0; 699 fail_dispinit: 700 nouveau_display_destroy(dev); 701 fail_dispctor: 702 nouveau_accel_fini(drm); 703 nouveau_bios_takedown(dev); 704 fail_bios: 705 nouveau_ttm_fini(drm); 706 fail_ttm: 707 nouveau_vga_fini(drm); 708 nouveau_cli_fini(&drm->client); 709 fail_wq: 710 destroy_workqueue(drm->sched_wq); 711 return ret; 712 } 713 714 static void 715 nouveau_drm_device_del(struct nouveau_drm *drm) 716 { 717 if (drm->dev) 718 drm_dev_put(drm->dev); 719 720 nvif_mmu_dtor(&drm->mmu); 721 nvif_device_dtor(&drm->device); 722 nvif_client_dtor(&drm->_client); 723 nvif_parent_dtor(&drm->parent); 724 725 mutex_destroy(&drm->client_mutex); 726 kfree(drm); 727 } 728 729 static struct nouveau_drm * 730 nouveau_drm_device_new(const struct drm_driver *drm_driver, struct device *parent, 731 struct nvkm_device *device) 732 { 733 static const struct nvif_mclass 734 mmus[] = { 735 { NVIF_CLASS_MMU_GF100, -1 }, 736 { NVIF_CLASS_MMU_NV50 , -1 }, 737 { NVIF_CLASS_MMU_NV04 , -1 }, 738 {} 739 }; 740 struct nouveau_drm *drm; 741 int ret; 742 743 drm = kzalloc_obj(*drm); 744 if (!drm) 745 return ERR_PTR(-ENOMEM); 746 747 drm->nvkm = device; 748 749 drm->dev = drm_dev_alloc(drm_driver, parent); 750 if (IS_ERR(drm->dev)) { 751 ret = PTR_ERR(drm->dev); 752 goto done; 753 } 754 755 drm->dev->dev_private = drm; 756 dev_set_drvdata(parent, drm); 757 758 nvif_parent_ctor(&nouveau_parent, &drm->parent); 759 mutex_init(&drm->client_mutex); 760 drm->_client.object.parent = &drm->parent; 761 762 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, "drm", 763 nouveau_name(drm->dev), &drm->_client); 764 if (ret) 765 goto done; 766 767 ret = nvif_device_ctor(&drm->_client, "drmDevice", &drm->device); 768 if (ret) { 769 NV_ERROR(drm, "Device allocation failed: %d\n", ret); 770 goto done; 771 } 772 773 ret = nvif_device_map(&drm->device); 774 if (ret) { 775 NV_ERROR(drm, "Failed to map PRI: %d\n", ret); 776 goto done; 777 } 778 779 ret = nvif_mclass(&drm->device.object, mmus); 780 if (ret < 0) { 781 NV_ERROR(drm, "No supported MMU class\n"); 782 goto done; 783 } 784 785 ret = nvif_mmu_ctor(&drm->device.object, "drmMmu", mmus[ret].oclass, &drm->mmu); 786 if (ret) { 787 NV_ERROR(drm, "MMU allocation failed: %d\n", ret); 788 goto done; 789 } 790 791 done: 792 if (ret) { 793 nouveau_drm_device_del(drm); 794 drm = NULL; 795 } 796 797 return ret ? ERR_PTR(ret) : drm; 798 } 799 800 /* 801 * On some Intel PCIe bridge controllers doing a 802 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear. 803 * Skipping the intermediate D3hot step seems to make it work again. This is 804 * probably caused by not meeting the expectation the involved AML code has 805 * when the GPU is put into D3hot state before invoking it. 806 * 807 * This leads to various manifestations of this issue: 808 * - AML code execution to power on the GPU hits an infinite loop (as the 809 * code waits on device memory to change). 810 * - kernel crashes, as all PCI reads return -1, which most code isn't able 811 * to handle well enough. 812 * 813 * In all cases dmesg will contain at least one line like this: 814 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3' 815 * followed by a lot of nouveau timeouts. 816 * 817 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not 818 * documented PCI config space register 0x248 of the Intel PCIe bridge 819 * controller (0x1901) in order to change the state of the PCIe link between 820 * the PCIe port and the GPU. There are alternative code paths using other 821 * registers, which seem to work fine (executed pre Windows 8): 822 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved') 823 * - 0xb0 bit 0x10 (link disable) 824 * Changing the conditions inside the firmware by poking into the relevant 825 * addresses does resolve the issue, but it seemed to be ACPI private memory 826 * and not any device accessible memory at all, so there is no portable way of 827 * changing the conditions. 828 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared. 829 * 830 * The only systems where this behavior can be seen are hybrid graphics laptops 831 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether 832 * this issue only occurs in combination with listed Intel PCIe bridge 833 * controllers and the mentioned GPUs or other devices as well. 834 * 835 * documentation on the PCIe bridge controller can be found in the 836 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2" 837 * Section "12 PCI Express* Controller (x16) Registers" 838 */ 839 840 static void quirk_broken_nv_runpm(struct pci_dev *pdev) 841 { 842 struct nouveau_drm *drm = pci_get_drvdata(pdev); 843 struct pci_dev *bridge = pci_upstream_bridge(pdev); 844 845 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL) 846 return; 847 848 switch (bridge->device) { 849 case 0x1901: 850 drm->old_pm_cap = pdev->pm_cap; 851 pdev->pm_cap = 0; 852 NV_INFO(drm, "Disabling PCI power management to avoid bug\n"); 853 break; 854 } 855 } 856 857 static int nouveau_drm_probe(struct pci_dev *pdev, 858 const struct pci_device_id *pent) 859 { 860 struct nvkm_device *device; 861 struct nouveau_drm *drm; 862 const struct drm_format_info *format; 863 int ret; 864 865 if (vga_switcheroo_client_probe_defer(pdev)) 866 return -EPROBE_DEFER; 867 868 /* We need to check that the chipset is supported before booting 869 * fbdev off the hardware, as there's no way to put it back. 870 */ 871 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, &device); 872 if (ret) 873 return ret; 874 875 /* Remove conflicting drivers (vesafb, efifb etc). */ 876 ret = aperture_remove_conflicting_pci_devices(pdev, driver_pci.name); 877 if (ret) 878 return ret; 879 880 pci_set_master(pdev); 881 882 if (nouveau_atomic) 883 driver_pci.driver_features |= DRIVER_ATOMIC; 884 885 drm = nouveau_drm_device_new(&driver_pci, &pdev->dev, device); 886 if (IS_ERR(drm)) { 887 ret = PTR_ERR(drm); 888 goto fail_nvkm; 889 } 890 891 ret = pci_enable_device(pdev); 892 if (ret) 893 goto fail_drm; 894 895 ret = nouveau_drm_device_init(drm); 896 if (ret) 897 goto fail_pci; 898 899 if (drm->client.device.info.ram_size <= 32 * 1024 * 1024) 900 format = drm_format_info(DRM_FORMAT_C8); 901 else 902 format = NULL; 903 904 drm_client_setup(drm->dev, format); 905 906 quirk_broken_nv_runpm(pdev); 907 return 0; 908 909 fail_pci: 910 pci_disable_device(pdev); 911 fail_drm: 912 nouveau_drm_device_del(drm); 913 fail_nvkm: 914 nvkm_device_del(&device); 915 return ret; 916 } 917 918 void 919 nouveau_drm_device_remove(struct nouveau_drm *drm) 920 { 921 struct nvkm_device *device = drm->nvkm; 922 923 drm_dev_unplug(drm->dev); 924 925 nouveau_drm_device_fini(drm); 926 nouveau_drm_device_del(drm); 927 nvkm_device_del(&device); 928 } 929 930 static void 931 nouveau_drm_remove(struct pci_dev *pdev) 932 { 933 struct nouveau_drm *drm = pci_get_drvdata(pdev); 934 935 /* revert our workaround */ 936 if (drm->old_pm_cap) 937 pdev->pm_cap = drm->old_pm_cap; 938 nouveau_drm_device_remove(drm); 939 pci_disable_device(pdev); 940 } 941 942 static int 943 nouveau_do_suspend(struct nouveau_drm *drm, bool runtime) 944 { 945 struct drm_device *dev = drm->dev; 946 struct ttm_resource_manager *man; 947 int ret; 948 949 nouveau_svm_suspend(drm); 950 nouveau_dmem_suspend(drm); 951 nouveau_led_suspend(dev); 952 953 if (dev->mode_config.num_crtc) { 954 NV_DEBUG(drm, "suspending display...\n"); 955 ret = nouveau_display_suspend(dev, runtime); 956 if (ret) 957 return ret; 958 } 959 960 NV_DEBUG(drm, "evicting buffers...\n"); 961 962 man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM); 963 ttm_resource_manager_evict_all(&drm->ttm.bdev, man); 964 965 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n"); 966 if (drm->cechan) { 967 ret = nouveau_channel_idle(drm->cechan); 968 if (ret) 969 goto fail_display; 970 } 971 972 if (drm->channel) { 973 ret = nouveau_channel_idle(drm->channel); 974 if (ret) 975 goto fail_display; 976 } 977 978 NV_DEBUG(drm, "suspending fence...\n"); 979 if (drm->fence && nouveau_fence(drm)->suspend) { 980 if (!nouveau_fence(drm)->suspend(drm)) { 981 ret = -ENOMEM; 982 goto fail_display; 983 } 984 } 985 986 NV_DEBUG(drm, "suspending object tree...\n"); 987 ret = nvif_client_suspend(&drm->_client, runtime); 988 if (ret) 989 goto fail_client; 990 991 return 0; 992 993 fail_client: 994 if (drm->fence && nouveau_fence(drm)->resume) 995 nouveau_fence(drm)->resume(drm); 996 997 fail_display: 998 if (dev->mode_config.num_crtc) { 999 NV_DEBUG(drm, "resuming display...\n"); 1000 nouveau_display_resume(dev, runtime); 1001 } 1002 return ret; 1003 } 1004 1005 static int 1006 nouveau_do_resume(struct nouveau_drm *drm, bool runtime) 1007 { 1008 struct drm_device *dev = drm->dev; 1009 int ret = 0; 1010 1011 NV_DEBUG(drm, "resuming object tree...\n"); 1012 ret = nvif_client_resume(&drm->_client); 1013 if (ret) { 1014 NV_ERROR(drm, "Client resume failed with error: %d\n", ret); 1015 return ret; 1016 } 1017 1018 NV_DEBUG(drm, "resuming fence...\n"); 1019 if (drm->fence && nouveau_fence(drm)->resume) 1020 nouveau_fence(drm)->resume(drm); 1021 1022 nouveau_run_vbios_init(dev); 1023 1024 if (dev->mode_config.num_crtc) { 1025 NV_DEBUG(drm, "resuming display...\n"); 1026 nouveau_display_resume(dev, runtime); 1027 } 1028 1029 nouveau_led_resume(dev); 1030 nouveau_dmem_resume(drm); 1031 nouveau_svm_resume(drm); 1032 return 0; 1033 } 1034 1035 int 1036 nouveau_pmops_suspend(struct device *dev) 1037 { 1038 struct pci_dev *pdev = to_pci_dev(dev); 1039 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1040 int ret; 1041 1042 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1043 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1044 return 0; 1045 1046 ret = nouveau_do_suspend(drm, false); 1047 if (ret) 1048 return ret; 1049 1050 pci_save_state(pdev); 1051 pci_disable_device(pdev); 1052 pci_set_power_state(pdev, PCI_D3hot); 1053 udelay(200); 1054 return 0; 1055 } 1056 1057 int 1058 nouveau_pmops_resume(struct device *dev) 1059 { 1060 struct pci_dev *pdev = to_pci_dev(dev); 1061 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1062 int ret; 1063 1064 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1065 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1066 return 0; 1067 1068 pci_set_power_state(pdev, PCI_D0); 1069 pci_restore_state(pdev); 1070 ret = pci_enable_device(pdev); 1071 if (ret) 1072 return ret; 1073 pci_set_master(pdev); 1074 1075 ret = nouveau_do_resume(drm, false); 1076 1077 /* Monitors may have been connected / disconnected during suspend */ 1078 nouveau_display_hpd_resume(drm); 1079 1080 return ret; 1081 } 1082 1083 static void 1084 nouveau_drm_shutdown(struct pci_dev *pdev) 1085 { 1086 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1087 int ret; 1088 1089 if (!drm) 1090 return; 1091 1092 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1093 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1094 return; 1095 1096 ret = nouveau_do_suspend(drm, false); 1097 if (ret) 1098 NV_ERROR(drm, "shutdown suspend failed with: %d\n", ret); 1099 1100 pci_save_state(pdev); 1101 pci_disable_device(pdev); 1102 pci_set_power_state(pdev, PCI_D3hot); 1103 /* 1104 * This is just to give the pci power transition time to settle 1105 * before an immediate kexec jump. it’s mirroring the existing 1106 * nouveau_pmops_suspend() behavior, which already does 1107 * udelay(200) right after pci_set_power_state(..., pci_d3hot). In 1108 * ->shutdown() we’re allowed to sleep, so I used usleep_range() 1109 * instead of a busy-wait udelay(). 1110 */ 1111 usleep_range(200, 400); 1112 } 1113 1114 static int 1115 nouveau_pmops_freeze(struct device *dev) 1116 { 1117 struct nouveau_drm *drm = dev_get_drvdata(dev); 1118 1119 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1120 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1121 return 0; 1122 1123 return nouveau_do_suspend(drm, false); 1124 } 1125 1126 static int 1127 nouveau_pmops_thaw(struct device *dev) 1128 { 1129 struct nouveau_drm *drm = dev_get_drvdata(dev); 1130 1131 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF || 1132 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) 1133 return 0; 1134 1135 return nouveau_do_resume(drm, false); 1136 } 1137 1138 bool 1139 nouveau_pmops_runtime(void) 1140 { 1141 if (nouveau_runtime_pm == -1) 1142 return nouveau_is_optimus() || nouveau_is_v1_dsm(); 1143 return nouveau_runtime_pm == 1; 1144 } 1145 1146 static int 1147 nouveau_pmops_runtime_suspend(struct device *dev) 1148 { 1149 struct pci_dev *pdev = to_pci_dev(dev); 1150 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1151 int ret; 1152 1153 if (!nouveau_pmops_runtime()) { 1154 pm_runtime_forbid(dev); 1155 return -EBUSY; 1156 } 1157 1158 nouveau_switcheroo_optimus_dsm(); 1159 ret = nouveau_do_suspend(drm, true); 1160 pci_save_state(pdev); 1161 pci_disable_device(pdev); 1162 pci_ignore_hotplug(pdev); 1163 pci_set_power_state(pdev, PCI_D3cold); 1164 drm->dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 1165 return ret; 1166 } 1167 1168 static int 1169 nouveau_pmops_runtime_resume(struct device *dev) 1170 { 1171 struct pci_dev *pdev = to_pci_dev(dev); 1172 struct nouveau_drm *drm = pci_get_drvdata(pdev); 1173 struct nvif_device *device = &drm->client.device; 1174 int ret; 1175 1176 if (!nouveau_pmops_runtime()) { 1177 pm_runtime_forbid(dev); 1178 return -EBUSY; 1179 } 1180 1181 pci_set_power_state(pdev, PCI_D0); 1182 pci_restore_state(pdev); 1183 ret = pci_enable_device(pdev); 1184 if (ret) 1185 return ret; 1186 pci_set_master(pdev); 1187 1188 ret = nouveau_do_resume(drm, true); 1189 if (ret) { 1190 NV_ERROR(drm, "resume failed with: %d\n", ret); 1191 return ret; 1192 } 1193 1194 /* do magic */ 1195 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); 1196 drm->dev->switch_power_state = DRM_SWITCH_POWER_ON; 1197 1198 /* Monitors may have been connected / disconnected during suspend */ 1199 nouveau_display_hpd_resume(drm); 1200 1201 return ret; 1202 } 1203 1204 static int 1205 nouveau_pmops_runtime_idle(struct device *dev) 1206 { 1207 if (!nouveau_pmops_runtime()) { 1208 pm_runtime_forbid(dev); 1209 return -EBUSY; 1210 } 1211 1212 pm_runtime_mark_last_busy(dev); 1213 pm_runtime_autosuspend(dev); 1214 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 1215 return 1; 1216 } 1217 1218 static int 1219 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) 1220 { 1221 struct nouveau_drm *drm = nouveau_drm(dev); 1222 struct nouveau_cli *cli; 1223 char name[32]; 1224 int ret; 1225 1226 /* need to bring up power immediately if opening device */ 1227 ret = pm_runtime_get_sync(dev->dev); 1228 if (ret < 0 && ret != -EACCES) { 1229 pm_runtime_put_autosuspend(dev->dev); 1230 return ret; 1231 } 1232 1233 rcu_read_lock(); 1234 snprintf(name, sizeof(name), "%s[%d]", 1235 current->comm, pid_nr(rcu_dereference(fpriv->pid))); 1236 rcu_read_unlock(); 1237 1238 if (!(cli = kzalloc_obj(*cli))) { 1239 ret = -ENOMEM; 1240 goto done; 1241 } 1242 1243 ret = nouveau_cli_init(drm, name, cli); 1244 if (ret) 1245 goto done; 1246 1247 fpriv->driver_priv = cli; 1248 1249 mutex_lock(&drm->clients_lock); 1250 list_add(&cli->head, &drm->clients); 1251 mutex_unlock(&drm->clients_lock); 1252 1253 done: 1254 if (ret && cli) { 1255 nouveau_cli_fini(cli); 1256 kfree(cli); 1257 } 1258 1259 pm_runtime_mark_last_busy(dev->dev); 1260 pm_runtime_put_autosuspend(dev->dev); 1261 return ret; 1262 } 1263 1264 static void 1265 nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) 1266 { 1267 struct nouveau_cli *cli = nouveau_cli(fpriv); 1268 struct nouveau_drm *drm = nouveau_drm(dev); 1269 int dev_index; 1270 1271 /* 1272 * The device is gone, and as it currently stands all clients are 1273 * cleaned up in the removal codepath. In the future this may change 1274 * so that we can support hot-unplugging, but for now we immediately 1275 * return to avoid a double-free situation. 1276 */ 1277 if (!drm_dev_enter(dev, &dev_index)) 1278 return; 1279 1280 pm_runtime_get_sync(dev->dev); 1281 1282 mutex_lock(&cli->mutex); 1283 if (cli->abi16) 1284 nouveau_abi16_fini(cli->abi16); 1285 mutex_unlock(&cli->mutex); 1286 1287 mutex_lock(&drm->clients_lock); 1288 list_del(&cli->head); 1289 mutex_unlock(&drm->clients_lock); 1290 1291 nouveau_cli_fini(cli); 1292 kfree(cli); 1293 pm_runtime_mark_last_busy(dev->dev); 1294 pm_runtime_put_autosuspend(dev->dev); 1295 drm_dev_exit(dev_index); 1296 } 1297 1298 static const struct drm_ioctl_desc 1299 nouveau_ioctls[] = { 1300 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW), 1301 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1302 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW), 1303 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW), 1304 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW), 1305 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW), 1306 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW), 1307 DRM_IOCTL_DEF_DRV(NOUVEAU_GET_ZCULL_INFO, nouveau_abi16_ioctl_get_zcull_info, DRM_RENDER_ALLOW), 1308 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW), 1309 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW), 1310 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW), 1311 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW), 1312 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW), 1313 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW), 1314 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW), 1315 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_INIT, nouveau_uvmm_ioctl_vm_init, DRM_RENDER_ALLOW), 1316 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_BIND, nouveau_uvmm_ioctl_vm_bind, DRM_RENDER_ALLOW), 1317 DRM_IOCTL_DEF_DRV(NOUVEAU_EXEC, nouveau_exec_ioctl_exec, DRM_RENDER_ALLOW), 1318 }; 1319 1320 long 1321 nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 1322 { 1323 struct drm_file *filp = file->private_data; 1324 struct drm_device *dev = filp->minor->dev; 1325 long ret; 1326 1327 ret = pm_runtime_get_sync(dev->dev); 1328 if (ret < 0 && ret != -EACCES) { 1329 pm_runtime_put_autosuspend(dev->dev); 1330 return ret; 1331 } 1332 1333 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { 1334 case DRM_NOUVEAU_NVIF: 1335 ret = nouveau_abi16_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); 1336 break; 1337 default: 1338 ret = drm_ioctl(file, cmd, arg); 1339 break; 1340 } 1341 1342 pm_runtime_mark_last_busy(dev->dev); 1343 pm_runtime_put_autosuspend(dev->dev); 1344 return ret; 1345 } 1346 1347 static const struct file_operations 1348 nouveau_driver_fops = { 1349 .owner = THIS_MODULE, 1350 .open = drm_open, 1351 .release = drm_release, 1352 .unlocked_ioctl = nouveau_drm_ioctl, 1353 .mmap = drm_gem_mmap, 1354 .poll = drm_poll, 1355 .read = drm_read, 1356 #if defined(CONFIG_COMPAT) 1357 .compat_ioctl = nouveau_compat_ioctl, 1358 #endif 1359 .llseek = noop_llseek, 1360 .fop_flags = FOP_UNSIGNED_OFFSET, 1361 }; 1362 1363 static struct drm_driver 1364 driver_stub = { 1365 .driver_features = DRIVER_GEM | 1366 DRIVER_SYNCOBJ | DRIVER_SYNCOBJ_TIMELINE | 1367 DRIVER_GEM_GPUVA | 1368 DRIVER_MODESET | 1369 DRIVER_RENDER, 1370 .open = nouveau_drm_open, 1371 .postclose = nouveau_drm_postclose, 1372 1373 #if defined(CONFIG_DEBUG_FS) 1374 .debugfs_init = nouveau_drm_debugfs_init, 1375 #endif 1376 1377 .ioctls = nouveau_ioctls, 1378 .num_ioctls = ARRAY_SIZE(nouveau_ioctls), 1379 .fops = &nouveau_driver_fops, 1380 1381 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, 1382 1383 .dumb_create = nouveau_display_dumb_create, 1384 .dumb_map_offset = drm_gem_ttm_dumb_map_offset, 1385 1386 DRM_FBDEV_TTM_DRIVER_OPS, 1387 1388 .name = DRIVER_NAME, 1389 .desc = DRIVER_DESC, 1390 .major = DRIVER_MAJOR, 1391 .minor = DRIVER_MINOR, 1392 .patchlevel = DRIVER_PATCHLEVEL, 1393 }; 1394 1395 static struct pci_device_id 1396 nouveau_drm_pci_table[] = { 1397 { 1398 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), 1399 .class = PCI_BASE_CLASS_DISPLAY << 16, 1400 .class_mask = 0xff << 16, 1401 }, 1402 { 1403 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), 1404 .class = PCI_BASE_CLASS_DISPLAY << 16, 1405 .class_mask = 0xff << 16, 1406 }, 1407 {} 1408 }; 1409 1410 static void nouveau_display_options(void) 1411 { 1412 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); 1413 1414 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); 1415 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); 1416 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); 1417 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); 1418 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); 1419 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); 1420 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); 1421 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); 1422 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); 1423 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); 1424 } 1425 1426 static const struct dev_pm_ops nouveau_pm_ops = { 1427 .suspend = nouveau_pmops_suspend, 1428 .resume = nouveau_pmops_resume, 1429 .freeze = nouveau_pmops_freeze, 1430 .thaw = nouveau_pmops_thaw, 1431 .poweroff = nouveau_pmops_freeze, 1432 .restore = nouveau_pmops_resume, 1433 .runtime_suspend = nouveau_pmops_runtime_suspend, 1434 .runtime_resume = nouveau_pmops_runtime_resume, 1435 .runtime_idle = nouveau_pmops_runtime_idle, 1436 }; 1437 1438 static struct pci_driver 1439 nouveau_drm_pci_driver = { 1440 .name = "nouveau", 1441 .id_table = nouveau_drm_pci_table, 1442 .probe = nouveau_drm_probe, 1443 .remove = nouveau_drm_remove, 1444 .shutdown = nouveau_drm_shutdown, 1445 .driver.pm = &nouveau_pm_ops, 1446 }; 1447 1448 struct drm_device * 1449 nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, 1450 struct platform_device *pdev, 1451 struct nvkm_device **pdevice) 1452 { 1453 struct nouveau_drm *drm; 1454 int err; 1455 1456 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, pdevice); 1457 if (err) 1458 goto err_free; 1459 1460 drm = nouveau_drm_device_new(&driver_platform, &pdev->dev, *pdevice); 1461 if (IS_ERR(drm)) { 1462 err = PTR_ERR(drm); 1463 goto err_free; 1464 } 1465 1466 err = nouveau_drm_device_init(drm); 1467 if (err) 1468 goto err_put; 1469 1470 return drm->dev; 1471 1472 err_put: 1473 nouveau_drm_device_del(drm); 1474 err_free: 1475 nvkm_device_del(pdevice); 1476 1477 return ERR_PTR(err); 1478 } 1479 1480 static int __init 1481 nouveau_drm_init(void) 1482 { 1483 int ret; 1484 1485 driver_pci = driver_stub; 1486 driver_platform = driver_stub; 1487 1488 nouveau_display_options(); 1489 1490 if (nouveau_modeset == -1) { 1491 if (drm_firmware_drivers_only()) 1492 nouveau_modeset = 0; 1493 } 1494 1495 if (!nouveau_modeset) 1496 return 0; 1497 1498 nouveau_module_debugfs_init(); 1499 1500 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1501 platform_driver_register(&nouveau_platform_driver); 1502 #endif 1503 1504 nouveau_register_dsm_handler(); 1505 nouveau_backlight_ctor(); 1506 1507 #ifdef CONFIG_PCI 1508 ret = pci_register_driver(&nouveau_drm_pci_driver); 1509 if (ret) { 1510 nouveau_module_debugfs_fini(); 1511 return ret; 1512 } 1513 #endif 1514 1515 return 0; 1516 } 1517 1518 static void __exit 1519 nouveau_drm_exit(void) 1520 { 1521 if (!nouveau_modeset) 1522 return; 1523 1524 #ifdef CONFIG_PCI 1525 pci_unregister_driver(&nouveau_drm_pci_driver); 1526 #endif 1527 nouveau_backlight_dtor(); 1528 nouveau_unregister_dsm_handler(); 1529 1530 #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER 1531 platform_driver_unregister(&nouveau_platform_driver); 1532 #endif 1533 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM)) 1534 mmu_notifier_synchronize(); 1535 1536 #ifdef CONFIG_DEBUG_FS 1537 nvif_log_shutdown(&gsp_logs); 1538 #endif 1539 1540 nouveau_module_debugfs_fini(); 1541 } 1542 1543 module_init(nouveau_drm_init); 1544 module_exit(nouveau_drm_exit); 1545 1546 MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); 1547 MODULE_AUTHOR(DRIVER_AUTHOR); 1548 MODULE_DESCRIPTION(DRIVER_DESC); 1549 MODULE_LICENSE("GPL and additional rights"); 1550