| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| H A D | dcn10_dpp_cm.c | 92 struct dcn10_dpp *dpp, in program_gamut_remap()
164 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_cm_set_gamut_remap() local
184 static void read_gamut_remap(struct dcn10_dpp *dpp, in read_gamut_remap()
236 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_cm_get_gamut_remap() local
253 struct dcn10_dpp *dpp, in dpp1_cm_program_color_matrix()
311 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_cm_set_output_csc_default() local
325 struct dcn10_dpp *dpp, in dpp1_cm_get_reg_field()
352 struct dcn10_dpp *dpp, in dpp1_cm_get_degamma_reg_field()
381 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_cm_set_output_csc_adjustment() local
389 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_cm_power_on_regamma_lut() local
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| H A D | dcn10_dpp.c | 97 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp_read_state() local
125 struct dpp *dpp, in dpp1_get_optimal_number_of_taps()
190 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp_reset() local
206 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_cm_set_regamma_pwl() local
263 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_set_degamma_format_float() local
288 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_cnv_setup() local
415 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_set_cursor_attributes() local
438 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_set_cursor_position() local
493 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_cnv_set_optional_cursor_attributes() local
506 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_dppclk_control() local
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| H A D | dcn10_dpp_dscl.c | 161 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_power_on_dscl() local
180 struct dcn10_dpp *dpp, in dpp1_dscl_set_lb()
241 struct dcn10_dpp *dpp, in dpp1_dscl_set_scaler_filter()
279 struct dcn10_dpp *dpp, in dpp1_dscl_set_scl_filter()
459 static enum lb_memory_config dpp1_dscl_find_lb_memory_config(struct dcn10_dpp *dpp, in dpp1_dscl_find_lb_memory_config()
511 struct dcn10_dpp *dpp, const struct scaler_data *data) in dpp1_dscl_set_manual_ratio_init()
587 static void dpp1_dscl_set_recout(struct dcn10_dpp *dpp, in dpp1_dscl_set_recout()
617 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_dscl_set_scaler_manual_scale() local
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| H A D | dcn10_dpp.h | 30 #define TO_DCN10_DPP(dpp)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn20/ |
| H A D | dcn20_dpp_cm.c | 53 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_enable_cm_block() local
70 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_degamma_ram_inuse() local
93 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_program_degamma_lut() local
138 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_set_degamma() local
162 struct dcn20_dpp *dpp, in program_gamut_remap()
217 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_cm_set_gamut_remap() local
237 static void read_gamut_remap(struct dcn20_dpp *dpp, in read_gamut_remap()
276 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_cm_get_gamut_remap() local
298 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_program_input_csc() local
369 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp20_power_on_blnd_lut() local
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| H A D | dcn20_dpp.c | 54 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp20_read_state() local
81 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_power_on_obuf() local
105 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_cnv_setup() local
320 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_cnv_set_alpha_keyer() local
344 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_set_cursor_attributes() local
369 struct dpp *dpp, in oppn20_dummy_program_regamma_pwl()
407 struct dcn20_dpp *dpp, in dpp2_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/ |
| H A D | dcn30_dpp.c | 46 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp30_read_state() local
94 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_post_csc() local
164 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_set_pre_degam() local
212 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_cnv_setup() local
389 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_set_cursor_attributes() local
419 struct dpp *dpp, in dpp3_get_optimal_number_of_taps()
522 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_deferred_update() local
570 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_power_on_blnd_lut() local
590 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_power_on_hdr3dlut() local
607 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_power_on_shaper() local
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| H A D | dcn30_dpp_cm.c | 46 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_enable_cm_block() local
62 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp30_get_gamcor_current() local
84 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_gammcor_lut() local
130 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_power_on_gamcor_lut() local
149 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_cm_dealpha() local
160 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_cm_bias() local
169 struct dcn3_dpp *dpp, in dpp3_gamcor_reg_field()
205 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_configure_gamcor_lut() local
220 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_gamcor_lut() local
308 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_set_hdr_multiplier() local
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| H A D | dcn401_dpp_dscl.c | 163 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_power_on_dscl() local
182 struct dcn401_dpp *dpp, in dpp401_dscl_set_lb()
243 struct dcn401_dpp *dpp, in dpp401_dscl_set_scaler_filter()
281 struct dcn401_dpp *dpp, in dpp401_dscl_set_scl_filter()
475 static enum lb_memory_config dpp401_dscl_find_lb_memory_config(struct dcn401_dpp *dpp, in dpp401_dscl_find_lb_memory_config()
527 struct dcn401_dpp *dpp, const struct scaler_data *data) in dpp401_dscl_set_manual_ratio_init()
644 static void dpp401_dscl_set_recout(struct dcn401_dpp *dpp, in dpp401_dscl_set_recout()
670 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_dscl_program_easf_v() local
785 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_dscl_program_easf_h() local
890 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_dscl_program_easf() local
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| H A D | dcn401_dpp_cm.c | 93 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_full_bypass() local
119 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_set_cursor_attributes() local
154 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_set_cursor_position() local
166 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_set_optional_cursor_attributes() local
182 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_program_cursor_csc() local
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| H A D | dcn401_dpp.c | 47 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp401_read_state() local
63 struct dcn401_dpp *dpp = TO_DCN401_DPP(dpp_base); in dpp401_dpp_setup() local
262 struct dcn401_dpp *dpp, in dpp401_construct()
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| H A D | dcn401_dpp.h | 32 #define TO_DCN401_DPP(dpp)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | dpp.h | 69 struct dpp { struct
70 const struct dpp_funcs *funcs; argument
79 struct dpp_caps *caps; argument
82 struct dpp_cursor_attributes cur_attr; argument
88 struct cursor_position_cache_dpp pos; argument
89 struct cursor_attribute_cache_dpp att; argument
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| H A D | opp.h | 231 int dpp[MAX_PIPES]; member
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn35/ |
| H A D | dcn35_dpp.c | 45 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp35_dppclk_control() local
74 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp35_program_bias_and_scale_fcnv() local
129 struct dcn3_dpp *dpp, struct dc_context *ctx, in dpp35_construct()
146 void dpp35_set_fgcg(struct dcn3_dpp *dpp, bool enable) in dpp35_set_fgcg()
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn201/ |
| H A D | dcn201_dpp.c | 52 struct dcn201_dpp *dpp = TO_DCN201_DPP(dpp_base); in dpp201_cnv_setup() local
191 struct dpp *dpp, in dpp201_get_optimal_number_of_taps()
298 struct dcn201_dpp *dpp, in dpp201_construct()
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| H A D | dcn201_dpp.h | 30 #define TO_DCN201_DPP(dpp)\ argument
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 288 struct dpp *dpp = res_pool->dpps[i]; in dcn201_init_hw() local
308 struct dpp *dpp = res_pool->dpps[i]; in dcn201_init_hw() local
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 301 struct dpp *dpp = pool->dpps[i]; in dcn10_log_color_state() local
1273 struct dpp *dpp, in dcn10_plane_atomic_power_down()
1308 struct dpp *dpp = pipe_ctx->plane_res.dpp; in dcn10_plane_atomic_disable() local
1426 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn10_init_pipes() local
1895 struct dpp *dpp = pipe_ctx->plane_res.dpp; in dcn10_set_output_transfer_func() local
2645 static void dcn10_update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state) in dcn10_update_dpp()
2772 struct dpp *dpp = pipe_ctx->plane_res.dpp; in dcn10_update_dchubp_dpp() local
3482 struct dpp *dpp = pipe_ctx->plane_res.dpp; in dcn10_set_cursor_position() local
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn32/ |
| H A D | dcn32_dpp.c | 147 struct dcn3_dpp *dpp, in dpp32_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 767 struct dpp *dpp = dc->res_pool->dpps[i]; in dcn35_init_pipes() local
926 struct dpp *dpp = pipe_ctx->plane_res.dpp; in dcn35_plane_atomic_disable() local
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| H A D | dcn201_resource.c | 621 static void dcn201_dpp_destroy(struct dpp **dpp) in dcn201_dpp_destroy()
631 struct dcn201_dpp *dpp = in dcn201_dpp_create() local
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 1087 const struct hubp *hubp, const struct dpp *dpp) in dc_build_cursor_position_update_payload0()
1102 const struct hubp *hubp, const struct dpp *dpp) in dc_build_cursor_attribute_update_payload1()
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| /linux/fs/xfs/scrub/ |
| H A D | parent.c | 414 struct xfs_inode **dpp) in xchk_parent_iget()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 87 struct dpp *dpp = pool->dpps[i]; in dcn30_log_color_state() local
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