xref: /linux/drivers/gpu/drm/amd/display/dc/dc_stream.h (revision 3fd6c59042dbba50391e30862beac979491145fe)
1 /*
2  * Copyright 2012-14 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef DC_STREAM_H_
27 #define DC_STREAM_H_
28 
29 #include "dc_types.h"
30 #include "grph_object_defs.h"
31 
32 /*******************************************************************************
33  * Stream Interfaces
34  ******************************************************************************/
35 struct timing_sync_info {
36 	int group_id;
37 	int group_size;
38 	bool master;
39 };
40 
41 struct mall_stream_config {
42 	/* MALL stream config to indicate if the stream is phantom or not.
43 	 * We will use a phantom stream to indicate that the pipe is phantom.
44 	 */
45 	enum mall_stream_type type;
46 	struct dc_stream_state *paired_stream;	// master / slave stream
47 };
48 
49 struct dc_stream_status {
50 	int primary_otg_inst;
51 	int stream_enc_inst;
52 
53 	/**
54 	 * @plane_count: Total of planes attached to a single stream
55 	 */
56 	int plane_count;
57 	int audio_inst;
58 	struct timing_sync_info timing_sync_info;
59 	struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
60 	bool is_abm_supported;
61 	struct mall_stream_config mall_stream_config;
62 	bool fpo_in_use;
63 };
64 
65 enum hubp_dmdata_mode {
66 	DMDATA_SW_MODE,
67 	DMDATA_HW_MODE
68 };
69 
70 struct dc_dmdata_attributes {
71 	/* Specifies whether dynamic meta data will be updated by software
72 	 * or has to be fetched by hardware (DMA mode)
73 	 */
74 	enum hubp_dmdata_mode dmdata_mode;
75 	/* Specifies if current dynamic meta data is to be used only for the current frame */
76 	bool dmdata_repeat;
77 	/* Specifies the size of Dynamic Metadata surface in byte.  Size of 0 means no Dynamic metadata is fetched */
78 	uint32_t dmdata_size;
79 	/* Specifies if a new dynamic meta data should be fetched for an upcoming frame */
80 	bool dmdata_updated;
81 	/* If hardware mode is used, the base address where DMDATA surface is located */
82 	PHYSICAL_ADDRESS_LOC address;
83 	/* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */
84 	bool dmdata_qos_mode;
85 	/* If qos_mode = 1, this is the QOS value to be used: */
86 	uint32_t dmdata_qos_level;
87 	/* Specifies the value in unit of REFCLK cycles to be added to the
88 	 * current time to produce the Amortized deadline for Dynamic Metadata chunk request
89 	 */
90 	uint32_t dmdata_dl_delta;
91 	/* An unbounded array of uint32s, represents software dmdata to be loaded */
92 	uint32_t *dmdata_sw_data;
93 };
94 
95 struct dc_writeback_info {
96 	bool wb_enabled;
97 	int dwb_pipe_inst;
98 	struct dc_dwb_params dwb_params;
99 	struct mcif_buf_params mcif_buf_params;
100 	struct mcif_warmup_params mcif_warmup_params;
101 	/* the plane that is the input to TOP_MUX for MPCC that is the DWB source */
102 	struct dc_plane_state *writeback_source_plane;
103 	/* source MPCC instance.  for use by internally by dc */
104 	int mpcc_inst;
105 };
106 
107 struct dc_writeback_update {
108 	unsigned int num_wb_info;
109 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
110 };
111 
112 enum vertical_interrupt_ref_point {
113 	START_V_UPDATE = 0,
114 	START_V_SYNC,
115 	INVALID_POINT
116 
117 	//For now, only v_update interrupt is used.
118 	//START_V_BLANK,
119 	//START_V_ACTIVE
120 };
121 
122 struct periodic_interrupt_config {
123 	enum vertical_interrupt_ref_point ref_point;
124 	int lines_offset;
125 };
126 
127 struct dc_mst_stream_bw_update {
128 	bool is_increase; // is bandwidth reduced or increased
129 	uint32_t mst_stream_bw; // new mst bandwidth in kbps
130 };
131 
132 union stream_update_flags {
133 	struct {
134 		uint32_t scaling:1;
135 		uint32_t out_tf:1;
136 		uint32_t out_csc:1;
137 		uint32_t abm_level:1;
138 		uint32_t dpms_off:1;
139 		uint32_t gamut_remap:1;
140 		uint32_t wb_update:1;
141 		uint32_t dsc_changed : 1;
142 		uint32_t mst_bw : 1;
143 		uint32_t crtc_timing_adjust : 1;
144 		uint32_t fams_changed : 1;
145 		uint32_t scaler_sharpener : 1;
146 		uint32_t sharpening_required : 1;
147 	} bits;
148 
149 	uint32_t raw;
150 };
151 
152 struct test_pattern {
153 	enum dp_test_pattern type;
154 	enum dp_test_pattern_color_space color_space;
155 	struct link_training_settings const *p_link_settings;
156 	unsigned char const *p_custom_pattern;
157 	unsigned int cust_pattern_size;
158 };
159 
160 #define SUBVP_DRR_MARGIN_US 100 // 100us for DRR margin (SubVP + DRR)
161 
162 struct dc_stream_debug_options {
163 	char force_odm_combine_segments;
164 	/*
165 	 * When force_odm_combine_segments is non zero, allow dc to
166 	 * temporarily transition to ODM bypass when minimal transition state
167 	 * is required to prevent visual glitches showing on the screen
168 	 */
169 	char allow_transition_for_forced_odm;
170 };
171 
172 #define LUMINANCE_DATA_TABLE_SIZE 10
173 
174 struct luminance_data {
175 	bool is_valid;
176 	int refresh_rate_hz[LUMINANCE_DATA_TABLE_SIZE];
177 	int luminance_millinits[LUMINANCE_DATA_TABLE_SIZE];
178 	int flicker_criteria_milli_nits_GAMING;
179 	int flicker_criteria_milli_nits_STATIC;
180 	int nominal_refresh_rate;
181 	int dm_max_decrease_from_nominal;
182 };
183 
184 struct dc_stream_state {
185 	// sink is deprecated, new code should not reference
186 	// this pointer
187 	struct dc_sink *sink;
188 
189 	struct dc_link *link;
190 	/* For dynamic link encoder assignment, update the link encoder assigned to
191 	 * a stream via the volatile dc_state rather than the static dc_link.
192 	 */
193 	struct link_encoder *link_enc;
194 	struct dc_stream_debug_options debug;
195 	struct dc_panel_patch sink_patches;
196 	struct dc_crtc_timing timing;
197 	struct dc_crtc_timing_adjust adjust;
198 	struct dc_info_packet vrr_infopacket;
199 	struct dc_info_packet vsc_infopacket;
200 	struct dc_info_packet vsp_infopacket;
201 	struct dc_info_packet hfvsif_infopacket;
202 	struct dc_info_packet vtem_infopacket;
203 	struct dc_info_packet adaptive_sync_infopacket;
204 	uint8_t dsc_packed_pps[128];
205 	struct rect src; /* composition area */
206 	struct rect dst; /* stream addressable area */
207 
208 	struct audio_info audio_info;
209 
210 	struct dc_info_packet hdr_static_metadata;
211 	PHYSICAL_ADDRESS_LOC dmdata_address;
212 	bool   use_dynamic_meta;
213 
214 	struct dc_transfer_func out_transfer_func;
215 	struct colorspace_transform gamut_remap_matrix;
216 	struct dc_csc_transform csc_color_matrix;
217 
218 	enum dc_color_space output_color_space;
219 	enum display_content_type content_type;
220 	enum dc_dither_option dither_option;
221 
222 	enum view_3d_format view_format;
223 
224 	bool use_vsc_sdp_for_colorimetry;
225 	bool ignore_msa_timing_param;
226 
227 	/**
228 	 * @allow_freesync:
229 	 *
230 	 * It say if Freesync is enabled or not.
231 	 */
232 	bool allow_freesync;
233 
234 	/**
235 	 * @vrr_active_variable:
236 	 *
237 	 * It describes if VRR is in use.
238 	 */
239 	bool vrr_active_variable;
240 	bool freesync_on_desktop;
241 	bool vrr_active_fixed;
242 
243 	bool converter_disable_audio;
244 	uint8_t qs_bit;
245 	uint8_t qy_bit;
246 
247 	/* TODO: custom INFO packets */
248 	/* TODO: ABM info (DMCU) */
249 	/* TODO: CEA VIC */
250 
251 	/* DMCU info */
252 	unsigned int abm_level;
253 
254 	struct periodic_interrupt_config periodic_interrupt;
255 
256 	/* from core_stream struct */
257 	struct dc_context *ctx;
258 
259 	/* used by DCP and FMT */
260 	struct bit_depth_reduction_params bit_depth_params;
261 	struct clamping_and_pixel_encoding_params clamping;
262 
263 	int phy_pix_clk;
264 	enum signal_type signal;
265 	bool dpms_off;
266 
267 	void *dm_stream_context;
268 
269 	struct dc_cursor_attributes cursor_attributes;
270 	struct dc_cursor_position cursor_position;
271 	bool hw_cursor_req;
272 
273 	uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
274 
275 	/* from stream struct */
276 	struct kref refcount;
277 
278 	struct crtc_trigger_info triggered_crtc_reset;
279 
280 	/* writeback */
281 	unsigned int num_wb_info;
282 	struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
283 	const struct dc_transfer_func *func_shaper;
284 	const struct dc_3dlut *lut3d_func;
285 	/* Computed state bits */
286 	bool mode_changed : 1;
287 
288 	/* Output from DC when stream state is committed or altered
289 	 * DC may only access these values during:
290 	 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
291 	 * values may not change outside of those calls
292 	 */
293 	struct {
294 		// For interrupt management, some hardware instance
295 		// offsets need to be exposed to DM
296 		uint8_t otg_offset;
297 	} out;
298 
299 	bool apply_edp_fast_boot_optimization;
300 	bool apply_seamless_boot_optimization;
301 	uint32_t apply_boot_odm_mode;
302 
303 	uint32_t stream_id;
304 
305 	struct test_pattern test_pattern;
306 	union stream_update_flags update_flags;
307 
308 	bool has_non_synchronizable_pclk;
309 	bool vblank_synchronized;
310 	bool is_phantom;
311 
312 	struct luminance_data lumin_data;
313 	bool scaler_sharpener_update;
314 	bool sharpening_required;
315 };
316 
317 #define ABM_LEVEL_IMMEDIATE_DISABLE 255
318 
319 struct dc_stream_update {
320 	struct dc_stream_state *stream;
321 
322 	struct rect src;
323 	struct rect dst;
324 	struct dc_transfer_func *out_transfer_func;
325 	struct dc_info_packet *hdr_static_metadata;
326 	unsigned int *abm_level;
327 
328 	struct periodic_interrupt_config *periodic_interrupt;
329 
330 	struct dc_info_packet *vrr_infopacket;
331 	struct dc_info_packet *vsc_infopacket;
332 	struct dc_info_packet *vsp_infopacket;
333 	struct dc_info_packet *hfvsif_infopacket;
334 	struct dc_info_packet *vtem_infopacket;
335 	struct dc_info_packet *adaptive_sync_infopacket;
336 	bool *dpms_off;
337 	bool integer_scaling_update;
338 	bool *allow_freesync;
339 	bool *vrr_active_variable;
340 	bool *vrr_active_fixed;
341 
342 	struct colorspace_transform *gamut_remap;
343 	enum dc_color_space *output_color_space;
344 	enum dc_dither_option *dither_option;
345 
346 	struct dc_csc_transform *output_csc_transform;
347 
348 	struct dc_writeback_update *wb_update;
349 	struct dc_dsc_config *dsc_config;
350 	struct dc_mst_stream_bw_update *mst_bw_update;
351 	struct dc_transfer_func *func_shaper;
352 	struct dc_3dlut *lut3d_func;
353 
354 	struct test_pattern *pending_test_pattern;
355 	struct dc_crtc_timing_adjust *crtc_timing_adjust;
356 
357 	struct dc_cursor_attributes *cursor_attributes;
358 	struct dc_cursor_position *cursor_position;
359 	bool *hw_cursor_req;
360 	bool *scaler_sharpener_update;
361 	bool *sharpening_required;
362 };
363 
364 bool dc_is_stream_unchanged(
365 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
366 bool dc_is_stream_scaling_unchanged(
367 	struct dc_stream_state *old_stream, struct dc_stream_state *stream);
368 
369 /*
370  * Setup stream attributes if no stream updates are provided
371  * there will be no impact on the stream parameters
372  *
373  * Set up surface attributes and associate to a stream
374  * The surfaces parameter is an absolute set of all surface active for the stream.
375  * If no surfaces are provided, the stream will be blanked; no memory read.
376  * Any flip related attribute changes must be done through this interface.
377  *
378  * After this call:
379  *   Surfaces attributes are programmed and configured to be composed into stream.
380  *   This does not trigger a flip.  No surface address is programmed.
381  *
382  */
383 bool dc_update_planes_and_stream(struct dc *dc,
384 		struct dc_surface_update *surface_updates, int surface_count,
385 		struct dc_stream_state *dc_stream,
386 		struct dc_stream_update *stream_update);
387 
388 /*
389  * Set up surface attributes and associate to a stream
390  * The surfaces parameter is an absolute set of all surface active for the stream.
391  * If no surfaces are provided, the stream will be blanked; no memory read.
392  * Any flip related attribute changes must be done through this interface.
393  *
394  * After this call:
395  *   Surfaces attributes are programmed and configured to be composed into stream.
396  *   This does not trigger a flip.  No surface address is programmed.
397  */
398 void dc_commit_updates_for_stream(struct dc *dc,
399 		struct dc_surface_update *srf_updates,
400 		int surface_count,
401 		struct dc_stream_state *stream,
402 		struct dc_stream_update *stream_update,
403 		struct dc_state *state);
404 /*
405  * Log the current stream state.
406  */
407 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
408 
409 uint8_t dc_get_current_stream_count(struct dc *dc);
410 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
411 
412 /*
413  * Return the current frame counter.
414  */
415 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
416 
417 /*
418  * Send dp sdp message.
419  */
420 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
421 		const uint8_t *custom_sdp_message,
422 		unsigned int sdp_message_size);
423 
424 /* TODO: Return parsed values rather than direct register read
425  * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
426  * being refactored properly to be dce-specific
427  */
428 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
429 				  uint32_t *v_blank_start,
430 				  uint32_t *v_blank_end,
431 				  uint32_t *h_position,
432 				  uint32_t *v_position);
433 
434 bool dc_stream_add_writeback(struct dc *dc,
435 		struct dc_stream_state *stream,
436 		struct dc_writeback_info *wb_info);
437 
438 bool dc_stream_fc_disable_writeback(struct dc *dc,
439 		struct dc_stream_state *stream,
440 		uint32_t dwb_pipe_inst);
441 
442 bool dc_stream_remove_writeback(struct dc *dc,
443 		struct dc_stream_state *stream,
444 		uint32_t dwb_pipe_inst);
445 
446 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
447 		struct dc_state *state,
448 		struct dc_stream_state *stream);
449 
450 bool dc_stream_warmup_writeback(struct dc *dc,
451 		int num_dwb,
452 		struct dc_writeback_info *wb_info);
453 
454 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);
455 
456 bool dc_stream_set_dynamic_metadata(struct dc *dc,
457 		struct dc_stream_state *stream,
458 		struct dc_dmdata_attributes *dmdata_attr);
459 
460 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
461 
462 /*
463  * Enable stereo when commit_streams is not required,
464  * for example, frame alternate.
465  */
466 void dc_enable_stereo(
467 	struct dc *dc,
468 	struct dc_state *context,
469 	struct dc_stream_state *streams[],
470 	uint8_t stream_count);
471 
472 /* Triggers multi-stream synchronization. */
473 void dc_trigger_sync(struct dc *dc, struct dc_state *context);
474 
475 enum surface_update_type dc_check_update_surfaces_for_stream(
476 		struct dc *dc,
477 		struct dc_surface_update *updates,
478 		int surface_count,
479 		struct dc_stream_update *stream_update,
480 		const struct dc_stream_status *stream_status);
481 
482 /**
483  * Create a new default stream for the requested sink
484  */
485 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
486 
487 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);
488 
489 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);
490 
491 void dc_stream_retain(struct dc_stream_state *dc_stream);
492 void dc_stream_release(struct dc_stream_state *dc_stream);
493 
494 struct dc_stream_status *dc_stream_get_status(
495 	struct dc_stream_state *dc_stream);
496 
497 /*******************************************************************************
498  * Cursor interfaces - To manages the cursor within a stream
499  ******************************************************************************/
500 /* TODO: Deprecated once we switch to dc_set_cursor_position */
501 
502 void program_cursor_attributes(
503 	struct dc *dc,
504 	struct dc_stream_state *stream);
505 
506 void program_cursor_position(
507 	struct dc *dc,
508 	struct dc_stream_state *stream);
509 
510 bool dc_stream_set_cursor_attributes(
511 	struct dc_stream_state *stream,
512 	const struct dc_cursor_attributes *attributes);
513 
514 bool dc_stream_program_cursor_attributes(
515 	struct dc_stream_state *stream,
516 	const struct dc_cursor_attributes *attributes);
517 
518 bool dc_stream_set_cursor_position(
519 	struct dc_stream_state *stream,
520 	const struct dc_cursor_position *position);
521 
522 bool dc_stream_program_cursor_position(
523 	struct dc_stream_state *stream,
524 	const struct dc_cursor_position *position);
525 
526 
527 bool dc_stream_adjust_vmin_vmax(struct dc *dc,
528 				struct dc_stream_state *stream,
529 				struct dc_crtc_timing_adjust *adjust);
530 
531 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc,
532 		struct dc_stream_state *stream,
533 		uint32_t *refresh_rate);
534 
535 bool dc_stream_get_crtc_position(struct dc *dc,
536 				 struct dc_stream_state **stream,
537 				 int num_streams,
538 				 unsigned int *v_pos,
539 				 unsigned int *nom_v_pos);
540 
541 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
542 bool dc_stream_forward_crc_window(struct dc_stream_state *stream,
543 		struct rect *rect,
544 		bool is_stop);
545 #endif
546 
547 bool dc_stream_configure_crc(struct dc *dc,
548 			     struct dc_stream_state *stream,
549 			     struct crc_params *crc_window,
550 			     bool enable,
551 			     bool continuous);
552 
553 bool dc_stream_get_crc(struct dc *dc,
554 		       struct dc_stream_state *stream,
555 		       uint32_t *r_cr,
556 		       uint32_t *g_y,
557 		       uint32_t *b_cb);
558 
559 void dc_stream_set_static_screen_params(struct dc *dc,
560 					struct dc_stream_state **stream,
561 					int num_streams,
562 					const struct dc_static_screen_params *params);
563 
564 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,
565 		enum dc_dynamic_expansion option);
566 
567 void dc_stream_set_dither_option(struct dc_stream_state *stream,
568 				 enum dc_dither_option option);
569 
570 bool dc_stream_set_gamut_remap(struct dc *dc,
571 			       const struct dc_stream_state *stream);
572 
573 bool dc_stream_program_csc_matrix(struct dc *dc,
574 				  struct dc_stream_state *stream);
575 
576 bool dc_stream_get_crtc_position(struct dc *dc,
577 				 struct dc_stream_state **stream,
578 				 int num_streams,
579 				 unsigned int *v_pos,
580 				 unsigned int *nom_v_pos);
581 
582 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream);
583 
584 void dc_dmub_update_dirty_rect(struct dc *dc,
585 			       int surface_count,
586 			       struct dc_stream_state *stream,
587 			       struct dc_surface_update *srf_updates,
588 			       struct dc_state *context);
589 #endif /* DC_STREAM_H_ */
590