1 // SPDX-License-Identifier: GPL-2.0-only 2 3 #include <linux/aperture.h> 4 #include <linux/of_address.h> 5 #include <linux/pci.h> 6 #include <linux/platform_device.h> 7 #include <linux/pm.h> 8 9 #include <drm/clients/drm_client_setup.h> 10 #include <drm/drm_atomic.h> 11 #include <drm/drm_atomic_state_helper.h> 12 #include <drm/drm_color_mgmt.h> 13 #include <drm/drm_connector.h> 14 #include <drm/drm_damage_helper.h> 15 #include <drm/drm_device.h> 16 #include <drm/drm_drv.h> 17 #include <drm/drm_edid.h> 18 #include <drm/drm_fbdev_shmem.h> 19 #include <drm/drm_framebuffer.h> 20 #include <drm/drm_gem_atomic_helper.h> 21 #include <drm/drm_gem_framebuffer_helper.h> 22 #include <drm/drm_gem_shmem_helper.h> 23 #include <drm/drm_managed.h> 24 #include <drm/drm_modeset_helper.h> 25 #include <drm/drm_modeset_helper_vtables.h> 26 #include <drm/drm_print.h> 27 #include <drm/drm_probe_helper.h> 28 29 #include "drm_sysfb_helper.h" 30 31 #define DRIVER_NAME "ofdrm" 32 #define DRIVER_DESC "DRM driver for OF platform devices" 33 #define DRIVER_MAJOR 1 34 #define DRIVER_MINOR 0 35 36 #define PCI_VENDOR_ID_ATI_R520 0x7100 37 #define PCI_VENDOR_ID_ATI_R600 0x9400 38 39 #define OFDRM_GAMMA_LUT_SIZE 256 40 41 /* Definitions used by the Avivo palette */ 42 #define AVIVO_DC_LUT_RW_SELECT 0x6480 43 #define AVIVO_DC_LUT_RW_MODE 0x6484 44 #define AVIVO_DC_LUT_RW_INDEX 0x6488 45 #define AVIVO_DC_LUT_SEQ_COLOR 0x648c 46 #define AVIVO_DC_LUT_PWL_DATA 0x6490 47 #define AVIVO_DC_LUT_30_COLOR 0x6494 48 #define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498 49 #define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c 50 #define AVIVO_DC_LUT_AUTOFILL 0x64a0 51 #define AVIVO_DC_LUTA_CONTROL 0x64c0 52 #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4 53 #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8 54 #define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc 55 #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0 56 #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4 57 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8 58 #define AVIVO_DC_LUTB_CONTROL 0x6cc0 59 #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4 60 #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8 61 #define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc 62 #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0 63 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4 64 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8 65 66 enum ofdrm_model { 67 OFDRM_MODEL_UNKNOWN, 68 OFDRM_MODEL_MACH64, /* ATI Mach64 */ 69 OFDRM_MODEL_RAGE128, /* ATI Rage128 */ 70 OFDRM_MODEL_RAGE_M3A, /* ATI Rage Mobility M3 Head A */ 71 OFDRM_MODEL_RAGE_M3B, /* ATI Rage Mobility M3 Head B */ 72 OFDRM_MODEL_RADEON, /* ATI Radeon */ 73 OFDRM_MODEL_GXT2000, /* IBM GXT2000 */ 74 OFDRM_MODEL_AVIVO, /* ATI R5xx */ 75 OFDRM_MODEL_QEMU, /* QEMU VGA */ 76 }; 77 78 /* 79 * Helpers for display nodes 80 */ 81 82 static int display_get_validated_int(struct drm_device *dev, const char *name, uint32_t value) 83 { 84 return drm_sysfb_get_validated_int(dev, name, value, INT_MAX); 85 } 86 87 static int display_get_validated_int0(struct drm_device *dev, const char *name, uint32_t value) 88 { 89 return drm_sysfb_get_validated_int0(dev, name, value, INT_MAX); 90 } 91 92 static const struct drm_format_info *display_get_validated_format(struct drm_device *dev, 93 u32 depth, bool big_endian) 94 { 95 const struct drm_format_info *info; 96 u32 format; 97 98 switch (depth) { 99 case 8: 100 format = drm_mode_legacy_fb_format(8, 8); 101 break; 102 case 15: 103 case 16: 104 format = drm_mode_legacy_fb_format(16, depth); 105 break; 106 case 32: 107 format = drm_mode_legacy_fb_format(32, 24); 108 break; 109 default: 110 drm_err(dev, "unsupported framebuffer depth %u\n", depth); 111 return ERR_PTR(-EINVAL); 112 } 113 114 /* 115 * DRM formats assume little-endian byte order. Update the format 116 * if the scanout buffer uses big-endian ordering. 117 */ 118 if (big_endian) { 119 switch (format) { 120 case DRM_FORMAT_XRGB8888: 121 format = DRM_FORMAT_BGRX8888; 122 break; 123 case DRM_FORMAT_ARGB8888: 124 format = DRM_FORMAT_BGRA8888; 125 break; 126 case DRM_FORMAT_RGB565: 127 format = DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN; 128 break; 129 case DRM_FORMAT_XRGB1555: 130 format = DRM_FORMAT_XRGB1555 | DRM_FORMAT_BIG_ENDIAN; 131 break; 132 default: 133 break; 134 } 135 } 136 137 info = drm_format_info(format); 138 if (!info) { 139 drm_err(dev, "cannot find framebuffer format for depth %u\n", depth); 140 return ERR_PTR(-EINVAL); 141 } 142 143 return info; 144 } 145 146 static int display_read_u32_of(struct drm_device *dev, struct device_node *of_node, 147 const char *name, u32 *value) 148 { 149 int ret = of_property_read_u32(of_node, name, value); 150 151 if (ret) 152 drm_err(dev, "cannot parse framebuffer %s: error %d\n", name, ret); 153 return ret; 154 } 155 156 static bool display_get_big_endian_of(struct drm_device *dev, struct device_node *of_node) 157 { 158 bool big_endian; 159 160 #ifdef __BIG_ENDIAN 161 big_endian = !of_property_read_bool(of_node, "little-endian"); 162 #else 163 big_endian = of_property_read_bool(of_node, "big-endian"); 164 #endif 165 166 return big_endian; 167 } 168 169 static int display_get_width_of(struct drm_device *dev, struct device_node *of_node) 170 { 171 u32 width; 172 int ret = display_read_u32_of(dev, of_node, "width", &width); 173 174 if (ret) 175 return ret; 176 return display_get_validated_int0(dev, "width", width); 177 } 178 179 static int display_get_height_of(struct drm_device *dev, struct device_node *of_node) 180 { 181 u32 height; 182 int ret = display_read_u32_of(dev, of_node, "height", &height); 183 184 if (ret) 185 return ret; 186 return display_get_validated_int0(dev, "height", height); 187 } 188 189 static int display_get_depth_of(struct drm_device *dev, struct device_node *of_node) 190 { 191 u32 depth; 192 int ret = display_read_u32_of(dev, of_node, "depth", &depth); 193 194 if (ret) 195 return ret; 196 return display_get_validated_int0(dev, "depth", depth); 197 } 198 199 static int display_get_linebytes_of(struct drm_device *dev, struct device_node *of_node) 200 { 201 u32 linebytes; 202 int ret = display_read_u32_of(dev, of_node, "linebytes", &linebytes); 203 204 if (ret) 205 return ret; 206 return display_get_validated_int(dev, "linebytes", linebytes); 207 } 208 209 static u64 display_get_address_of(struct drm_device *dev, struct device_node *of_node) 210 { 211 u32 address; 212 int ret; 213 214 /* 215 * Not all devices provide an address property, it's not 216 * a bug if this fails. The driver will try to find the 217 * framebuffer base address from the device's memory regions. 218 */ 219 ret = of_property_read_u32(of_node, "address", &address); 220 if (ret) 221 return OF_BAD_ADDR; 222 223 return address; 224 } 225 226 static const u8 *display_get_edid_of(struct drm_device *dev, struct device_node *of_node, 227 u8 buf[EDID_LENGTH]) 228 { 229 int ret = of_property_read_u8_array(of_node, "EDID", buf, EDID_LENGTH); 230 231 if (ret) 232 return NULL; 233 return buf; 234 } 235 236 static bool is_avivo(u32 vendor, u32 device) 237 { 238 /* This will match most R5xx */ 239 return (vendor == PCI_VENDOR_ID_ATI) && 240 ((device >= PCI_VENDOR_ID_ATI_R520 && device < 0x7800) || 241 (PCI_VENDOR_ID_ATI_R600 >= 0x9400)); 242 } 243 244 static enum ofdrm_model display_get_model_of(struct drm_device *dev, struct device_node *of_node) 245 { 246 enum ofdrm_model model = OFDRM_MODEL_UNKNOWN; 247 248 if (of_node_name_prefix(of_node, "ATY,Rage128")) { 249 model = OFDRM_MODEL_RAGE128; 250 } else if (of_node_name_prefix(of_node, "ATY,RageM3pA") || 251 of_node_name_prefix(of_node, "ATY,RageM3p12A")) { 252 model = OFDRM_MODEL_RAGE_M3A; 253 } else if (of_node_name_prefix(of_node, "ATY,RageM3pB")) { 254 model = OFDRM_MODEL_RAGE_M3B; 255 } else if (of_node_name_prefix(of_node, "ATY,Rage6")) { 256 model = OFDRM_MODEL_RADEON; 257 } else if (of_node_name_prefix(of_node, "ATY,")) { 258 return OFDRM_MODEL_MACH64; 259 } else if (of_device_is_compatible(of_node, "pci1014,b7") || 260 of_device_is_compatible(of_node, "pci1014,21c")) { 261 model = OFDRM_MODEL_GXT2000; 262 } else if (of_node_name_prefix(of_node, "vga,Display-")) { 263 struct device_node *of_parent; 264 const __be32 *vendor_p, *device_p; 265 266 /* Look for AVIVO initialized by SLOF */ 267 of_parent = of_get_parent(of_node); 268 vendor_p = of_get_property(of_parent, "vendor-id", NULL); 269 device_p = of_get_property(of_parent, "device-id", NULL); 270 if (vendor_p && device_p) { 271 u32 vendor = be32_to_cpup(vendor_p); 272 u32 device = be32_to_cpup(device_p); 273 274 if (is_avivo(vendor, device)) 275 model = OFDRM_MODEL_AVIVO; 276 } 277 of_node_put(of_parent); 278 } else if (of_device_is_compatible(of_node, "qemu,std-vga")) { 279 model = OFDRM_MODEL_QEMU; 280 } 281 282 return model; 283 } 284 285 /* 286 * Open Firmware display device 287 */ 288 289 struct ofdrm_device; 290 291 struct ofdrm_device_funcs { 292 void __iomem *(*cmap_ioremap)(struct ofdrm_device *odev, 293 struct device_node *of_node, 294 u64 fb_bas); 295 void (*cmap_write)(struct ofdrm_device *odev, unsigned char index, 296 unsigned char r, unsigned char g, unsigned char b); 297 }; 298 299 struct ofdrm_device { 300 struct drm_sysfb_device sysfb; 301 302 const struct ofdrm_device_funcs *funcs; 303 304 /* colormap */ 305 void __iomem *cmap_base; 306 307 u8 edid[EDID_LENGTH]; 308 309 /* modesetting */ 310 u32 formats[DRM_SYSFB_PLANE_NFORMATS(1)]; 311 struct drm_plane primary_plane; 312 struct drm_crtc crtc; 313 struct drm_encoder encoder; 314 struct drm_connector connector; 315 }; 316 317 static struct ofdrm_device *ofdrm_device_of_dev(struct drm_device *dev) 318 { 319 return container_of(to_drm_sysfb_device(dev), struct ofdrm_device, sysfb); 320 } 321 322 /* 323 * Hardware 324 */ 325 326 #if defined(CONFIG_PCI) 327 static struct pci_dev *display_get_pci_dev_of(struct drm_device *dev, struct device_node *of_node) 328 { 329 const __be32 *vendor_p, *device_p; 330 u32 vendor, device; 331 struct pci_dev *pcidev; 332 333 vendor_p = of_get_property(of_node, "vendor-id", NULL); 334 if (!vendor_p) 335 return ERR_PTR(-ENODEV); 336 vendor = be32_to_cpup(vendor_p); 337 338 device_p = of_get_property(of_node, "device-id", NULL); 339 if (!device_p) 340 return ERR_PTR(-ENODEV); 341 device = be32_to_cpup(device_p); 342 343 pcidev = pci_get_device(vendor, device, NULL); 344 if (!pcidev) 345 return ERR_PTR(-ENODEV); 346 347 return pcidev; 348 } 349 350 static void ofdrm_pci_release(void *data) 351 { 352 struct pci_dev *pcidev = data; 353 354 pci_disable_device(pcidev); 355 pci_dev_put(pcidev); 356 } 357 358 static int ofdrm_device_init_pci(struct ofdrm_device *odev) 359 { 360 struct drm_device *dev = &odev->sysfb.dev; 361 struct platform_device *pdev = to_platform_device(dev->dev); 362 struct device_node *of_node = pdev->dev.of_node; 363 struct pci_dev *pcidev; 364 int ret; 365 366 /* 367 * Never use pcim_ or other managed helpers on the returned PCI 368 * device. Otherwise, probing the native driver will fail for 369 * resource conflicts. PCI-device management has to be tied to 370 * the lifetime of the platform device until the native driver 371 * takes over. 372 */ 373 pcidev = display_get_pci_dev_of(dev, of_node); 374 if (IS_ERR(pcidev)) 375 return 0; /* no PCI device found; ignore the error */ 376 377 ret = pci_enable_device(pcidev); 378 if (ret) { 379 drm_err(dev, "pci_enable_device(%s) failed: %d\n", 380 dev_name(&pcidev->dev), ret); 381 pci_dev_put(pcidev); 382 return ret; 383 } 384 ret = devm_add_action_or_reset(&pdev->dev, ofdrm_pci_release, pcidev); 385 if (ret) 386 return ret; 387 388 return 0; 389 } 390 #else 391 static int ofdrm_device_init_pci(struct ofdrm_device *odev) 392 { 393 return 0; 394 } 395 #endif 396 397 /* 398 * OF display settings 399 */ 400 401 static struct resource *ofdrm_find_fb_resource(struct ofdrm_device *odev, 402 struct resource *fb_res) 403 { 404 struct platform_device *pdev = to_platform_device(odev->sysfb.dev.dev); 405 struct resource *res, *max_res = NULL; 406 u32 i; 407 408 for (i = 0; pdev->num_resources; ++i) { 409 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 410 if (!res) 411 break; /* all resources processed */ 412 if (resource_size(res) < resource_size(fb_res)) 413 continue; /* resource too small */ 414 if (fb_res->start && resource_contains(res, fb_res)) 415 return res; /* resource contains framebuffer */ 416 if (!max_res || resource_size(res) > resource_size(max_res)) 417 max_res = res; /* store largest resource as fallback */ 418 } 419 420 return max_res; 421 } 422 423 /* 424 * Colormap / Palette 425 */ 426 427 static void __iomem *get_cmap_address_of(struct ofdrm_device *odev, struct device_node *of_node, 428 int bar_no, unsigned long offset, unsigned long size) 429 { 430 struct drm_device *dev = &odev->sysfb.dev; 431 const __be32 *addr_p; 432 u64 max_size, address; 433 unsigned int flags; 434 void __iomem *mem; 435 436 addr_p = of_get_pci_address(of_node, bar_no, &max_size, &flags); 437 if (!addr_p) 438 addr_p = of_get_address(of_node, bar_no, &max_size, &flags); 439 if (!addr_p) 440 return IOMEM_ERR_PTR(-ENODEV); 441 442 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) 443 return IOMEM_ERR_PTR(-ENODEV); 444 445 if ((offset + size) >= max_size) 446 return IOMEM_ERR_PTR(-ENODEV); 447 448 address = of_translate_address(of_node, addr_p); 449 if (address == OF_BAD_ADDR) 450 return IOMEM_ERR_PTR(-ENODEV); 451 452 mem = devm_ioremap(dev->dev, address + offset, size); 453 if (!mem) 454 return IOMEM_ERR_PTR(-ENOMEM); 455 456 return mem; 457 } 458 459 static void __iomem *ofdrm_mach64_cmap_ioremap(struct ofdrm_device *odev, 460 struct device_node *of_node, 461 u64 fb_base) 462 { 463 struct drm_device *dev = &odev->sysfb.dev; 464 u64 address; 465 void __iomem *cmap_base; 466 467 address = fb_base & 0xff000000ul; 468 address += 0x7ff000; 469 470 cmap_base = devm_ioremap(dev->dev, address, 0x1000); 471 if (!cmap_base) 472 return IOMEM_ERR_PTR(-ENOMEM); 473 474 return cmap_base; 475 } 476 477 static void ofdrm_mach64_cmap_write(struct ofdrm_device *odev, unsigned char index, 478 unsigned char r, unsigned char g, unsigned char b) 479 { 480 void __iomem *addr = odev->cmap_base + 0xcc0; 481 void __iomem *data = odev->cmap_base + 0xcc0 + 1; 482 483 writeb(index, addr); 484 writeb(r, data); 485 writeb(g, data); 486 writeb(b, data); 487 } 488 489 static void __iomem *ofdrm_rage128_cmap_ioremap(struct ofdrm_device *odev, 490 struct device_node *of_node, 491 u64 fb_base) 492 { 493 return get_cmap_address_of(odev, of_node, 2, 0, 0x1fff); 494 } 495 496 static void ofdrm_rage128_cmap_write(struct ofdrm_device *odev, unsigned char index, 497 unsigned char r, unsigned char g, unsigned char b) 498 { 499 void __iomem *addr = odev->cmap_base + 0xb0; 500 void __iomem *data = odev->cmap_base + 0xb4; 501 u32 color = (r << 16) | (g << 8) | b; 502 503 writeb(index, addr); 504 writel(color, data); 505 } 506 507 static void __iomem *ofdrm_rage_m3a_cmap_ioremap(struct ofdrm_device *odev, 508 struct device_node *of_node, 509 u64 fb_base) 510 { 511 return get_cmap_address_of(odev, of_node, 2, 0, 0x1fff); 512 } 513 514 static void ofdrm_rage_m3a_cmap_write(struct ofdrm_device *odev, unsigned char index, 515 unsigned char r, unsigned char g, unsigned char b) 516 { 517 void __iomem *dac_ctl = odev->cmap_base + 0x58; 518 void __iomem *addr = odev->cmap_base + 0xb0; 519 void __iomem *data = odev->cmap_base + 0xb4; 520 u32 color = (r << 16) | (g << 8) | b; 521 u32 val; 522 523 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */ 524 val = readl(dac_ctl); 525 val &= ~0x20; 526 writel(val, dac_ctl); 527 528 /* Set color at palette index */ 529 writeb(index, addr); 530 writel(color, data); 531 } 532 533 static void __iomem *ofdrm_rage_m3b_cmap_ioremap(struct ofdrm_device *odev, 534 struct device_node *of_node, 535 u64 fb_base) 536 { 537 return get_cmap_address_of(odev, of_node, 2, 0, 0x1fff); 538 } 539 540 static void ofdrm_rage_m3b_cmap_write(struct ofdrm_device *odev, unsigned char index, 541 unsigned char r, unsigned char g, unsigned char b) 542 { 543 void __iomem *dac_ctl = odev->cmap_base + 0x58; 544 void __iomem *addr = odev->cmap_base + 0xb0; 545 void __iomem *data = odev->cmap_base + 0xb4; 546 u32 color = (r << 16) | (g << 8) | b; 547 u32 val; 548 549 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */ 550 val = readl(dac_ctl); 551 val |= 0x20; 552 writel(val, dac_ctl); 553 554 /* Set color at palette index */ 555 writeb(index, addr); 556 writel(color, data); 557 } 558 559 static void __iomem *ofdrm_radeon_cmap_ioremap(struct ofdrm_device *odev, 560 struct device_node *of_node, 561 u64 fb_base) 562 { 563 return get_cmap_address_of(odev, of_node, 1, 0, 0x1fff); 564 } 565 566 static void __iomem *ofdrm_gxt2000_cmap_ioremap(struct ofdrm_device *odev, 567 struct device_node *of_node, 568 u64 fb_base) 569 { 570 return get_cmap_address_of(odev, of_node, 0, 0x6000, 0x1000); 571 } 572 573 static void ofdrm_gxt2000_cmap_write(struct ofdrm_device *odev, unsigned char index, 574 unsigned char r, unsigned char g, unsigned char b) 575 { 576 void __iomem *data = ((unsigned int __iomem *)odev->cmap_base) + index; 577 u32 color = (r << 16) | (g << 8) | b; 578 579 writel(color, data); 580 } 581 582 static void __iomem *ofdrm_avivo_cmap_ioremap(struct ofdrm_device *odev, 583 struct device_node *of_node, 584 u64 fb_base) 585 { 586 struct device_node *of_parent; 587 void __iomem *cmap_base; 588 589 of_parent = of_get_parent(of_node); 590 cmap_base = get_cmap_address_of(odev, of_parent, 0, 0, 0x10000); 591 of_node_put(of_parent); 592 593 return cmap_base; 594 } 595 596 static void ofdrm_avivo_cmap_write(struct ofdrm_device *odev, unsigned char index, 597 unsigned char r, unsigned char g, unsigned char b) 598 { 599 void __iomem *lutsel = odev->cmap_base + AVIVO_DC_LUT_RW_SELECT; 600 void __iomem *addr = odev->cmap_base + AVIVO_DC_LUT_RW_INDEX; 601 void __iomem *data = odev->cmap_base + AVIVO_DC_LUT_30_COLOR; 602 u32 color = (r << 22) | (g << 12) | (b << 2); 603 604 /* Write to both LUTs for now */ 605 606 writel(1, lutsel); 607 writeb(index, addr); 608 writel(color, data); 609 610 writel(0, lutsel); 611 writeb(index, addr); 612 writel(color, data); 613 } 614 615 static void __iomem *ofdrm_qemu_cmap_ioremap(struct ofdrm_device *odev, 616 struct device_node *of_node, 617 u64 fb_base) 618 { 619 static const __be32 io_of_addr[3] = { 620 cpu_to_be32(0x01000000), 621 cpu_to_be32(0x00), 622 cpu_to_be32(0x00), 623 }; 624 625 struct drm_device *dev = &odev->sysfb.dev; 626 u64 address; 627 void __iomem *cmap_base; 628 629 address = of_translate_address(of_node, io_of_addr); 630 if (address == OF_BAD_ADDR) 631 return IOMEM_ERR_PTR(-ENODEV); 632 633 cmap_base = devm_ioremap(dev->dev, address + 0x3c8, 2); 634 if (!cmap_base) 635 return IOMEM_ERR_PTR(-ENOMEM); 636 637 return cmap_base; 638 } 639 640 static void ofdrm_qemu_cmap_write(struct ofdrm_device *odev, unsigned char index, 641 unsigned char r, unsigned char g, unsigned char b) 642 { 643 void __iomem *addr = odev->cmap_base; 644 void __iomem *data = odev->cmap_base + 1; 645 646 writeb(index, addr); 647 writeb(r, data); 648 writeb(g, data); 649 writeb(b, data); 650 } 651 652 static void ofdrm_set_gamma_lut(struct drm_crtc *crtc, unsigned int index, 653 u16 red, u16 green, u16 blue) 654 { 655 struct drm_device *dev = crtc->dev; 656 struct ofdrm_device *odev = ofdrm_device_of_dev(dev); 657 u8 i8 = index & 0xff; 658 u8 r8 = red >> 8; 659 u8 g8 = green >> 8; 660 u8 b8 = blue >> 8; 661 662 if (drm_WARN_ON_ONCE(dev, index != i8)) 663 return; /* driver bug */ 664 665 odev->funcs->cmap_write(odev, i8, r8, g8, b8); 666 } 667 668 static void ofdrm_device_fill_gamma(struct ofdrm_device *odev, 669 const struct drm_format_info *format) 670 { 671 struct drm_device *dev = &odev->sysfb.dev; 672 struct drm_crtc *crtc = &odev->crtc; 673 674 switch (format->format) { 675 case DRM_FORMAT_RGB565: 676 case DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN: 677 drm_crtc_fill_gamma_565(crtc, ofdrm_set_gamma_lut); 678 break; 679 case DRM_FORMAT_XRGB8888: 680 case DRM_FORMAT_BGRX8888: 681 drm_crtc_fill_gamma_888(crtc, ofdrm_set_gamma_lut); 682 break; 683 default: 684 drm_warn_once(dev, "Unsupported format %p4cc for gamma correction\n", 685 &format->format); 686 break; 687 } 688 } 689 690 static void ofdrm_device_load_gamma(struct ofdrm_device *odev, 691 const struct drm_format_info *format, 692 struct drm_color_lut *lut) 693 { 694 struct drm_device *dev = &odev->sysfb.dev; 695 struct drm_crtc *crtc = &odev->crtc; 696 697 switch (format->format) { 698 case DRM_FORMAT_RGB565: 699 case DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN: 700 drm_crtc_load_gamma_565_from_888(crtc, lut, ofdrm_set_gamma_lut); 701 break; 702 case DRM_FORMAT_XRGB8888: 703 case DRM_FORMAT_BGRX8888: 704 drm_crtc_load_gamma_888(crtc, lut, ofdrm_set_gamma_lut); 705 break; 706 default: 707 drm_warn_once(dev, "Unsupported format %p4cc for gamma correction\n", 708 &format->format); 709 break; 710 } 711 } 712 713 /* 714 * Modesetting 715 */ 716 717 static const u64 ofdrm_primary_plane_format_modifiers[] = { 718 DRM_SYSFB_PLANE_FORMAT_MODIFIERS, 719 }; 720 721 static const struct drm_plane_helper_funcs ofdrm_primary_plane_helper_funcs = { 722 DRM_SYSFB_PLANE_HELPER_FUNCS, 723 }; 724 725 static const struct drm_plane_funcs ofdrm_primary_plane_funcs = { 726 DRM_SYSFB_PLANE_FUNCS, 727 .destroy = drm_plane_cleanup, 728 }; 729 730 static void ofdrm_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_commit *state) 731 { 732 struct ofdrm_device *odev = ofdrm_device_of_dev(crtc->dev); 733 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 734 struct drm_sysfb_crtc_state *sysfb_crtc_state = to_drm_sysfb_crtc_state(crtc_state); 735 736 if (crtc_state->enable && crtc_state->color_mgmt_changed) { 737 const struct drm_format_info *format = sysfb_crtc_state->format; 738 739 if (crtc_state->gamma_lut) 740 ofdrm_device_load_gamma(odev, format, crtc_state->gamma_lut->data); 741 else 742 ofdrm_device_fill_gamma(odev, format); 743 } 744 } 745 746 static const struct drm_crtc_helper_funcs ofdrm_crtc_helper_funcs = { 747 DRM_SYSFB_CRTC_HELPER_FUNCS, 748 .atomic_flush = ofdrm_crtc_helper_atomic_flush, 749 }; 750 751 static const struct drm_crtc_funcs ofdrm_crtc_funcs = { 752 DRM_SYSFB_CRTC_FUNCS, 753 .destroy = drm_crtc_cleanup, 754 }; 755 756 static const struct drm_encoder_funcs ofdrm_encoder_funcs = { 757 .destroy = drm_encoder_cleanup, 758 }; 759 760 static const struct drm_connector_helper_funcs ofdrm_connector_helper_funcs = { 761 DRM_SYSFB_CONNECTOR_HELPER_FUNCS, 762 }; 763 764 static const struct drm_connector_funcs ofdrm_connector_funcs = { 765 DRM_SYSFB_CONNECTOR_FUNCS, 766 .destroy = drm_connector_cleanup, 767 }; 768 769 static const struct drm_mode_config_funcs ofdrm_mode_config_funcs = { 770 DRM_SYSFB_MODE_CONFIG_FUNCS, 771 }; 772 773 /* 774 * Init / Cleanup 775 */ 776 777 static const struct ofdrm_device_funcs ofdrm_unknown_device_funcs = { 778 }; 779 780 static const struct ofdrm_device_funcs ofdrm_mach64_device_funcs = { 781 .cmap_ioremap = ofdrm_mach64_cmap_ioremap, 782 .cmap_write = ofdrm_mach64_cmap_write, 783 }; 784 785 static const struct ofdrm_device_funcs ofdrm_rage128_device_funcs = { 786 .cmap_ioremap = ofdrm_rage128_cmap_ioremap, 787 .cmap_write = ofdrm_rage128_cmap_write, 788 }; 789 790 static const struct ofdrm_device_funcs ofdrm_rage_m3a_device_funcs = { 791 .cmap_ioremap = ofdrm_rage_m3a_cmap_ioremap, 792 .cmap_write = ofdrm_rage_m3a_cmap_write, 793 }; 794 795 static const struct ofdrm_device_funcs ofdrm_rage_m3b_device_funcs = { 796 .cmap_ioremap = ofdrm_rage_m3b_cmap_ioremap, 797 .cmap_write = ofdrm_rage_m3b_cmap_write, 798 }; 799 800 static const struct ofdrm_device_funcs ofdrm_radeon_device_funcs = { 801 .cmap_ioremap = ofdrm_radeon_cmap_ioremap, 802 .cmap_write = ofdrm_rage128_cmap_write, /* same as Rage128 */ 803 }; 804 805 static const struct ofdrm_device_funcs ofdrm_gxt2000_device_funcs = { 806 .cmap_ioremap = ofdrm_gxt2000_cmap_ioremap, 807 .cmap_write = ofdrm_gxt2000_cmap_write, 808 }; 809 810 static const struct ofdrm_device_funcs ofdrm_avivo_device_funcs = { 811 .cmap_ioremap = ofdrm_avivo_cmap_ioremap, 812 .cmap_write = ofdrm_avivo_cmap_write, 813 }; 814 815 static const struct ofdrm_device_funcs ofdrm_qemu_device_funcs = { 816 .cmap_ioremap = ofdrm_qemu_cmap_ioremap, 817 .cmap_write = ofdrm_qemu_cmap_write, 818 }; 819 820 static struct ofdrm_device *ofdrm_device_create(struct drm_driver *drv, 821 struct platform_device *pdev) 822 { 823 struct device_node *of_node = pdev->dev.of_node; 824 struct ofdrm_device *odev; 825 struct drm_sysfb_device *sysfb; 826 struct drm_device *dev; 827 enum ofdrm_model model; 828 bool big_endian; 829 int width, height, depth, linebytes; 830 const struct drm_format_info *format; 831 u64 address; 832 const u8 *edid; 833 resource_size_t fb_size, fb_base, fb_pgbase, fb_pgsize; 834 struct resource *res, *mem; 835 void __iomem *screen_base; 836 struct drm_plane *primary_plane; 837 struct drm_crtc *crtc; 838 struct drm_encoder *encoder; 839 struct drm_connector *connector; 840 unsigned long max_width, max_height; 841 size_t nformats; 842 int ret; 843 844 odev = devm_drm_dev_alloc(&pdev->dev, drv, struct ofdrm_device, sysfb.dev); 845 if (IS_ERR(odev)) 846 return ERR_CAST(odev); 847 sysfb = &odev->sysfb; 848 dev = &sysfb->dev; 849 platform_set_drvdata(pdev, dev); 850 851 ret = ofdrm_device_init_pci(odev); 852 if (ret) 853 return ERR_PTR(ret); 854 855 /* 856 * OF display-node settings 857 */ 858 859 model = display_get_model_of(dev, of_node); 860 drm_dbg(dev, "detected model %d\n", model); 861 862 switch (model) { 863 case OFDRM_MODEL_UNKNOWN: 864 odev->funcs = &ofdrm_unknown_device_funcs; 865 break; 866 case OFDRM_MODEL_MACH64: 867 odev->funcs = &ofdrm_mach64_device_funcs; 868 break; 869 case OFDRM_MODEL_RAGE128: 870 odev->funcs = &ofdrm_rage128_device_funcs; 871 break; 872 case OFDRM_MODEL_RAGE_M3A: 873 odev->funcs = &ofdrm_rage_m3a_device_funcs; 874 break; 875 case OFDRM_MODEL_RAGE_M3B: 876 odev->funcs = &ofdrm_rage_m3b_device_funcs; 877 break; 878 case OFDRM_MODEL_RADEON: 879 odev->funcs = &ofdrm_radeon_device_funcs; 880 break; 881 case OFDRM_MODEL_GXT2000: 882 odev->funcs = &ofdrm_gxt2000_device_funcs; 883 break; 884 case OFDRM_MODEL_AVIVO: 885 odev->funcs = &ofdrm_avivo_device_funcs; 886 break; 887 case OFDRM_MODEL_QEMU: 888 odev->funcs = &ofdrm_qemu_device_funcs; 889 break; 890 } 891 892 big_endian = display_get_big_endian_of(dev, of_node); 893 894 width = display_get_width_of(dev, of_node); 895 if (width < 0) 896 return ERR_PTR(width); 897 height = display_get_height_of(dev, of_node); 898 if (height < 0) 899 return ERR_PTR(height); 900 depth = display_get_depth_of(dev, of_node); 901 if (depth < 0) 902 return ERR_PTR(depth); 903 linebytes = display_get_linebytes_of(dev, of_node); 904 if (linebytes < 0) 905 return ERR_PTR(linebytes); 906 907 format = display_get_validated_format(dev, depth, big_endian); 908 if (IS_ERR(format)) 909 return ERR_CAST(format); 910 if (!linebytes) { 911 linebytes = drm_format_info_min_pitch(format, 0, width); 912 if (drm_WARN_ON(dev, !linebytes)) 913 return ERR_PTR(-EINVAL); 914 } 915 916 fb_size = linebytes * height; 917 918 /* 919 * Try to figure out the address of the framebuffer. Unfortunately, Open 920 * Firmware doesn't provide a standard way to do so. All we can do is a 921 * dodgy heuristic that happens to work in practice. 922 * 923 * On most machines, the "address" property contains what we need, though 924 * not on Matrox cards found in IBM machines. What appears to give good 925 * results is to go through the PCI ranges and pick one that encloses the 926 * "address" property. If none match, we pick the largest. 927 */ 928 address = display_get_address_of(dev, of_node); 929 if (address != OF_BAD_ADDR) { 930 struct resource fb_res = DEFINE_RES_MEM(address, fb_size); 931 932 res = ofdrm_find_fb_resource(odev, &fb_res); 933 if (!res) 934 return ERR_PTR(-EINVAL); 935 if (resource_contains(res, &fb_res)) 936 fb_base = address; 937 else 938 fb_base = res->start; 939 } else { 940 struct resource fb_res = DEFINE_RES_MEM(0u, fb_size); 941 942 res = ofdrm_find_fb_resource(odev, &fb_res); 943 if (!res) 944 return ERR_PTR(-EINVAL); 945 fb_base = res->start; 946 } 947 948 /* 949 * I/O resources 950 */ 951 952 fb_pgbase = round_down(fb_base, PAGE_SIZE); 953 fb_pgsize = fb_base - fb_pgbase + round_up(fb_size, PAGE_SIZE); 954 955 ret = devm_aperture_acquire_for_platform_device(pdev, fb_pgbase, fb_pgsize); 956 if (ret) { 957 drm_err(dev, "could not acquire memory range %pr: error %d\n", &res, ret); 958 return ERR_PTR(ret); 959 } 960 961 mem = devm_request_mem_region(&pdev->dev, fb_pgbase, fb_pgsize, drv->name); 962 if (!mem) { 963 drm_warn(dev, "could not acquire memory region %pr\n", &res); 964 return ERR_PTR(-ENOMEM); 965 } 966 967 screen_base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); 968 if (!screen_base) 969 return ERR_PTR(-ENOMEM); 970 971 if (odev->funcs->cmap_ioremap) { 972 void __iomem *cmap_base = odev->funcs->cmap_ioremap(odev, of_node, fb_base); 973 974 if (IS_ERR(cmap_base)) { 975 /* Don't fail; continue without colormap */ 976 drm_warn(dev, "could not find colormap: error %ld\n", PTR_ERR(cmap_base)); 977 } else { 978 odev->cmap_base = cmap_base; 979 } 980 } 981 982 /* EDID is optional */ 983 edid = display_get_edid_of(dev, of_node, odev->edid); 984 985 /* 986 * Firmware framebuffer 987 */ 988 989 iosys_map_set_vaddr_iomem(&sysfb->fb_addr, screen_base); 990 sysfb->fb_mode = drm_sysfb_mode(width, height, 0, 0); 991 sysfb->fb_format = format; 992 sysfb->fb_pitch = linebytes; 993 if (odev->cmap_base) 994 sysfb->fb_gamma_lut_size = OFDRM_GAMMA_LUT_SIZE; 995 sysfb->edid = edid; 996 997 drm_dbg(dev, "display mode={" DRM_MODE_FMT "}\n", DRM_MODE_ARG(&sysfb->fb_mode)); 998 drm_dbg(dev, "framebuffer format=%p4cc, size=%dx%d, linebytes=%d byte\n", 999 &format->format, width, height, linebytes); 1000 1001 /* 1002 * Mode-setting pipeline 1003 */ 1004 1005 ret = drmm_mode_config_init(dev); 1006 if (ret) 1007 return ERR_PTR(ret); 1008 1009 max_width = max_t(unsigned long, width, DRM_SHADOW_PLANE_MAX_WIDTH); 1010 max_height = max_t(unsigned long, height, DRM_SHADOW_PLANE_MAX_HEIGHT); 1011 1012 dev->mode_config.min_width = width; 1013 dev->mode_config.max_width = max_width; 1014 dev->mode_config.min_height = height; 1015 dev->mode_config.max_height = max_height; 1016 dev->mode_config.funcs = &ofdrm_mode_config_funcs; 1017 dev->mode_config.preferred_depth = format->depth; 1018 dev->mode_config.quirk_addfb_prefer_host_byte_order = true; 1019 1020 /* Primary plane */ 1021 1022 nformats = drm_sysfb_build_fourcc_list(dev, &format->format, 1, 1023 odev->formats, ARRAY_SIZE(odev->formats)); 1024 1025 primary_plane = &odev->primary_plane; 1026 ret = drm_universal_plane_init(dev, primary_plane, 0, &ofdrm_primary_plane_funcs, 1027 odev->formats, nformats, 1028 ofdrm_primary_plane_format_modifiers, 1029 DRM_PLANE_TYPE_PRIMARY, NULL); 1030 if (ret) 1031 return ERR_PTR(ret); 1032 drm_plane_helper_add(primary_plane, &ofdrm_primary_plane_helper_funcs); 1033 drm_plane_enable_fb_damage_clips(primary_plane); 1034 1035 /* CRTC */ 1036 1037 crtc = &odev->crtc; 1038 ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL, 1039 &ofdrm_crtc_funcs, NULL); 1040 if (ret) 1041 return ERR_PTR(ret); 1042 drm_crtc_helper_add(crtc, &ofdrm_crtc_helper_funcs); 1043 1044 if (sysfb->fb_gamma_lut_size) { 1045 ret = drm_mode_crtc_set_gamma_size(crtc, sysfb->fb_gamma_lut_size); 1046 if (!ret) 1047 drm_crtc_enable_color_mgmt(crtc, 0, false, sysfb->fb_gamma_lut_size); 1048 } 1049 1050 /* Encoder */ 1051 1052 encoder = &odev->encoder; 1053 ret = drm_encoder_init(dev, encoder, &ofdrm_encoder_funcs, DRM_MODE_ENCODER_NONE, NULL); 1054 if (ret) 1055 return ERR_PTR(ret); 1056 encoder->possible_crtcs = drm_crtc_mask(crtc); 1057 1058 /* Connector */ 1059 1060 connector = &odev->connector; 1061 ret = drm_connector_init(dev, connector, &ofdrm_connector_funcs, 1062 DRM_MODE_CONNECTOR_Unknown); 1063 if (ret) 1064 return ERR_PTR(ret); 1065 drm_connector_helper_add(connector, &ofdrm_connector_helper_funcs); 1066 drm_connector_set_panel_orientation_with_quirk(connector, 1067 DRM_MODE_PANEL_ORIENTATION_UNKNOWN, 1068 width, height); 1069 if (edid) 1070 drm_connector_attach_edid_property(connector); 1071 1072 ret = drm_connector_attach_encoder(connector, encoder); 1073 if (ret) 1074 return ERR_PTR(ret); 1075 1076 drm_mode_config_reset(dev); 1077 1078 return odev; 1079 } 1080 1081 /* 1082 * DRM driver 1083 */ 1084 1085 DEFINE_DRM_GEM_FOPS(ofdrm_fops); 1086 1087 static struct drm_driver ofdrm_driver = { 1088 DRM_GEM_SHMEM_DRIVER_OPS, 1089 DRM_FBDEV_SHMEM_DRIVER_OPS, 1090 .name = DRIVER_NAME, 1091 .desc = DRIVER_DESC, 1092 .major = DRIVER_MAJOR, 1093 .minor = DRIVER_MINOR, 1094 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, 1095 .fops = &ofdrm_fops, 1096 }; 1097 1098 /* 1099 * Platform driver 1100 */ 1101 1102 static int ofdrm_pm_suspend(struct device *dev) 1103 { 1104 struct drm_device *drm = dev_get_drvdata(dev); 1105 1106 return drm_mode_config_helper_suspend(drm); 1107 } 1108 1109 static int ofdrm_pm_resume(struct device *dev) 1110 { 1111 struct drm_device *drm = dev_get_drvdata(dev); 1112 1113 return drm_mode_config_helper_resume(drm); 1114 } 1115 1116 static DEFINE_SIMPLE_DEV_PM_OPS(ofdrm_pm_ops, ofdrm_pm_suspend, ofdrm_pm_resume); 1117 1118 static int ofdrm_probe(struct platform_device *pdev) 1119 { 1120 struct ofdrm_device *odev; 1121 struct drm_sysfb_device *sysfb; 1122 struct drm_device *dev; 1123 int ret; 1124 1125 odev = ofdrm_device_create(&ofdrm_driver, pdev); 1126 if (IS_ERR(odev)) 1127 return PTR_ERR(odev); 1128 sysfb = &odev->sysfb; 1129 dev = &sysfb->dev; 1130 1131 ret = drm_dev_register(dev, 0); 1132 if (ret) 1133 return ret; 1134 1135 drm_client_setup(dev, sysfb->fb_format); 1136 1137 return 0; 1138 } 1139 1140 static void ofdrm_remove(struct platform_device *pdev) 1141 { 1142 struct drm_device *dev = platform_get_drvdata(pdev); 1143 1144 drm_dev_unplug(dev); 1145 } 1146 1147 static const struct of_device_id ofdrm_of_match_display[] = { 1148 { .compatible = "display", }, 1149 { }, 1150 }; 1151 MODULE_DEVICE_TABLE(of, ofdrm_of_match_display); 1152 1153 static struct platform_driver ofdrm_platform_driver = { 1154 .driver = { 1155 .name = "of-display", 1156 .of_match_table = ofdrm_of_match_display, 1157 .pm = pm_sleep_ptr(&ofdrm_pm_ops), 1158 }, 1159 .probe = ofdrm_probe, 1160 .remove = ofdrm_remove, 1161 }; 1162 1163 module_platform_driver(ofdrm_platform_driver); 1164 1165 MODULE_DESCRIPTION(DRIVER_DESC); 1166 MODULE_LICENSE("GPL"); 1167