xref: /linux/include/linux/iio/adc/ad_sigma_delta.h (revision 13845bdc869f136f92ad3d40ea09b867bb4ce467)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Support code for Analog Devices Sigma-Delta ADCs
4  *
5  * Copyright 2012 Analog Devices Inc.
6  *  Author: Lars-Peter Clausen <lars@metafoo.de>
7  */
8 #ifndef __AD_SIGMA_DELTA_H__
9 #define __AD_SIGMA_DELTA_H__
10 
11 #include <linux/iio/iio.h>
12 
13 enum ad_sigma_delta_mode {
14 	AD_SD_MODE_CONTINUOUS = 0,
15 	AD_SD_MODE_SINGLE = 1,
16 	AD_SD_MODE_IDLE = 2,
17 	AD_SD_MODE_POWERDOWN = 3,
18 };
19 
20 /**
21  * struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices
22  * @mode: Calibration mode.
23  * @channel: Calibration channel.
24  */
25 struct ad_sd_calib_data {
26 	unsigned int mode;
27 	unsigned int channel;
28 };
29 
30 struct ad_sigma_delta;
31 struct device;
32 struct gpio_desc;
33 struct iio_dev;
34 
35 /**
36  * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options
37  * @set_channel: Will be called to select the current channel, may be NULL.
38  * @append_status: Will be called to enable status append at the end of the sample, may be NULL.
39  * @set_mode: Will be called to select the current mode, may be NULL.
40  * @disable_all: Will be called to disable all channels, may be NULL.
41  * @disable_one: Will be called to disable a single channel after
42  *		ad_sigma_delta_single_conversion(), may be NULL.
43  *		Usage of this callback expects iio_chan_spec.address to contain
44  *		the value required for the driver to identify the channel.
45  * @postprocess_sample: Is called for each sampled data word, can be used to
46  *		modify or drop the sample data, it, may be NULL.
47  * @has_registers: true if the device has writable and readable registers, false
48  *		if there is just one read-only sample data shift register.
49  * @addr_shift: Shift of the register address in the communications register.
50  * @read_mask: Mask for the communications register having the read bit set.
51  * @status_ch_mask: Mask for the channel number stored in status register.
52  * @data_reg: Address of the data register, if 0 the default address of 0x3 will
53  *   be used.
54  * @irq_flags: flags for the interrupt used by the triggered buffer
55  * @num_slots: Number of sequencer slots
56  * @irq_line: IRQ for reading conversions. If 0, spi->irq will be used
57  * @num_resetclks: Number of SPI clk cycles with MOSI=1 to reset the chip.
58  */
59 struct ad_sigma_delta_info {
60 	int (*set_channel)(struct ad_sigma_delta *, unsigned int channel);
61 	int (*append_status)(struct ad_sigma_delta *, bool append);
62 	int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode);
63 	int (*disable_all)(struct ad_sigma_delta *);
64 	int (*disable_one)(struct ad_sigma_delta *, unsigned int chan);
65 	int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample);
66 	bool has_registers;
67 	unsigned int addr_shift;
68 	unsigned int read_mask;
69 	unsigned int status_ch_mask;
70 	unsigned int data_reg;
71 	unsigned long irq_flags;
72 	unsigned int num_slots;
73 	int irq_line;
74 	unsigned int num_resetclks;
75 };
76 
77 /**
78  * struct ad_sigma_delta - Sigma Delta device struct
79  * @spi: The spi device associated with the Sigma Delta device.
80  * @trig: The IIO trigger associated with the Sigma Delta device.
81  *
82  * Most of the fields are private to the sigma delta library code and should not
83  * be accessed by individual drivers.
84  */
85 struct ad_sigma_delta {
86 	struct spi_device	*spi;
87 	struct iio_trigger	*trig;
88 
89 /* private: */
90 	struct completion	completion;
91 	spinlock_t		irq_lock; /* protects .irq_dis and irq en/disable state */
92 	bool			irq_dis;
93 
94 	bool			bus_locked;
95 	bool			keep_cs_asserted;
96 
97 	uint8_t			comm;
98 
99 	const struct ad_sigma_delta_info *info;
100 	unsigned int		active_slots;
101 	unsigned int		current_slot;
102 	unsigned int		num_slots;
103 	struct gpio_desc	*rdy_gpiod;
104 	int			irq_line;
105 	bool			status_appended;
106 	/* map slots to channels in order to know what to expect from devices */
107 	unsigned int		*slots;
108 	uint8_t			*samples_buf;
109 
110 	/*
111 	 * DMA (thus cache coherency maintenance) requires the
112 	 * transfer buffers to live in their own cache lines.
113 	 * 'tx_buf' is up to 32 bits.
114 	 * 'rx_buf' is up to 32 bits per sample + 64 bit timestamp,
115 	 * rounded to 16 bytes to take into account padding.
116 	 */
117 	uint8_t				tx_buf[4] __aligned(IIO_DMA_MINALIGN);
118 	uint8_t				rx_buf[16] __aligned(8);
119 };
120 
121 static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd,
122 	unsigned int channel)
123 {
124 	if (sd->info->set_channel)
125 		return sd->info->set_channel(sd, channel);
126 
127 	return 0;
128 }
129 
130 static inline int ad_sigma_delta_append_status(struct ad_sigma_delta *sd, bool append)
131 {
132 	int ret;
133 
134 	if (sd->info->append_status) {
135 		ret = sd->info->append_status(sd, append);
136 		if (ret < 0)
137 			return ret;
138 
139 		sd->status_appended = append;
140 	}
141 
142 	return 0;
143 }
144 
145 static inline int ad_sigma_delta_disable_all(struct ad_sigma_delta *sd)
146 {
147 	if (sd->info->disable_all)
148 		return sd->info->disable_all(sd);
149 
150 	return 0;
151 }
152 
153 static inline int ad_sigma_delta_disable_one(struct ad_sigma_delta *sd,
154 					     unsigned int chan)
155 {
156 	if (sd->info->disable_one)
157 		return sd->info->disable_one(sd, chan);
158 
159 	return 0;
160 }
161 
162 static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd,
163 	unsigned int mode)
164 {
165 	if (sd->info->set_mode)
166 		return sd->info->set_mode(sd, mode);
167 
168 	return 0;
169 }
170 
171 static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd,
172 	unsigned int raw_sample)
173 {
174 	if (sd->info->postprocess_sample)
175 		return sd->info->postprocess_sample(sd, raw_sample);
176 
177 	return 0;
178 }
179 
180 void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm);
181 int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
182 	unsigned int size, unsigned int val);
183 int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
184 	unsigned int size, unsigned int *val);
185 
186 int ad_sd_reset(struct ad_sigma_delta *sigma_delta);
187 
188 int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev,
189 	const struct iio_chan_spec *chan, int *val);
190 int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta,
191 	unsigned int mode, unsigned int channel);
192 int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta,
193 	const struct ad_sd_calib_data *cd, unsigned int n);
194 int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev,
195 	struct spi_device *spi, const struct ad_sigma_delta_info *info);
196 
197 int devm_ad_sd_setup_buffer_and_trigger(struct device *dev, struct iio_dev *indio_dev);
198 
199 int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig);
200 
201 #endif
202