1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Analog Devices AD7292 SPI ADC driver
4 *
5 * Copyright 2019 Analog Devices Inc.
6 */
7
8 #include <linux/bitfield.h>
9 #include <linux/device.h>
10 #include <linux/module.h>
11 #include <linux/property.h>
12 #include <linux/regulator/consumer.h>
13 #include <linux/spi/spi.h>
14
15 #include <linux/iio/iio.h>
16
17 #define ADI_VENDOR_ID 0x0018
18
19 #define AD7292_INTERNAL_REF_MV 1250
20
21 /* AD7292 registers definition */
22 #define AD7292_REG_VENDOR_ID 0x00
23 #define AD7292_REG_CONF_BANK 0x05
24 #define AD7292_REG_CONV_COMM 0x0E
25 #define AD7292_REG_ADC_CH(x) (0x10 + (x))
26
27 /* AD7292 configuration bank subregisters definition */
28 #define AD7292_BANK_REG_VIN_RNG0 0x10
29 #define AD7292_BANK_REG_VIN_RNG1 0x11
30 #define AD7292_BANK_REG_SAMP_MODE 0x12
31
32 #define AD7292_RD_FLAG_MSK(x) (BIT(7) | ((x) & 0x3F))
33
34 /* AD7292_REG_ADC_CONVERSION */
35 #define AD7292_ADC_DATA_MASK GENMASK(15, 6)
36 #define AD7292_ADC_DATA(x) FIELD_GET(AD7292_ADC_DATA_MASK, x)
37
38 /* AD7292_CHANNEL_SAMPLING_MODE */
39 #define AD7292_CH_SAMP_MODE(reg, ch) (((reg) >> 8) & BIT(ch))
40
41 /* AD7292_CHANNEL_VIN_RANGE */
42 #define AD7292_CH_VIN_RANGE(reg, ch) ((reg) & BIT(ch))
43
44 #define AD7292_VOLTAGE_CHAN(_chan) \
45 { \
46 .type = IIO_VOLTAGE, \
47 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
48 BIT(IIO_CHAN_INFO_SCALE), \
49 .indexed = 1, \
50 .channel = _chan, \
51 }
52
53 static const struct iio_chan_spec ad7292_channels[] = {
54 AD7292_VOLTAGE_CHAN(0),
55 AD7292_VOLTAGE_CHAN(1),
56 AD7292_VOLTAGE_CHAN(2),
57 AD7292_VOLTAGE_CHAN(3),
58 AD7292_VOLTAGE_CHAN(4),
59 AD7292_VOLTAGE_CHAN(5),
60 AD7292_VOLTAGE_CHAN(6),
61 AD7292_VOLTAGE_CHAN(7)
62 };
63
64 static const struct iio_chan_spec ad7292_channels_diff[] = {
65 {
66 .type = IIO_VOLTAGE,
67 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
68 .indexed = 1,
69 .differential = 1,
70 .channel = 0,
71 .channel2 = 1,
72 },
73 AD7292_VOLTAGE_CHAN(2),
74 AD7292_VOLTAGE_CHAN(3),
75 AD7292_VOLTAGE_CHAN(4),
76 AD7292_VOLTAGE_CHAN(5),
77 AD7292_VOLTAGE_CHAN(6),
78 AD7292_VOLTAGE_CHAN(7)
79 };
80
81 struct ad7292_state {
82 struct spi_device *spi;
83 unsigned short vref_mv;
84
85 __be16 d16 __aligned(IIO_DMA_MINALIGN);
86 u8 d8[2];
87 };
88
ad7292_spi_reg_read(struct ad7292_state * st,unsigned int addr)89 static int ad7292_spi_reg_read(struct ad7292_state *st, unsigned int addr)
90 {
91 int ret;
92
93 st->d8[0] = AD7292_RD_FLAG_MSK(addr);
94
95 ret = spi_write_then_read(st->spi, st->d8, 1, &st->d16, 2);
96 if (ret < 0)
97 return ret;
98
99 return be16_to_cpu(st->d16);
100 }
101
ad7292_spi_subreg_read(struct ad7292_state * st,unsigned int addr,unsigned int sub_addr,unsigned int len)102 static int ad7292_spi_subreg_read(struct ad7292_state *st, unsigned int addr,
103 unsigned int sub_addr, unsigned int len)
104 {
105 unsigned int shift = 16 - (8 * len);
106 int ret;
107
108 st->d8[0] = AD7292_RD_FLAG_MSK(addr);
109 st->d8[1] = sub_addr;
110
111 ret = spi_write_then_read(st->spi, st->d8, 2, &st->d16, len);
112 if (ret < 0)
113 return ret;
114
115 return (be16_to_cpu(st->d16) >> shift);
116 }
117
ad7292_single_conversion(struct ad7292_state * st,unsigned int chan_addr)118 static int ad7292_single_conversion(struct ad7292_state *st,
119 unsigned int chan_addr)
120 {
121 int ret;
122
123 struct spi_transfer t[] = {
124 {
125 .tx_buf = &st->d8,
126 .len = 4,
127 .delay = {
128 .value = 6,
129 .unit = SPI_DELAY_UNIT_USECS
130 },
131 }, {
132 .rx_buf = &st->d16,
133 .len = 2,
134 },
135 };
136
137 st->d8[0] = chan_addr;
138 st->d8[1] = AD7292_RD_FLAG_MSK(AD7292_REG_CONV_COMM);
139
140 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
141
142 if (ret < 0)
143 return ret;
144
145 return be16_to_cpu(st->d16);
146 }
147
ad7292_vin_range_multiplier(struct ad7292_state * st,int channel)148 static int ad7292_vin_range_multiplier(struct ad7292_state *st, int channel)
149 {
150 int samp_mode, range0, range1, factor = 1;
151
152 /*
153 * Every AD7292 ADC channel may have its input range adjusted according
154 * to the settings at the ADC sampling mode and VIN range subregisters.
155 * For a given channel, the minimum input range is equal to Vref, and it
156 * may be increased by a multiplier factor of 2 or 4 according to the
157 * following rule:
158 * If channel is being sampled with respect to AGND:
159 * factor = 4 if VIN range0 and VIN range1 equal 0
160 * factor = 2 if only one of VIN ranges equal 1
161 * factor = 1 if both VIN range0 and VIN range1 equal 1
162 * If channel is being sampled with respect to AVDD:
163 * factor = 4 if VIN range0 and VIN range1 equal 0
164 * Behavior is undefined if any of VIN range doesn't equal 0
165 */
166
167 samp_mode = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
168 AD7292_BANK_REG_SAMP_MODE, 2);
169
170 if (samp_mode < 0)
171 return samp_mode;
172
173 range0 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
174 AD7292_BANK_REG_VIN_RNG0, 2);
175
176 if (range0 < 0)
177 return range0;
178
179 range1 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
180 AD7292_BANK_REG_VIN_RNG1, 2);
181
182 if (range1 < 0)
183 return range1;
184
185 if (AD7292_CH_SAMP_MODE(samp_mode, channel)) {
186 /* Sampling with respect to AGND */
187 if (!AD7292_CH_VIN_RANGE(range0, channel))
188 factor *= 2;
189
190 if (!AD7292_CH_VIN_RANGE(range1, channel))
191 factor *= 2;
192
193 } else {
194 /* Sampling with respect to AVDD */
195 if (AD7292_CH_VIN_RANGE(range0, channel) ||
196 AD7292_CH_VIN_RANGE(range1, channel))
197 return -EPERM;
198
199 factor = 4;
200 }
201
202 return factor;
203 }
204
ad7292_read_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long info)205 static int ad7292_read_raw(struct iio_dev *indio_dev,
206 const struct iio_chan_spec *chan,
207 int *val, int *val2, long info)
208 {
209 struct ad7292_state *st = iio_priv(indio_dev);
210 unsigned int ch_addr;
211 int ret;
212
213 switch (info) {
214 case IIO_CHAN_INFO_RAW:
215 ch_addr = AD7292_REG_ADC_CH(chan->channel);
216 ret = ad7292_single_conversion(st, ch_addr);
217 if (ret < 0)
218 return ret;
219
220 *val = AD7292_ADC_DATA(ret);
221
222 return IIO_VAL_INT;
223 case IIO_CHAN_INFO_SCALE:
224 /*
225 * To convert a raw value to standard units, the IIO defines
226 * this formula: Scaled value = (raw + offset) * scale.
227 * For the scale to be a correct multiplier for (raw + offset),
228 * it must be calculated as the input range divided by the
229 * number of possible distinct input values. Given the ADC data
230 * is 10 bit long, it may assume 2^10 distinct values.
231 * Hence, scale = range / 2^10. The IIO_VAL_FRACTIONAL_LOG2
232 * return type indicates to the IIO API to divide *val by 2 to
233 * the power of *val2 when returning from read_raw.
234 */
235
236 ret = ad7292_vin_range_multiplier(st, chan->channel);
237 if (ret < 0)
238 return ret;
239
240 *val = st->vref_mv * ret;
241 *val2 = 10;
242 return IIO_VAL_FRACTIONAL_LOG2;
243 default:
244 break;
245 }
246 return -EINVAL;
247 }
248
249 static const struct iio_info ad7292_info = {
250 .read_raw = ad7292_read_raw,
251 };
252
ad7292_probe(struct spi_device * spi)253 static int ad7292_probe(struct spi_device *spi)
254 {
255 struct device *dev = &spi->dev;
256 struct ad7292_state *st;
257 struct iio_dev *indio_dev;
258 bool diff_channels = false;
259 int ret;
260
261 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
262 if (!indio_dev)
263 return -ENOMEM;
264
265 st = iio_priv(indio_dev);
266 st->spi = spi;
267
268 ret = ad7292_spi_reg_read(st, AD7292_REG_VENDOR_ID);
269 if (ret != ADI_VENDOR_ID)
270 return dev_err_probe(dev, -EINVAL,
271 "Wrong vendor id 0x%x\n", ret);
272
273 ret = devm_regulator_get_enable_read_voltage(dev, "vref");
274 if (ret < 0 && ret != -ENODEV)
275 return ret;
276
277 st->vref_mv = ret == -ENODEV ? AD7292_INTERNAL_REF_MV : ret / 1000;
278
279 indio_dev->name = spi_get_device_id(spi)->name;
280 indio_dev->modes = INDIO_DIRECT_MODE;
281 indio_dev->info = &ad7292_info;
282
283 device_for_each_child_node_scoped(dev, child) {
284 diff_channels = fwnode_property_read_bool(child,
285 "diff-channels");
286 if (diff_channels)
287 break;
288 }
289
290 if (diff_channels) {
291 indio_dev->num_channels = ARRAY_SIZE(ad7292_channels_diff);
292 indio_dev->channels = ad7292_channels_diff;
293 } else {
294 indio_dev->num_channels = ARRAY_SIZE(ad7292_channels);
295 indio_dev->channels = ad7292_channels;
296 }
297
298 return devm_iio_device_register(dev, indio_dev);
299 }
300
301 static const struct spi_device_id ad7292_id_table[] = {
302 { .name = "ad7292" },
303 { }
304 };
305 MODULE_DEVICE_TABLE(spi, ad7292_id_table);
306
307 static const struct of_device_id ad7292_of_match[] = {
308 { .compatible = "adi,ad7292" },
309 { }
310 };
311 MODULE_DEVICE_TABLE(of, ad7292_of_match);
312
313 static struct spi_driver ad7292_driver = {
314 .driver = {
315 .name = "ad7292",
316 .of_match_table = ad7292_of_match,
317 },
318 .probe = ad7292_probe,
319 .id_table = ad7292_id_table,
320 };
321 module_spi_driver(ad7292_driver);
322
323 MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt1@gmail.com>");
324 MODULE_DESCRIPTION("Analog Devices AD7292 ADC driver");
325 MODULE_LICENSE("GPL v2");
326