1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50 */
51
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/sched.h>
56 #include <linux/string.h>
57 #include <linux/timer.h>
58 #include <linux/errno.h>
59 #include <linux/ioport.h>
60 #include <linux/slab.h>
61 #include <linux/interrupt.h>
62 #include <linux/pci.h>
63 #include <linux/netdevice.h>
64 #include <linux/init.h>
65 #include <linux/mii.h>
66 #include <linux/etherdevice.h>
67 #include <linux/skbuff.h>
68 #include <linux/delay.h>
69 #include <linux/ethtool.h>
70 #include <linux/crc32.h>
71 #include <linux/bitops.h>
72 #include <linux/dma-mapping.h>
73
74 #include <asm/processor.h> /* Processor type for cache alignment. */
75 #include <asm/io.h>
76 #include <asm/irq.h>
77 #include <linux/uaccess.h> /* User space memory access functions */
78
79 #include "sis900.h"
80
81 #define SIS900_MODULE_NAME "sis900"
82
83 static int max_interrupt_work = 40;
84 static int multicast_filter_limit = 128;
85
86 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
87
88 #define SIS900_DEF_MSG \
89 (NETIF_MSG_DRV | \
90 NETIF_MSG_LINK | \
91 NETIF_MSG_RX_ERR | \
92 NETIF_MSG_TX_ERR)
93
94 /* Time in jiffies before concluding the transmitter is hung. */
95 #define TX_TIMEOUT (4*HZ)
96
97 enum {
98 SIS_900 = 0,
99 SIS_7016
100 };
101 static const char * card_names[] = {
102 "SiS 900 PCI Fast Ethernet",
103 "SiS 7016 PCI Fast Ethernet"
104 };
105
106 static const struct pci_device_id sis900_pci_tbl[] = {
107 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
108 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
111 {0,}
112 };
113 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
114
115 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
116
117 static const struct mii_chip_info {
118 const char * name;
119 u16 phy_id0;
120 u16 phy_id1;
121 u8 phy_types;
122 #define HOME 0x0001
123 #define LAN 0x0002
124 #define MIX 0x0003
125 #define UNKNOWN 0x0
126 } mii_chip_table[] = {
127 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
128 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
129 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
130 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
131 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
132 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
133 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
134 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
135 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
136 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
137 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
138 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
139 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
140 {NULL,},
141 };
142
143 struct mii_phy {
144 struct mii_phy * next;
145 int phy_addr;
146 u16 phy_id0;
147 u16 phy_id1;
148 u16 status;
149 u8 phy_types;
150 };
151
152 typedef struct _BufferDesc {
153 u32 link;
154 u32 cmdsts;
155 u32 bufptr;
156 } BufferDesc;
157
158 struct sis900_private {
159 struct pci_dev * pci_dev;
160
161 spinlock_t lock;
162
163 struct mii_phy * mii;
164 struct mii_phy * first_mii; /* record the first mii structure */
165 unsigned int cur_phy;
166 struct mii_if_info mii_info;
167
168 void __iomem *ioaddr;
169
170 struct timer_list timer; /* Link status detection timer. */
171 u8 autong_complete; /* 1: auto-negotiate complete */
172
173 u32 msg_enable;
174
175 unsigned int cur_rx, dirty_rx; /* producer/consumer pointers for Tx/Rx ring */
176 unsigned int cur_tx, dirty_tx;
177
178 /* The saved address of a sent/receive-in-place packet buffer */
179 struct sk_buff *tx_skbuff[NUM_TX_DESC];
180 struct sk_buff *rx_skbuff[NUM_RX_DESC];
181 BufferDesc *tx_ring;
182 BufferDesc *rx_ring;
183
184 dma_addr_t tx_ring_dma;
185 dma_addr_t rx_ring_dma;
186
187 unsigned int tx_full; /* The Tx queue is full. */
188 u8 host_bridge_rev;
189 u8 chipset_rev;
190 /* EEPROM data */
191 int eeprom_size;
192 };
193
194 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
195 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
196 MODULE_LICENSE("GPL");
197
198 module_param(multicast_filter_limit, int, 0444);
199 module_param(max_interrupt_work, int, 0444);
200 module_param(sis900_debug, int, 0444);
201 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
202 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
203 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
204
205 #define sw32(reg, val) iowrite32(val, ioaddr + (reg))
206 #define sw8(reg, val) iowrite8(val, ioaddr + (reg))
207 #define sr32(reg) ioread32(ioaddr + (reg))
208 #define sr16(reg) ioread16(ioaddr + (reg))
209
210 #ifdef CONFIG_NET_POLL_CONTROLLER
211 static void sis900_poll(struct net_device *dev);
212 #endif
213 static int sis900_open(struct net_device *net_dev);
214 static int sis900_mii_probe (struct net_device * net_dev);
215 static void sis900_init_rxfilter (struct net_device * net_dev);
216 static u16 read_eeprom(void __iomem *ioaddr, int location);
217 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
218 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
219 static void sis900_timer(struct timer_list *t);
220 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
221 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue);
222 static void sis900_init_tx_ring(struct net_device *net_dev);
223 static void sis900_init_rx_ring(struct net_device *net_dev);
224 static netdev_tx_t sis900_start_xmit(struct sk_buff *skb,
225 struct net_device *net_dev);
226 static int sis900_rx(struct net_device *net_dev);
227 static void sis900_finish_xmit (struct net_device *net_dev);
228 static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
229 static int sis900_close(struct net_device *net_dev);
230 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
231 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
232 static void set_rx_mode(struct net_device *net_dev);
233 static void sis900_reset(struct net_device *net_dev);
234 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
235 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
236 static u16 sis900_default_phy(struct net_device * net_dev);
237 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
238 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
239 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
240 static void sis900_set_mode(struct sis900_private *, int speed, int duplex);
241 static const struct ethtool_ops sis900_ethtool_ops;
242
243 /**
244 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
245 * @pci_dev: the sis900 pci device
246 * @net_dev: the net device to get address for
247 *
248 * Older SiS900 and friends, use EEPROM to store MAC address.
249 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
250 */
251
sis900_get_mac_addr(struct pci_dev * pci_dev,struct net_device * net_dev)252 static int sis900_get_mac_addr(struct pci_dev *pci_dev,
253 struct net_device *net_dev)
254 {
255 struct sis900_private *sis_priv = netdev_priv(net_dev);
256 void __iomem *ioaddr = sis_priv->ioaddr;
257 u16 addr[ETH_ALEN / 2];
258 u16 signature;
259 int i;
260
261 /* check to see if we have sane EEPROM */
262 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
263 if (signature == 0xffff || signature == 0x0000) {
264 printk (KERN_WARNING "%s: Error EEPROM read %x\n",
265 pci_name(pci_dev), signature);
266 return 0;
267 }
268
269 /* get MAC address from EEPROM */
270 for (i = 0; i < 3; i++)
271 addr[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
272 eth_hw_addr_set(net_dev, (u8 *)addr);
273
274 return 1;
275 }
276
277 /**
278 * sis630e_get_mac_addr - Get MAC address for SiS630E model
279 * @pci_dev: the sis900 pci device
280 * @net_dev: the net device to get address for
281 *
282 * SiS630E model, use APC CMOS RAM to store MAC address.
283 * APC CMOS RAM is accessed through ISA bridge.
284 * MAC address is read into @net_dev->dev_addr.
285 */
286
sis630e_get_mac_addr(struct pci_dev * pci_dev,struct net_device * net_dev)287 static int sis630e_get_mac_addr(struct pci_dev *pci_dev,
288 struct net_device *net_dev)
289 {
290 struct pci_dev *isa_bridge = NULL;
291 u8 addr[ETH_ALEN];
292 u8 reg;
293 int i;
294
295 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
296 if (!isa_bridge)
297 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
298 if (!isa_bridge) {
299 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
300 pci_name(pci_dev));
301 return 0;
302 }
303 pci_read_config_byte(isa_bridge, 0x48, ®);
304 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
305
306 for (i = 0; i < 6; i++) {
307 outb(0x09 + i, 0x70);
308 addr[i] = inb(0x71);
309 }
310 eth_hw_addr_set(net_dev, addr);
311
312 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
313 pci_dev_put(isa_bridge);
314
315 return 1;
316 }
317
318
319 /**
320 * sis635_get_mac_addr - Get MAC address for SIS635 model
321 * @pci_dev: the sis900 pci device
322 * @net_dev: the net device to get address for
323 *
324 * SiS635 model, set MAC Reload Bit to load Mac address from APC
325 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
326 * @net_dev->dev_addr.
327 */
328
sis635_get_mac_addr(struct pci_dev * pci_dev,struct net_device * net_dev)329 static int sis635_get_mac_addr(struct pci_dev *pci_dev,
330 struct net_device *net_dev)
331 {
332 struct sis900_private *sis_priv = netdev_priv(net_dev);
333 void __iomem *ioaddr = sis_priv->ioaddr;
334 u16 addr[ETH_ALEN / 2];
335 u32 rfcrSave;
336 u32 i;
337
338 rfcrSave = sr32(rfcr);
339
340 sw32(cr, rfcrSave | RELOAD);
341 sw32(cr, 0);
342
343 /* disable packet filtering before setting filter */
344 sw32(rfcr, rfcrSave & ~RFEN);
345
346 /* load MAC addr to filter data register */
347 for (i = 0 ; i < 3 ; i++) {
348 sw32(rfcr, (i << RFADDR_shift));
349 addr[i] = sr16(rfdr);
350 }
351 eth_hw_addr_set(net_dev, (u8 *)addr);
352
353 /* enable packet filtering */
354 sw32(rfcr, rfcrSave | RFEN);
355
356 return 1;
357 }
358
359 /**
360 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
361 * @pci_dev: the sis900 pci device
362 * @net_dev: the net device to get address for
363 *
364 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
365 * is shared by
366 * LAN and 1394. When accessing EEPROM, send EEREQ signal to hardware first
367 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be accessed
368 * by LAN, otherwise it is not. After MAC address is read from EEPROM, send
369 * EEDONE signal to refuse EEPROM access by LAN.
370 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
371 * The signature field in SiS962 or SiS963 spec is meaningless.
372 * MAC address is read into @net_dev->dev_addr.
373 */
374
sis96x_get_mac_addr(struct pci_dev * pci_dev,struct net_device * net_dev)375 static int sis96x_get_mac_addr(struct pci_dev *pci_dev,
376 struct net_device *net_dev)
377 {
378 struct sis900_private *sis_priv = netdev_priv(net_dev);
379 void __iomem *ioaddr = sis_priv->ioaddr;
380 u16 addr[ETH_ALEN / 2];
381 int wait, rc = 0;
382
383 sw32(mear, EEREQ);
384 for (wait = 0; wait < 2000; wait++) {
385 if (sr32(mear) & EEGNT) {
386 int i;
387
388 /* get MAC address from EEPROM */
389 for (i = 0; i < 3; i++)
390 addr[i] = read_eeprom(ioaddr, i + EEPROMMACAddr);
391 eth_hw_addr_set(net_dev, (u8 *)addr);
392
393 rc = 1;
394 break;
395 }
396 udelay(1);
397 }
398 sw32(mear, EEDONE);
399 return rc;
400 }
401
402 static const struct net_device_ops sis900_netdev_ops = {
403 .ndo_open = sis900_open,
404 .ndo_stop = sis900_close,
405 .ndo_start_xmit = sis900_start_xmit,
406 .ndo_set_config = sis900_set_config,
407 .ndo_set_rx_mode = set_rx_mode,
408 .ndo_validate_addr = eth_validate_addr,
409 .ndo_set_mac_address = eth_mac_addr,
410 .ndo_eth_ioctl = mii_ioctl,
411 .ndo_tx_timeout = sis900_tx_timeout,
412 #ifdef CONFIG_NET_POLL_CONTROLLER
413 .ndo_poll_controller = sis900_poll,
414 #endif
415 };
416
417 /**
418 * sis900_probe - Probe for sis900 device
419 * @pci_dev: the sis900 pci device
420 * @pci_id: the pci device ID
421 *
422 * Check and probe sis900 net device for @pci_dev.
423 * Get mac address according to the chip revision,
424 * and assign SiS900-specific entries in the device structure.
425 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
426 */
427
sis900_probe(struct pci_dev * pci_dev,const struct pci_device_id * pci_id)428 static int sis900_probe(struct pci_dev *pci_dev,
429 const struct pci_device_id *pci_id)
430 {
431 struct sis900_private *sis_priv;
432 struct net_device *net_dev;
433 struct pci_dev *dev;
434 dma_addr_t ring_dma;
435 void *ring_space;
436 void __iomem *ioaddr;
437 int i, ret;
438 const char *card_name = card_names[pci_id->driver_data];
439 const char *dev_name = pci_name(pci_dev);
440
441 /* setup various bits in PCI command register */
442 ret = pcim_enable_device(pci_dev);
443 if(ret) return ret;
444
445 i = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32));
446 if(i){
447 printk(KERN_ERR "sis900.c: architecture does not support "
448 "32bit PCI busmaster DMA\n");
449 return i;
450 }
451
452 pci_set_master(pci_dev);
453
454 net_dev = alloc_etherdev(sizeof(struct sis900_private));
455 if (!net_dev)
456 return -ENOMEM;
457 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
458
459 /* We do a request_region() to register /proc/ioports info. */
460 ret = pcim_request_all_regions(pci_dev, "sis900");
461 if (ret)
462 goto err_out;
463
464 /* IO region. */
465 ioaddr = pci_iomap(pci_dev, 0, 0);
466 if (!ioaddr) {
467 ret = -ENOMEM;
468 goto err_out;
469 }
470
471 sis_priv = netdev_priv(net_dev);
472 sis_priv->ioaddr = ioaddr;
473 sis_priv->pci_dev = pci_dev;
474 spin_lock_init(&sis_priv->lock);
475
476 sis_priv->eeprom_size = 24;
477
478 pci_set_drvdata(pci_dev, net_dev);
479
480 ring_space = dma_alloc_coherent(&pci_dev->dev, TX_TOTAL_SIZE,
481 &ring_dma, GFP_KERNEL);
482 if (!ring_space) {
483 ret = -ENOMEM;
484 goto err_out_unmap;
485 }
486 sis_priv->tx_ring = ring_space;
487 sis_priv->tx_ring_dma = ring_dma;
488
489 ring_space = dma_alloc_coherent(&pci_dev->dev, RX_TOTAL_SIZE,
490 &ring_dma, GFP_KERNEL);
491 if (!ring_space) {
492 ret = -ENOMEM;
493 goto err_unmap_tx;
494 }
495 sis_priv->rx_ring = ring_space;
496 sis_priv->rx_ring_dma = ring_dma;
497
498 /* The SiS900-specific entries in the device structure. */
499 net_dev->netdev_ops = &sis900_netdev_ops;
500 net_dev->watchdog_timeo = TX_TIMEOUT;
501 net_dev->ethtool_ops = &sis900_ethtool_ops;
502
503 if (sis900_debug > 0)
504 sis_priv->msg_enable = sis900_debug;
505 else
506 sis_priv->msg_enable = SIS900_DEF_MSG;
507
508 sis_priv->mii_info.dev = net_dev;
509 sis_priv->mii_info.mdio_read = mdio_read;
510 sis_priv->mii_info.mdio_write = mdio_write;
511 sis_priv->mii_info.phy_id_mask = 0x1f;
512 sis_priv->mii_info.reg_num_mask = 0x1f;
513
514 /* Get Mac address according to the chip revision */
515 sis_priv->chipset_rev = pci_dev->revision;
516 if(netif_msg_probe(sis_priv))
517 printk(KERN_DEBUG "%s: detected revision %2.2x, "
518 "trying to get MAC address...\n",
519 dev_name, sis_priv->chipset_rev);
520
521 ret = 0;
522 if (sis_priv->chipset_rev == SIS630E_900_REV)
523 ret = sis630e_get_mac_addr(pci_dev, net_dev);
524 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
525 ret = sis635_get_mac_addr(pci_dev, net_dev);
526 else if (sis_priv->chipset_rev == SIS96x_900_REV)
527 ret = sis96x_get_mac_addr(pci_dev, net_dev);
528 else
529 ret = sis900_get_mac_addr(pci_dev, net_dev);
530
531 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
532 eth_hw_addr_random(net_dev);
533 printk(KERN_WARNING "%s: Unreadable or invalid MAC address,"
534 "using random generated one\n", dev_name);
535 }
536
537 /* 630ET : set the mii access mode as software-mode */
538 if (sis_priv->chipset_rev == SIS630ET_900_REV)
539 sw32(cr, ACCESSMODE | sr32(cr));
540
541 /* probe for mii transceiver */
542 if (sis900_mii_probe(net_dev) == 0) {
543 printk(KERN_WARNING "%s: Error probing MII device.\n",
544 dev_name);
545 ret = -ENODEV;
546 goto err_unmap_rx;
547 }
548
549 /* save our host bridge revision */
550 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
551 if (dev) {
552 sis_priv->host_bridge_rev = dev->revision;
553 pci_dev_put(dev);
554 }
555
556 ret = register_netdev(net_dev);
557 if (ret)
558 goto err_unmap_rx;
559
560 /* print some information about our NIC */
561 printk(KERN_INFO "%s: %s at 0x%p, IRQ %d, %pM\n",
562 net_dev->name, card_name, ioaddr, pci_dev->irq,
563 net_dev->dev_addr);
564
565 /* Detect Wake on Lan support */
566 ret = (sr32(CFGPMC) & PMESP) >> 27;
567 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
568 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
569
570 return 0;
571
572 err_unmap_rx:
573 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
574 sis_priv->rx_ring_dma);
575 err_unmap_tx:
576 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
577 sis_priv->tx_ring_dma);
578 err_out_unmap:
579 pci_iounmap(pci_dev, ioaddr);
580 err_out:
581 free_netdev(net_dev);
582 return ret;
583 }
584
585 /**
586 * sis900_mii_probe - Probe MII PHY for sis900
587 * @net_dev: the net device to probe for
588 *
589 * Search for total of 32 possible mii phy addresses.
590 * Identify and set current phy if found one,
591 * return error if it failed to found.
592 */
593
sis900_mii_probe(struct net_device * net_dev)594 static int sis900_mii_probe(struct net_device *net_dev)
595 {
596 struct sis900_private *sis_priv = netdev_priv(net_dev);
597 const char *dev_name = pci_name(sis_priv->pci_dev);
598 u16 poll_bit = MII_STAT_LINK, status = 0;
599 unsigned long timeout = jiffies + 5 * HZ;
600 int phy_addr;
601
602 sis_priv->mii = NULL;
603
604 /* search for total of 32 possible mii phy addresses */
605 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
606 struct mii_phy * mii_phy = NULL;
607 u16 mii_status;
608 int i;
609
610 mii_phy = NULL;
611 for(i = 0; i < 2; i++)
612 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
613
614 if (mii_status == 0xffff || mii_status == 0x0000) {
615 if (netif_msg_probe(sis_priv))
616 printk(KERN_DEBUG "%s: MII at address %d"
617 " not accessible\n",
618 dev_name, phy_addr);
619 continue;
620 }
621
622 if ((mii_phy = kmalloc_obj(struct mii_phy)) == NULL) {
623 mii_phy = sis_priv->first_mii;
624 while (mii_phy) {
625 struct mii_phy *phy;
626 phy = mii_phy;
627 mii_phy = mii_phy->next;
628 kfree(phy);
629 }
630 return 0;
631 }
632
633 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
634 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
635 mii_phy->phy_addr = phy_addr;
636 mii_phy->status = mii_status;
637 mii_phy->next = sis_priv->mii;
638 sis_priv->mii = mii_phy;
639 sis_priv->first_mii = mii_phy;
640
641 for (i = 0; mii_chip_table[i].phy_id1; i++)
642 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
643 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
644 mii_phy->phy_types = mii_chip_table[i].phy_types;
645 if (mii_chip_table[i].phy_types == MIX)
646 mii_phy->phy_types =
647 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
648 printk(KERN_INFO "%s: %s transceiver found "
649 "at address %d.\n",
650 dev_name,
651 mii_chip_table[i].name,
652 phy_addr);
653 break;
654 }
655
656 if( !mii_chip_table[i].phy_id1 ) {
657 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
658 dev_name, phy_addr);
659 mii_phy->phy_types = UNKNOWN;
660 }
661 }
662
663 if (sis_priv->mii == NULL) {
664 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
665 return 0;
666 }
667
668 /* select default PHY for mac */
669 sis_priv->mii = NULL;
670 sis900_default_phy( net_dev );
671
672 /* Reset phy if default phy is internal sis900 */
673 if ((sis_priv->mii->phy_id0 == 0x001D) &&
674 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
675 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
676
677 /* workaround for ICS1893 PHY */
678 if ((sis_priv->mii->phy_id0 == 0x0015) &&
679 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
680 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
681
682 if(status & MII_STAT_LINK){
683 while (poll_bit) {
684 yield();
685
686 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
687 if (time_after_eq(jiffies, timeout)) {
688 printk(KERN_WARNING "%s: reset phy and link down now\n",
689 dev_name);
690 return -ETIME;
691 }
692 }
693 }
694
695 if (sis_priv->chipset_rev == SIS630E_900_REV) {
696 /* SiS 630E has some bugs on default value of PHY registers */
697 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
698 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
699 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
700 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
701 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
702 }
703
704 if (sis_priv->mii->status & MII_STAT_LINK)
705 netif_carrier_on(net_dev);
706 else
707 netif_carrier_off(net_dev);
708
709 return 1;
710 }
711
712 /**
713 * sis900_default_phy - Select default PHY for sis900 mac.
714 * @net_dev: the net device to probe for
715 *
716 * Select first detected PHY with link as default.
717 * If no one is link on, select PHY whose types is HOME as default.
718 * If HOME doesn't exist, select LAN.
719 */
720
sis900_default_phy(struct net_device * net_dev)721 static u16 sis900_default_phy(struct net_device * net_dev)
722 {
723 struct sis900_private *sis_priv = netdev_priv(net_dev);
724 struct mii_phy *phy = NULL, *phy_home = NULL,
725 *default_phy = NULL, *phy_lan = NULL;
726 u16 status;
727
728 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
729 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
730 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
731
732 /* Link ON & Not select default PHY & not ghost PHY */
733 if ((status & MII_STAT_LINK) && !default_phy &&
734 (phy->phy_types != UNKNOWN)) {
735 default_phy = phy;
736 } else {
737 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
738 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
739 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
740 if (phy->phy_types == HOME)
741 phy_home = phy;
742 else if(phy->phy_types == LAN)
743 phy_lan = phy;
744 }
745 }
746
747 if (!default_phy && phy_home)
748 default_phy = phy_home;
749 else if (!default_phy && phy_lan)
750 default_phy = phy_lan;
751 else if (!default_phy)
752 default_phy = sis_priv->first_mii;
753
754 if (sis_priv->mii != default_phy) {
755 sis_priv->mii = default_phy;
756 sis_priv->cur_phy = default_phy->phy_addr;
757 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
758 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
759 }
760
761 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
762
763 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
764 status &= (~MII_CNTL_ISOLATE);
765
766 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
767 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
768 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
769
770 return status;
771 }
772
773
774 /**
775 * sis900_set_capability - set the media capability of network adapter.
776 * @net_dev : the net device to probe for
777 * @phy : default PHY
778 *
779 * Set the media capability of network adapter according to
780 * mii status register. It's necessary before auto-negotiate.
781 */
782
sis900_set_capability(struct net_device * net_dev,struct mii_phy * phy)783 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
784 {
785 u16 cap;
786
787 mdio_read(net_dev, phy->phy_addr, MII_STATUS);
788 mdio_read(net_dev, phy->phy_addr, MII_STATUS);
789
790 cap = MII_NWAY_CSMA_CD |
791 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
792 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
793 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
794 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
795
796 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
797 }
798
799
800 /* Delay between EEPROM clock transitions. */
801 #define eeprom_delay() sr32(mear)
802
803 /**
804 * read_eeprom - Read Serial EEPROM
805 * @ioaddr: base i/o address
806 * @location: the EEPROM location to read
807 *
808 * Read Serial EEPROM through EEPROM Access Register.
809 * Note that location is in word (16 bits) unit
810 */
811
read_eeprom(void __iomem * ioaddr,int location)812 static u16 read_eeprom(void __iomem *ioaddr, int location)
813 {
814 u32 read_cmd = location | EEread;
815 int i;
816 u16 retval = 0;
817
818 sw32(mear, 0);
819 eeprom_delay();
820 sw32(mear, EECS);
821 eeprom_delay();
822
823 /* Shift the read command (9) bits out. */
824 for (i = 8; i >= 0; i--) {
825 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
826
827 sw32(mear, dataval);
828 eeprom_delay();
829 sw32(mear, dataval | EECLK);
830 eeprom_delay();
831 }
832 sw32(mear, EECS);
833 eeprom_delay();
834
835 /* read the 16-bits data in */
836 for (i = 16; i > 0; i--) {
837 sw32(mear, EECS);
838 eeprom_delay();
839 sw32(mear, EECS | EECLK);
840 eeprom_delay();
841 retval = (retval << 1) | ((sr32(mear) & EEDO) ? 1 : 0);
842 eeprom_delay();
843 }
844
845 /* Terminate the EEPROM access. */
846 sw32(mear, 0);
847 eeprom_delay();
848
849 return retval;
850 }
851
852 /* Read and write the MII management registers using software-generated
853 serial MDIO protocol. Note that the command bits and data bits are
854 send out separately */
855 #define mdio_delay() sr32(mear)
856
mdio_idle(struct sis900_private * sp)857 static void mdio_idle(struct sis900_private *sp)
858 {
859 void __iomem *ioaddr = sp->ioaddr;
860
861 sw32(mear, MDIO | MDDIR);
862 mdio_delay();
863 sw32(mear, MDIO | MDDIR | MDC);
864 }
865
866 /* Synchronize the MII management interface by shifting 32 one bits out. */
mdio_reset(struct sis900_private * sp)867 static void mdio_reset(struct sis900_private *sp)
868 {
869 void __iomem *ioaddr = sp->ioaddr;
870 int i;
871
872 for (i = 31; i >= 0; i--) {
873 sw32(mear, MDDIR | MDIO);
874 mdio_delay();
875 sw32(mear, MDDIR | MDIO | MDC);
876 mdio_delay();
877 }
878 }
879
880 /**
881 * mdio_read - read MII PHY register
882 * @net_dev: the net device to read
883 * @phy_id: the phy address to read
884 * @location: the phy register id to read
885 *
886 * Read MII registers through MDIO and MDC
887 * using MDIO management frame structure and protocol(defined by ISO/IEC).
888 * Please see SiS7014 or ICS spec
889 */
890
mdio_read(struct net_device * net_dev,int phy_id,int location)891 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
892 {
893 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
894 struct sis900_private *sp = netdev_priv(net_dev);
895 void __iomem *ioaddr = sp->ioaddr;
896 u16 retval = 0;
897 int i;
898
899 mdio_reset(sp);
900 mdio_idle(sp);
901
902 for (i = 15; i >= 0; i--) {
903 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
904
905 sw32(mear, dataval);
906 mdio_delay();
907 sw32(mear, dataval | MDC);
908 mdio_delay();
909 }
910
911 /* Read the 16 data bits. */
912 for (i = 16; i > 0; i--) {
913 sw32(mear, 0);
914 mdio_delay();
915 retval = (retval << 1) | ((sr32(mear) & MDIO) ? 1 : 0);
916 sw32(mear, MDC);
917 mdio_delay();
918 }
919 sw32(mear, 0x00);
920
921 return retval;
922 }
923
924 /**
925 * mdio_write - write MII PHY register
926 * @net_dev: the net device to write
927 * @phy_id: the phy address to write
928 * @location: the phy register id to write
929 * @value: the register value to write with
930 *
931 * Write MII registers with @value through MDIO and MDC
932 * using MDIO management frame structure and protocol(defined by ISO/IEC)
933 * please see SiS7014 or ICS spec
934 */
935
mdio_write(struct net_device * net_dev,int phy_id,int location,int value)936 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
937 int value)
938 {
939 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
940 struct sis900_private *sp = netdev_priv(net_dev);
941 void __iomem *ioaddr = sp->ioaddr;
942 int i;
943
944 mdio_reset(sp);
945 mdio_idle(sp);
946
947 /* Shift the command bits out. */
948 for (i = 15; i >= 0; i--) {
949 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
950
951 sw8(mear, dataval);
952 mdio_delay();
953 sw8(mear, dataval | MDC);
954 mdio_delay();
955 }
956 mdio_delay();
957
958 /* Shift the value bits out. */
959 for (i = 15; i >= 0; i--) {
960 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
961
962 sw32(mear, dataval);
963 mdio_delay();
964 sw32(mear, dataval | MDC);
965 mdio_delay();
966 }
967 mdio_delay();
968
969 /* Clear out extra bits. */
970 for (i = 2; i > 0; i--) {
971 sw8(mear, 0);
972 mdio_delay();
973 sw8(mear, MDC);
974 mdio_delay();
975 }
976 sw32(mear, 0x00);
977 }
978
979
980 /**
981 * sis900_reset_phy - reset sis900 mii phy.
982 * @net_dev: the net device to write
983 * @phy_addr: default phy address
984 *
985 * Some specific phy can't work properly without reset.
986 * This function will be called during initialization and
987 * link status change from ON to DOWN.
988 */
989
sis900_reset_phy(struct net_device * net_dev,int phy_addr)990 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
991 {
992 int i;
993 u16 status;
994
995 for (i = 0; i < 2; i++)
996 status = mdio_read(net_dev, phy_addr, MII_STATUS);
997
998 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
999
1000 return status;
1001 }
1002
1003 #ifdef CONFIG_NET_POLL_CONTROLLER
1004 /*
1005 * Polling 'interrupt' - used by things like netconsole to send skbs
1006 * without having to re-enable interrupts. It's not called while
1007 * the interrupt routine is executing.
1008 */
sis900_poll(struct net_device * dev)1009 static void sis900_poll(struct net_device *dev)
1010 {
1011 struct sis900_private *sp = netdev_priv(dev);
1012 const int irq = sp->pci_dev->irq;
1013
1014 disable_irq(irq);
1015 sis900_interrupt(irq, dev);
1016 enable_irq(irq);
1017 }
1018 #endif
1019
1020 /**
1021 * sis900_open - open sis900 device
1022 * @net_dev: the net device to open
1023 *
1024 * Do some initialization and start net interface.
1025 * enable interrupts and set sis900 timer.
1026 */
1027
1028 static int
sis900_open(struct net_device * net_dev)1029 sis900_open(struct net_device *net_dev)
1030 {
1031 struct sis900_private *sis_priv = netdev_priv(net_dev);
1032 void __iomem *ioaddr = sis_priv->ioaddr;
1033 int ret;
1034
1035 /* Soft reset the chip. */
1036 sis900_reset(net_dev);
1037
1038 /* Equalizer workaround Rule */
1039 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1040
1041 ret = request_irq(sis_priv->pci_dev->irq, sis900_interrupt, IRQF_SHARED,
1042 net_dev->name, net_dev);
1043 if (ret)
1044 return ret;
1045
1046 sis900_init_rxfilter(net_dev);
1047
1048 sis900_init_tx_ring(net_dev);
1049 sis900_init_rx_ring(net_dev);
1050
1051 set_rx_mode(net_dev);
1052
1053 netif_start_queue(net_dev);
1054
1055 /* Workaround for EDB */
1056 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1057
1058 /* Enable all known interrupts by setting the interrupt mask. */
1059 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC);
1060 sw32(cr, RxENA | sr32(cr));
1061 sw32(ier, IE);
1062
1063 sis900_check_mode(net_dev, sis_priv->mii);
1064
1065 /* Set the timer to switch to check for link beat and perhaps switch
1066 to an alternate media type. */
1067 timer_setup(&sis_priv->timer, sis900_timer, 0);
1068 sis_priv->timer.expires = jiffies + HZ;
1069 add_timer(&sis_priv->timer);
1070
1071 return 0;
1072 }
1073
1074 /**
1075 * sis900_init_rxfilter - Initialize the Rx filter
1076 * @net_dev: the net device to initialize for
1077 *
1078 * Set receive filter address to our MAC address
1079 * and enable packet filtering.
1080 */
1081
1082 static void
sis900_init_rxfilter(struct net_device * net_dev)1083 sis900_init_rxfilter (struct net_device * net_dev)
1084 {
1085 struct sis900_private *sis_priv = netdev_priv(net_dev);
1086 void __iomem *ioaddr = sis_priv->ioaddr;
1087 u32 rfcrSave;
1088 u32 i;
1089
1090 rfcrSave = sr32(rfcr);
1091
1092 /* disable packet filtering before setting filter */
1093 sw32(rfcr, rfcrSave & ~RFEN);
1094
1095 /* load MAC addr to filter data register */
1096 for (i = 0 ; i < 3 ; i++) {
1097 u32 w = (u32) *((const u16 *)(net_dev->dev_addr)+i);
1098
1099 sw32(rfcr, i << RFADDR_shift);
1100 sw32(rfdr, w);
1101
1102 if (netif_msg_hw(sis_priv)) {
1103 printk(KERN_DEBUG "%s: Receive Filter Address[%d]=%x\n",
1104 net_dev->name, i, sr32(rfdr));
1105 }
1106 }
1107
1108 /* enable packet filtering */
1109 sw32(rfcr, rfcrSave | RFEN);
1110 }
1111
1112 /**
1113 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1114 * @net_dev: the net device to initialize for
1115 *
1116 * Initialize the Tx descriptor ring,
1117 */
1118
1119 static void
sis900_init_tx_ring(struct net_device * net_dev)1120 sis900_init_tx_ring(struct net_device *net_dev)
1121 {
1122 struct sis900_private *sis_priv = netdev_priv(net_dev);
1123 void __iomem *ioaddr = sis_priv->ioaddr;
1124 int i;
1125
1126 sis_priv->tx_full = 0;
1127 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1128
1129 for (i = 0; i < NUM_TX_DESC; i++) {
1130 sis_priv->tx_skbuff[i] = NULL;
1131
1132 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1133 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1134 sis_priv->tx_ring[i].cmdsts = 0;
1135 sis_priv->tx_ring[i].bufptr = 0;
1136 }
1137
1138 /* load Transmit Descriptor Register */
1139 sw32(txdp, sis_priv->tx_ring_dma);
1140 if (netif_msg_hw(sis_priv))
1141 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1142 net_dev->name, sr32(txdp));
1143 }
1144
1145 /**
1146 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1147 * @net_dev: the net device to initialize for
1148 *
1149 * Initialize the Rx descriptor ring,
1150 * and pre-allocate receive buffers (socket buffer)
1151 */
1152
1153 static void
sis900_init_rx_ring(struct net_device * net_dev)1154 sis900_init_rx_ring(struct net_device *net_dev)
1155 {
1156 struct sis900_private *sis_priv = netdev_priv(net_dev);
1157 void __iomem *ioaddr = sis_priv->ioaddr;
1158 int i;
1159
1160 sis_priv->cur_rx = 0;
1161 sis_priv->dirty_rx = 0;
1162
1163 /* init RX descriptor */
1164 for (i = 0; i < NUM_RX_DESC; i++) {
1165 sis_priv->rx_skbuff[i] = NULL;
1166
1167 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1168 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1169 sis_priv->rx_ring[i].cmdsts = 0;
1170 sis_priv->rx_ring[i].bufptr = 0;
1171 }
1172
1173 /* allocate sock buffers */
1174 for (i = 0; i < NUM_RX_DESC; i++) {
1175 struct sk_buff *skb;
1176
1177 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1178 /* not enough memory for skbuff, this makes a "hole"
1179 on the buffer ring, it is not clear how the
1180 hardware will react to this kind of degenerated
1181 buffer */
1182 break;
1183 }
1184 sis_priv->rx_skbuff[i] = skb;
1185 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1186 sis_priv->rx_ring[i].bufptr = dma_map_single(&sis_priv->pci_dev->dev,
1187 skb->data,
1188 RX_BUF_SIZE,
1189 DMA_FROM_DEVICE);
1190 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev,
1191 sis_priv->rx_ring[i].bufptr))) {
1192 dev_kfree_skb(skb);
1193 sis_priv->rx_skbuff[i] = NULL;
1194 break;
1195 }
1196 }
1197 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1198
1199 /* load Receive Descriptor Register */
1200 sw32(rxdp, sis_priv->rx_ring_dma);
1201 if (netif_msg_hw(sis_priv))
1202 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1203 net_dev->name, sr32(rxdp));
1204 }
1205
1206 /**
1207 * sis630_set_eq - set phy equalizer value for 630 LAN
1208 * @net_dev: the net device to set equalizer value
1209 * @revision: 630 LAN revision number
1210 *
1211 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1212 * PHY register 14h(Test)
1213 * Bit 14: 0 -- Automatically detect (default)
1214 * 1 -- Manually set Equalizer filter
1215 * Bit 13: 0 -- (Default)
1216 * 1 -- Speed up convergence of equalizer setting
1217 * Bit 9 : 0 -- (Default)
1218 * 1 -- Disable Baseline Wander
1219 * Bit 3~7 -- Equalizer filter setting
1220 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1221 * Then calculate equalizer value
1222 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1223 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1224 * Calculate Equalizer value:
1225 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value.
1226 * When the equalizer is stable, this value is not a fixed value. It will be within
1227 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1228 * 0 <= max <= 4 --> set equalizer to max
1229 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1230 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1231 */
1232
sis630_set_eq(struct net_device * net_dev,u8 revision)1233 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1234 {
1235 struct sis900_private *sis_priv = netdev_priv(net_dev);
1236 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1237 int i, maxcount=10;
1238
1239 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1240 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1241 return;
1242
1243 if (netif_carrier_ok(net_dev)) {
1244 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1245 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1246 (0x2200 | reg14h) & 0xBFFF);
1247 for (i=0; i < maxcount; i++) {
1248 eq_value = (0x00F8 & mdio_read(net_dev,
1249 sis_priv->cur_phy, MII_RESV)) >> 3;
1250 if (i == 0)
1251 max_value=min_value=eq_value;
1252 max_value = (eq_value > max_value) ?
1253 eq_value : max_value;
1254 min_value = (eq_value < min_value) ?
1255 eq_value : min_value;
1256 }
1257 /* 630E rule to determine the equalizer value */
1258 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1259 revision == SIS630ET_900_REV) {
1260 if (max_value < 5)
1261 eq_value = max_value;
1262 else if (max_value >= 5 && max_value < 15)
1263 eq_value = (max_value == min_value) ?
1264 max_value+2 : max_value+1;
1265 else if (max_value >= 15)
1266 eq_value=(max_value == min_value) ?
1267 max_value+6 : max_value+5;
1268 }
1269 /* 630B0&B1 rule to determine the equalizer value */
1270 if (revision == SIS630A_900_REV &&
1271 (sis_priv->host_bridge_rev == SIS630B0 ||
1272 sis_priv->host_bridge_rev == SIS630B1)) {
1273 if (max_value == 0)
1274 eq_value = 3;
1275 else
1276 eq_value = (max_value + min_value + 1)/2;
1277 }
1278 /* write equalizer value and setting */
1279 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1280 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1281 reg14h = (reg14h | 0x6000) & 0xFDFF;
1282 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1283 } else {
1284 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1285 if (revision == SIS630A_900_REV &&
1286 (sis_priv->host_bridge_rev == SIS630B0 ||
1287 sis_priv->host_bridge_rev == SIS630B1))
1288 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1289 (reg14h | 0x2200) & 0xBFFF);
1290 else
1291 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1292 (reg14h | 0x2000) & 0xBFFF);
1293 }
1294 }
1295
1296 /**
1297 * sis900_timer - sis900 timer routine
1298 * @t: timer list containing a pointer to sis900 net device
1299 *
1300 * On each timer ticks we check two things,
1301 * link status (ON/OFF) and link mode (10/100/Full/Half)
1302 */
1303
sis900_timer(struct timer_list * t)1304 static void sis900_timer(struct timer_list *t)
1305 {
1306 struct sis900_private *sis_priv = timer_container_of(sis_priv, t,
1307 timer);
1308 struct net_device *net_dev = sis_priv->mii_info.dev;
1309 struct mii_phy *mii_phy = sis_priv->mii;
1310 static const int next_tick = 5*HZ;
1311 int speed = 0, duplex = 0;
1312 u16 status;
1313
1314 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1315 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1316
1317 /* Link OFF -> ON */
1318 if (!netif_carrier_ok(net_dev)) {
1319 LookForLink:
1320 /* Search for new PHY */
1321 status = sis900_default_phy(net_dev);
1322 mii_phy = sis_priv->mii;
1323
1324 if (status & MII_STAT_LINK) {
1325 WARN_ON(!(status & MII_STAT_AUTO_DONE));
1326
1327 sis900_read_mode(net_dev, &speed, &duplex);
1328 if (duplex) {
1329 sis900_set_mode(sis_priv, speed, duplex);
1330 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1331 netif_carrier_on(net_dev);
1332 }
1333 }
1334 } else {
1335 /* Link ON -> OFF */
1336 if (!(status & MII_STAT_LINK)){
1337 netif_carrier_off(net_dev);
1338 if(netif_msg_link(sis_priv))
1339 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1340
1341 /* Change mode issue */
1342 if ((mii_phy->phy_id0 == 0x001D) &&
1343 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1344 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1345
1346 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1347
1348 goto LookForLink;
1349 }
1350 }
1351
1352 sis_priv->timer.expires = jiffies + next_tick;
1353 add_timer(&sis_priv->timer);
1354 }
1355
1356 /**
1357 * sis900_check_mode - check the media mode for sis900
1358 * @net_dev: the net device to be checked
1359 * @mii_phy: the mii phy
1360 *
1361 * Older driver gets the media mode from mii status output
1362 * register. Now we set our media capability and auto-negotiate
1363 * to get the upper bound of speed and duplex between two ends.
1364 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1365 * and autong_complete should be set to 1.
1366 */
1367
sis900_check_mode(struct net_device * net_dev,struct mii_phy * mii_phy)1368 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1369 {
1370 struct sis900_private *sis_priv = netdev_priv(net_dev);
1371 void __iomem *ioaddr = sis_priv->ioaddr;
1372 int speed, duplex;
1373
1374 if (mii_phy->phy_types == LAN) {
1375 sw32(cfg, ~EXD & sr32(cfg));
1376 sis900_set_capability(net_dev , mii_phy);
1377 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1378 } else {
1379 sw32(cfg, EXD | sr32(cfg));
1380 speed = HW_SPEED_HOME;
1381 duplex = FDX_CAPABLE_HALF_SELECTED;
1382 sis900_set_mode(sis_priv, speed, duplex);
1383 sis_priv->autong_complete = 1;
1384 }
1385 }
1386
1387 /**
1388 * sis900_set_mode - Set the media mode of mac register.
1389 * @sp: the device private data
1390 * @speed : the transmit speed to be determined
1391 * @duplex: the duplex mode to be determined
1392 *
1393 * Set the media mode of mac register txcfg/rxcfg according to
1394 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1395 * bus is used instead of PCI bus. When this bit is set 1, the
1396 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1397 * double words.
1398 */
1399
sis900_set_mode(struct sis900_private * sp,int speed,int duplex)1400 static void sis900_set_mode(struct sis900_private *sp, int speed, int duplex)
1401 {
1402 void __iomem *ioaddr = sp->ioaddr;
1403 u32 tx_flags = 0, rx_flags = 0;
1404
1405 if (sr32( cfg) & EDB_MASTER_EN) {
1406 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1407 (TX_FILL_THRESH << TxFILLT_shift);
1408 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1409 } else {
1410 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1411 (TX_FILL_THRESH << TxFILLT_shift);
1412 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1413 }
1414
1415 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1416 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1417 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1418 } else {
1419 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1420 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1421 }
1422
1423 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1424 tx_flags |= (TxCSI | TxHBI);
1425 rx_flags |= RxATX;
1426 }
1427
1428 #if IS_ENABLED(CONFIG_VLAN_8021Q)
1429 /* Can accept Jumbo packet */
1430 rx_flags |= RxAJAB;
1431 #endif
1432
1433 sw32(txcfg, tx_flags);
1434 sw32(rxcfg, rx_flags);
1435 }
1436
1437 /**
1438 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1439 * @net_dev: the net device to read mode for
1440 * @phy_addr: mii phy address
1441 *
1442 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1443 * autong_complete should be set to 0 when starting auto-negotiation.
1444 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1445 * sis900_timer will wait for link on again if autong_complete = 0.
1446 */
1447
sis900_auto_negotiate(struct net_device * net_dev,int phy_addr)1448 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1449 {
1450 struct sis900_private *sis_priv = netdev_priv(net_dev);
1451 int i = 0;
1452 u32 status;
1453
1454 for (i = 0; i < 2; i++)
1455 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1456
1457 if (!(status & MII_STAT_LINK)){
1458 if(netif_msg_link(sis_priv))
1459 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1460 sis_priv->autong_complete = 1;
1461 netif_carrier_off(net_dev);
1462 return;
1463 }
1464
1465 /* (Re)start AutoNegotiate */
1466 mdio_write(net_dev, phy_addr, MII_CONTROL,
1467 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1468 sis_priv->autong_complete = 0;
1469 }
1470
1471
1472 /**
1473 * sis900_read_mode - read media mode for sis900 internal phy
1474 * @net_dev: the net device to read mode for
1475 * @speed : the transmit speed to be determined
1476 * @duplex : the duplex mode to be determined
1477 *
1478 * The capability of remote end will be put in mii register autorec
1479 * after auto-negotiation. Use AND operation to get the upper bound
1480 * of speed and duplex between two ends.
1481 */
1482
sis900_read_mode(struct net_device * net_dev,int * speed,int * duplex)1483 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1484 {
1485 struct sis900_private *sis_priv = netdev_priv(net_dev);
1486 struct mii_phy *phy = sis_priv->mii;
1487 int phy_addr = sis_priv->cur_phy;
1488 u32 status;
1489 u16 autoadv, autorec;
1490 int i;
1491
1492 for (i = 0; i < 2; i++)
1493 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1494
1495 if (!(status & MII_STAT_LINK))
1496 return;
1497
1498 /* AutoNegotiate completed */
1499 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1500 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1501 status = autoadv & autorec;
1502
1503 *speed = HW_SPEED_10_MBPS;
1504 *duplex = FDX_CAPABLE_HALF_SELECTED;
1505
1506 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1507 *speed = HW_SPEED_100_MBPS;
1508 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1509 *duplex = FDX_CAPABLE_FULL_SELECTED;
1510
1511 sis_priv->autong_complete = 1;
1512
1513 /* Workaround for Realtek RTL8201 PHY issue */
1514 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1515 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1516 *duplex = FDX_CAPABLE_FULL_SELECTED;
1517 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1518 *speed = HW_SPEED_100_MBPS;
1519 }
1520
1521 if(netif_msg_link(sis_priv))
1522 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n",
1523 net_dev->name,
1524 *speed == HW_SPEED_100_MBPS ?
1525 "100mbps" : "10mbps",
1526 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1527 "full" : "half");
1528 }
1529
1530 /**
1531 * sis900_tx_timeout - sis900 transmit timeout routine
1532 * @net_dev: the net device to transmit
1533 * @txqueue: index of hanging queue
1534 *
1535 * print transmit timeout status
1536 * disable interrupts and do some tasks
1537 */
1538
sis900_tx_timeout(struct net_device * net_dev,unsigned int txqueue)1539 static void sis900_tx_timeout(struct net_device *net_dev, unsigned int txqueue)
1540 {
1541 struct sis900_private *sis_priv = netdev_priv(net_dev);
1542 void __iomem *ioaddr = sis_priv->ioaddr;
1543 unsigned long flags;
1544 int i;
1545
1546 if (netif_msg_tx_err(sis_priv)) {
1547 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",
1548 net_dev->name, sr32(cr), sr32(isr));
1549 }
1550
1551 /* Disable interrupts by clearing the interrupt mask. */
1552 sw32(imr, 0x0000);
1553
1554 /* use spinlock to prevent interrupt handler accessing buffer ring */
1555 spin_lock_irqsave(&sis_priv->lock, flags);
1556
1557 /* discard unsent packets */
1558 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1559 for (i = 0; i < NUM_TX_DESC; i++) {
1560 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1561
1562 if (skb) {
1563 dma_unmap_single(&sis_priv->pci_dev->dev,
1564 sis_priv->tx_ring[i].bufptr,
1565 skb->len, DMA_TO_DEVICE);
1566 dev_kfree_skb_irq(skb);
1567 sis_priv->tx_skbuff[i] = NULL;
1568 sis_priv->tx_ring[i].cmdsts = 0;
1569 sis_priv->tx_ring[i].bufptr = 0;
1570 net_dev->stats.tx_dropped++;
1571 }
1572 }
1573 sis_priv->tx_full = 0;
1574 netif_wake_queue(net_dev);
1575
1576 spin_unlock_irqrestore(&sis_priv->lock, flags);
1577
1578 netif_trans_update(net_dev); /* prevent tx timeout */
1579
1580 /* load Transmit Descriptor Register */
1581 sw32(txdp, sis_priv->tx_ring_dma);
1582
1583 /* Enable all known interrupts by setting the interrupt mask. */
1584 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC);
1585 }
1586
1587 /**
1588 * sis900_start_xmit - sis900 start transmit routine
1589 * @skb: socket buffer pointer to put the data being transmitted
1590 * @net_dev: the net device to transmit with
1591 *
1592 * Set the transmit buffer descriptor,
1593 * and write TxENA to enable transmit state machine.
1594 * tell upper layer if the buffer is full
1595 */
1596
1597 static netdev_tx_t
sis900_start_xmit(struct sk_buff * skb,struct net_device * net_dev)1598 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1599 {
1600 struct sis900_private *sis_priv = netdev_priv(net_dev);
1601 void __iomem *ioaddr = sis_priv->ioaddr;
1602 unsigned int entry;
1603 unsigned long flags;
1604 unsigned int index_cur_tx, index_dirty_tx;
1605 unsigned int count_dirty_tx;
1606
1607 spin_lock_irqsave(&sis_priv->lock, flags);
1608
1609 /* Calculate the next Tx descriptor entry. */
1610 entry = sis_priv->cur_tx % NUM_TX_DESC;
1611 sis_priv->tx_skbuff[entry] = skb;
1612
1613 /* set the transmit buffer descriptor and enable Transmit State Machine */
1614 sis_priv->tx_ring[entry].bufptr = dma_map_single(&sis_priv->pci_dev->dev,
1615 skb->data, skb->len,
1616 DMA_TO_DEVICE);
1617 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev,
1618 sis_priv->tx_ring[entry].bufptr))) {
1619 dev_kfree_skb_any(skb);
1620 sis_priv->tx_skbuff[entry] = NULL;
1621 net_dev->stats.tx_dropped++;
1622 spin_unlock_irqrestore(&sis_priv->lock, flags);
1623 return NETDEV_TX_OK;
1624 }
1625 sis_priv->tx_ring[entry].cmdsts = (OWN | INTR | skb->len);
1626 sw32(cr, TxENA | sr32(cr));
1627
1628 sis_priv->cur_tx ++;
1629 index_cur_tx = sis_priv->cur_tx;
1630 index_dirty_tx = sis_priv->dirty_tx;
1631
1632 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1633 count_dirty_tx ++;
1634
1635 if (index_cur_tx == index_dirty_tx) {
1636 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1637 sis_priv->tx_full = 1;
1638 netif_stop_queue(net_dev);
1639 } else if (count_dirty_tx < NUM_TX_DESC) {
1640 /* Typical path, tell upper layer that more transmission is possible */
1641 netif_start_queue(net_dev);
1642 } else {
1643 /* buffer full, tell upper layer no more transmission */
1644 sis_priv->tx_full = 1;
1645 netif_stop_queue(net_dev);
1646 }
1647
1648 spin_unlock_irqrestore(&sis_priv->lock, flags);
1649
1650 if (netif_msg_tx_queued(sis_priv))
1651 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1652 "to slot %d.\n",
1653 net_dev->name, skb->data, (int)skb->len, entry);
1654
1655 return NETDEV_TX_OK;
1656 }
1657
1658 /**
1659 * sis900_interrupt - sis900 interrupt handler
1660 * @irq: the irq number
1661 * @dev_instance: the client data object
1662 *
1663 * The interrupt handler does all of the Rx thread work,
1664 * and cleans up after the Tx thread
1665 */
1666
sis900_interrupt(int irq,void * dev_instance)1667 static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1668 {
1669 struct net_device *net_dev = dev_instance;
1670 struct sis900_private *sis_priv = netdev_priv(net_dev);
1671 int boguscnt = max_interrupt_work;
1672 void __iomem *ioaddr = sis_priv->ioaddr;
1673 u32 status;
1674 unsigned int handled = 0;
1675
1676 spin_lock (&sis_priv->lock);
1677
1678 do {
1679 status = sr32(isr);
1680
1681 if ((status & (HIBERR|TxURN|TxERR|TxDESC|RxORN|RxERR|RxOK)) == 0)
1682 /* nothing interesting happened */
1683 break;
1684 handled = 1;
1685
1686 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1687 if (status & (RxORN | RxERR | RxOK))
1688 /* Rx interrupt */
1689 sis900_rx(net_dev);
1690
1691 if (status & (TxURN | TxERR | TxDESC))
1692 /* Tx interrupt */
1693 sis900_finish_xmit(net_dev);
1694
1695 /* something strange happened !!! */
1696 if (status & HIBERR) {
1697 if(netif_msg_intr(sis_priv))
1698 printk(KERN_INFO "%s: Abnormal interrupt, "
1699 "status %#8.8x.\n", net_dev->name, status);
1700 break;
1701 }
1702 if (--boguscnt < 0) {
1703 if(netif_msg_intr(sis_priv))
1704 printk(KERN_INFO "%s: Too much work at interrupt, "
1705 "interrupt status = %#8.8x.\n",
1706 net_dev->name, status);
1707 break;
1708 }
1709 } while (1);
1710
1711 if(netif_msg_intr(sis_priv))
1712 printk(KERN_DEBUG "%s: exiting interrupt, "
1713 "interrupt status = %#8.8x\n",
1714 net_dev->name, sr32(isr));
1715
1716 spin_unlock (&sis_priv->lock);
1717 return IRQ_RETVAL(handled);
1718 }
1719
1720 /**
1721 * sis900_rx - sis900 receive routine
1722 * @net_dev: the net device which receives data
1723 *
1724 * Process receive interrupt events,
1725 * put buffer to higher layer and refill buffer pool
1726 * Note: This function is called by interrupt handler,
1727 * don't do "too much" work here
1728 */
1729
sis900_rx(struct net_device * net_dev)1730 static int sis900_rx(struct net_device *net_dev)
1731 {
1732 struct sis900_private *sis_priv = netdev_priv(net_dev);
1733 void __iomem *ioaddr = sis_priv->ioaddr;
1734 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1735 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1736 int rx_work_limit;
1737
1738 if (netif_msg_rx_status(sis_priv))
1739 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1740 "status:0x%8.8x\n",
1741 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1742 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1743
1744 while (rx_status & OWN) {
1745 unsigned int rx_size;
1746 unsigned int data_size;
1747
1748 if (--rx_work_limit < 0)
1749 break;
1750
1751 data_size = rx_status & DSIZE;
1752 rx_size = data_size - CRC_SIZE;
1753
1754 #if IS_ENABLED(CONFIG_VLAN_8021Q)
1755 /* ``TOOLONG'' flag means jumbo packet received. */
1756 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1757 rx_status &= (~ ((unsigned int)TOOLONG));
1758 #endif
1759
1760 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1761 /* corrupted packet received */
1762 if (netif_msg_rx_err(sis_priv))
1763 printk(KERN_DEBUG "%s: Corrupted packet "
1764 "received, buffer status = 0x%8.8x/%d.\n",
1765 net_dev->name, rx_status, data_size);
1766 net_dev->stats.rx_errors++;
1767 if (rx_status & OVERRUN)
1768 net_dev->stats.rx_over_errors++;
1769 if (rx_status & (TOOLONG|RUNT))
1770 net_dev->stats.rx_length_errors++;
1771 if (rx_status & (RXISERR | FAERR))
1772 net_dev->stats.rx_frame_errors++;
1773 if (rx_status & CRCERR)
1774 net_dev->stats.rx_crc_errors++;
1775 /* reset buffer descriptor state */
1776 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1777 } else {
1778 struct sk_buff * skb;
1779 struct sk_buff * rx_skb;
1780
1781 dma_unmap_single(&sis_priv->pci_dev->dev,
1782 sis_priv->rx_ring[entry].bufptr,
1783 RX_BUF_SIZE, DMA_FROM_DEVICE);
1784
1785 /* refill the Rx buffer, what if there is not enough
1786 * memory for new socket buffer ?? */
1787 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1788 /*
1789 * Not enough memory to refill the buffer
1790 * so we need to recycle the old one so
1791 * as to avoid creating a memory hole
1792 * in the rx ring
1793 */
1794 skb = sis_priv->rx_skbuff[entry];
1795 net_dev->stats.rx_dropped++;
1796 goto refill_rx_ring;
1797 }
1798
1799 /* This situation should never happen, but due to
1800 some unknown bugs, it is possible that
1801 we are working on NULL sk_buff :-( */
1802 if (sis_priv->rx_skbuff[entry] == NULL) {
1803 if (netif_msg_rx_err(sis_priv))
1804 printk(KERN_WARNING "%s: NULL pointer "
1805 "encountered in Rx ring\n"
1806 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1807 net_dev->name, sis_priv->cur_rx,
1808 sis_priv->dirty_rx);
1809 dev_kfree_skb(skb);
1810 break;
1811 }
1812
1813 /* give the socket buffer to upper layers */
1814 rx_skb = sis_priv->rx_skbuff[entry];
1815 skb_put(rx_skb, rx_size);
1816 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1817 netif_rx(rx_skb);
1818
1819 /* some network statistics */
1820 if ((rx_status & BCAST) == MCAST)
1821 net_dev->stats.multicast++;
1822 net_dev->stats.rx_bytes += rx_size;
1823 net_dev->stats.rx_packets++;
1824 sis_priv->dirty_rx++;
1825 refill_rx_ring:
1826 sis_priv->rx_skbuff[entry] = skb;
1827 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1828 sis_priv->rx_ring[entry].bufptr =
1829 dma_map_single(&sis_priv->pci_dev->dev,
1830 skb->data, RX_BUF_SIZE,
1831 DMA_FROM_DEVICE);
1832 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev,
1833 sis_priv->rx_ring[entry].bufptr))) {
1834 dev_kfree_skb_irq(skb);
1835 sis_priv->rx_skbuff[entry] = NULL;
1836 break;
1837 }
1838 }
1839 sis_priv->cur_rx++;
1840 entry = sis_priv->cur_rx % NUM_RX_DESC;
1841 rx_status = sis_priv->rx_ring[entry].cmdsts;
1842 } // while
1843
1844 /* refill the Rx buffer, what if the rate of refilling is slower
1845 * than consuming ?? */
1846 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1847 struct sk_buff *skb;
1848
1849 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1850
1851 if (sis_priv->rx_skbuff[entry] == NULL) {
1852 skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE);
1853 if (skb == NULL) {
1854 /* not enough memory for skbuff, this makes a
1855 * "hole" on the buffer ring, it is not clear
1856 * how the hardware will react to this kind
1857 * of degenerated buffer */
1858 net_dev->stats.rx_dropped++;
1859 break;
1860 }
1861 sis_priv->rx_skbuff[entry] = skb;
1862 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1863 sis_priv->rx_ring[entry].bufptr =
1864 dma_map_single(&sis_priv->pci_dev->dev,
1865 skb->data, RX_BUF_SIZE,
1866 DMA_FROM_DEVICE);
1867 if (unlikely(dma_mapping_error(&sis_priv->pci_dev->dev,
1868 sis_priv->rx_ring[entry].bufptr))) {
1869 dev_kfree_skb_irq(skb);
1870 sis_priv->rx_skbuff[entry] = NULL;
1871 break;
1872 }
1873 }
1874 }
1875 /* re-enable the potentially idle receive state matchine */
1876 sw32(cr , RxENA | sr32(cr));
1877
1878 return 0;
1879 }
1880
1881 /**
1882 * sis900_finish_xmit - finish up transmission of packets
1883 * @net_dev: the net device to be transmitted on
1884 *
1885 * Check for error condition and free socket buffer etc
1886 * schedule for more transmission as needed
1887 * Note: This function is called by interrupt handler,
1888 * don't do "too much" work here
1889 */
1890
sis900_finish_xmit(struct net_device * net_dev)1891 static void sis900_finish_xmit (struct net_device *net_dev)
1892 {
1893 struct sis900_private *sis_priv = netdev_priv(net_dev);
1894
1895 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1896 struct sk_buff *skb;
1897 unsigned int entry;
1898 u32 tx_status;
1899
1900 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1901 tx_status = sis_priv->tx_ring[entry].cmdsts;
1902
1903 if (tx_status & OWN) {
1904 /* The packet is not transmitted yet (owned by hardware) !
1905 * Note: this is an almost impossible condition
1906 * on TxDESC interrupt ('descriptor interrupt') */
1907 break;
1908 }
1909
1910 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1911 /* packet unsuccessfully transmitted */
1912 if (netif_msg_tx_err(sis_priv))
1913 printk(KERN_DEBUG "%s: Transmit "
1914 "error, Tx status %8.8x.\n",
1915 net_dev->name, tx_status);
1916 net_dev->stats.tx_errors++;
1917 if (tx_status & UNDERRUN)
1918 net_dev->stats.tx_fifo_errors++;
1919 if (tx_status & ABORT)
1920 net_dev->stats.tx_aborted_errors++;
1921 if (tx_status & NOCARRIER)
1922 net_dev->stats.tx_carrier_errors++;
1923 if (tx_status & OWCOLL)
1924 net_dev->stats.tx_window_errors++;
1925 } else {
1926 /* packet successfully transmitted */
1927 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1928 net_dev->stats.tx_bytes += tx_status & DSIZE;
1929 net_dev->stats.tx_packets++;
1930 }
1931 /* Free the original skb. */
1932 skb = sis_priv->tx_skbuff[entry];
1933 dma_unmap_single(&sis_priv->pci_dev->dev,
1934 sis_priv->tx_ring[entry].bufptr, skb->len,
1935 DMA_TO_DEVICE);
1936 dev_consume_skb_irq(skb);
1937 sis_priv->tx_skbuff[entry] = NULL;
1938 sis_priv->tx_ring[entry].bufptr = 0;
1939 sis_priv->tx_ring[entry].cmdsts = 0;
1940 }
1941
1942 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1943 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1944 /* The ring is no longer full, clear tx_full and schedule
1945 * more transmission by netif_wake_queue(net_dev) */
1946 sis_priv->tx_full = 0;
1947 netif_wake_queue (net_dev);
1948 }
1949 }
1950
1951 /**
1952 * sis900_close - close sis900 device
1953 * @net_dev: the net device to be closed
1954 *
1955 * Disable interrupts, stop the Tx and Rx Status Machine
1956 * free Tx and RX socket buffer
1957 */
1958
sis900_close(struct net_device * net_dev)1959 static int sis900_close(struct net_device *net_dev)
1960 {
1961 struct sis900_private *sis_priv = netdev_priv(net_dev);
1962 struct pci_dev *pdev = sis_priv->pci_dev;
1963 void __iomem *ioaddr = sis_priv->ioaddr;
1964 struct sk_buff *skb;
1965 int i;
1966
1967 netif_stop_queue(net_dev);
1968
1969 /* Disable interrupts by clearing the interrupt mask. */
1970 sw32(imr, 0x0000);
1971 sw32(ier, 0x0000);
1972
1973 /* Stop the chip's Tx and Rx Status Machine */
1974 sw32(cr, RxDIS | TxDIS | sr32(cr));
1975
1976 timer_delete(&sis_priv->timer);
1977
1978 free_irq(pdev->irq, net_dev);
1979
1980 /* Free Tx and RX skbuff */
1981 for (i = 0; i < NUM_RX_DESC; i++) {
1982 skb = sis_priv->rx_skbuff[i];
1983 if (skb) {
1984 dma_unmap_single(&pdev->dev,
1985 sis_priv->rx_ring[i].bufptr,
1986 RX_BUF_SIZE, DMA_FROM_DEVICE);
1987 dev_kfree_skb(skb);
1988 sis_priv->rx_skbuff[i] = NULL;
1989 }
1990 }
1991 for (i = 0; i < NUM_TX_DESC; i++) {
1992 skb = sis_priv->tx_skbuff[i];
1993 if (skb) {
1994 dma_unmap_single(&pdev->dev,
1995 sis_priv->tx_ring[i].bufptr,
1996 skb->len, DMA_TO_DEVICE);
1997 dev_kfree_skb(skb);
1998 sis_priv->tx_skbuff[i] = NULL;
1999 }
2000 }
2001
2002 /* Green! Put the chip in low-power mode. */
2003
2004 return 0;
2005 }
2006
2007 /**
2008 * sis900_get_drvinfo - Return information about driver
2009 * @net_dev: the net device to probe
2010 * @info: container for info returned
2011 *
2012 * Process ethtool command such as "ehtool -i" to show information
2013 */
2014
sis900_get_drvinfo(struct net_device * net_dev,struct ethtool_drvinfo * info)2015 static void sis900_get_drvinfo(struct net_device *net_dev,
2016 struct ethtool_drvinfo *info)
2017 {
2018 struct sis900_private *sis_priv = netdev_priv(net_dev);
2019
2020 strscpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver));
2021 strscpy(info->bus_info, pci_name(sis_priv->pci_dev),
2022 sizeof(info->bus_info));
2023 }
2024
sis900_get_msglevel(struct net_device * net_dev)2025 static u32 sis900_get_msglevel(struct net_device *net_dev)
2026 {
2027 struct sis900_private *sis_priv = netdev_priv(net_dev);
2028 return sis_priv->msg_enable;
2029 }
2030
sis900_set_msglevel(struct net_device * net_dev,u32 value)2031 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2032 {
2033 struct sis900_private *sis_priv = netdev_priv(net_dev);
2034 sis_priv->msg_enable = value;
2035 }
2036
sis900_get_link(struct net_device * net_dev)2037 static u32 sis900_get_link(struct net_device *net_dev)
2038 {
2039 struct sis900_private *sis_priv = netdev_priv(net_dev);
2040 return mii_link_ok(&sis_priv->mii_info);
2041 }
2042
sis900_get_link_ksettings(struct net_device * net_dev,struct ethtool_link_ksettings * cmd)2043 static int sis900_get_link_ksettings(struct net_device *net_dev,
2044 struct ethtool_link_ksettings *cmd)
2045 {
2046 struct sis900_private *sis_priv = netdev_priv(net_dev);
2047 spin_lock_irq(&sis_priv->lock);
2048 mii_ethtool_get_link_ksettings(&sis_priv->mii_info, cmd);
2049 spin_unlock_irq(&sis_priv->lock);
2050 return 0;
2051 }
2052
sis900_set_link_ksettings(struct net_device * net_dev,const struct ethtool_link_ksettings * cmd)2053 static int sis900_set_link_ksettings(struct net_device *net_dev,
2054 const struct ethtool_link_ksettings *cmd)
2055 {
2056 struct sis900_private *sis_priv = netdev_priv(net_dev);
2057 int rt;
2058 spin_lock_irq(&sis_priv->lock);
2059 rt = mii_ethtool_set_link_ksettings(&sis_priv->mii_info, cmd);
2060 spin_unlock_irq(&sis_priv->lock);
2061 return rt;
2062 }
2063
sis900_nway_reset(struct net_device * net_dev)2064 static int sis900_nway_reset(struct net_device *net_dev)
2065 {
2066 struct sis900_private *sis_priv = netdev_priv(net_dev);
2067 return mii_nway_restart(&sis_priv->mii_info);
2068 }
2069
2070 /**
2071 * sis900_set_wol - Set up Wake on Lan registers
2072 * @net_dev: the net device to probe
2073 * @wol: container for info passed to the driver
2074 *
2075 * Process ethtool command "wol" to setup wake on lan features.
2076 * SiS900 supports sending WoL events if a correct packet is received,
2077 * but there is no simple way to filter them to only a subset (broadcast,
2078 * multicast, unicast or arp).
2079 */
2080
sis900_set_wol(struct net_device * net_dev,struct ethtool_wolinfo * wol)2081 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2082 {
2083 struct sis900_private *sis_priv = netdev_priv(net_dev);
2084 void __iomem *ioaddr = sis_priv->ioaddr;
2085 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2086
2087 if (wol->wolopts == 0) {
2088 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2089 cfgpmcsr &= ~PME_EN;
2090 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2091 sw32(pmctrl, pmctrl_bits);
2092 if (netif_msg_wol(sis_priv))
2093 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2094 return 0;
2095 }
2096
2097 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2098 | WAKE_BCAST | WAKE_ARP))
2099 return -EINVAL;
2100
2101 if (wol->wolopts & WAKE_MAGIC)
2102 pmctrl_bits |= MAGICPKT;
2103 if (wol->wolopts & WAKE_PHY)
2104 pmctrl_bits |= LINKON;
2105
2106 sw32(pmctrl, pmctrl_bits);
2107
2108 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2109 cfgpmcsr |= PME_EN;
2110 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2111 if (netif_msg_wol(sis_priv))
2112 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2113
2114 return 0;
2115 }
2116
sis900_get_wol(struct net_device * net_dev,struct ethtool_wolinfo * wol)2117 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2118 {
2119 struct sis900_private *sp = netdev_priv(net_dev);
2120 void __iomem *ioaddr = sp->ioaddr;
2121 u32 pmctrl_bits;
2122
2123 pmctrl_bits = sr32(pmctrl);
2124 if (pmctrl_bits & MAGICPKT)
2125 wol->wolopts |= WAKE_MAGIC;
2126 if (pmctrl_bits & LINKON)
2127 wol->wolopts |= WAKE_PHY;
2128
2129 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2130 }
2131
sis900_get_eeprom_len(struct net_device * dev)2132 static int sis900_get_eeprom_len(struct net_device *dev)
2133 {
2134 struct sis900_private *sis_priv = netdev_priv(dev);
2135
2136 return sis_priv->eeprom_size;
2137 }
2138
sis900_read_eeprom(struct net_device * net_dev,u8 * buf)2139 static int sis900_read_eeprom(struct net_device *net_dev, u8 *buf)
2140 {
2141 struct sis900_private *sis_priv = netdev_priv(net_dev);
2142 void __iomem *ioaddr = sis_priv->ioaddr;
2143 int wait, ret = -EAGAIN;
2144 u16 signature;
2145 u16 *ebuf = (u16 *)buf;
2146 int i;
2147
2148 if (sis_priv->chipset_rev == SIS96x_900_REV) {
2149 sw32(mear, EEREQ);
2150 for (wait = 0; wait < 2000; wait++) {
2151 if (sr32(mear) & EEGNT) {
2152 /* read 16 bits, and index by 16 bits */
2153 for (i = 0; i < sis_priv->eeprom_size / 2; i++)
2154 ebuf[i] = (u16)read_eeprom(ioaddr, i);
2155 ret = 0;
2156 break;
2157 }
2158 udelay(1);
2159 }
2160 sw32(mear, EEDONE);
2161 } else {
2162 signature = (u16)read_eeprom(ioaddr, EEPROMSignature);
2163 if (signature != 0xffff && signature != 0x0000) {
2164 /* read 16 bits, and index by 16 bits */
2165 for (i = 0; i < sis_priv->eeprom_size / 2; i++)
2166 ebuf[i] = (u16)read_eeprom(ioaddr, i);
2167 ret = 0;
2168 }
2169 }
2170 return ret;
2171 }
2172
2173 #define SIS900_EEPROM_MAGIC 0xBABE
sis900_get_eeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)2174 static int sis900_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data)
2175 {
2176 struct sis900_private *sis_priv = netdev_priv(dev);
2177 u8 *eebuf;
2178 int res;
2179
2180 eebuf = kmalloc(sis_priv->eeprom_size, GFP_KERNEL);
2181 if (!eebuf)
2182 return -ENOMEM;
2183
2184 eeprom->magic = SIS900_EEPROM_MAGIC;
2185 spin_lock_irq(&sis_priv->lock);
2186 res = sis900_read_eeprom(dev, eebuf);
2187 spin_unlock_irq(&sis_priv->lock);
2188 if (!res)
2189 memcpy(data, eebuf + eeprom->offset, eeprom->len);
2190 kfree(eebuf);
2191 return res;
2192 }
2193
2194 static const struct ethtool_ops sis900_ethtool_ops = {
2195 .get_drvinfo = sis900_get_drvinfo,
2196 .get_msglevel = sis900_get_msglevel,
2197 .set_msglevel = sis900_set_msglevel,
2198 .get_link = sis900_get_link,
2199 .nway_reset = sis900_nway_reset,
2200 .get_wol = sis900_get_wol,
2201 .set_wol = sis900_set_wol,
2202 .get_link_ksettings = sis900_get_link_ksettings,
2203 .set_link_ksettings = sis900_set_link_ksettings,
2204 .get_eeprom_len = sis900_get_eeprom_len,
2205 .get_eeprom = sis900_get_eeprom,
2206 };
2207
2208 /**
2209 * mii_ioctl - process MII i/o control command
2210 * @net_dev: the net device to command for
2211 * @rq: parameter for command
2212 * @cmd: the i/o command
2213 *
2214 * Process MII command like read/write MII register
2215 */
2216
mii_ioctl(struct net_device * net_dev,struct ifreq * rq,int cmd)2217 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2218 {
2219 struct sis900_private *sis_priv = netdev_priv(net_dev);
2220 struct mii_ioctl_data *data = if_mii(rq);
2221
2222 switch(cmd) {
2223 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2224 data->phy_id = sis_priv->mii->phy_addr;
2225 fallthrough;
2226
2227 case SIOCGMIIREG: /* Read MII PHY register. */
2228 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2229 return 0;
2230
2231 case SIOCSMIIREG: /* Write MII PHY register. */
2232 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2233 return 0;
2234 default:
2235 return -EOPNOTSUPP;
2236 }
2237 }
2238
2239 /**
2240 * sis900_set_config - Set media type by net_device.set_config
2241 * @dev: the net device for media type change
2242 * @map: ifmap passed by ifconfig
2243 *
2244 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2245 * we support only port changes. All other runtime configuration
2246 * changes will be ignored
2247 */
2248
sis900_set_config(struct net_device * dev,struct ifmap * map)2249 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2250 {
2251 struct sis900_private *sis_priv = netdev_priv(dev);
2252 struct mii_phy *mii_phy = sis_priv->mii;
2253
2254 u16 status;
2255
2256 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2257 /* we switch on the ifmap->port field. I couldn't find anything
2258 * like a definition or standard for the values of that field.
2259 * I think the meaning of those values is device specific. But
2260 * since I would like to change the media type via the ifconfig
2261 * command I use the definition from linux/netdevice.h
2262 * (which seems to be different from the ifport(pcmcia) definition) */
2263 switch(map->port){
2264 case IF_PORT_UNKNOWN: /* use auto here */
2265 WRITE_ONCE(dev->if_port, map->port);
2266 /* we are going to change the media type, so the Link
2267 * will be temporary down and we need to reflect that
2268 * here. When the Link comes up again, it will be
2269 * sensed by the sis_timer procedure, which also does
2270 * all the rest for us */
2271 netif_carrier_off(dev);
2272
2273 /* read current state */
2274 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2275
2276 /* enable auto negotiation and reset the negotioation
2277 * (I don't really know what the auto negatiotiation
2278 * reset really means, but it sounds for me right to
2279 * do one here) */
2280 mdio_write(dev, mii_phy->phy_addr,
2281 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2282
2283 break;
2284
2285 case IF_PORT_10BASET: /* 10BaseT */
2286 WRITE_ONCE(dev->if_port, map->port);
2287
2288 /* we are going to change the media type, so the Link
2289 * will be temporary down and we need to reflect that
2290 * here. When the Link comes up again, it will be
2291 * sensed by the sis_timer procedure, which also does
2292 * all the rest for us */
2293 netif_carrier_off(dev);
2294
2295 /* set Speed to 10Mbps */
2296 /* read current state */
2297 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2298
2299 /* disable auto negotiation and force 10MBit mode*/
2300 mdio_write(dev, mii_phy->phy_addr,
2301 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2302 MII_CNTL_AUTO));
2303 break;
2304
2305 case IF_PORT_100BASET: /* 100BaseT */
2306 case IF_PORT_100BASETX: /* 100BaseTx */
2307 WRITE_ONCE(dev->if_port, map->port);
2308
2309 /* we are going to change the media type, so the Link
2310 * will be temporary down and we need to reflect that
2311 * here. When the Link comes up again, it will be
2312 * sensed by the sis_timer procedure, which also does
2313 * all the rest for us */
2314 netif_carrier_off(dev);
2315
2316 /* set Speed to 100Mbps */
2317 /* disable auto negotiation and enable 100MBit Mode */
2318 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2319 mdio_write(dev, mii_phy->phy_addr,
2320 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2321 MII_CNTL_SPEED);
2322
2323 break;
2324
2325 case IF_PORT_10BASE2: /* 10Base2 */
2326 case IF_PORT_AUI: /* AUI */
2327 case IF_PORT_100BASEFX: /* 100BaseFx */
2328 /* These Modes are not supported (are they?)*/
2329 return -EOPNOTSUPP;
2330
2331 default:
2332 return -EINVAL;
2333 }
2334 }
2335 return 0;
2336 }
2337
2338 /**
2339 * sis900_mcast_bitnr - compute hashtable index
2340 * @addr: multicast address
2341 * @revision: revision id of chip
2342 *
2343 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2344 * hash table, which makes this function a little bit different from other drivers
2345 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2346 * multicast hash table.
2347 */
2348
sis900_mcast_bitnr(u8 * addr,u8 revision)2349 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2350 {
2351
2352 u32 crc = ether_crc(6, addr);
2353
2354 /* leave 8 or 7 most siginifant bits */
2355 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2356 return (int)(crc >> 24);
2357 else
2358 return (int)(crc >> 25);
2359 }
2360
2361 /**
2362 * set_rx_mode - Set SiS900 receive mode
2363 * @net_dev: the net device to be set
2364 *
2365 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2366 * And set the appropriate multicast filter.
2367 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2368 */
2369
set_rx_mode(struct net_device * net_dev)2370 static void set_rx_mode(struct net_device *net_dev)
2371 {
2372 struct sis900_private *sis_priv = netdev_priv(net_dev);
2373 void __iomem *ioaddr = sis_priv->ioaddr;
2374 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2375 int i, table_entries;
2376 u32 rx_mode;
2377
2378 /* 635 Hash Table entries = 256(2^16) */
2379 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2380 (sis_priv->chipset_rev == SIS900B_900_REV))
2381 table_entries = 16;
2382 else
2383 table_entries = 8;
2384
2385 if (net_dev->flags & IFF_PROMISC) {
2386 /* Accept any kinds of packets */
2387 rx_mode = RFPromiscuous;
2388 for (i = 0; i < table_entries; i++)
2389 mc_filter[i] = 0xffff;
2390 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) ||
2391 (net_dev->flags & IFF_ALLMULTI)) {
2392 /* too many multicast addresses or accept all multicast packet */
2393 rx_mode = RFAAB | RFAAM;
2394 for (i = 0; i < table_entries; i++)
2395 mc_filter[i] = 0xffff;
2396 } else {
2397 /* Accept Broadcast packet, destination address matchs our
2398 * MAC address, use Receive Filter to reject unwanted MCAST
2399 * packets */
2400 struct netdev_hw_addr *ha;
2401 rx_mode = RFAAB;
2402
2403 netdev_for_each_mc_addr(ha, net_dev) {
2404 unsigned int bit_nr;
2405
2406 bit_nr = sis900_mcast_bitnr(ha->addr,
2407 sis_priv->chipset_rev);
2408 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2409 }
2410 }
2411
2412 /* update Multicast Hash Table in Receive Filter */
2413 for (i = 0; i < table_entries; i++) {
2414 /* why plus 0x04 ??, That makes the correct value for hash table. */
2415 sw32(rfcr, (u32)(0x00000004 + i) << RFADDR_shift);
2416 sw32(rfdr, mc_filter[i]);
2417 }
2418
2419 sw32(rfcr, RFEN | rx_mode);
2420
2421 /* sis900 is capable of looping back packets at MAC level for
2422 * debugging purpose */
2423 if (net_dev->flags & IFF_LOOPBACK) {
2424 u32 cr_saved;
2425 /* We must disable Tx/Rx before setting loopback mode */
2426 cr_saved = sr32(cr);
2427 sw32(cr, cr_saved | TxDIS | RxDIS);
2428 /* enable loopback */
2429 sw32(txcfg, sr32(txcfg) | TxMLB);
2430 sw32(rxcfg, sr32(rxcfg) | RxATX);
2431 /* restore cr */
2432 sw32(cr, cr_saved);
2433 }
2434 }
2435
2436 /**
2437 * sis900_reset - Reset sis900 MAC
2438 * @net_dev: the net device to reset
2439 *
2440 * reset sis900 MAC and wait until finished
2441 * reset through command register
2442 * change backoff algorithm for 900B0 & 635 M/B
2443 */
2444
sis900_reset(struct net_device * net_dev)2445 static void sis900_reset(struct net_device *net_dev)
2446 {
2447 struct sis900_private *sis_priv = netdev_priv(net_dev);
2448 void __iomem *ioaddr = sis_priv->ioaddr;
2449 u32 status = TxRCMP | RxRCMP;
2450 int i;
2451
2452 sw32(ier, 0);
2453 sw32(imr, 0);
2454 sw32(rfcr, 0);
2455
2456 sw32(cr, RxRESET | TxRESET | RESET | sr32(cr));
2457
2458 /* Check that the chip has finished the reset. */
2459 for (i = 0; status && (i < 1000); i++)
2460 status ^= sr32(isr) & status;
2461
2462 if (sis_priv->chipset_rev >= SIS635A_900_REV ||
2463 sis_priv->chipset_rev == SIS900B_900_REV)
2464 sw32(cfg, PESEL | RND_CNT);
2465 else
2466 sw32(cfg, PESEL);
2467 }
2468
2469 /**
2470 * sis900_remove - Remove sis900 device
2471 * @pci_dev: the pci device to be removed
2472 *
2473 * remove and release SiS900 net device
2474 */
2475
sis900_remove(struct pci_dev * pci_dev)2476 static void sis900_remove(struct pci_dev *pci_dev)
2477 {
2478 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2479 struct sis900_private *sis_priv = netdev_priv(net_dev);
2480
2481 unregister_netdev(net_dev);
2482
2483 while (sis_priv->first_mii) {
2484 struct mii_phy *phy = sis_priv->first_mii;
2485
2486 sis_priv->first_mii = phy->next;
2487 kfree(phy);
2488 }
2489
2490 dma_free_coherent(&pci_dev->dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2491 sis_priv->rx_ring_dma);
2492 dma_free_coherent(&pci_dev->dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2493 sis_priv->tx_ring_dma);
2494 pci_iounmap(pci_dev, sis_priv->ioaddr);
2495 free_netdev(net_dev);
2496 }
2497
sis900_suspend(struct device * dev)2498 static int __maybe_unused sis900_suspend(struct device *dev)
2499 {
2500 struct net_device *net_dev = dev_get_drvdata(dev);
2501 struct sis900_private *sis_priv = netdev_priv(net_dev);
2502 void __iomem *ioaddr = sis_priv->ioaddr;
2503
2504 if(!netif_running(net_dev))
2505 return 0;
2506
2507 netif_stop_queue(net_dev);
2508 netif_device_detach(net_dev);
2509
2510 /* Stop the chip's Tx and Rx Status Machine */
2511 sw32(cr, RxDIS | TxDIS | sr32(cr));
2512
2513 return 0;
2514 }
2515
sis900_resume(struct device * dev)2516 static int __maybe_unused sis900_resume(struct device *dev)
2517 {
2518 struct net_device *net_dev = dev_get_drvdata(dev);
2519 struct sis900_private *sis_priv = netdev_priv(net_dev);
2520 void __iomem *ioaddr = sis_priv->ioaddr;
2521
2522 if(!netif_running(net_dev))
2523 return 0;
2524
2525 sis900_init_rxfilter(net_dev);
2526
2527 sis900_init_tx_ring(net_dev);
2528 sis900_init_rx_ring(net_dev);
2529
2530 set_rx_mode(net_dev);
2531
2532 netif_device_attach(net_dev);
2533 netif_start_queue(net_dev);
2534
2535 /* Workaround for EDB */
2536 sis900_set_mode(sis_priv, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2537
2538 /* Enable all known interrupts by setting the interrupt mask. */
2539 sw32(imr, RxSOVR | RxORN | RxERR | RxOK | TxURN | TxERR | TxDESC);
2540 sw32(cr, RxENA | sr32(cr));
2541 sw32(ier, IE);
2542
2543 sis900_check_mode(net_dev, sis_priv->mii);
2544
2545 return 0;
2546 }
2547
2548 static SIMPLE_DEV_PM_OPS(sis900_pm_ops, sis900_suspend, sis900_resume);
2549
2550 static struct pci_driver sis900_pci_driver = {
2551 .name = SIS900_MODULE_NAME,
2552 .id_table = sis900_pci_tbl,
2553 .probe = sis900_probe,
2554 .remove = sis900_remove,
2555 .driver.pm = &sis900_pm_ops,
2556 };
2557
2558 module_pci_driver(sis900_pci_driver);
2559