1 /*
2 * Copyright 2020 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dcn30m_clk_mgr_smu_msg.h"
27
28 #include "clk_mgr_internal.h"
29 #include "reg_helper.h"
30 #include "dm_helpers.h"
31
32 #include "dalsmc.h"
33
34 #define mmDAL_MSG_REG 0x1628A
35 #define mmDAL_ARG_REG 0x16273
36 #define mmDAL_RESP_REG 0x16274
37
38 #define REG(reg_name) \
39 mm ## reg_name
40
41 #include "logger_types.h"
42 #undef DC_LOGGER
43 #define DC_LOGGER \
44 CTX->logger
45 #define smu_print(str, ...) {DC_LOG_SMU(str, ##__VA_ARGS__); }
46
47
48 /*
49 * Function to be used instead of REG_WAIT macro because the wait ends when
50 * the register is NOT EQUAL to zero, and because the translation in msg_if.h
51 * won't work with REG_WAIT.
52 */
dcn30m_smu_wait_for_response(struct clk_mgr_internal * clk_mgr,unsigned int delay_us,unsigned int max_retries)53 static uint32_t dcn30m_smu_wait_for_response(struct clk_mgr_internal *clk_mgr,
54 unsigned int delay_us, unsigned int max_retries)
55 {
56 uint32_t reg = 0;
57
58 do {
59 reg = REG_READ(DAL_RESP_REG);
60 if (reg)
61 break;
62
63 if (delay_us >= 1000)
64 msleep(delay_us/1000);
65 else if (delay_us > 0)
66 udelay(delay_us);
67 } while (max_retries--);
68
69 /* handle DALSMC_Result_CmdRejectedBusy? */
70
71 /* Log? */
72
73 return reg;
74 }
75
dcn30m_smu_send_msg_with_param(struct clk_mgr_internal * clk_mgr,uint32_t msg_id,uint32_t param_in,uint32_t * param_out)76 static bool dcn30m_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr,
77 uint32_t msg_id, uint32_t param_in, uint32_t *param_out)
78 {
79 uint32_t result;
80 /* Wait for response register to be ready */
81 dcn30m_smu_wait_for_response(clk_mgr, 10, 200000);
82
83 /* Clear response register */
84 REG_WRITE(DAL_RESP_REG, 0);
85
86 /* Set the parameter register for the SMU message */
87 REG_WRITE(DAL_ARG_REG, param_in);
88
89 /* Trigger the message transaction by writing the message ID */
90 REG_WRITE(DAL_MSG_REG, msg_id);
91
92 result = dcn30m_smu_wait_for_response(clk_mgr, 10, 200000);
93
94 if (IS_SMU_TIMEOUT(result))
95 dm_helpers_smu_timeout(CTX, msg_id, param_in, 10 * 200000);
96
97 /* Wait for response */
98 if (result == DALSMC_Result_OK) {
99 if (param_out)
100 *param_out = REG_READ(DAL_ARG_REG);
101
102 return true;
103 }
104
105 return false;
106 }
107
dcn30m_smu_set_smart_mux_switch(struct clk_mgr_internal * clk_mgr,uint32_t pins_to_set)108 uint32_t dcn30m_smu_set_smart_mux_switch(struct clk_mgr_internal *clk_mgr, uint32_t pins_to_set)
109 {
110 uint32_t response = 0;
111
112 smu_print("SMU Set SmartMux Switch: switch_dgpu = %d\n", pins_to_set);
113
114 dcn30m_smu_send_msg_with_param(clk_mgr,
115 DALSMC_MSG_SmartAccess, pins_to_set, &response);
116
117 return response;
118 }
119