1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dm_services.h"
27 #include "basics/dc_common.h"
28 #include "dc.h"
29 #include "core_types.h"
30 #include "resource.h"
31 #include "ipp.h"
32 #include "timing_generator.h"
33 #include "dc_dmub_srv.h"
34 #include "dc_state_priv.h"
35 #include "dc_stream_priv.h"
36
37 #define DC_LOGGER dc->ctx->logger
38 #ifndef MIN
39 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
40 #endif
41 #ifndef MAX
42 #define MAX(x, y) ((x > y) ? x : y)
43 #endif
44
45 /*******************************************************************************
46 * Private functions
47 ******************************************************************************/
update_stream_signal(struct dc_stream_state * stream,struct dc_sink * sink)48 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink)
49 {
50 if (sink->sink_signal == SIGNAL_TYPE_NONE)
51 stream->signal = stream->link->connector_signal;
52 else
53 stream->signal = sink->sink_signal;
54
55 if (dc_is_dvi_signal(stream->signal)) {
56 if (stream->ctx->dc->caps.dual_link_dvi &&
57 (stream->timing.pix_clk_100hz / 10) > TMDS_MAX_PIXEL_CLOCK &&
58 sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
59 stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
60 else
61 stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
62 }
63 }
64
dc_stream_construct(struct dc_stream_state * stream,struct dc_sink * dc_sink_data)65 bool dc_stream_construct(struct dc_stream_state *stream,
66 struct dc_sink *dc_sink_data)
67 {
68 uint32_t i = 0;
69
70 stream->sink = dc_sink_data;
71 dc_sink_retain(dc_sink_data);
72
73 stream->ctx = dc_sink_data->ctx;
74 stream->link = dc_sink_data->link;
75 stream->sink_patches = dc_sink_data->edid_caps.panel_patch;
76 stream->converter_disable_audio = dc_sink_data->converter_disable_audio;
77 stream->qs_bit = dc_sink_data->edid_caps.qs_bit;
78 stream->qy_bit = dc_sink_data->edid_caps.qy_bit;
79
80 /* Copy audio modes */
81 /* TODO - Remove this translation */
82 for (i = 0; i < (dc_sink_data->edid_caps.audio_mode_count); i++) {
83 stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count;
84 stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code;
85 stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate;
86 stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size;
87 }
88 stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count;
89 stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency;
90 stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency;
91 memmove(
92 stream->audio_info.display_name,
93 dc_sink_data->edid_caps.display_name,
94 AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS);
95 stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id;
96 stream->audio_info.product_id = dc_sink_data->edid_caps.product_id;
97 stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags;
98
99 if (dc_sink_data->dc_container_id != NULL) {
100 struct dc_container_id *dc_container_id = dc_sink_data->dc_container_id;
101
102 stream->audio_info.port_id[0] = dc_container_id->portId[0];
103 stream->audio_info.port_id[1] = dc_container_id->portId[1];
104 } else {
105 /* TODO - WindowDM has implemented,
106 other DMs need Unhardcode port_id */
107 stream->audio_info.port_id[0] = 0x5558859e;
108 stream->audio_info.port_id[1] = 0xd989449;
109 }
110
111 /* EDID CAP translation for HDMI 2.0 */
112 stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;
113
114 memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg));
115 stream->timing.dsc_cfg.num_slices_h = 0;
116 stream->timing.dsc_cfg.num_slices_v = 0;
117 stream->timing.dsc_cfg.bits_per_pixel = 128;
118 stream->timing.dsc_cfg.block_pred_enable = 1;
119 stream->timing.dsc_cfg.linebuf_depth = 9;
120 stream->timing.dsc_cfg.version_minor = 2;
121 stream->timing.dsc_cfg.ycbcr422_simple = 0;
122
123 update_stream_signal(stream, dc_sink_data);
124
125 stream->out_transfer_func.type = TF_TYPE_BYPASS;
126
127 dc_stream_assign_stream_id(stream);
128
129 return true;
130 }
131
dc_stream_destruct(struct dc_stream_state * stream)132 void dc_stream_destruct(struct dc_stream_state *stream)
133 {
134 dc_sink_release(stream->sink);
135 }
136
dc_stream_assign_stream_id(struct dc_stream_state * stream)137 void dc_stream_assign_stream_id(struct dc_stream_state *stream)
138 {
139 /* MSB is reserved to indicate phantoms */
140 stream->stream_id = stream->ctx->dc_stream_id_count;
141 stream->ctx->dc_stream_id_count++;
142 }
143
dc_stream_retain(struct dc_stream_state * stream)144 void dc_stream_retain(struct dc_stream_state *stream)
145 {
146 kref_get(&stream->refcount);
147 }
148
dc_stream_free(struct kref * kref)149 static void dc_stream_free(struct kref *kref)
150 {
151 struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount);
152
153 dc_stream_destruct(stream);
154 kfree(stream->update_scratch);
155 kfree(stream);
156 }
157
dc_stream_release(struct dc_stream_state * stream)158 void dc_stream_release(struct dc_stream_state *stream)
159 {
160 if (stream != NULL) {
161 kref_put(&stream->refcount, dc_stream_free);
162 }
163 }
164
dc_create_stream_for_sink(struct dc_sink * sink)165 struct dc_stream_state *dc_create_stream_for_sink(
166 struct dc_sink *sink)
167 {
168 struct dc_stream_state *stream = NULL;
169
170 if (sink == NULL)
171 goto fail;
172
173 stream = kzalloc_obj(struct dc_stream_state, GFP_ATOMIC);
174 if (stream == NULL)
175 goto fail;
176
177 stream->update_scratch = kzalloc((int32_t) dc_update_scratch_space_size(), GFP_ATOMIC);
178 if (stream->update_scratch == NULL)
179 goto fail;
180
181 if (dc_stream_construct(stream, sink) == false)
182 goto fail;
183
184 kref_init(&stream->refcount);
185
186 return stream;
187
188 fail:
189 if (stream) {
190 kfree(stream->update_scratch);
191 kfree(stream);
192 }
193
194 return NULL;
195 }
196
dc_copy_stream(const struct dc_stream_state * stream)197 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream)
198 {
199 struct dc_stream_state *new_stream;
200
201 new_stream = kmemdup(stream, sizeof(struct dc_stream_state), GFP_KERNEL);
202 if (!new_stream)
203 return NULL;
204
205 // Scratch is not meant to be reused across copies, as might have self-referential pointers
206 new_stream->update_scratch = kzalloc(
207 (int32_t) dc_update_scratch_space_size(),
208 GFP_KERNEL
209 );
210 if (!new_stream->update_scratch) {
211 kfree(new_stream);
212 return NULL;
213 }
214
215 if (new_stream->sink)
216 dc_sink_retain(new_stream->sink);
217
218 dc_stream_assign_stream_id(new_stream);
219
220 /* If using dynamic encoder assignment, wait till stream committed to assign encoder. */
221 if (new_stream->ctx->dc->res_pool->funcs->link_encs_assign &&
222 !new_stream->ctx->dc->config.unify_link_enc_assignment)
223 new_stream->link_enc = NULL;
224
225 kref_init(&new_stream->refcount);
226
227 return new_stream;
228 }
229
230 /**
231 * dc_stream_get_status() - Get current stream status of the given stream state
232 * @stream: The stream to get the stream status for.
233 *
234 * The given stream is expected to exist in dc->current_state. Otherwise, NULL
235 * will be returned.
236 */
dc_stream_get_status(struct dc_stream_state * stream)237 struct dc_stream_status *dc_stream_get_status(
238 struct dc_stream_state *stream)
239 {
240 struct dc *dc = stream->ctx->dc;
241 return dc_state_get_stream_status(dc->current_state, stream);
242 }
243
dc_stream_get_status_const(const struct dc_stream_state * stream)244 const struct dc_stream_status *dc_stream_get_status_const(
245 const struct dc_stream_state *stream)
246 {
247 struct dc *dc = stream->ctx->dc;
248
249 return dc_state_get_stream_status(dc->current_state, stream);
250 }
251
program_cursor_attributes(struct dc * dc,struct dc_stream_state * stream)252 void program_cursor_attributes(
253 struct dc *dc,
254 struct dc_stream_state *stream)
255 {
256 int i;
257 struct resource_context *res_ctx;
258 struct pipe_ctx *pipe_to_program = NULL;
259 bool enable_cursor_offload = dc_dmub_srv_is_cursor_offload_enabled(dc);
260
261 if (!stream)
262 return;
263
264 res_ctx = &dc->current_state->res_ctx;
265
266 for (i = 0; i < MAX_PIPES; i++) {
267 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
268
269 if (pipe_ctx->stream != stream)
270 continue;
271
272 if (!pipe_to_program) {
273 pipe_to_program = pipe_ctx;
274
275 if (enable_cursor_offload && dc->hwss.begin_cursor_offload_update) {
276 dc->hwss.begin_cursor_offload_update(dc, pipe_ctx);
277 } else {
278 dc->hwss.cursor_lock(dc, pipe_to_program, true);
279 if (pipe_to_program->next_odm_pipe)
280 dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, true);
281 }
282 }
283
284 dc->hwss.set_cursor_attribute(pipe_ctx);
285 if (dc->ctx->dmub_srv)
286 dc_send_update_cursor_info_to_dmu(pipe_ctx, i);
287 if (dc->hwss.set_cursor_sdr_white_level)
288 dc->hwss.set_cursor_sdr_white_level(pipe_ctx);
289 if (enable_cursor_offload && dc->hwss.update_cursor_offload_pipe)
290 dc->hwss.update_cursor_offload_pipe(dc, pipe_ctx);
291 }
292
293 if (pipe_to_program) {
294 if (enable_cursor_offload && dc->hwss.commit_cursor_offload_update) {
295 dc->hwss.commit_cursor_offload_update(dc, pipe_to_program);
296 } else {
297 dc->hwss.cursor_lock(dc, pipe_to_program, false);
298 if (pipe_to_program->next_odm_pipe)
299 dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, false);
300 }
301 }
302 }
303
304 /*
305 * dc_stream_check_cursor_attributes() - Check validitity of cursor attributes and surface address
306 */
dc_stream_check_cursor_attributes(const struct dc_stream_state * stream,struct dc_state * state,const struct dc_cursor_attributes * attributes)307 bool dc_stream_check_cursor_attributes(
308 const struct dc_stream_state *stream,
309 struct dc_state *state,
310 const struct dc_cursor_attributes *attributes)
311 {
312 const struct dc *dc;
313
314 unsigned int max_cursor_size;
315
316 if (NULL == stream) {
317 dm_error("DC: dc_stream is NULL!\n");
318 return false;
319 }
320 if (NULL == attributes) {
321 dm_error("DC: attributes is NULL!\n");
322 return false;
323 }
324
325 if (attributes->address.quad_part == 0) {
326 dm_output_to_console("DC: Cursor address is 0!\n");
327 return false;
328 }
329
330 dc = stream->ctx->dc;
331
332 /* SubVP is not compatible with HW cursor larger than what can fit in cursor SRAM.
333 * Therefore, if cursor is greater than this, fallback to SW cursor.
334 */
335 if (dc->debug.allow_sw_cursor_fallback && dc->res_pool->funcs->get_max_hw_cursor_size) {
336 max_cursor_size = dc->res_pool->funcs->get_max_hw_cursor_size(dc, state, stream);
337 max_cursor_size = max_cursor_size * max_cursor_size * 4;
338
339 if (attributes->height * attributes->width * 4 > max_cursor_size) {
340 return false;
341 }
342 }
343
344 return true;
345 }
346
347 /*
348 * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address
349 */
dc_stream_set_cursor_attributes(struct dc_stream_state * stream,const struct dc_cursor_attributes * attributes)350 bool dc_stream_set_cursor_attributes(
351 struct dc_stream_state *stream,
352 const struct dc_cursor_attributes *attributes)
353 {
354 bool result = false;
355
356 if (!stream)
357 return false;
358
359 if (dc_stream_check_cursor_attributes(stream, stream->ctx->dc->current_state, attributes)) {
360 stream->cursor_attributes = *attributes;
361 result = true;
362 }
363
364 return result;
365 }
366
dc_stream_program_cursor_attributes(struct dc_stream_state * stream,const struct dc_cursor_attributes * attributes)367 bool dc_stream_program_cursor_attributes(
368 struct dc_stream_state *stream,
369 const struct dc_cursor_attributes *attributes)
370 {
371 struct dc *dc;
372 bool reset_idle_optimizations = false;
373
374 if (!stream)
375 return false;
376
377 dc = stream->ctx->dc;
378
379 if (dc_stream_set_cursor_attributes(stream, attributes)) {
380 dc_z10_restore(dc);
381 /* disable idle optimizations while updating cursor */
382 if (dc->idle_optimizations_allowed) {
383 dc_allow_idle_optimizations(dc, false);
384 reset_idle_optimizations = true;
385 }
386
387 program_cursor_attributes(dc, stream);
388
389 /* re-enable idle optimizations if necessary */
390 if (reset_idle_optimizations && !dc->debug.disable_dmub_reallow_idle)
391 dc_allow_idle_optimizations(dc, true);
392
393 return true;
394 }
395
396 return false;
397 }
398
program_cursor_position(struct dc * dc,struct dc_stream_state * stream)399 void program_cursor_position(
400 struct dc *dc,
401 struct dc_stream_state *stream)
402 {
403 int i;
404 struct resource_context *res_ctx;
405 struct pipe_ctx *pipe_to_program = NULL;
406 bool enable_cursor_offload = dc_dmub_srv_is_cursor_offload_enabled(dc);
407
408 if (!stream)
409 return;
410
411 res_ctx = &dc->current_state->res_ctx;
412
413 for (i = 0; i < MAX_PIPES; i++) {
414 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
415
416 if (pipe_ctx->stream != stream ||
417 (!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) ||
418 !pipe_ctx->plane_state ||
419 (!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) ||
420 (!pipe_ctx->plane_res.ipp && !pipe_ctx->plane_res.dpp))
421 continue;
422
423 if (!pipe_to_program) {
424 pipe_to_program = pipe_ctx;
425
426 if (enable_cursor_offload && dc->hwss.begin_cursor_offload_update)
427 dc->hwss.begin_cursor_offload_update(dc, pipe_ctx);
428 else
429 dc->hwss.cursor_lock(dc, pipe_to_program, true);
430 }
431
432 dc->hwss.set_cursor_position(pipe_ctx);
433 if (enable_cursor_offload && dc->hwss.update_cursor_offload_pipe)
434 dc->hwss.update_cursor_offload_pipe(dc, pipe_ctx);
435
436 if (dc->ctx->dmub_srv)
437 dc_send_update_cursor_info_to_dmu(pipe_ctx, i);
438 }
439
440 if (pipe_to_program) {
441 if (enable_cursor_offload && dc->hwss.commit_cursor_offload_update)
442 dc->hwss.commit_cursor_offload_update(dc, pipe_to_program);
443 else
444 dc->hwss.cursor_lock(dc, pipe_to_program, false);
445 }
446 }
447
dc_stream_set_cursor_position(struct dc_stream_state * stream,const struct dc_cursor_position * position)448 bool dc_stream_set_cursor_position(
449 struct dc_stream_state *stream,
450 const struct dc_cursor_position *position)
451 {
452 if (NULL == stream) {
453 dm_error("DC: dc_stream is NULL!\n");
454 return false;
455 }
456
457 if (NULL == position) {
458 dm_error("DC: cursor position is NULL!\n");
459 return false;
460 }
461
462 stream->cursor_position = *position;
463
464
465 return true;
466 }
467
dc_stream_program_cursor_position(struct dc_stream_state * stream,const struct dc_cursor_position * position)468 bool dc_stream_program_cursor_position(
469 struct dc_stream_state *stream,
470 const struct dc_cursor_position *position)
471 {
472 struct dc *dc;
473 bool reset_idle_optimizations = false;
474 const struct dc_cursor_position *old_position;
475
476 if (!stream)
477 return false;
478
479 old_position = &stream->cursor_position;
480 dc = stream->ctx->dc;
481
482 if (dc_stream_set_cursor_position(stream, position)) {
483 dc_z10_restore(dc);
484
485 /* disable idle optimizations if enabling cursor */
486 if (dc->idle_optimizations_allowed &&
487 (!old_position->enable || dc->debug.exit_idle_opt_for_cursor_updates) &&
488 position->enable) {
489 dc_allow_idle_optimizations(dc, false);
490 reset_idle_optimizations = true;
491 }
492
493 program_cursor_position(dc, stream);
494 /* re-enable idle optimizations if necessary */
495 if (reset_idle_optimizations && !dc->debug.disable_dmub_reallow_idle)
496 dc_allow_idle_optimizations(dc, true);
497
498 /* apply/update visual confirm */
499 if (dc->debug.visual_confirm == VISUAL_CONFIRM_HW_CURSOR) {
500 /* update software state */
501 int i;
502
503 for (i = 0; i < dc->res_pool->pipe_count; i++) {
504 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
505
506 /* adjust visual confirm color for all pipes with current stream */
507 if (stream == pipe_ctx->stream) {
508 get_cursor_visual_confirm_color(pipe_ctx, &(pipe_ctx->visual_confirm_color));
509
510 /* programming hardware */
511 if (pipe_ctx->plane_state)
512 dc->hwss.update_visual_confirm_color(dc, pipe_ctx,
513 pipe_ctx->plane_res.hubp->mpcc_id);
514 }
515 }
516 }
517
518 if (stream->drr_trigger_mode == DRR_TRIGGER_ON_FLIP_AND_CURSOR) {
519 /* apply manual trigger */
520 int i;
521
522 for (i = 0; i < dc->res_pool->pipe_count; i++) {
523 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
524
525 /* trigger event on first pipe with current stream */
526 if (stream == pipe_ctx->stream) {
527 pipe_ctx->stream_res.tg->funcs->program_manual_trigger(pipe_ctx->stream_res.tg);
528 break;
529 }
530 }
531 }
532
533 return true;
534 }
535
536 return false;
537 }
538
dc_stream_add_writeback(struct dc * dc,struct dc_stream_state * stream,struct dc_writeback_info * wb_info)539 bool dc_stream_add_writeback(struct dc *dc,
540 struct dc_stream_state *stream,
541 struct dc_writeback_info *wb_info)
542 {
543 bool isDrc = false;
544 int i = 0;
545 struct dwbc *dwb;
546
547 if (stream == NULL) {
548 dm_error("DC: dc_stream is NULL!\n");
549 return false;
550 }
551
552 if (wb_info == NULL) {
553 dm_error("DC: dc_writeback_info is NULL!\n");
554 return false;
555 }
556
557 if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) {
558 dm_error("DC: writeback pipe is invalid!\n");
559 return false;
560 }
561
562 dc_exit_ips_for_hw_access(dc);
563
564 wb_info->dwb_params.out_transfer_func = &stream->out_transfer_func;
565
566 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
567 dwb->dwb_is_drc = false;
568
569 /* recalculate and apply DML parameters */
570
571 for (i = 0; i < stream->num_wb_info; i++) {
572 /*dynamic update*/
573 if (stream->writeback_info[i].wb_enabled &&
574 stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) {
575 stream->writeback_info[i] = *wb_info;
576 isDrc = true;
577 }
578 }
579
580 if (!isDrc) {
581 ASSERT(stream->num_wb_info + 1 <= MAX_DWB_PIPES);
582 stream->writeback_info[stream->num_wb_info++] = *wb_info;
583 }
584
585 if (dc->hwss.enable_writeback) {
586 struct dc_stream_status *stream_status = dc_stream_get_status(stream);
587 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
588 if (stream_status)
589 dwb->otg_inst = stream_status->primary_otg_inst;
590 }
591
592 if (!dc->hwss.update_bandwidth(dc, dc->current_state)) {
593 dm_error("DC: update_bandwidth failed!\n");
594 return false;
595 }
596
597 /* enable writeback */
598 if (dc->hwss.enable_writeback) {
599 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
600
601 if (dwb->funcs->is_enabled(dwb)) {
602 /* writeback pipe already enabled, only need to update */
603 dc->hwss.update_writeback(dc, wb_info, dc->current_state);
604 } else {
605 /* Enable writeback pipe from scratch*/
606 dc->hwss.enable_writeback(dc, wb_info, dc->current_state);
607 }
608 }
609
610 return true;
611 }
612
dc_stream_fc_disable_writeback(struct dc * dc,struct dc_stream_state * stream,uint32_t dwb_pipe_inst)613 bool dc_stream_fc_disable_writeback(struct dc *dc,
614 struct dc_stream_state *stream,
615 uint32_t dwb_pipe_inst)
616 {
617 struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst];
618
619 if (stream == NULL) {
620 dm_error("DC: dc_stream is NULL!\n");
621 return false;
622 }
623
624 if (dwb_pipe_inst >= MAX_DWB_PIPES) {
625 dm_error("DC: writeback pipe is invalid!\n");
626 return false;
627 }
628
629 if (stream->num_wb_info > MAX_DWB_PIPES) {
630 dm_error("DC: num_wb_info is invalid!\n");
631 return false;
632 }
633
634 dc_exit_ips_for_hw_access(dc);
635
636 if (dwb->funcs->set_fc_enable)
637 dwb->funcs->set_fc_enable(dwb, DWB_FRAME_CAPTURE_DISABLE);
638
639 return true;
640 }
641
642 /**
643 * dc_stream_remove_writeback() - Disables writeback and removes writeback info.
644 * @dc: Display core control structure.
645 * @stream: Display core stream state.
646 * @dwb_pipe_inst: Display writeback pipe.
647 *
648 * Return: returns true on success, false otherwise.
649 */
dc_stream_remove_writeback(struct dc * dc,struct dc_stream_state * stream,uint32_t dwb_pipe_inst)650 bool dc_stream_remove_writeback(struct dc *dc,
651 struct dc_stream_state *stream,
652 uint32_t dwb_pipe_inst)
653 {
654 unsigned int i, j;
655 if (stream == NULL) {
656 dm_error("DC: dc_stream is NULL!\n");
657 return false;
658 }
659
660 if (dwb_pipe_inst >= MAX_DWB_PIPES) {
661 dm_error("DC: writeback pipe is invalid!\n");
662 return false;
663 }
664
665 if (stream->num_wb_info > MAX_DWB_PIPES) {
666 dm_error("DC: num_wb_info is invalid!\n");
667 return false;
668 }
669
670 /* remove writeback info for disabled writeback pipes from stream */
671 for (i = 0, j = 0; i < stream->num_wb_info; i++) {
672 if (stream->writeback_info[i].wb_enabled) {
673
674 if (stream->writeback_info[i].dwb_pipe_inst == dwb_pipe_inst)
675 stream->writeback_info[i].wb_enabled = false;
676
677 /* trim the array */
678 if (j < i) {
679 memcpy(&stream->writeback_info[j], &stream->writeback_info[i],
680 sizeof(struct dc_writeback_info));
681 j++;
682 }
683 }
684 }
685 stream->num_wb_info = j;
686
687 /* recalculate and apply DML parameters */
688 if (!dc->hwss.update_bandwidth(dc, dc->current_state)) {
689 dm_error("DC: update_bandwidth failed!\n");
690 return false;
691 }
692
693 dc_exit_ips_for_hw_access(dc);
694
695 /* disable writeback */
696 if (dc->hwss.disable_writeback) {
697 struct dwbc *dwb = dc->res_pool->dwbc[dwb_pipe_inst];
698
699 if (dwb->funcs->is_enabled(dwb))
700 dc->hwss.disable_writeback(dc, dwb_pipe_inst);
701 }
702
703 return true;
704 }
705
dc_stream_get_vblank_counter(const struct dc_stream_state * stream)706 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream)
707 {
708 uint8_t i;
709 struct dc *dc = stream->ctx->dc;
710 struct resource_context *res_ctx =
711 &dc->current_state->res_ctx;
712
713 dc_exit_ips_for_hw_access(dc);
714
715 for (i = 0; i < MAX_PIPES; i++) {
716 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
717
718 if (res_ctx->pipe_ctx[i].stream != stream || !tg)
719 continue;
720
721 return tg->funcs->get_frame_count(tg);
722 }
723
724 return 0;
725 }
726
dc_stream_send_dp_sdp(const struct dc_stream_state * stream,const uint8_t * custom_sdp_message,unsigned int sdp_message_size)727 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
728 const uint8_t *custom_sdp_message,
729 unsigned int sdp_message_size)
730 {
731 int i;
732 struct dc *dc;
733 struct resource_context *res_ctx;
734
735 if (stream == NULL) {
736 dm_error("DC: dc_stream is NULL!\n");
737 return false;
738 }
739
740 dc = stream->ctx->dc;
741 res_ctx = &dc->current_state->res_ctx;
742
743 dc_exit_ips_for_hw_access(dc);
744
745 for (i = 0; i < MAX_PIPES; i++) {
746 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
747
748 if (pipe_ctx->stream != stream)
749 continue;
750
751 if (dc->hwss.send_immediate_sdp_message != NULL)
752 dc->hwss.send_immediate_sdp_message(pipe_ctx,
753 custom_sdp_message,
754 sdp_message_size);
755 else
756 DC_LOG_WARNING("%s:send_immediate_sdp_message not implemented on this ASIC\n",
757 __func__);
758
759 }
760
761 return true;
762 }
763
dc_stream_get_scanoutpos(const struct dc_stream_state * stream,uint32_t * v_blank_start,uint32_t * v_blank_end,uint32_t * h_position,uint32_t * v_position)764 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
765 uint32_t *v_blank_start,
766 uint32_t *v_blank_end,
767 uint32_t *h_position,
768 uint32_t *v_position)
769 {
770 uint8_t i;
771 bool ret = false;
772 struct dc *dc;
773 struct resource_context *res_ctx;
774
775 if (!stream->ctx)
776 return false;
777
778 dc = stream->ctx->dc;
779 res_ctx = &dc->current_state->res_ctx;
780
781 dc_exit_ips_for_hw_access(dc);
782
783 for (i = 0; i < MAX_PIPES; i++) {
784 struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
785
786 if (res_ctx->pipe_ctx[i].stream != stream || !tg)
787 continue;
788
789 tg->funcs->get_scanoutpos(tg,
790 v_blank_start,
791 v_blank_end,
792 h_position,
793 v_position);
794
795 ret = true;
796 break;
797 }
798
799 return ret;
800 }
801
dc_stream_dmdata_status_done(struct dc * dc,struct dc_stream_state * stream)802 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream)
803 {
804 struct pipe_ctx *pipe = NULL;
805 int i;
806
807 if (!dc->hwss.dmdata_status_done)
808 return false;
809
810 for (i = 0; i < MAX_PIPES; i++) {
811 pipe = &dc->current_state->res_ctx.pipe_ctx[i];
812 if (pipe->stream == stream)
813 break;
814 }
815 /* Stream not found, by default we'll assume HUBP fetched dm data */
816 if (i == MAX_PIPES)
817 return true;
818
819 dc_exit_ips_for_hw_access(dc);
820
821 return dc->hwss.dmdata_status_done(pipe);
822 }
823
dc_stream_set_dynamic_metadata(struct dc * dc,struct dc_stream_state * stream,struct dc_dmdata_attributes * attr)824 bool dc_stream_set_dynamic_metadata(struct dc *dc,
825 struct dc_stream_state *stream,
826 struct dc_dmdata_attributes *attr)
827 {
828 struct pipe_ctx *pipe_ctx = NULL;
829 struct hubp *hubp;
830 int i;
831
832 /* Dynamic metadata is only supported on HDMI or DP */
833 if (!dc_is_hdmi_signal(stream->signal) && !dc_is_dp_signal(stream->signal))
834 return false;
835
836 /* Check hardware support */
837 if (!dc->hwss.program_dmdata_engine)
838 return false;
839
840 for (i = 0; i < MAX_PIPES; i++) {
841 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
842 if (pipe_ctx->stream == stream)
843 break;
844 }
845
846 if (i == MAX_PIPES)
847 return false;
848
849 hubp = pipe_ctx->plane_res.hubp;
850 if (hubp == NULL)
851 return false;
852
853 pipe_ctx->stream->dmdata_address = attr->address;
854
855 dc_exit_ips_for_hw_access(dc);
856
857 dc->hwss.program_dmdata_engine(pipe_ctx);
858
859 if (hubp->funcs->dmdata_set_attributes != NULL &&
860 pipe_ctx->stream->dmdata_address.quad_part != 0) {
861 hubp->funcs->dmdata_set_attributes(hubp, attr);
862 }
863
864 return true;
865 }
866
dc_stream_add_dsc_to_resource(struct dc * dc,struct dc_state * state,struct dc_stream_state * stream)867 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
868 struct dc_state *state,
869 struct dc_stream_state *stream)
870 {
871 if (dc->res_pool->funcs->add_dsc_to_stream_resource) {
872 return dc->res_pool->funcs->add_dsc_to_stream_resource(dc, state, stream);
873 } else {
874 return DC_NO_DSC_RESOURCE;
875 }
876 }
877
dc_stream_get_pipe_ctx(struct dc_stream_state * stream)878 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream)
879 {
880 int i = 0;
881
882 for (i = 0; i < MAX_PIPES; i++) {
883 struct pipe_ctx *pipe = &stream->ctx->dc->current_state->res_ctx.pipe_ctx[i];
884
885 if (pipe->stream == stream)
886 return pipe;
887 }
888
889 return NULL;
890 }
891
dc_stream_log(const struct dc * dc,const struct dc_stream_state * stream)892 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream)
893 {
894 DC_LOG_DC(
895 "core_stream 0x%p: src: %d, %d, %d, %d; dst: %d, %d, %d, %d, colorSpace:%d\n",
896 stream,
897 stream->src.x,
898 stream->src.y,
899 stream->src.width,
900 stream->src.height,
901 stream->dst.x,
902 stream->dst.y,
903 stream->dst.width,
904 stream->dst.height,
905 stream->output_color_space);
906 DC_LOG_DC(
907 "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixel_encoding:%s, color_depth:%s\n",
908 stream->timing.pix_clk_100hz / 10,
909 stream->timing.h_total,
910 stream->timing.v_total,
911 dc_pixel_encoding_to_str(stream->timing.pixel_encoding),
912 dc_color_depth_to_str(stream->timing.display_color_depth));
913 DC_LOG_DC(
914 "\tlink: %d\n",
915 stream->link->link_index);
916
917 DC_LOG_DC(
918 "\tdsc: %d, mst_pbn: %d\n",
919 stream->timing.flags.DSC,
920 stream->timing.dsc_cfg.mst_pbn);
921
922 if (stream->sink) {
923 if (stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
924 stream->sink->sink_signal != SIGNAL_TYPE_NONE) {
925
926 DC_LOG_DC(
927 "\tsignal: %x dispname: %s manufacturer_id: 0x%x product_id: 0x%x\n",
928 stream->signal,
929 stream->sink->edid_caps.display_name,
930 stream->sink->edid_caps.manufacturer_id,
931 stream->sink->edid_caps.product_id);
932 }
933 }
934 }
935
936 /*
937 * dc_stream_get_3dlut()
938 * Requirements:
939 * 1. Is stream already owns an RMCM instance, return it.
940 * 2. If it doesn't and we don't need to allocate, return NULL.
941 * 3. If there's a free RMCM instance, assign to stream and return it.
942 * 4. If no free RMCM instances, return NULL.
943 */
944
dc_stream_get_3dlut_for_stream(const struct dc * dc,const struct dc_stream_state * stream,bool allocate_one)945 struct dc_rmcm_3dlut *dc_stream_get_3dlut_for_stream(
946 const struct dc *dc,
947 const struct dc_stream_state *stream,
948 bool allocate_one)
949 {
950 unsigned int num_rmcm = dc->caps.color.mpc.num_rmcm_3dluts;
951
952 // see if one is allocated for this stream
953 for (int i = 0; i < num_rmcm; i++) {
954 if (dc->res_pool->rmcm_3dlut[i].isInUse &&
955 dc->res_pool->rmcm_3dlut[i].stream == stream)
956 return &dc->res_pool->rmcm_3dlut[i];
957 }
958
959 //case: not found one, and dont need to allocate
960 if (!allocate_one)
961 return NULL;
962
963 //see if there is an unused 3dlut, allocate
964 for (int i = 0; i < num_rmcm; i++) {
965 if (!dc->res_pool->rmcm_3dlut[i].isInUse) {
966 dc->res_pool->rmcm_3dlut[i].isInUse = true;
967 dc->res_pool->rmcm_3dlut[i].stream = stream;
968 return &dc->res_pool->rmcm_3dlut[i];
969 }
970 }
971
972 //dont have a 3dlut
973 return NULL;
974 }
975
976
dc_stream_release_3dlut_for_stream(const struct dc * dc,const struct dc_stream_state * stream)977 void dc_stream_release_3dlut_for_stream(
978 const struct dc *dc,
979 const struct dc_stream_state *stream)
980 {
981 struct dc_rmcm_3dlut *rmcm_3dlut =
982 dc_stream_get_3dlut_for_stream(dc, stream, false);
983
984 if (rmcm_3dlut) {
985 rmcm_3dlut->isInUse = false;
986 rmcm_3dlut->stream = NULL;
987 rmcm_3dlut->protection_bits = 0;
988 }
989 }
990
991
dc_stream_init_rmcm_3dlut(struct dc * dc)992 void dc_stream_init_rmcm_3dlut(struct dc *dc)
993 {
994 unsigned int num_rmcm = dc->caps.color.mpc.num_rmcm_3dluts;
995
996 for (int i = 0; i < num_rmcm; i++) {
997 dc->res_pool->rmcm_3dlut[i].isInUse = false;
998 dc->res_pool->rmcm_3dlut[i].stream = NULL;
999 dc->res_pool->rmcm_3dlut[i].protection_bits = 0;
1000 }
1001 }
1002
1003 /*
1004 * Finds the greatest index in refresh_rate_hz that contains a value <= refresh
1005 */
dc_stream_get_nearest_smallest_index(struct dc_stream_state * stream,int refresh)1006 static int dc_stream_get_nearest_smallest_index(struct dc_stream_state *stream, int refresh)
1007 {
1008 for (int i = 0; i < (LUMINANCE_DATA_TABLE_SIZE - 1); ++i) {
1009 if ((stream->lumin_data.refresh_rate_hz[i] <= refresh) && (refresh < stream->lumin_data.refresh_rate_hz[i + 1])) {
1010 return i;
1011 }
1012 }
1013 return 9;
1014 }
1015
1016 /*
1017 * Finds a corresponding brightness for a given refresh rate between 2 given indices, where index1 < index2
1018 */
dc_stream_get_brightness_millinits_linear_interpolation(struct dc_stream_state * stream,int index1,int index2,int refresh_hz)1019 static int dc_stream_get_brightness_millinits_linear_interpolation (struct dc_stream_state *stream,
1020 int index1,
1021 int index2,
1022 int refresh_hz)
1023 {
1024 long long slope = 0;
1025 if (stream->lumin_data.refresh_rate_hz[index2] != stream->lumin_data.refresh_rate_hz[index1]) {
1026 slope = (stream->lumin_data.luminance_millinits[index2] - stream->lumin_data.luminance_millinits[index1]) /
1027 (stream->lumin_data.refresh_rate_hz[index2] - stream->lumin_data.refresh_rate_hz[index1]);
1028 }
1029
1030 int y_intercept = stream->lumin_data.luminance_millinits[index2] - slope * stream->lumin_data.refresh_rate_hz[index2];
1031
1032 return (y_intercept + refresh_hz * slope);
1033 }
1034
1035 /*
1036 * Finds a corresponding refresh rate for a given brightness between 2 given indices, where index1 < index2
1037 */
dc_stream_get_refresh_hz_linear_interpolation(struct dc_stream_state * stream,int index1,int index2,int brightness_millinits)1038 static int dc_stream_get_refresh_hz_linear_interpolation (struct dc_stream_state *stream,
1039 int index1,
1040 int index2,
1041 int brightness_millinits)
1042 {
1043 long long slope = 1;
1044 if (stream->lumin_data.refresh_rate_hz[index2] != stream->lumin_data.refresh_rate_hz[index1]) {
1045 slope = (stream->lumin_data.luminance_millinits[index2] - stream->lumin_data.luminance_millinits[index1]) /
1046 (stream->lumin_data.refresh_rate_hz[index2] - stream->lumin_data.refresh_rate_hz[index1]);
1047 }
1048
1049 int y_intercept = stream->lumin_data.luminance_millinits[index2] - slope * stream->lumin_data.refresh_rate_hz[index2];
1050
1051 return ((int)div64_s64((brightness_millinits - y_intercept), slope));
1052 }
1053
1054 /*
1055 * Finds the current brightness in millinits given a refresh rate
1056 */
dc_stream_get_brightness_millinits_from_refresh(struct dc_stream_state * stream,int refresh_hz)1057 static int dc_stream_get_brightness_millinits_from_refresh (struct dc_stream_state *stream, int refresh_hz)
1058 {
1059 int nearest_smallest_index = dc_stream_get_nearest_smallest_index(stream, refresh_hz);
1060 int nearest_smallest_value = stream->lumin_data.refresh_rate_hz[nearest_smallest_index];
1061
1062 if (nearest_smallest_value == refresh_hz)
1063 return stream->lumin_data.luminance_millinits[nearest_smallest_index];
1064
1065 if (nearest_smallest_index >= 9)
1066 return dc_stream_get_brightness_millinits_linear_interpolation(stream, nearest_smallest_index - 1, nearest_smallest_index, refresh_hz);
1067
1068 if (nearest_smallest_value == stream->lumin_data.refresh_rate_hz[nearest_smallest_index + 1])
1069 return stream->lumin_data.luminance_millinits[nearest_smallest_index];
1070
1071 return dc_stream_get_brightness_millinits_linear_interpolation(stream, nearest_smallest_index, nearest_smallest_index + 1, refresh_hz);
1072 }
1073
1074 /*
1075 * Finds the lowest/highest refresh rate (depending on search_for_max_increase)
1076 * that can be achieved from starting_refresh_hz while staying
1077 * within flicker criteria
1078 */
dc_stream_calculate_flickerless_refresh_rate(struct dc_stream_state * stream,int current_brightness,int starting_refresh_hz,bool is_gaming,bool search_for_max_increase)1079 static int dc_stream_calculate_flickerless_refresh_rate(struct dc_stream_state *stream,
1080 int current_brightness,
1081 int starting_refresh_hz,
1082 bool is_gaming,
1083 bool search_for_max_increase)
1084 {
1085 int nearest_smallest_index = dc_stream_get_nearest_smallest_index(stream, starting_refresh_hz);
1086
1087 int flicker_criteria_millinits = is_gaming ?
1088 stream->lumin_data.flicker_criteria_milli_nits_GAMING :
1089 stream->lumin_data.flicker_criteria_milli_nits_STATIC;
1090
1091 int safe_upper_bound = current_brightness + flicker_criteria_millinits;
1092 int safe_lower_bound = current_brightness - flicker_criteria_millinits;
1093 int lumin_millinits_temp = 0;
1094
1095 int offset = -1;
1096 if (search_for_max_increase) {
1097 offset = 1;
1098 }
1099
1100 /*
1101 * Increments up or down by 1 depending on search_for_max_increase
1102 */
1103 for (int i = nearest_smallest_index; (i > 0 && !search_for_max_increase) || (i < (LUMINANCE_DATA_TABLE_SIZE - 1) && search_for_max_increase); i += offset) {
1104
1105 lumin_millinits_temp = stream->lumin_data.luminance_millinits[i + offset];
1106
1107 if ((lumin_millinits_temp >= safe_upper_bound) || (lumin_millinits_temp <= safe_lower_bound)) {
1108
1109 if (stream->lumin_data.refresh_rate_hz[i + offset] == stream->lumin_data.refresh_rate_hz[i])
1110 return stream->lumin_data.refresh_rate_hz[i];
1111
1112 int target_brightness = (stream->lumin_data.luminance_millinits[i + offset] >= (current_brightness + flicker_criteria_millinits)) ?
1113 current_brightness + flicker_criteria_millinits :
1114 current_brightness - flicker_criteria_millinits;
1115
1116 int refresh = 0;
1117
1118 /*
1119 * Need the second input to be < third input for dc_stream_get_refresh_hz_linear_interpolation
1120 */
1121 if (search_for_max_increase)
1122 refresh = dc_stream_get_refresh_hz_linear_interpolation(stream, i, i + offset, target_brightness);
1123 else
1124 refresh = dc_stream_get_refresh_hz_linear_interpolation(stream, i + offset, i, target_brightness);
1125
1126 if (refresh == stream->lumin_data.refresh_rate_hz[i + offset])
1127 return stream->lumin_data.refresh_rate_hz[i + offset];
1128
1129 return refresh;
1130 }
1131 }
1132
1133 if (search_for_max_increase)
1134 return (int)div64_s64((long long)stream->timing.pix_clk_100hz*100, stream->timing.v_total*(long long)stream->timing.h_total);
1135 else
1136 return stream->lumin_data.refresh_rate_hz[0];
1137 }
1138
1139 /*
1140 * Gets the max delta luminance within a specified refresh range
1141 */
dc_stream_get_max_delta_lumin_millinits(struct dc_stream_state * stream,int hz1,int hz2,bool isGaming)1142 static int dc_stream_get_max_delta_lumin_millinits(struct dc_stream_state *stream, int hz1, int hz2, bool isGaming)
1143 {
1144 int lower_refresh_brightness = dc_stream_get_brightness_millinits_from_refresh (stream, hz1);
1145 int higher_refresh_brightness = dc_stream_get_brightness_millinits_from_refresh (stream, hz2);
1146
1147 int min = lower_refresh_brightness;
1148 int max = higher_refresh_brightness;
1149
1150 /*
1151 * Static screen, therefore no need to scan through array
1152 */
1153 if (!isGaming) {
1154 if (lower_refresh_brightness >= higher_refresh_brightness) {
1155 return lower_refresh_brightness - higher_refresh_brightness;
1156 }
1157 return higher_refresh_brightness - lower_refresh_brightness;
1158 }
1159
1160 min = MIN(lower_refresh_brightness, higher_refresh_brightness);
1161 max = MAX(lower_refresh_brightness, higher_refresh_brightness);
1162
1163 int nearest_smallest_index = dc_stream_get_nearest_smallest_index(stream, hz1);
1164
1165 for (; nearest_smallest_index < (LUMINANCE_DATA_TABLE_SIZE - 1) &&
1166 stream->lumin_data.refresh_rate_hz[nearest_smallest_index + 1] <= hz2 ; nearest_smallest_index++) {
1167 min = MIN(min, stream->lumin_data.luminance_millinits[nearest_smallest_index + 1]);
1168 max = MAX(max, stream->lumin_data.luminance_millinits[nearest_smallest_index + 1]);
1169 }
1170
1171 return (max - min);
1172 }
1173
1174 /*
1175 * Determines the max flickerless instant vtotal delta for a stream.
1176 * Determines vtotal increase/decrease based on the bool "increase"
1177 */
dc_stream_get_max_flickerless_instant_vtotal_delta(struct dc_stream_state * stream,bool is_gaming,bool increase)1178 static unsigned int dc_stream_get_max_flickerless_instant_vtotal_delta(struct dc_stream_state *stream, bool is_gaming, bool increase)
1179 {
1180 if (stream->timing.v_total * stream->timing.h_total == 0)
1181 return 0;
1182
1183 int current_refresh_hz = (int)div64_s64((long long)stream->timing.pix_clk_100hz*100, stream->timing.v_total*(long long)stream->timing.h_total);
1184
1185 int safe_refresh_hz = dc_stream_calculate_flickerless_refresh_rate(stream,
1186 dc_stream_get_brightness_millinits_from_refresh(stream, current_refresh_hz),
1187 current_refresh_hz,
1188 is_gaming,
1189 increase);
1190
1191 int safe_refresh_v_total = (int)div64_s64((long long)stream->timing.pix_clk_100hz*100, safe_refresh_hz*(long long)stream->timing.h_total);
1192
1193 if (increase)
1194 return (((int) stream->timing.v_total - safe_refresh_v_total) >= 0) ? (stream->timing.v_total - safe_refresh_v_total) : 0;
1195
1196 return ((safe_refresh_v_total - (int) stream->timing.v_total) >= 0) ? (safe_refresh_v_total - stream->timing.v_total) : 0;
1197 }
1198
1199 /*
1200 * Finds the highest refresh rate that can be achieved
1201 * from starting_refresh_hz while staying within flicker criteria
1202 */
dc_stream_calculate_max_flickerless_refresh_rate(struct dc_stream_state * stream,int starting_refresh_hz,bool is_gaming)1203 int dc_stream_calculate_max_flickerless_refresh_rate(struct dc_stream_state *stream, int starting_refresh_hz, bool is_gaming)
1204 {
1205 if (!stream->lumin_data.is_valid)
1206 return 0;
1207
1208 int current_brightness = dc_stream_get_brightness_millinits_from_refresh(stream, starting_refresh_hz);
1209
1210 return dc_stream_calculate_flickerless_refresh_rate(stream,
1211 current_brightness,
1212 starting_refresh_hz,
1213 is_gaming,
1214 true);
1215 }
1216
1217 /*
1218 * Finds the lowest refresh rate that can be achieved
1219 * from starting_refresh_hz while staying within flicker criteria
1220 */
dc_stream_calculate_min_flickerless_refresh_rate(struct dc_stream_state * stream,int starting_refresh_hz,bool is_gaming)1221 int dc_stream_calculate_min_flickerless_refresh_rate(struct dc_stream_state *stream, int starting_refresh_hz, bool is_gaming)
1222 {
1223 if (!stream->lumin_data.is_valid)
1224 return 0;
1225
1226 int current_brightness = dc_stream_get_brightness_millinits_from_refresh(stream, starting_refresh_hz);
1227
1228 return dc_stream_calculate_flickerless_refresh_rate(stream,
1229 current_brightness,
1230 starting_refresh_hz,
1231 is_gaming,
1232 false);
1233 }
1234
1235 /*
1236 * Determines if there will be a flicker when moving between 2 refresh rates
1237 */
dc_stream_is_refresh_rate_range_flickerless(struct dc_stream_state * stream,int hz1,int hz2,bool is_gaming)1238 bool dc_stream_is_refresh_rate_range_flickerless(struct dc_stream_state *stream, int hz1, int hz2, bool is_gaming)
1239 {
1240
1241 /*
1242 * Assume that we wont flicker if there is invalid data
1243 */
1244 if (!stream->lumin_data.is_valid)
1245 return false;
1246
1247 int dl = dc_stream_get_max_delta_lumin_millinits(stream, hz1, hz2, is_gaming);
1248
1249 int flicker_criteria_millinits = (is_gaming) ?
1250 stream->lumin_data.flicker_criteria_milli_nits_GAMING :
1251 stream->lumin_data.flicker_criteria_milli_nits_STATIC;
1252
1253 return (dl <= flicker_criteria_millinits);
1254 }
1255
1256 /*
1257 * Determines the max instant vtotal delta increase that can be applied without
1258 * flickering for a given stream
1259 */
dc_stream_get_max_flickerless_instant_vtotal_decrease(struct dc_stream_state * stream,bool is_gaming)1260 unsigned int dc_stream_get_max_flickerless_instant_vtotal_decrease(struct dc_stream_state *stream,
1261 bool is_gaming)
1262 {
1263 if (!stream->lumin_data.is_valid)
1264 return 0;
1265
1266 return dc_stream_get_max_flickerless_instant_vtotal_delta(stream, is_gaming, true);
1267 }
1268
1269 /*
1270 * Determines the max instant vtotal delta decrease that can be applied without
1271 * flickering for a given stream
1272 */
dc_stream_get_max_flickerless_instant_vtotal_increase(struct dc_stream_state * stream,bool is_gaming)1273 unsigned int dc_stream_get_max_flickerless_instant_vtotal_increase(struct dc_stream_state *stream,
1274 bool is_gaming)
1275 {
1276 if (!stream->lumin_data.is_valid)
1277 return 0;
1278
1279 return dc_stream_get_max_flickerless_instant_vtotal_delta(stream, is_gaming, false);
1280 }
1281
dc_stream_is_cursor_limit_pending(struct dc * dc,struct dc_stream_state * stream)1282 bool dc_stream_is_cursor_limit_pending(struct dc *dc, struct dc_stream_state *stream)
1283 {
1284 bool is_limit_pending = false;
1285
1286 if (dc->current_state)
1287 is_limit_pending = dc_state_get_stream_cursor_subvp_limit(stream, dc->current_state);
1288
1289 return is_limit_pending;
1290 }
1291
dc_stream_can_clear_cursor_limit(struct dc * dc,struct dc_stream_state * stream)1292 bool dc_stream_can_clear_cursor_limit(struct dc *dc, struct dc_stream_state *stream)
1293 {
1294 bool can_clear_limit = false;
1295
1296 if (dc->current_state)
1297 can_clear_limit = dc_state_get_stream_cursor_subvp_limit(stream, dc->current_state) &&
1298 (stream->hw_cursor_req ||
1299 !stream->cursor_position.enable ||
1300 dc_stream_check_cursor_attributes(stream, dc->current_state, &stream->cursor_attributes));
1301
1302 return can_clear_limit;
1303 }
1304